1 /*
2  * copy offload engine support
3  *
4  * Copyright © 2006, Intel Corporation.
5  *
6  *      Dan Williams <dan.j.williams@intel.com>
7  *
8  *      with architecture considerations by:
9  *      Neil Brown <neilb@suse.de>
10  *      Jeff Garzik <jeff@garzik.org>
11  *
12  * This program is free software; you can redistribute it and/or modify it
13  * under the terms and conditions of the GNU General Public License,
14  * version 2, as published by the Free Software Foundation.
15  *
16  * This program is distributed in the hope it will be useful, but WITHOUT
17  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
18  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
19  * more details.
20  *
21  * You should have received a copy of the GNU General Public License along with
22  * this program; if not, write to the Free Software Foundation, Inc.,
23  * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
24  *
25  */
26 #include <linux/kernel.h>
27 #include <linux/highmem.h>
28 #include <linux/mm.h>
29 #include <linux/dma-mapping.h>
30 #include <linux/async_tx.h>
31 
32 /**
33  * async_memcpy - attempt to copy memory with a dma engine.
34  * @dest: destination page
35  * @src: src page
36  * @offset: offset in pages to start transaction
37  * @len: length in bytes
38  * @flags: ASYNC_TX_ASSUME_COHERENT, ASYNC_TX_ACK, ASYNC_TX_DEP_ACK,
39  * @depend_tx: memcpy depends on the result of this transaction
40  * @cb_fn: function to call when the memcpy completes
41  * @cb_param: parameter to pass to the callback routine
42  */
43 struct dma_async_tx_descriptor *
44 async_memcpy(struct page *dest, struct page *src, unsigned int dest_offset,
45 	unsigned int src_offset, size_t len, enum async_tx_flags flags,
46 	struct dma_async_tx_descriptor *depend_tx,
47 	dma_async_tx_callback cb_fn, void *cb_param)
48 {
49 	struct dma_chan *chan = async_tx_find_channel(depend_tx, DMA_MEMCPY);
50 	struct dma_device *device = chan ? chan->device : NULL;
51 	int int_en = cb_fn ? 1 : 0;
52 	struct dma_async_tx_descriptor *tx = device ?
53 		device->device_prep_dma_memcpy(chan, len,
54 		int_en) : NULL;
55 
56 	if (tx) { /* run the memcpy asynchronously */
57 		dma_addr_t addr;
58 		enum dma_data_direction dir;
59 
60 		pr_debug("%s: (async) len: %zu\n", __FUNCTION__, len);
61 
62 		dir = (flags & ASYNC_TX_ASSUME_COHERENT) ?
63 			DMA_NONE : DMA_FROM_DEVICE;
64 
65 		addr = dma_map_page(device->dev, dest, dest_offset, len, dir);
66 		tx->tx_set_dest(addr, tx, 0);
67 
68 		dir = (flags & ASYNC_TX_ASSUME_COHERENT) ?
69 			DMA_NONE : DMA_TO_DEVICE;
70 
71 		addr = dma_map_page(device->dev, src, src_offset, len, dir);
72 		tx->tx_set_src(addr, tx, 0);
73 
74 		async_tx_submit(chan, tx, flags, depend_tx, cb_fn, cb_param);
75 	} else { /* run the memcpy synchronously */
76 		void *dest_buf, *src_buf;
77 		pr_debug("%s: (sync) len: %zu\n", __FUNCTION__, len);
78 
79 		/* wait for any prerequisite operations */
80 		if (depend_tx) {
81 			/* if ack is already set then we cannot be sure
82 			 * we are referring to the correct operation
83 			 */
84 			BUG_ON(depend_tx->ack);
85 			if (dma_wait_for_async_tx(depend_tx) == DMA_ERROR)
86 				panic("%s: DMA_ERROR waiting for depend_tx\n",
87 					__FUNCTION__);
88 		}
89 
90 		dest_buf = kmap_atomic(dest, KM_USER0) + dest_offset;
91 		src_buf = kmap_atomic(src, KM_USER1) + src_offset;
92 
93 		memcpy(dest_buf, src_buf, len);
94 
95 		kunmap_atomic(dest_buf, KM_USER0);
96 		kunmap_atomic(src_buf, KM_USER1);
97 
98 		async_tx_sync_epilog(flags, depend_tx, cb_fn, cb_param);
99 	}
100 
101 	return tx;
102 }
103 EXPORT_SYMBOL_GPL(async_memcpy);
104 
105 static int __init async_memcpy_init(void)
106 {
107 	return 0;
108 }
109 
110 static void __exit async_memcpy_exit(void)
111 {
112 	do { } while (0);
113 }
114 
115 module_init(async_memcpy_init);
116 module_exit(async_memcpy_exit);
117 
118 MODULE_AUTHOR("Intel Corporation");
119 MODULE_DESCRIPTION("asynchronous memcpy api");
120 MODULE_LICENSE("GPL");
121