1 /*
2  *
3  * arch/xtensa/platform/xtavnet/setup.c
4  *
5  * ...
6  *
7  * Authors:	Chris Zankel <chris@zankel.net>
8  *		Joe Taylor <joe@tensilica.com>
9  *
10  * Copyright 2001 - 2006 Tensilica Inc.
11  *
12  * This program is free software; you can redistribute  it and/or modify it
13  * under  the terms of  the GNU General  Public License as published by the
14  * Free Software Foundation;  either version 2 of the  License, or (at your
15  * option) any later version.
16  *
17  */
18 #include <linux/stddef.h>
19 #include <linux/kernel.h>
20 #include <linux/init.h>
21 #include <linux/io.h>
22 #include <linux/errno.h>
23 #include <linux/reboot.h>
24 #include <linux/kdev_t.h>
25 #include <linux/types.h>
26 #include <linux/major.h>
27 #include <linux/console.h>
28 #include <linux/delay.h>
29 #include <linux/of.h>
30 #include <linux/clk-provider.h>
31 #include <linux/of_address.h>
32 
33 #include <asm/timex.h>
34 #include <asm/processor.h>
35 #include <asm/platform.h>
36 #include <asm/bootparam.h>
37 #include <platform/lcd.h>
38 #include <platform/hardware.h>
39 
40 void platform_halt(void)
41 {
42 	lcd_disp_at_pos(" HALT ", 0);
43 	local_irq_disable();
44 	while (1)
45 		cpu_relax();
46 }
47 
48 void platform_power_off(void)
49 {
50 	lcd_disp_at_pos("POWEROFF", 0);
51 	local_irq_disable();
52 	while (1)
53 		cpu_relax();
54 }
55 
56 void platform_restart(void)
57 {
58 	/* Flush and reset the mmu, simulate a processor reset, and
59 	 * jump to the reset vector. */
60 	cpu_reset();
61 	/* control never gets here */
62 }
63 
64 void __init platform_setup(char **cmdline)
65 {
66 }
67 
68 /* early initialization */
69 
70 void __init platform_init(bp_tag_t *first)
71 {
72 }
73 
74 /* Heartbeat. */
75 
76 void platform_heartbeat(void)
77 {
78 }
79 
80 #ifdef CONFIG_XTENSA_CALIBRATE_CCOUNT
81 
82 void __init platform_calibrate_ccount(void)
83 {
84 	ccount_freq = *(long *)XTFPGA_CLKFRQ_VADDR;
85 }
86 
87 #endif
88 
89 #ifdef CONFIG_OF
90 
91 static void __init xtfpga_clk_setup(struct device_node *np)
92 {
93 	void __iomem *base = of_iomap(np, 0);
94 	struct clk *clk;
95 	u32 freq;
96 
97 	if (!base) {
98 		pr_err("%pOFn: invalid address\n", np);
99 		return;
100 	}
101 
102 	freq = __raw_readl(base);
103 	iounmap(base);
104 	clk = clk_register_fixed_rate(NULL, np->name, NULL, 0, freq);
105 
106 	if (IS_ERR(clk)) {
107 		pr_err("%pOFn: clk registration failed\n", np);
108 		return;
109 	}
110 
111 	if (of_clk_add_provider(np, of_clk_src_simple_get, clk)) {
112 		pr_err("%pOFn: clk provider registration failed\n", np);
113 		return;
114 	}
115 }
116 CLK_OF_DECLARE(xtfpga_clk, "cdns,xtfpga-clock", xtfpga_clk_setup);
117 
118 #define MAC_LEN 6
119 static void __init update_local_mac(struct device_node *node)
120 {
121 	struct property *newmac;
122 	const u8* macaddr;
123 	int prop_len;
124 
125 	macaddr = of_get_property(node, "local-mac-address", &prop_len);
126 	if (macaddr == NULL || prop_len != MAC_LEN)
127 		return;
128 
129 	newmac = kzalloc(sizeof(*newmac) + MAC_LEN, GFP_KERNEL);
130 	if (newmac == NULL)
131 		return;
132 
133 	newmac->value = newmac + 1;
134 	newmac->length = MAC_LEN;
135 	newmac->name = kstrdup("local-mac-address", GFP_KERNEL);
136 	if (newmac->name == NULL) {
137 		kfree(newmac);
138 		return;
139 	}
140 
141 	memcpy(newmac->value, macaddr, MAC_LEN);
142 	((u8*)newmac->value)[5] = (*(u32*)DIP_SWITCHES_VADDR) & 0x3f;
143 	of_update_property(node, newmac);
144 }
145 
146 static int __init machine_setup(void)
147 {
148 	struct device_node *eth = NULL;
149 
150 	if ((eth = of_find_compatible_node(eth, NULL, "opencores,ethoc")))
151 		update_local_mac(eth);
152 	return 0;
153 }
154 arch_initcall(machine_setup);
155 
156 #else
157 
158 #include <linux/serial_8250.h>
159 #include <linux/if.h>
160 #include <net/ethoc.h>
161 #include <linux/usb/c67x00.h>
162 
163 /*----------------------------------------------------------------------------
164  *  Ethernet -- OpenCores Ethernet MAC (ethoc driver)
165  */
166 
167 static struct resource ethoc_res[] = {
168 	[0] = { /* register space */
169 		.start = OETH_REGS_PADDR,
170 		.end   = OETH_REGS_PADDR + OETH_REGS_SIZE - 1,
171 		.flags = IORESOURCE_MEM,
172 	},
173 	[1] = { /* buffer space */
174 		.start = OETH_SRAMBUFF_PADDR,
175 		.end   = OETH_SRAMBUFF_PADDR + OETH_SRAMBUFF_SIZE - 1,
176 		.flags = IORESOURCE_MEM,
177 	},
178 	[2] = { /* IRQ number */
179 		.start = XTENSA_PIC_LINUX_IRQ(OETH_IRQ),
180 		.end   = XTENSA_PIC_LINUX_IRQ(OETH_IRQ),
181 		.flags = IORESOURCE_IRQ,
182 	},
183 };
184 
185 static struct ethoc_platform_data ethoc_pdata = {
186 	/*
187 	 * The MAC address for these boards is 00:50:c2:13:6f:xx.
188 	 * The last byte (here as zero) is read from the DIP switches on the
189 	 * board.
190 	 */
191 	.hwaddr = { 0x00, 0x50, 0xc2, 0x13, 0x6f, 0 },
192 	.phy_id = -1,
193 	.big_endian = XCHAL_HAVE_BE,
194 };
195 
196 static struct platform_device ethoc_device = {
197 	.name = "ethoc",
198 	.id = -1,
199 	.num_resources = ARRAY_SIZE(ethoc_res),
200 	.resource = ethoc_res,
201 	.dev = {
202 		.platform_data = &ethoc_pdata,
203 	},
204 };
205 
206 /*----------------------------------------------------------------------------
207  *  USB Host/Device -- Cypress CY7C67300
208  */
209 
210 static struct resource c67x00_res[] = {
211 	[0] = { /* register space */
212 		.start = C67X00_PADDR,
213 		.end   = C67X00_PADDR + C67X00_SIZE - 1,
214 		.flags = IORESOURCE_MEM,
215 	},
216 	[1] = { /* IRQ number */
217 		.start = XTENSA_PIC_LINUX_IRQ(C67X00_IRQ),
218 		.end   = XTENSA_PIC_LINUX_IRQ(C67X00_IRQ),
219 		.flags = IORESOURCE_IRQ,
220 	},
221 };
222 
223 static struct c67x00_platform_data c67x00_pdata = {
224 	.sie_config = C67X00_SIE1_HOST | C67X00_SIE2_UNUSED,
225 	.hpi_regstep = 4,
226 };
227 
228 static struct platform_device c67x00_device = {
229 	.name = "c67x00",
230 	.id = -1,
231 	.num_resources = ARRAY_SIZE(c67x00_res),
232 	.resource = c67x00_res,
233 	.dev = {
234 		.platform_data = &c67x00_pdata,
235 	},
236 };
237 
238 /*----------------------------------------------------------------------------
239  *  UART
240  */
241 
242 static struct resource serial_resource = {
243 	.start	= DUART16552_PADDR,
244 	.end	= DUART16552_PADDR + 0x1f,
245 	.flags	= IORESOURCE_MEM,
246 };
247 
248 static struct plat_serial8250_port serial_platform_data[] = {
249 	[0] = {
250 		.mapbase	= DUART16552_PADDR,
251 		.irq		= XTENSA_PIC_LINUX_IRQ(DUART16552_INTNUM),
252 		.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
253 				  UPF_IOREMAP,
254 		.iotype		= XCHAL_HAVE_BE ? UPIO_MEM32BE : UPIO_MEM32,
255 		.regshift	= 2,
256 		.uartclk	= 0,    /* set in xtavnet_init() */
257 	},
258 	{ },
259 };
260 
261 static struct platform_device xtavnet_uart = {
262 	.name		= "serial8250",
263 	.id		= PLAT8250_DEV_PLATFORM,
264 	.dev		= {
265 		.platform_data	= serial_platform_data,
266 	},
267 	.num_resources	= 1,
268 	.resource	= &serial_resource,
269 };
270 
271 /* platform devices */
272 static struct platform_device *platform_devices[] __initdata = {
273 	&ethoc_device,
274 	&c67x00_device,
275 	&xtavnet_uart,
276 };
277 
278 
279 static int __init xtavnet_init(void)
280 {
281 	/* Ethernet MAC address.  */
282 	ethoc_pdata.hwaddr[5] = *(u32 *)DIP_SWITCHES_VADDR;
283 
284 	/* Clock rate varies among FPGA bitstreams; board specific FPGA register
285 	 * reports the actual clock rate.
286 	 */
287 	serial_platform_data[0].uartclk = *(long *)XTFPGA_CLKFRQ_VADDR;
288 
289 
290 	/* register platform devices */
291 	platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
292 
293 	/* ETHOC driver is a bit quiet; at least display Ethernet MAC, so user
294 	 * knows whether they set it correctly on the DIP switches.
295 	 */
296 	pr_info("XTFPGA: Ethernet MAC %pM\n", ethoc_pdata.hwaddr);
297 	ethoc_pdata.eth_clkfreq = *(long *)XTFPGA_CLKFRQ_VADDR;
298 
299 	return 0;
300 }
301 
302 /*
303  * Register to be done during do_initcalls().
304  */
305 arch_initcall(xtavnet_init);
306 
307 #endif /* CONFIG_OF */
308