1 /* 2 * arch/xtensa/platform/xtavnet/include/platform/hardware.h 3 * 4 * This file is subject to the terms and conditions of the GNU General Public 5 * License. See the file "COPYING" in the main directory of this archive 6 * for more details. 7 * 8 * Copyright (C) 2006 Tensilica Inc. 9 */ 10 11 /* 12 * This file contains the hardware configuration of the XTAVNET boards. 13 */ 14 15 #include <asm/types.h> 16 17 #ifndef __XTENSA_XTAVNET_HARDWARE_H 18 #define __XTENSA_XTAVNET_HARDWARE_H 19 20 /* Memory configuration. */ 21 22 #define PLATFORM_DEFAULT_MEM_START __XTENSA_UL(CONFIG_DEFAULT_MEM_START) 23 #define PLATFORM_DEFAULT_MEM_SIZE __XTENSA_UL(CONFIG_DEFAULT_MEM_SIZE) 24 25 /* Interrupt configuration. */ 26 27 #define PLATFORM_NR_IRQS 0 28 29 /* Default assignment of LX60 devices to external interrupts. */ 30 31 #ifdef CONFIG_XTENSA_MX 32 #define DUART16552_INTNUM XCHAL_EXTINT3_NUM 33 #define OETH_IRQ XCHAL_EXTINT4_NUM 34 #define C67X00_IRQ XCHAL_EXTINT8_NUM 35 #else 36 #define DUART16552_INTNUM XCHAL_EXTINT0_NUM 37 #define OETH_IRQ XCHAL_EXTINT1_NUM 38 #define C67X00_IRQ XCHAL_EXTINT5_NUM 39 #endif 40 41 /* 42 * Device addresses and parameters. 43 */ 44 45 /* UART */ 46 #define DUART16552_PADDR (XCHAL_KIO_PADDR + 0x0D050020) 47 48 /* Misc. */ 49 #define XTFPGA_FPGAREGS_VADDR IOADDR(0x0D020000) 50 /* Clock frequency in Hz (read-only): */ 51 #define XTFPGA_CLKFRQ_VADDR (XTFPGA_FPGAREGS_VADDR + 0x04) 52 /* Setting of 8 DIP switches: */ 53 #define DIP_SWITCHES_VADDR (XTFPGA_FPGAREGS_VADDR + 0x0C) 54 /* Software reset (write 0xdead): */ 55 #define XTFPGA_SWRST_VADDR (XTFPGA_FPGAREGS_VADDR + 0x10) 56 57 /* OpenCores Ethernet controller: */ 58 /* regs + RX/TX descriptors */ 59 #define OETH_REGS_PADDR (XCHAL_KIO_PADDR + 0x0D030000) 60 #define OETH_REGS_SIZE 0x1000 61 #define OETH_SRAMBUFF_PADDR (XCHAL_KIO_PADDR + 0x0D800000) 62 63 /* 5*rx buffs + 5*tx buffs */ 64 #define OETH_SRAMBUFF_SIZE (5 * 0x600 + 5 * 0x600) 65 66 #define C67X00_PADDR (XCHAL_KIO_PADDR + 0x0D0D0000) 67 #define C67X00_SIZE 0x10 68 69 #endif /* __XTENSA_XTAVNET_HARDWARE_H */ 70