1 /* 2 * Xtensa SMP support functions. 3 * 4 * This file is subject to the terms and conditions of the GNU General Public 5 * License. See the file "COPYING" in the main directory of this archive 6 * for more details. 7 * 8 * Copyright (C) 2008 - 2013 Tensilica Inc. 9 * 10 * Chris Zankel <chris@zankel.net> 11 * Joe Taylor <joe@tensilica.com> 12 * Pete Delaney <piet@tensilica.com 13 */ 14 15 #include <linux/cpu.h> 16 #include <linux/cpumask.h> 17 #include <linux/delay.h> 18 #include <linux/init.h> 19 #include <linux/interrupt.h> 20 #include <linux/irqdomain.h> 21 #include <linux/irq.h> 22 #include <linux/kdebug.h> 23 #include <linux/module.h> 24 #include <linux/sched/mm.h> 25 #include <linux/sched/hotplug.h> 26 #include <linux/sched/task_stack.h> 27 #include <linux/reboot.h> 28 #include <linux/seq_file.h> 29 #include <linux/smp.h> 30 #include <linux/thread_info.h> 31 32 #include <asm/cacheflush.h> 33 #include <asm/kdebug.h> 34 #include <asm/mmu_context.h> 35 #include <asm/mxregs.h> 36 #include <asm/platform.h> 37 #include <asm/tlbflush.h> 38 #include <asm/traps.h> 39 40 #ifdef CONFIG_SMP 41 # if XCHAL_HAVE_S32C1I == 0 42 # error "The S32C1I option is required for SMP." 43 # endif 44 #endif 45 46 static void system_invalidate_dcache_range(unsigned long start, 47 unsigned long size); 48 static void system_flush_invalidate_dcache_range(unsigned long start, 49 unsigned long size); 50 51 /* IPI (Inter Process Interrupt) */ 52 53 #define IPI_IRQ 0 54 55 static irqreturn_t ipi_interrupt(int irq, void *dev_id); 56 57 void ipi_init(void) 58 { 59 unsigned irq = irq_create_mapping(NULL, IPI_IRQ); 60 if (request_irq(irq, ipi_interrupt, IRQF_PERCPU, "ipi", NULL)) 61 pr_err("Failed to request irq %u (ipi)\n", irq); 62 } 63 64 static inline unsigned int get_core_count(void) 65 { 66 /* Bits 18..21 of SYSCFGID contain the core count minus 1. */ 67 unsigned int syscfgid = get_er(SYSCFGID); 68 return ((syscfgid >> 18) & 0xf) + 1; 69 } 70 71 static inline int get_core_id(void) 72 { 73 /* Bits 0...18 of SYSCFGID contain the core id */ 74 unsigned int core_id = get_er(SYSCFGID); 75 return core_id & 0x3fff; 76 } 77 78 void __init smp_prepare_cpus(unsigned int max_cpus) 79 { 80 unsigned i; 81 82 for_each_possible_cpu(i) 83 set_cpu_present(i, true); 84 } 85 86 void __init smp_init_cpus(void) 87 { 88 unsigned i; 89 unsigned int ncpus = get_core_count(); 90 unsigned int core_id = get_core_id(); 91 92 pr_info("%s: Core Count = %d\n", __func__, ncpus); 93 pr_info("%s: Core Id = %d\n", __func__, core_id); 94 95 if (ncpus > NR_CPUS) { 96 ncpus = NR_CPUS; 97 pr_info("%s: limiting core count by %d\n", __func__, ncpus); 98 } 99 100 for (i = 0; i < ncpus; ++i) 101 set_cpu_possible(i, true); 102 } 103 104 void __init smp_prepare_boot_cpu(void) 105 { 106 unsigned int cpu = smp_processor_id(); 107 BUG_ON(cpu != 0); 108 cpu_asid_cache(cpu) = ASID_USER_FIRST; 109 } 110 111 void __init smp_cpus_done(unsigned int max_cpus) 112 { 113 } 114 115 static int boot_secondary_processors = 1; /* Set with xt-gdb via .xt-gdb */ 116 static DECLARE_COMPLETION(cpu_running); 117 118 void secondary_start_kernel(void) 119 { 120 struct mm_struct *mm = &init_mm; 121 unsigned int cpu = smp_processor_id(); 122 123 init_mmu(); 124 125 #ifdef CONFIG_DEBUG_MISC 126 if (boot_secondary_processors == 0) { 127 pr_debug("%s: boot_secondary_processors:%d; Hanging cpu:%d\n", 128 __func__, boot_secondary_processors, cpu); 129 for (;;) 130 __asm__ __volatile__ ("waiti " __stringify(LOCKLEVEL)); 131 } 132 133 pr_debug("%s: boot_secondary_processors:%d; Booting cpu:%d\n", 134 __func__, boot_secondary_processors, cpu); 135 #endif 136 /* Init EXCSAVE1 */ 137 138 secondary_trap_init(); 139 140 /* All kernel threads share the same mm context. */ 141 142 mmget(mm); 143 mmgrab(mm); 144 current->active_mm = mm; 145 cpumask_set_cpu(cpu, mm_cpumask(mm)); 146 enter_lazy_tlb(mm, current); 147 148 preempt_disable(); 149 trace_hardirqs_off(); 150 151 calibrate_delay(); 152 153 notify_cpu_starting(cpu); 154 155 secondary_init_irq(); 156 local_timer_setup(cpu); 157 158 set_cpu_online(cpu, true); 159 160 local_irq_enable(); 161 162 complete(&cpu_running); 163 164 cpu_startup_entry(CPUHP_AP_ONLINE_IDLE); 165 } 166 167 static void mx_cpu_start(void *p) 168 { 169 unsigned cpu = (unsigned)p; 170 unsigned long run_stall_mask = get_er(MPSCORE); 171 172 set_er(run_stall_mask & ~(1u << cpu), MPSCORE); 173 pr_debug("%s: cpu: %d, run_stall_mask: %lx ---> %lx\n", 174 __func__, cpu, run_stall_mask, get_er(MPSCORE)); 175 } 176 177 static void mx_cpu_stop(void *p) 178 { 179 unsigned cpu = (unsigned)p; 180 unsigned long run_stall_mask = get_er(MPSCORE); 181 182 set_er(run_stall_mask | (1u << cpu), MPSCORE); 183 pr_debug("%s: cpu: %d, run_stall_mask: %lx ---> %lx\n", 184 __func__, cpu, run_stall_mask, get_er(MPSCORE)); 185 } 186 187 #ifdef CONFIG_HOTPLUG_CPU 188 unsigned long cpu_start_id __cacheline_aligned; 189 #endif 190 unsigned long cpu_start_ccount; 191 192 static int boot_secondary(unsigned int cpu, struct task_struct *ts) 193 { 194 unsigned long timeout = jiffies + msecs_to_jiffies(1000); 195 unsigned long ccount; 196 int i; 197 198 #ifdef CONFIG_HOTPLUG_CPU 199 WRITE_ONCE(cpu_start_id, cpu); 200 /* Pairs with the third memw in the cpu_restart */ 201 mb(); 202 system_flush_invalidate_dcache_range((unsigned long)&cpu_start_id, 203 sizeof(cpu_start_id)); 204 #endif 205 smp_call_function_single(0, mx_cpu_start, (void *)cpu, 1); 206 207 for (i = 0; i < 2; ++i) { 208 do 209 ccount = get_ccount(); 210 while (!ccount); 211 212 WRITE_ONCE(cpu_start_ccount, ccount); 213 214 do { 215 /* 216 * Pairs with the first two memws in the 217 * .Lboot_secondary. 218 */ 219 mb(); 220 ccount = READ_ONCE(cpu_start_ccount); 221 } while (ccount && time_before(jiffies, timeout)); 222 223 if (ccount) { 224 smp_call_function_single(0, mx_cpu_stop, 225 (void *)cpu, 1); 226 WRITE_ONCE(cpu_start_ccount, 0); 227 return -EIO; 228 } 229 } 230 return 0; 231 } 232 233 int __cpu_up(unsigned int cpu, struct task_struct *idle) 234 { 235 int ret = 0; 236 237 if (cpu_asid_cache(cpu) == 0) 238 cpu_asid_cache(cpu) = ASID_USER_FIRST; 239 240 start_info.stack = (unsigned long)task_pt_regs(idle); 241 wmb(); 242 243 pr_debug("%s: Calling wakeup_secondary(cpu:%d, idle:%p, sp: %08lx)\n", 244 __func__, cpu, idle, start_info.stack); 245 246 init_completion(&cpu_running); 247 ret = boot_secondary(cpu, idle); 248 if (ret == 0) { 249 wait_for_completion_timeout(&cpu_running, 250 msecs_to_jiffies(1000)); 251 if (!cpu_online(cpu)) 252 ret = -EIO; 253 } 254 255 if (ret) 256 pr_err("CPU %u failed to boot\n", cpu); 257 258 return ret; 259 } 260 261 #ifdef CONFIG_HOTPLUG_CPU 262 263 /* 264 * __cpu_disable runs on the processor to be shutdown. 265 */ 266 int __cpu_disable(void) 267 { 268 unsigned int cpu = smp_processor_id(); 269 270 /* 271 * Take this CPU offline. Once we clear this, we can't return, 272 * and we must not schedule until we're ready to give up the cpu. 273 */ 274 set_cpu_online(cpu, false); 275 276 /* 277 * OK - migrate IRQs away from this CPU 278 */ 279 migrate_irqs(); 280 281 /* 282 * Flush user cache and TLB mappings, and then remove this CPU 283 * from the vm mask set of all processes. 284 */ 285 local_flush_cache_all(); 286 local_flush_tlb_all(); 287 invalidate_page_directory(); 288 289 clear_tasks_mm_cpumask(cpu); 290 291 return 0; 292 } 293 294 static void platform_cpu_kill(unsigned int cpu) 295 { 296 smp_call_function_single(0, mx_cpu_stop, (void *)cpu, true); 297 } 298 299 /* 300 * called on the thread which is asking for a CPU to be shutdown - 301 * waits until shutdown has completed, or it is timed out. 302 */ 303 void __cpu_die(unsigned int cpu) 304 { 305 unsigned long timeout = jiffies + msecs_to_jiffies(1000); 306 while (time_before(jiffies, timeout)) { 307 system_invalidate_dcache_range((unsigned long)&cpu_start_id, 308 sizeof(cpu_start_id)); 309 /* Pairs with the second memw in the cpu_restart */ 310 mb(); 311 if (READ_ONCE(cpu_start_id) == -cpu) { 312 platform_cpu_kill(cpu); 313 return; 314 } 315 } 316 pr_err("CPU%u: unable to kill\n", cpu); 317 } 318 319 void arch_cpu_idle_dead(void) 320 { 321 cpu_die(); 322 } 323 /* 324 * Called from the idle thread for the CPU which has been shutdown. 325 * 326 * Note that we disable IRQs here, but do not re-enable them 327 * before returning to the caller. This is also the behaviour 328 * of the other hotplug-cpu capable cores, so presumably coming 329 * out of idle fixes this. 330 */ 331 void __ref cpu_die(void) 332 { 333 idle_task_exit(); 334 local_irq_disable(); 335 __asm__ __volatile__( 336 " movi a2, cpu_restart\n" 337 " jx a2\n"); 338 } 339 340 #endif /* CONFIG_HOTPLUG_CPU */ 341 342 enum ipi_msg_type { 343 IPI_RESCHEDULE = 0, 344 IPI_CALL_FUNC, 345 IPI_CPU_STOP, 346 IPI_MAX 347 }; 348 349 static const struct { 350 const char *short_text; 351 const char *long_text; 352 } ipi_text[] = { 353 { .short_text = "RES", .long_text = "Rescheduling interrupts" }, 354 { .short_text = "CAL", .long_text = "Function call interrupts" }, 355 { .short_text = "DIE", .long_text = "CPU shutdown interrupts" }, 356 }; 357 358 struct ipi_data { 359 unsigned long ipi_count[IPI_MAX]; 360 }; 361 362 static DEFINE_PER_CPU(struct ipi_data, ipi_data); 363 364 static void send_ipi_message(const struct cpumask *callmask, 365 enum ipi_msg_type msg_id) 366 { 367 int index; 368 unsigned long mask = 0; 369 370 for_each_cpu(index, callmask) 371 mask |= 1 << index; 372 373 set_er(mask, MIPISET(msg_id)); 374 } 375 376 void arch_send_call_function_ipi_mask(const struct cpumask *mask) 377 { 378 send_ipi_message(mask, IPI_CALL_FUNC); 379 } 380 381 void arch_send_call_function_single_ipi(int cpu) 382 { 383 send_ipi_message(cpumask_of(cpu), IPI_CALL_FUNC); 384 } 385 386 void smp_send_reschedule(int cpu) 387 { 388 send_ipi_message(cpumask_of(cpu), IPI_RESCHEDULE); 389 } 390 391 void smp_send_stop(void) 392 { 393 struct cpumask targets; 394 395 cpumask_copy(&targets, cpu_online_mask); 396 cpumask_clear_cpu(smp_processor_id(), &targets); 397 send_ipi_message(&targets, IPI_CPU_STOP); 398 } 399 400 static void ipi_cpu_stop(unsigned int cpu) 401 { 402 set_cpu_online(cpu, false); 403 machine_halt(); 404 } 405 406 irqreturn_t ipi_interrupt(int irq, void *dev_id) 407 { 408 unsigned int cpu = smp_processor_id(); 409 struct ipi_data *ipi = &per_cpu(ipi_data, cpu); 410 411 for (;;) { 412 unsigned int msg; 413 414 msg = get_er(MIPICAUSE(cpu)); 415 set_er(msg, MIPICAUSE(cpu)); 416 417 if (!msg) 418 break; 419 420 if (msg & (1 << IPI_CALL_FUNC)) { 421 ++ipi->ipi_count[IPI_CALL_FUNC]; 422 generic_smp_call_function_interrupt(); 423 } 424 425 if (msg & (1 << IPI_RESCHEDULE)) { 426 ++ipi->ipi_count[IPI_RESCHEDULE]; 427 scheduler_ipi(); 428 } 429 430 if (msg & (1 << IPI_CPU_STOP)) { 431 ++ipi->ipi_count[IPI_CPU_STOP]; 432 ipi_cpu_stop(cpu); 433 } 434 } 435 436 return IRQ_HANDLED; 437 } 438 439 void show_ipi_list(struct seq_file *p, int prec) 440 { 441 unsigned int cpu; 442 unsigned i; 443 444 for (i = 0; i < IPI_MAX; ++i) { 445 seq_printf(p, "%*s:", prec, ipi_text[i].short_text); 446 for_each_online_cpu(cpu) 447 seq_printf(p, " %10lu", 448 per_cpu(ipi_data, cpu).ipi_count[i]); 449 seq_printf(p, " %s\n", ipi_text[i].long_text); 450 } 451 } 452 453 int setup_profiling_timer(unsigned int multiplier) 454 { 455 pr_debug("setup_profiling_timer %d\n", multiplier); 456 return 0; 457 } 458 459 /* TLB flush functions */ 460 461 struct flush_data { 462 struct vm_area_struct *vma; 463 unsigned long addr1; 464 unsigned long addr2; 465 }; 466 467 static void ipi_flush_tlb_all(void *arg) 468 { 469 local_flush_tlb_all(); 470 } 471 472 void flush_tlb_all(void) 473 { 474 on_each_cpu(ipi_flush_tlb_all, NULL, 1); 475 } 476 477 static void ipi_flush_tlb_mm(void *arg) 478 { 479 local_flush_tlb_mm(arg); 480 } 481 482 void flush_tlb_mm(struct mm_struct *mm) 483 { 484 on_each_cpu(ipi_flush_tlb_mm, mm, 1); 485 } 486 487 static void ipi_flush_tlb_page(void *arg) 488 { 489 struct flush_data *fd = arg; 490 local_flush_tlb_page(fd->vma, fd->addr1); 491 } 492 493 void flush_tlb_page(struct vm_area_struct *vma, unsigned long addr) 494 { 495 struct flush_data fd = { 496 .vma = vma, 497 .addr1 = addr, 498 }; 499 on_each_cpu(ipi_flush_tlb_page, &fd, 1); 500 } 501 502 static void ipi_flush_tlb_range(void *arg) 503 { 504 struct flush_data *fd = arg; 505 local_flush_tlb_range(fd->vma, fd->addr1, fd->addr2); 506 } 507 508 void flush_tlb_range(struct vm_area_struct *vma, 509 unsigned long start, unsigned long end) 510 { 511 struct flush_data fd = { 512 .vma = vma, 513 .addr1 = start, 514 .addr2 = end, 515 }; 516 on_each_cpu(ipi_flush_tlb_range, &fd, 1); 517 } 518 519 static void ipi_flush_tlb_kernel_range(void *arg) 520 { 521 struct flush_data *fd = arg; 522 local_flush_tlb_kernel_range(fd->addr1, fd->addr2); 523 } 524 525 void flush_tlb_kernel_range(unsigned long start, unsigned long end) 526 { 527 struct flush_data fd = { 528 .addr1 = start, 529 .addr2 = end, 530 }; 531 on_each_cpu(ipi_flush_tlb_kernel_range, &fd, 1); 532 } 533 534 /* Cache flush functions */ 535 536 static void ipi_flush_cache_all(void *arg) 537 { 538 local_flush_cache_all(); 539 } 540 541 void flush_cache_all(void) 542 { 543 on_each_cpu(ipi_flush_cache_all, NULL, 1); 544 } 545 546 static void ipi_flush_cache_page(void *arg) 547 { 548 struct flush_data *fd = arg; 549 local_flush_cache_page(fd->vma, fd->addr1, fd->addr2); 550 } 551 552 void flush_cache_page(struct vm_area_struct *vma, 553 unsigned long address, unsigned long pfn) 554 { 555 struct flush_data fd = { 556 .vma = vma, 557 .addr1 = address, 558 .addr2 = pfn, 559 }; 560 on_each_cpu(ipi_flush_cache_page, &fd, 1); 561 } 562 563 static void ipi_flush_cache_range(void *arg) 564 { 565 struct flush_data *fd = arg; 566 local_flush_cache_range(fd->vma, fd->addr1, fd->addr2); 567 } 568 569 void flush_cache_range(struct vm_area_struct *vma, 570 unsigned long start, unsigned long end) 571 { 572 struct flush_data fd = { 573 .vma = vma, 574 .addr1 = start, 575 .addr2 = end, 576 }; 577 on_each_cpu(ipi_flush_cache_range, &fd, 1); 578 } 579 580 static void ipi_flush_icache_range(void *arg) 581 { 582 struct flush_data *fd = arg; 583 local_flush_icache_range(fd->addr1, fd->addr2); 584 } 585 586 void flush_icache_range(unsigned long start, unsigned long end) 587 { 588 struct flush_data fd = { 589 .addr1 = start, 590 .addr2 = end, 591 }; 592 on_each_cpu(ipi_flush_icache_range, &fd, 1); 593 } 594 EXPORT_SYMBOL(flush_icache_range); 595 596 /* ------------------------------------------------------------------------- */ 597 598 static void ipi_invalidate_dcache_range(void *arg) 599 { 600 struct flush_data *fd = arg; 601 __invalidate_dcache_range(fd->addr1, fd->addr2); 602 } 603 604 static void system_invalidate_dcache_range(unsigned long start, 605 unsigned long size) 606 { 607 struct flush_data fd = { 608 .addr1 = start, 609 .addr2 = size, 610 }; 611 on_each_cpu(ipi_invalidate_dcache_range, &fd, 1); 612 } 613 614 static void ipi_flush_invalidate_dcache_range(void *arg) 615 { 616 struct flush_data *fd = arg; 617 __flush_invalidate_dcache_range(fd->addr1, fd->addr2); 618 } 619 620 static void system_flush_invalidate_dcache_range(unsigned long start, 621 unsigned long size) 622 { 623 struct flush_data fd = { 624 .addr1 = start, 625 .addr2 = size, 626 }; 627 on_each_cpu(ipi_flush_invalidate_dcache_range, &fd, 1); 628 } 629