1 /* 2 * arch/xtensa/kernel/setup.c 3 * 4 * This file is subject to the terms and conditions of the GNU General Public 5 * License. See the file "COPYING" in the main directory of this archive 6 * for more details. 7 * 8 * Copyright (C) 1995 Linus Torvalds 9 * Copyright (C) 2001 - 2005 Tensilica Inc. 10 * 11 * Chris Zankel <chris@zankel.net> 12 * Joe Taylor <joe@tensilica.com, joetylr@yahoo.com> 13 * Kevin Chea 14 * Marc Gauthier<marc@tensilica.com> <marc@alumni.uwaterloo.ca> 15 */ 16 17 #include <linux/errno.h> 18 #include <linux/init.h> 19 #include <linux/mm.h> 20 #include <linux/proc_fs.h> 21 #include <linux/screen_info.h> 22 #include <linux/bootmem.h> 23 #include <linux/kernel.h> 24 25 #if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_DUMMY_CONSOLE) 26 # include <linux/console.h> 27 #endif 28 29 #ifdef CONFIG_RTC 30 # include <linux/timex.h> 31 #endif 32 33 #ifdef CONFIG_PROC_FS 34 # include <linux/seq_file.h> 35 #endif 36 37 #include <asm/bootparam.h> 38 #include <asm/pgtable.h> 39 #include <asm/processor.h> 40 #include <asm/timex.h> 41 #include <asm/platform.h> 42 #include <asm/page.h> 43 #include <asm/setup.h> 44 #include <asm/param.h> 45 46 #include <platform/hardware.h> 47 48 #if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_DUMMY_CONSOLE) 49 struct screen_info screen_info = { 0, 24, 0, 0, 0, 80, 0, 0, 0, 24, 1, 16}; 50 #endif 51 52 #ifdef CONFIG_BLK_DEV_FD 53 extern struct fd_ops no_fd_ops; 54 struct fd_ops *fd_ops; 55 #endif 56 57 extern struct rtc_ops no_rtc_ops; 58 struct rtc_ops *rtc_ops; 59 60 #ifdef CONFIG_BLK_DEV_INITRD 61 extern void *initrd_start; 62 extern void *initrd_end; 63 extern void *__initrd_start; 64 extern void *__initrd_end; 65 int initrd_is_mapped = 0; 66 extern int initrd_below_start_ok; 67 #endif 68 69 unsigned char aux_device_present; 70 extern unsigned long loops_per_jiffy; 71 72 /* Command line specified as configuration option. */ 73 74 static char __initdata command_line[COMMAND_LINE_SIZE]; 75 76 #ifdef CONFIG_CMDLINE_BOOL 77 static char default_command_line[COMMAND_LINE_SIZE] __initdata = CONFIG_CMDLINE; 78 #endif 79 80 sysmem_info_t __initdata sysmem; 81 82 #ifdef CONFIG_BLK_DEV_INITRD 83 int initrd_is_mapped; 84 #endif 85 86 #ifdef CONFIG_MMU 87 extern void init_mmu(void); 88 #else 89 static inline void init_mmu(void) { } 90 #endif 91 92 extern void zones_init(void); 93 94 /* 95 * Boot parameter parsing. 96 * 97 * The Xtensa port uses a list of variable-sized tags to pass data to 98 * the kernel. The first tag must be a BP_TAG_FIRST tag for the list 99 * to be recognised. The list is terminated with a zero-sized 100 * BP_TAG_LAST tag. 101 */ 102 103 typedef struct tagtable { 104 u32 tag; 105 int (*parse)(const bp_tag_t*); 106 } tagtable_t; 107 108 #define __tagtable(tag, fn) static tagtable_t __tagtable_##fn \ 109 __attribute__((unused, __section__(".taglist"))) = { tag, fn } 110 111 /* parse current tag */ 112 113 static int __init parse_tag_mem(const bp_tag_t *tag) 114 { 115 meminfo_t *mi = (meminfo_t*)(tag->data); 116 117 if (mi->type != MEMORY_TYPE_CONVENTIONAL) 118 return -1; 119 120 if (sysmem.nr_banks >= SYSMEM_BANKS_MAX) { 121 printk(KERN_WARNING 122 "Ignoring memory bank 0x%08lx size %ldKB\n", 123 (unsigned long)mi->start, 124 (unsigned long)mi->end - (unsigned long)mi->start); 125 return -EINVAL; 126 } 127 sysmem.bank[sysmem.nr_banks].type = mi->type; 128 sysmem.bank[sysmem.nr_banks].start = PAGE_ALIGN(mi->start); 129 sysmem.bank[sysmem.nr_banks].end = mi->end & PAGE_SIZE; 130 sysmem.nr_banks++; 131 132 return 0; 133 } 134 135 __tagtable(BP_TAG_MEMORY, parse_tag_mem); 136 137 #ifdef CONFIG_BLK_DEV_INITRD 138 139 static int __init parse_tag_initrd(const bp_tag_t* tag) 140 { 141 meminfo_t* mi; 142 mi = (meminfo_t*)(tag->data); 143 initrd_start = (void*)(mi->start); 144 initrd_end = (void*)(mi->end); 145 146 return 0; 147 } 148 149 __tagtable(BP_TAG_INITRD, parse_tag_initrd); 150 151 #endif /* CONFIG_BLK_DEV_INITRD */ 152 153 static int __init parse_tag_cmdline(const bp_tag_t* tag) 154 { 155 strncpy(command_line, (char*)(tag->data), COMMAND_LINE_SIZE); 156 command_line[COMMAND_LINE_SIZE - 1] = '\0'; 157 return 0; 158 } 159 160 __tagtable(BP_TAG_COMMAND_LINE, parse_tag_cmdline); 161 162 static int __init parse_bootparam(const bp_tag_t* tag) 163 { 164 extern tagtable_t __tagtable_begin, __tagtable_end; 165 tagtable_t *t; 166 167 /* Boot parameters must start with a BP_TAG_FIRST tag. */ 168 169 if (tag->id != BP_TAG_FIRST) { 170 printk(KERN_WARNING "Invalid boot parameters!\n"); 171 return 0; 172 } 173 174 tag = (bp_tag_t*)((unsigned long)tag + sizeof(bp_tag_t) + tag->size); 175 176 /* Parse all tags. */ 177 178 while (tag != NULL && tag->id != BP_TAG_LAST) { 179 for (t = &__tagtable_begin; t < &__tagtable_end; t++) { 180 if (tag->id == t->tag) { 181 t->parse(tag); 182 break; 183 } 184 } 185 if (t == &__tagtable_end) 186 printk(KERN_WARNING "Ignoring tag " 187 "0x%08x\n", tag->id); 188 tag = (bp_tag_t*)((unsigned long)(tag + 1) + tag->size); 189 } 190 191 return 0; 192 } 193 194 /* 195 * Initialize architecture. (Early stage) 196 */ 197 198 void __init init_arch(bp_tag_t *bp_start) 199 { 200 201 #ifdef CONFIG_BLK_DEV_INITRD 202 initrd_start = &__initrd_start; 203 initrd_end = &__initrd_end; 204 #endif 205 206 sysmem.nr_banks = 0; 207 208 #ifdef CONFIG_CMDLINE_BOOL 209 strcpy(command_line, default_command_line); 210 #endif 211 212 /* Parse boot parameters */ 213 214 if (bp_start) 215 parse_bootparam(bp_start); 216 217 if (sysmem.nr_banks == 0) { 218 sysmem.nr_banks = 1; 219 sysmem.bank[0].start = PLATFORM_DEFAULT_MEM_START; 220 sysmem.bank[0].end = PLATFORM_DEFAULT_MEM_START 221 + PLATFORM_DEFAULT_MEM_SIZE; 222 } 223 224 /* Early hook for platforms */ 225 226 platform_init(bp_start); 227 228 /* Initialize MMU. */ 229 230 init_mmu(); 231 } 232 233 /* 234 * Initialize system. Setup memory and reserve regions. 235 */ 236 237 extern char _end; 238 extern char _stext; 239 extern char _WindowVectors_text_start; 240 extern char _WindowVectors_text_end; 241 extern char _DebugInterruptVector_literal_start; 242 extern char _DebugInterruptVector_text_end; 243 extern char _KernelExceptionVector_literal_start; 244 extern char _KernelExceptionVector_text_end; 245 extern char _UserExceptionVector_literal_start; 246 extern char _UserExceptionVector_text_end; 247 extern char _DoubleExceptionVector_literal_start; 248 extern char _DoubleExceptionVector_text_end; 249 250 void __init setup_arch(char **cmdline_p) 251 { 252 extern int mem_reserve(unsigned long, unsigned long, int); 253 extern void bootmem_init(void); 254 255 memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE); 256 boot_command_line[COMMAND_LINE_SIZE-1] = '\0'; 257 *cmdline_p = command_line; 258 259 /* Reserve some memory regions */ 260 261 #ifdef CONFIG_BLK_DEV_INITRD 262 if (initrd_start < initrd_end) { 263 initrd_is_mapped = mem_reserve(__pa(initrd_start), 264 __pa(initrd_end), 0); 265 initrd_below_start_ok = 1; 266 } else { 267 initrd_start = 0; 268 } 269 #endif 270 271 mem_reserve(__pa(&_stext),__pa(&_end), 1); 272 273 mem_reserve(__pa(&_WindowVectors_text_start), 274 __pa(&_WindowVectors_text_end), 0); 275 276 mem_reserve(__pa(&_DebugInterruptVector_literal_start), 277 __pa(&_DebugInterruptVector_text_end), 0); 278 279 mem_reserve(__pa(&_KernelExceptionVector_literal_start), 280 __pa(&_KernelExceptionVector_text_end), 0); 281 282 mem_reserve(__pa(&_UserExceptionVector_literal_start), 283 __pa(&_UserExceptionVector_text_end), 0); 284 285 mem_reserve(__pa(&_DoubleExceptionVector_literal_start), 286 __pa(&_DoubleExceptionVector_text_end), 0); 287 288 bootmem_init(); 289 290 platform_setup(cmdline_p); 291 292 293 paging_init(); 294 zones_init(); 295 296 #ifdef CONFIG_VT 297 # if defined(CONFIG_VGA_CONSOLE) 298 conswitchp = &vga_con; 299 # elif defined(CONFIG_DUMMY_CONSOLE) 300 conswitchp = &dummy_con; 301 # endif 302 #endif 303 304 #ifdef CONFIG_PCI 305 platform_pcibios_init(); 306 #endif 307 } 308 309 void machine_restart(char * cmd) 310 { 311 platform_restart(); 312 } 313 314 void machine_halt(void) 315 { 316 platform_halt(); 317 while (1); 318 } 319 320 void machine_power_off(void) 321 { 322 platform_power_off(); 323 while (1); 324 } 325 #ifdef CONFIG_PROC_FS 326 327 /* 328 * Display some core information through /proc/cpuinfo. 329 */ 330 331 static int 332 c_show(struct seq_file *f, void *slot) 333 { 334 /* high-level stuff */ 335 seq_printf(f,"processor\t: 0\n" 336 "vendor_id\t: Tensilica\n" 337 "model\t\t: Xtensa " XCHAL_HW_VERSION_NAME "\n" 338 "core ID\t\t: " XCHAL_CORE_ID "\n" 339 "build ID\t: 0x%x\n" 340 "byte order\t: %s\n" 341 "cpu MHz\t\t: %lu.%02lu\n" 342 "bogomips\t: %lu.%02lu\n", 343 XCHAL_BUILD_UNIQUE_ID, 344 XCHAL_HAVE_BE ? "big" : "little", 345 CCOUNT_PER_JIFFY/(1000000/HZ), 346 (CCOUNT_PER_JIFFY/(10000/HZ)) % 100, 347 loops_per_jiffy/(500000/HZ), 348 (loops_per_jiffy/(5000/HZ)) % 100); 349 350 seq_printf(f,"flags\t\t: " 351 #if XCHAL_HAVE_NMI 352 "nmi " 353 #endif 354 #if XCHAL_HAVE_DEBUG 355 "debug " 356 # if XCHAL_HAVE_OCD 357 "ocd " 358 # endif 359 #endif 360 #if XCHAL_HAVE_DENSITY 361 "density " 362 #endif 363 #if XCHAL_HAVE_BOOLEANS 364 "boolean " 365 #endif 366 #if XCHAL_HAVE_LOOPS 367 "loop " 368 #endif 369 #if XCHAL_HAVE_NSA 370 "nsa " 371 #endif 372 #if XCHAL_HAVE_MINMAX 373 "minmax " 374 #endif 375 #if XCHAL_HAVE_SEXT 376 "sext " 377 #endif 378 #if XCHAL_HAVE_CLAMPS 379 "clamps " 380 #endif 381 #if XCHAL_HAVE_MAC16 382 "mac16 " 383 #endif 384 #if XCHAL_HAVE_MUL16 385 "mul16 " 386 #endif 387 #if XCHAL_HAVE_MUL32 388 "mul32 " 389 #endif 390 #if XCHAL_HAVE_MUL32_HIGH 391 "mul32h " 392 #endif 393 #if XCHAL_HAVE_FP 394 "fpu " 395 #endif 396 "\n"); 397 398 /* Registers. */ 399 seq_printf(f,"physical aregs\t: %d\n" 400 "misc regs\t: %d\n" 401 "ibreak\t\t: %d\n" 402 "dbreak\t\t: %d\n", 403 XCHAL_NUM_AREGS, 404 XCHAL_NUM_MISC_REGS, 405 XCHAL_NUM_IBREAK, 406 XCHAL_NUM_DBREAK); 407 408 409 /* Interrupt. */ 410 seq_printf(f,"num ints\t: %d\n" 411 "ext ints\t: %d\n" 412 "int levels\t: %d\n" 413 "timers\t\t: %d\n" 414 "debug level\t: %d\n", 415 XCHAL_NUM_INTERRUPTS, 416 XCHAL_NUM_EXTINTERRUPTS, 417 XCHAL_NUM_INTLEVELS, 418 XCHAL_NUM_TIMERS, 419 XCHAL_DEBUGLEVEL); 420 421 /* Cache */ 422 seq_printf(f,"icache line size: %d\n" 423 "icache ways\t: %d\n" 424 "icache size\t: %d\n" 425 "icache flags\t: " 426 #if XCHAL_ICACHE_LINE_LOCKABLE 427 "lock" 428 #endif 429 "\n" 430 "dcache line size: %d\n" 431 "dcache ways\t: %d\n" 432 "dcache size\t: %d\n" 433 "dcache flags\t: " 434 #if XCHAL_DCACHE_IS_WRITEBACK 435 "writeback" 436 #endif 437 #if XCHAL_DCACHE_LINE_LOCKABLE 438 "lock" 439 #endif 440 "\n", 441 XCHAL_ICACHE_LINESIZE, 442 XCHAL_ICACHE_WAYS, 443 XCHAL_ICACHE_SIZE, 444 XCHAL_DCACHE_LINESIZE, 445 XCHAL_DCACHE_WAYS, 446 XCHAL_DCACHE_SIZE); 447 448 return 0; 449 } 450 451 /* 452 * We show only CPU #0 info. 453 */ 454 static void * 455 c_start(struct seq_file *f, loff_t *pos) 456 { 457 return (void *) ((*pos == 0) ? (void *)1 : NULL); 458 } 459 460 static void * 461 c_next(struct seq_file *f, void *v, loff_t *pos) 462 { 463 return NULL; 464 } 465 466 static void 467 c_stop(struct seq_file *f, void *v) 468 { 469 } 470 471 const struct seq_operations cpuinfo_op = 472 { 473 start: c_start, 474 next: c_next, 475 stop: c_stop, 476 show: c_show 477 }; 478 479 #endif /* CONFIG_PROC_FS */ 480 481