xref: /openbmc/linux/arch/xtensa/kernel/ptrace.c (revision ba61bb17) 
1 /*
2  * This file is subject to the terms and conditions of the GNU General Public
3  * License.  See the file "COPYING" in the main directory of this archive
4  * for more details.
5  *
6  * Copyright (C) 2001 - 2007  Tensilica Inc.
7  *
8  * Joe Taylor	<joe@tensilica.com, joetylr@yahoo.com>
9  * Chris Zankel <chris@zankel.net>
10  * Scott Foehner<sfoehner@yahoo.com>,
11  * Kevin Chea
12  * Marc Gauthier<marc@tensilica.com> <marc@alumni.uwaterloo.ca>
13  */
14 
15 #include <linux/errno.h>
16 #include <linux/hw_breakpoint.h>
17 #include <linux/kernel.h>
18 #include <linux/mm.h>
19 #include <linux/perf_event.h>
20 #include <linux/ptrace.h>
21 #include <linux/sched.h>
22 #include <linux/sched/task_stack.h>
23 #include <linux/security.h>
24 #include <linux/signal.h>
25 #include <linux/smp.h>
26 #include <linux/tracehook.h>
27 #include <linux/uaccess.h>
28 
29 #include <asm/coprocessor.h>
30 #include <asm/elf.h>
31 #include <asm/page.h>
32 #include <asm/pgtable.h>
33 #include <asm/ptrace.h>
34 
35 
36 void user_enable_single_step(struct task_struct *child)
37 {
38 	child->ptrace |= PT_SINGLESTEP;
39 }
40 
41 void user_disable_single_step(struct task_struct *child)
42 {
43 	child->ptrace &= ~PT_SINGLESTEP;
44 }
45 
46 /*
47  * Called by kernel/ptrace.c when detaching to disable single stepping.
48  */
49 
50 void ptrace_disable(struct task_struct *child)
51 {
52 	/* Nothing to do.. */
53 }
54 
55 static int ptrace_getregs(struct task_struct *child, void __user *uregs)
56 {
57 	struct pt_regs *regs = task_pt_regs(child);
58 	xtensa_gregset_t __user *gregset = uregs;
59 	unsigned long wb = regs->windowbase;
60 	int i;
61 
62 	if (!access_ok(VERIFY_WRITE, uregs, sizeof(xtensa_gregset_t)))
63 		return -EIO;
64 
65 	__put_user(regs->pc, &gregset->pc);
66 	__put_user(regs->ps & ~(1 << PS_EXCM_BIT), &gregset->ps);
67 	__put_user(regs->lbeg, &gregset->lbeg);
68 	__put_user(regs->lend, &gregset->lend);
69 	__put_user(regs->lcount, &gregset->lcount);
70 	__put_user(regs->windowstart, &gregset->windowstart);
71 	__put_user(regs->windowbase, &gregset->windowbase);
72 	__put_user(regs->threadptr, &gregset->threadptr);
73 
74 	for (i = 0; i < XCHAL_NUM_AREGS; i++)
75 		__put_user(regs->areg[i],
76 			   gregset->a + ((wb * 4 + i) % XCHAL_NUM_AREGS));
77 
78 	return 0;
79 }
80 
81 static int ptrace_setregs(struct task_struct *child, void __user *uregs)
82 {
83 	struct pt_regs *regs = task_pt_regs(child);
84 	xtensa_gregset_t *gregset = uregs;
85 	const unsigned long ps_mask = PS_CALLINC_MASK | PS_OWB_MASK;
86 	unsigned long ps;
87 	unsigned long wb, ws;
88 
89 	if (!access_ok(VERIFY_WRITE, uregs, sizeof(xtensa_gregset_t)))
90 		return -EIO;
91 
92 	__get_user(regs->pc, &gregset->pc);
93 	__get_user(ps, &gregset->ps);
94 	__get_user(regs->lbeg, &gregset->lbeg);
95 	__get_user(regs->lend, &gregset->lend);
96 	__get_user(regs->lcount, &gregset->lcount);
97 	__get_user(ws, &gregset->windowstart);
98 	__get_user(wb, &gregset->windowbase);
99 	__get_user(regs->threadptr, &gregset->threadptr);
100 
101 	regs->ps = (regs->ps & ~ps_mask) | (ps & ps_mask) | (1 << PS_EXCM_BIT);
102 
103 	if (wb >= XCHAL_NUM_AREGS / 4)
104 		return -EFAULT;
105 
106 	if (wb != regs->windowbase || ws != regs->windowstart) {
107 		unsigned long rotws, wmask;
108 
109 		rotws = (((ws | (ws << WSBITS)) >> wb) &
110 			 ((1 << WSBITS) - 1)) & ~1;
111 		wmask = ((rotws ? WSBITS + 1 - ffs(rotws) : 0) << 4) |
112 			(rotws & 0xF) | 1;
113 		regs->windowbase = wb;
114 		regs->windowstart = ws;
115 		regs->wmask = wmask;
116 	}
117 
118 	if (wb != 0 && __copy_from_user(regs->areg + XCHAL_NUM_AREGS - wb * 4,
119 					gregset->a, wb * 16))
120 		return -EFAULT;
121 
122 	if (__copy_from_user(regs->areg, gregset->a + wb * 4,
123 			     (WSBITS - wb) * 16))
124 		return -EFAULT;
125 
126 	return 0;
127 }
128 
129 
130 static int ptrace_getxregs(struct task_struct *child, void __user *uregs)
131 {
132 	struct pt_regs *regs = task_pt_regs(child);
133 	struct thread_info *ti = task_thread_info(child);
134 	elf_xtregs_t __user *xtregs = uregs;
135 	int ret = 0;
136 
137 	if (!access_ok(VERIFY_WRITE, uregs, sizeof(elf_xtregs_t)))
138 		return -EIO;
139 
140 #if XTENSA_HAVE_COPROCESSORS
141 	/* Flush all coprocessor registers to memory. */
142 	coprocessor_flush_all(ti);
143 	ret |= __copy_to_user(&xtregs->cp0, &ti->xtregs_cp,
144 			      sizeof(xtregs_coprocessor_t));
145 #endif
146 	ret |= __copy_to_user(&xtregs->opt, &regs->xtregs_opt,
147 			      sizeof(xtregs->opt));
148 	ret |= __copy_to_user(&xtregs->user,&ti->xtregs_user,
149 			      sizeof(xtregs->user));
150 
151 	return ret ? -EFAULT : 0;
152 }
153 
154 static int ptrace_setxregs(struct task_struct *child, void __user *uregs)
155 {
156 	struct thread_info *ti = task_thread_info(child);
157 	struct pt_regs *regs = task_pt_regs(child);
158 	elf_xtregs_t *xtregs = uregs;
159 	int ret = 0;
160 
161 	if (!access_ok(VERIFY_READ, uregs, sizeof(elf_xtregs_t)))
162 		return -EFAULT;
163 
164 #if XTENSA_HAVE_COPROCESSORS
165 	/* Flush all coprocessors before we overwrite them. */
166 	coprocessor_flush_all(ti);
167 	coprocessor_release_all(ti);
168 
169 	ret |= __copy_from_user(&ti->xtregs_cp, &xtregs->cp0,
170 				sizeof(xtregs_coprocessor_t));
171 #endif
172 	ret |= __copy_from_user(&regs->xtregs_opt, &xtregs->opt,
173 				sizeof(xtregs->opt));
174 	ret |= __copy_from_user(&ti->xtregs_user, &xtregs->user,
175 				sizeof(xtregs->user));
176 
177 	return ret ? -EFAULT : 0;
178 }
179 
180 static int ptrace_peekusr(struct task_struct *child, long regno,
181 			  long __user *ret)
182 {
183 	struct pt_regs *regs;
184 	unsigned long tmp;
185 
186 	regs = task_pt_regs(child);
187 	tmp = 0;  /* Default return value. */
188 
189 	switch(regno) {
190 	case REG_AR_BASE ... REG_AR_BASE + XCHAL_NUM_AREGS - 1:
191 		tmp = regs->areg[regno - REG_AR_BASE];
192 		break;
193 
194 	case REG_A_BASE ... REG_A_BASE + 15:
195 		tmp = regs->areg[regno - REG_A_BASE];
196 		break;
197 
198 	case REG_PC:
199 		tmp = regs->pc;
200 		break;
201 
202 	case REG_PS:
203 		/* Note: PS.EXCM is not set while user task is running;
204 		 * its being set in regs is for exception handling
205 		 * convenience.
206 		 */
207 		tmp = (regs->ps & ~(1 << PS_EXCM_BIT));
208 		break;
209 
210 	case REG_WB:
211 		break;		/* tmp = 0 */
212 
213 	case REG_WS:
214 		{
215 			unsigned long wb = regs->windowbase;
216 			unsigned long ws = regs->windowstart;
217 			tmp = ((ws >> wb) | (ws << (WSBITS - wb))) &
218 				((1 << WSBITS) - 1);
219 			break;
220 		}
221 	case REG_LBEG:
222 		tmp = regs->lbeg;
223 		break;
224 
225 	case REG_LEND:
226 		tmp = regs->lend;
227 		break;
228 
229 	case REG_LCOUNT:
230 		tmp = regs->lcount;
231 		break;
232 
233 	case REG_SAR:
234 		tmp = regs->sar;
235 		break;
236 
237 	case SYSCALL_NR:
238 		tmp = regs->syscall;
239 		break;
240 
241 	default:
242 		return -EIO;
243 	}
244 	return put_user(tmp, ret);
245 }
246 
247 static int ptrace_pokeusr(struct task_struct *child, long regno, long val)
248 {
249 	struct pt_regs *regs;
250 	regs = task_pt_regs(child);
251 
252 	switch (regno) {
253 	case REG_AR_BASE ... REG_AR_BASE + XCHAL_NUM_AREGS - 1:
254 		regs->areg[regno - REG_AR_BASE] = val;
255 		break;
256 
257 	case REG_A_BASE ... REG_A_BASE + 15:
258 		regs->areg[regno - REG_A_BASE] = val;
259 		break;
260 
261 	case REG_PC:
262 		regs->pc = val;
263 		break;
264 
265 	case SYSCALL_NR:
266 		regs->syscall = val;
267 		break;
268 
269 	default:
270 		return -EIO;
271 	}
272 	return 0;
273 }
274 
275 #ifdef CONFIG_HAVE_HW_BREAKPOINT
276 static void ptrace_hbptriggered(struct perf_event *bp,
277 				struct perf_sample_data *data,
278 				struct pt_regs *regs)
279 {
280 	int i;
281 	struct arch_hw_breakpoint *bkpt = counter_arch_bp(bp);
282 
283 	if (bp->attr.bp_type & HW_BREAKPOINT_X) {
284 		for (i = 0; i < XCHAL_NUM_IBREAK; ++i)
285 			if (current->thread.ptrace_bp[i] == bp)
286 				break;
287 		i <<= 1;
288 	} else {
289 		for (i = 0; i < XCHAL_NUM_DBREAK; ++i)
290 			if (current->thread.ptrace_wp[i] == bp)
291 				break;
292 		i = (i << 1) | 1;
293 	}
294 
295 	force_sig_ptrace_errno_trap(i, (void __user *)bkpt->address);
296 }
297 
298 static struct perf_event *ptrace_hbp_create(struct task_struct *tsk, int type)
299 {
300 	struct perf_event_attr attr;
301 
302 	ptrace_breakpoint_init(&attr);
303 
304 	/* Initialise fields to sane defaults. */
305 	attr.bp_addr	= 0;
306 	attr.bp_len	= 1;
307 	attr.bp_type	= type;
308 	attr.disabled	= 1;
309 
310 	return register_user_hw_breakpoint(&attr, ptrace_hbptriggered, NULL,
311 					   tsk);
312 }
313 
314 /*
315  * Address bit 0 choose instruction (0) or data (1) break register, bits
316  * 31..1 are the register number.
317  * Both PTRACE_GETHBPREGS and PTRACE_SETHBPREGS transfer two 32-bit words:
318  * address (0) and control (1).
319  * Instruction breakpoint contorl word is 0 to clear breakpoint, 1 to set.
320  * Data breakpoint control word bit 31 is 'trigger on store', bit 30 is
321  * 'trigger on load, bits 29..0 are length. Length 0 is used to clear a
322  * breakpoint. To set a breakpoint length must be a power of 2 in the range
323  * 1..64 and the address must be length-aligned.
324  */
325 
326 static long ptrace_gethbpregs(struct task_struct *child, long addr,
327 			      long __user *datap)
328 {
329 	struct perf_event *bp;
330 	u32 user_data[2] = {0};
331 	bool dbreak = addr & 1;
332 	unsigned idx = addr >> 1;
333 
334 	if ((!dbreak && idx >= XCHAL_NUM_IBREAK) ||
335 	    (dbreak && idx >= XCHAL_NUM_DBREAK))
336 		return -EINVAL;
337 
338 	if (dbreak)
339 		bp = child->thread.ptrace_wp[idx];
340 	else
341 		bp = child->thread.ptrace_bp[idx];
342 
343 	if (bp) {
344 		user_data[0] = bp->attr.bp_addr;
345 		user_data[1] = bp->attr.disabled ? 0 : bp->attr.bp_len;
346 		if (dbreak) {
347 			if (bp->attr.bp_type & HW_BREAKPOINT_R)
348 				user_data[1] |= DBREAKC_LOAD_MASK;
349 			if (bp->attr.bp_type & HW_BREAKPOINT_W)
350 				user_data[1] |= DBREAKC_STOR_MASK;
351 		}
352 	}
353 
354 	if (copy_to_user(datap, user_data, sizeof(user_data)))
355 		return -EFAULT;
356 
357 	return 0;
358 }
359 
360 static long ptrace_sethbpregs(struct task_struct *child, long addr,
361 			      long __user *datap)
362 {
363 	struct perf_event *bp;
364 	struct perf_event_attr attr;
365 	u32 user_data[2];
366 	bool dbreak = addr & 1;
367 	unsigned idx = addr >> 1;
368 	int bp_type = 0;
369 
370 	if ((!dbreak && idx >= XCHAL_NUM_IBREAK) ||
371 	    (dbreak && idx >= XCHAL_NUM_DBREAK))
372 		return -EINVAL;
373 
374 	if (copy_from_user(user_data, datap, sizeof(user_data)))
375 		return -EFAULT;
376 
377 	if (dbreak) {
378 		bp = child->thread.ptrace_wp[idx];
379 		if (user_data[1] & DBREAKC_LOAD_MASK)
380 			bp_type |= HW_BREAKPOINT_R;
381 		if (user_data[1] & DBREAKC_STOR_MASK)
382 			bp_type |= HW_BREAKPOINT_W;
383 	} else {
384 		bp = child->thread.ptrace_bp[idx];
385 		bp_type = HW_BREAKPOINT_X;
386 	}
387 
388 	if (!bp) {
389 		bp = ptrace_hbp_create(child,
390 				       bp_type ? bp_type : HW_BREAKPOINT_RW);
391 		if (IS_ERR(bp))
392 			return PTR_ERR(bp);
393 		if (dbreak)
394 			child->thread.ptrace_wp[idx] = bp;
395 		else
396 			child->thread.ptrace_bp[idx] = bp;
397 	}
398 
399 	attr = bp->attr;
400 	attr.bp_addr = user_data[0];
401 	attr.bp_len = user_data[1] & ~(DBREAKC_LOAD_MASK | DBREAKC_STOR_MASK);
402 	attr.bp_type = bp_type;
403 	attr.disabled = !attr.bp_len;
404 
405 	return modify_user_hw_breakpoint(bp, &attr);
406 }
407 #endif
408 
409 long arch_ptrace(struct task_struct *child, long request,
410 		 unsigned long addr, unsigned long data)
411 {
412 	int ret = -EPERM;
413 	void __user *datap = (void __user *) data;
414 
415 	switch (request) {
416 	case PTRACE_PEEKTEXT:	/* read word at location addr. */
417 	case PTRACE_PEEKDATA:
418 		ret = generic_ptrace_peekdata(child, addr, data);
419 		break;
420 
421 	case PTRACE_PEEKUSR:	/* read register specified by addr. */
422 		ret = ptrace_peekusr(child, addr, datap);
423 		break;
424 
425 	case PTRACE_POKETEXT:	/* write the word at location addr. */
426 	case PTRACE_POKEDATA:
427 		ret = generic_ptrace_pokedata(child, addr, data);
428 		break;
429 
430 	case PTRACE_POKEUSR:	/* write register specified by addr. */
431 		ret = ptrace_pokeusr(child, addr, data);
432 		break;
433 
434 	case PTRACE_GETREGS:
435 		ret = ptrace_getregs(child, datap);
436 		break;
437 
438 	case PTRACE_SETREGS:
439 		ret = ptrace_setregs(child, datap);
440 		break;
441 
442 	case PTRACE_GETXTREGS:
443 		ret = ptrace_getxregs(child, datap);
444 		break;
445 
446 	case PTRACE_SETXTREGS:
447 		ret = ptrace_setxregs(child, datap);
448 		break;
449 #ifdef CONFIG_HAVE_HW_BREAKPOINT
450 	case PTRACE_GETHBPREGS:
451 		ret = ptrace_gethbpregs(child, addr, datap);
452 		break;
453 
454 	case PTRACE_SETHBPREGS:
455 		ret = ptrace_sethbpregs(child, addr, datap);
456 		break;
457 #endif
458 	default:
459 		ret = ptrace_request(child, request, addr, data);
460 		break;
461 	}
462 
463 	return ret;
464 }
465 
466 unsigned long do_syscall_trace_enter(struct pt_regs *regs)
467 {
468 	if (test_thread_flag(TIF_SYSCALL_TRACE) &&
469 	    tracehook_report_syscall_entry(regs))
470 		return -1;
471 
472 	return regs->areg[2];
473 }
474 
475 void do_syscall_trace_leave(struct pt_regs *regs)
476 {
477 	int step;
478 
479 	step = test_thread_flag(TIF_SINGLESTEP);
480 
481 	if (step || test_thread_flag(TIF_SYSCALL_TRACE))
482 		tracehook_report_syscall_exit(regs, step);
483 }
484