xref: /openbmc/linux/arch/xtensa/kernel/process.c (revision 643d1f7f)
1 /*
2  * arch/xtensa/kernel/process.c
3  *
4  * Xtensa Processor version.
5  *
6  * This file is subject to the terms and conditions of the GNU General Public
7  * License.  See the file "COPYING" in the main directory of this archive
8  * for more details.
9  *
10  * Copyright (C) 2001 - 2005 Tensilica Inc.
11  *
12  * Joe Taylor <joe@tensilica.com, joetylr@yahoo.com>
13  * Chris Zankel <chris@zankel.net>
14  * Marc Gauthier <marc@tensilica.com, marc@alumni.uwaterloo.ca>
15  * Kevin Chea
16  */
17 
18 #include <linux/errno.h>
19 #include <linux/sched.h>
20 #include <linux/kernel.h>
21 #include <linux/mm.h>
22 #include <linux/smp.h>
23 #include <linux/stddef.h>
24 #include <linux/unistd.h>
25 #include <linux/ptrace.h>
26 #include <linux/slab.h>
27 #include <linux/elf.h>
28 #include <linux/init.h>
29 #include <linux/prctl.h>
30 #include <linux/init_task.h>
31 #include <linux/module.h>
32 #include <linux/mqueue.h>
33 #include <linux/fs.h>
34 
35 #include <asm/pgtable.h>
36 #include <asm/uaccess.h>
37 #include <asm/system.h>
38 #include <asm/io.h>
39 #include <asm/processor.h>
40 #include <asm/platform.h>
41 #include <asm/mmu.h>
42 #include <asm/irq.h>
43 #include <asm/atomic.h>
44 #include <asm/asm-offsets.h>
45 #include <asm/regs.h>
46 
47 extern void ret_from_fork(void);
48 
49 struct task_struct *current_set[NR_CPUS] = {&init_task, };
50 
51 void (*pm_power_off)(void) = NULL;
52 EXPORT_SYMBOL(pm_power_off);
53 
54 
55 /*
56  * Powermanagement idle function, if any is provided by the platform.
57  */
58 
59 void cpu_idle(void)
60 {
61   	local_irq_enable();
62 
63 	/* endless idle loop with no priority at all */
64 	while (1) {
65 		while (!need_resched())
66 			platform_idle();
67 		preempt_enable_no_resched();
68 		schedule();
69 		preempt_disable();
70 	}
71 }
72 
73 /*
74  * Free current thread data structures etc..
75  */
76 
77 void exit_thread(void)
78 {
79 }
80 
81 void flush_thread(void)
82 {
83 }
84 
85 /*
86  * Copy thread.
87  *
88  * The stack layout for the new thread looks like this:
89  *
90  *	+------------------------+ <- sp in childregs (= tos)
91  *	|       childregs        |
92  *	+------------------------+ <- thread.sp = sp in dummy-frame
93  *	|      dummy-frame       |    (saved in dummy-frame spill-area)
94  *	+------------------------+
95  *
96  * We create a dummy frame to return to ret_from_fork:
97  *   a0 points to ret_from_fork (simulating a call4)
98  *   sp points to itself (thread.sp)
99  *   a2, a3 are unused.
100  *
101  * Note: This is a pristine frame, so we don't need any spill region on top of
102  *       childregs.
103  */
104 
105 int copy_thread(int nr, unsigned long clone_flags, unsigned long usp,
106 		unsigned long unused,
107                 struct task_struct * p, struct pt_regs * regs)
108 {
109 	struct pt_regs *childregs;
110 	unsigned long tos;
111 	int user_mode = user_mode(regs);
112 
113 	/* Set up new TSS. */
114 	tos = (unsigned long)task_stack_page(p) + THREAD_SIZE;
115 	if (user_mode)
116 		childregs = (struct pt_regs*)(tos - PT_USER_SIZE);
117 	else
118 		childregs = (struct pt_regs*)tos - 1;
119 
120 	*childregs = *regs;
121 
122 	/* Create a call4 dummy-frame: a0 = 0, a1 = childregs. */
123 	*((int*)childregs - 3) = (unsigned long)childregs;
124 	*((int*)childregs - 4) = 0;
125 
126 	childregs->areg[1] = tos;
127 	childregs->areg[2] = 0;
128 	p->set_child_tid = p->clear_child_tid = NULL;
129 	p->thread.ra = MAKE_RA_FOR_CALL((unsigned long)ret_from_fork, 0x1);
130 	p->thread.sp = (unsigned long)childregs;
131 	if (user_mode(regs)) {
132 
133 		int len = childregs->wmask & ~0xf;
134 		childregs->areg[1] = usp;
135 		memcpy(&childregs->areg[XCHAL_NUM_AREGS - len/4],
136 		       &regs->areg[XCHAL_NUM_AREGS - len/4], len);
137 
138 		if (clone_flags & CLONE_SETTLS)
139 			childregs->areg[2] = childregs->areg[6];
140 
141 	} else {
142 		/* In kernel space, we start a new thread with a new stack. */
143 		childregs->wmask = 1;
144 	}
145 	return 0;
146 }
147 
148 
149 /*
150  * These bracket the sleeping functions..
151  */
152 
153 unsigned long get_wchan(struct task_struct *p)
154 {
155 	unsigned long sp, pc;
156 	unsigned long stack_page = (unsigned long) task_stack_page(p);
157 	int count = 0;
158 
159 	if (!p || p == current || p->state == TASK_RUNNING)
160 		return 0;
161 
162 	sp = p->thread.sp;
163 	pc = MAKE_PC_FROM_RA(p->thread.ra, p->thread.sp);
164 
165 	do {
166 		if (sp < stack_page + sizeof(struct task_struct) ||
167 		    sp >= (stack_page + THREAD_SIZE) ||
168 		    pc == 0)
169 			return 0;
170 		if (!in_sched_functions(pc))
171 			return pc;
172 
173 		/* Stack layout: sp-4: ra, sp-3: sp' */
174 
175 		pc = MAKE_PC_FROM_RA(*(unsigned long*)sp - 4, sp);
176 		sp = *(unsigned long *)sp - 3;
177 	} while (count++ < 16);
178 	return 0;
179 }
180 
181 /*
182  * do_copy_regs() gathers information from 'struct pt_regs' and
183  * 'current->thread.areg[]' to fill in the xtensa_gregset_t
184  * structure.
185  *
186  * xtensa_gregset_t and 'struct pt_regs' are vastly different formats
187  * of processor registers.  Besides different ordering,
188  * xtensa_gregset_t contains non-live register information that
189  * 'struct pt_regs' does not.  Exception handling (primarily) uses
190  * 'struct pt_regs'.  Core files and ptrace use xtensa_gregset_t.
191  *
192  */
193 
194 void do_copy_regs (xtensa_gregset_t *elfregs, struct pt_regs *regs,
195 		   struct task_struct *tsk)
196 {
197 	int i, n, wb_offset;
198 
199 	elfregs->xchal_config_id0 = XCHAL_HW_CONFIGID0;
200 	elfregs->xchal_config_id1 = XCHAL_HW_CONFIGID1;
201 
202 	__asm__ __volatile__ ("rsr  %0, 176\n" : "=a" (i));
203  	elfregs->cpux = i;
204 	__asm__ __volatile__ ("rsr  %0, 208\n" : "=a" (i));
205  	elfregs->cpuy = i;
206 
207 	/* Note:  PS.EXCM is not set while user task is running; its
208 	 * being set in regs->ps is for exception handling convenience.
209 	 */
210 
211 	elfregs->pc		= regs->pc;
212 	elfregs->ps		= (regs->ps & ~(1 << PS_EXCM_BIT));
213 	elfregs->exccause	= regs->exccause;
214 	elfregs->excvaddr	= regs->excvaddr;
215 	elfregs->windowbase	= regs->windowbase;
216 	elfregs->windowstart	= regs->windowstart;
217 	elfregs->lbeg		= regs->lbeg;
218 	elfregs->lend		= regs->lend;
219 	elfregs->lcount		= regs->lcount;
220 	elfregs->sar		= regs->sar;
221 	elfregs->syscall	= regs->syscall;
222 
223 	/* Copy register file.
224 	 * The layout looks like this:
225 	 *
226 	 * |  a0 ... a15  | Z ... Z |  arX ... arY  |
227 	 *  current window  unused    saved frames
228 	 */
229 
230 	memset (elfregs->ar, 0, sizeof(elfregs->ar));
231 
232 	wb_offset = regs->windowbase * 4;
233 	n = (regs->wmask&1)? 4 : (regs->wmask&2)? 8 : (regs->wmask&4)? 12 : 16;
234 
235 	for (i = 0; i < n; i++)
236 		elfregs->ar[(wb_offset + i) % XCHAL_NUM_AREGS] = regs->areg[i];
237 
238 	n = (regs->wmask >> 4) * 4;
239 
240 	for (i = XCHAL_NUM_AREGS - n; n > 0; i++, n--)
241 		elfregs->ar[(wb_offset + i) % XCHAL_NUM_AREGS] = regs->areg[i];
242 }
243 
244 void xtensa_elf_core_copy_regs (xtensa_gregset_t *elfregs, struct pt_regs *regs)
245 {
246 	do_copy_regs ((xtensa_gregset_t *)elfregs, regs, current);
247 }
248 
249 
250 /* The inverse of do_copy_regs().  No error or sanity checking. */
251 
252 void do_restore_regs (xtensa_gregset_t *elfregs, struct pt_regs *regs,
253 		      struct task_struct *tsk)
254 {
255 	int i, n, wb_offset;
256 
257 	/* Note:  PS.EXCM is not set while user task is running; it
258 	 * needs to be set in regs->ps is for exception handling convenience.
259 	 */
260 
261 	regs->pc		= elfregs->pc;
262 	regs->ps		= (elfregs->ps | (1 << PS_EXCM_BIT));
263 	regs->exccause		= elfregs->exccause;
264 	regs->excvaddr		= elfregs->excvaddr;
265 	regs->windowbase	= elfregs->windowbase;
266 	regs->windowstart	= elfregs->windowstart;
267 	regs->lbeg		= elfregs->lbeg;
268 	regs->lend		= elfregs->lend;
269 	regs->lcount		= elfregs->lcount;
270 	regs->sar		= elfregs->sar;
271 	regs->syscall	= elfregs->syscall;
272 
273 	/* Clear everything. */
274 
275 	memset (regs->areg, 0, sizeof(regs->areg));
276 
277 	/* Copy regs from live window frame. */
278 
279 	wb_offset = regs->windowbase * 4;
280 	n = (regs->wmask&1)? 4 : (regs->wmask&2)? 8 : (regs->wmask&4)? 12 : 16;
281 
282 	for (i = 0; i < n; i++)
283 		regs->areg[(wb_offset+i) % XCHAL_NUM_AREGS] = elfregs->ar[i];
284 
285 	n = (regs->wmask >> 4) * 4;
286 
287 	for (i = XCHAL_NUM_AREGS - n; n > 0; i++, n--)
288 		regs->areg[(wb_offset+i) % XCHAL_NUM_AREGS] = elfregs->ar[i];
289 }
290 
291 /*
292  * do_save_fpregs() gathers information from 'struct pt_regs' and
293  * 'current->thread' to fill in the elf_fpregset_t structure.
294  *
295  * Core files and ptrace use elf_fpregset_t.
296  */
297 
298 void do_save_fpregs (elf_fpregset_t *fpregs, struct pt_regs *regs,
299 		     struct task_struct *tsk)
300 {
301 #if XCHAL_HAVE_CP
302 
303 	extern unsigned char	_xtensa_reginfo_tables[];
304 	extern unsigned		_xtensa_reginfo_table_size;
305 	int i;
306 	unsigned long flags;
307 
308 	/* Before dumping coprocessor state from memory,
309 	 * ensure any live coprocessor contents for this
310 	 * task are first saved to memory:
311 	 */
312 	local_irq_save(flags);
313 
314 	for (i = 0; i < XCHAL_CP_MAX; i++) {
315 		if (tsk == coprocessor_info[i].owner) {
316 			enable_coprocessor(i);
317 			save_coprocessor_registers(
318 			    tsk->thread.cp_save+coprocessor_info[i].offset,i);
319 			disable_coprocessor(i);
320 		}
321 	}
322 
323 	local_irq_restore(flags);
324 
325 	/* Now dump coprocessor & extra state: */
326 	memcpy((unsigned char*)fpregs,
327 		_xtensa_reginfo_tables, _xtensa_reginfo_table_size);
328 	memcpy((unsigned char*)fpregs + _xtensa_reginfo_table_size,
329 		tsk->thread.cp_save, XTENSA_CP_EXTRA_SIZE);
330 #endif
331 }
332 
333 /*
334  * The inverse of do_save_fpregs().
335  * Copies coprocessor and extra state from fpregs into regs and tsk->thread.
336  * Returns 0 on success, non-zero if layout doesn't match.
337  */
338 
339 int  do_restore_fpregs (elf_fpregset_t *fpregs, struct pt_regs *regs,
340 		        struct task_struct *tsk)
341 {
342 #if XCHAL_HAVE_CP
343 
344 	extern unsigned char	_xtensa_reginfo_tables[];
345 	extern unsigned		_xtensa_reginfo_table_size;
346 	int i;
347 	unsigned long flags;
348 
349 	/* Make sure save area layouts match.
350 	 * FIXME:  in the future we could allow restoring from
351 	 * a different layout of the same registers, by comparing
352 	 * fpregs' table with _xtensa_reginfo_tables and matching
353 	 * entries and copying registers one at a time.
354 	 * Not too sure yet whether that's very useful.
355 	 */
356 
357 	if( memcmp((unsigned char*)fpregs,
358 		_xtensa_reginfo_tables, _xtensa_reginfo_table_size) ) {
359 	    return -1;
360 	}
361 
362 	/* Before restoring coprocessor state from memory,
363 	 * ensure any live coprocessor contents for this
364 	 * task are first invalidated.
365 	 */
366 
367 	local_irq_save(flags);
368 
369 	for (i = 0; i < XCHAL_CP_MAX; i++) {
370 		if (tsk == coprocessor_info[i].owner) {
371 			enable_coprocessor(i);
372 			save_coprocessor_registers(
373 			    tsk->thread.cp_save+coprocessor_info[i].offset,i);
374 			coprocessor_info[i].owner = 0;
375 			disable_coprocessor(i);
376 		}
377 	}
378 
379 	local_irq_restore(flags);
380 
381 	/*  Now restore coprocessor & extra state:  */
382 
383 	memcpy(tsk->thread.cp_save,
384 		(unsigned char*)fpregs + _xtensa_reginfo_table_size,
385 		XTENSA_CP_EXTRA_SIZE);
386 #endif
387 	return 0;
388 }
389 /*
390  * Fill in the CP structure for a core dump for a particular task.
391  */
392 
393 int
394 dump_task_fpu(struct pt_regs *regs, struct task_struct *task, elf_fpregset_t *r)
395 {
396 	return 0;	/* no coprocessors active on this processor */
397 }
398 
399 /*
400  * Fill in the CP structure for a core dump.
401  * This includes any FPU coprocessor.
402  * Here, we dump all coprocessors, and other ("extra") custom state.
403  *
404  * This function is called by elf_core_dump() in fs/binfmt_elf.c
405  * (in which case 'regs' comes from calls to do_coredump, see signals.c).
406  */
407 int  dump_fpu(struct pt_regs *regs, elf_fpregset_t *r)
408 {
409 	return dump_task_fpu(regs, current, r);
410 }
411 
412 asmlinkage
413 long xtensa_clone(unsigned long clone_flags, unsigned long newsp,
414                   void __user *parent_tid, void *child_tls,
415                   void __user *child_tid, long a5,
416                   struct pt_regs *regs)
417 {
418         if (!newsp)
419                 newsp = regs->areg[1];
420         return do_fork(clone_flags, newsp, regs, 0, parent_tid, child_tid);
421 }
422 
423 /*
424  *  * xtensa_execve() executes a new program.
425  *   */
426 
427 asmlinkage
428 long xtensa_execve(char __user *name, char __user * __user *argv,
429                    char __user * __user *envp,
430                    long a3, long a4, long a5,
431                    struct pt_regs *regs)
432 {
433 	long error;
434 	char * filename;
435 
436 	filename = getname(name);
437 	error = PTR_ERR(filename);
438 	if (IS_ERR(filename))
439 		goto out;
440 	// FIXME: release coprocessor??
441 	error = do_execve(filename, argv, envp, regs);
442 	if (error == 0) {
443 		task_lock(current);
444 		current->ptrace &= ~PT_DTRACE;
445 		task_unlock(current);
446 	}
447 	putname(filename);
448 out:
449 	return error;
450 }
451 
452