xref: /openbmc/linux/arch/xtensa/kernel/mxhead.S (revision 8c9ab55c)
1f615136cSMax Filippov/*
2f615136cSMax Filippov * Xtensa Secondary Processors startup code.
3f615136cSMax Filippov *
4f615136cSMax Filippov * This file is subject to the terms and conditions of the GNU General Public
5f615136cSMax Filippov * License.  See the file "COPYING" in the main directory of this archive
6f615136cSMax Filippov * for more details.
7f615136cSMax Filippov *
8f615136cSMax Filippov * Copyright (C) 2001 - 2013 Tensilica Inc.
9f615136cSMax Filippov *
10f615136cSMax Filippov * Joe Taylor <joe@tensilica.com>
11f615136cSMax Filippov * Chris Zankel <chris@zankel.net>
12f615136cSMax Filippov * Marc Gauthier <marc@tensilica.com, marc@alumni.uwaterloo.ca>
13f615136cSMax Filippov * Pete Delaney <piet@tensilica.com>
14f615136cSMax Filippov */
15f615136cSMax Filippov
16f615136cSMax Filippov#include <linux/linkage.h>
17f615136cSMax Filippov
18f615136cSMax Filippov#include <asm/cacheasm.h>
19f615136cSMax Filippov#include <asm/initialize_mmu.h>
20f615136cSMax Filippov#include <asm/mxregs.h>
21f615136cSMax Filippov#include <asm/regs.h>
22f615136cSMax Filippov
23f615136cSMax Filippov
24f615136cSMax Filippov	.section .SecondaryResetVector.text, "ax"
25f615136cSMax Filippov
26f615136cSMax Filippov
27f615136cSMax FilippovENTRY(_SecondaryResetVector)
28f615136cSMax Filippov	_j _SetupOCD
29f615136cSMax Filippov
30f615136cSMax Filippov	.begin  no-absolute-literals
31f615136cSMax Filippov	.literal_position
32f615136cSMax Filippov
33f615136cSMax Filippov_SetupOCD:
34f615136cSMax Filippov	/*
35f615136cSMax Filippov	 * Initialize WB, WS, and clear PS.EXCM (to allow loop instructions).
36f615136cSMax Filippov	 * Set Interrupt Level just below XCHAL_DEBUGLEVEL to allow
37f615136cSMax Filippov	 * xt-gdb to single step via DEBUG exceptions received directly
38f615136cSMax Filippov	 * by ocd.
39f615136cSMax Filippov	 */
40*8c9ab55cSMax Filippov#if XCHAL_HAVE_WINDOWED
41f615136cSMax Filippov	movi	a1, 1
42f615136cSMax Filippov	movi	a0, 0
43f615136cSMax Filippov	wsr	a1, windowstart
44f615136cSMax Filippov	wsr	a0, windowbase
45f615136cSMax Filippov	rsync
46*8c9ab55cSMax Filippov#endif
47f615136cSMax Filippov
48f615136cSMax Filippov	movi	a1, LOCKLEVEL
49f615136cSMax Filippov	wsr	a1, ps
50f615136cSMax Filippov	rsync
51f615136cSMax Filippov
52f615136cSMax Filippov_SetupMMU:
53f615136cSMax Filippov#ifdef CONFIG_INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
54f615136cSMax Filippov	initialize_mmu
55f615136cSMax Filippov#endif
56f615136cSMax Filippov
57f615136cSMax Filippov	/*
58f615136cSMax Filippov	 * Start Secondary Processors with NULL pointer to boot params.
59f615136cSMax Filippov	 */
60f615136cSMax Filippov	movi	a2, 0				#  a2 == NULL
61f615136cSMax Filippov	movi	a3, _startup
62f615136cSMax Filippov	jx	a3
63f615136cSMax Filippov
64f615136cSMax Filippov	.end    no-absolute-literals
65