1 /* 2 * include/asm-xtensa/spinlock.h 3 * 4 * This file is subject to the terms and conditions of the GNU General Public 5 * License. See the file "COPYING" in the main directory of this archive 6 * for more details. 7 * 8 * Copyright (C) 2001 - 2005 Tensilica Inc. 9 */ 10 11 #ifndef _XTENSA_SPINLOCK_H 12 #define _XTENSA_SPINLOCK_H 13 14 #include <asm/barrier.h> 15 #include <asm/processor.h> 16 17 /* 18 * spinlock 19 * 20 * There is at most one owner of a spinlock. There are not different 21 * types of spinlock owners like there are for rwlocks (see below). 22 * 23 * When trying to obtain a spinlock, the function "spins" forever, or busy- 24 * waits, until the lock is obtained. When spinning, presumably some other 25 * owner will soon give up the spinlock making it available to others. Use 26 * the trylock functions to avoid spinning forever. 27 * 28 * possible values: 29 * 30 * 0 nobody owns the spinlock 31 * 1 somebody owns the spinlock 32 */ 33 34 #define arch_spin_is_locked(x) ((x)->slock != 0) 35 36 #define arch_spin_lock_flags(lock, flags) arch_spin_lock(lock) 37 38 static inline void arch_spin_lock(arch_spinlock_t *lock) 39 { 40 unsigned long tmp; 41 42 __asm__ __volatile__( 43 " movi %0, 0\n" 44 " wsr %0, scompare1\n" 45 "1: movi %0, 1\n" 46 " s32c1i %0, %1, 0\n" 47 " bnez %0, 1b\n" 48 : "=&a" (tmp) 49 : "a" (&lock->slock) 50 : "memory"); 51 } 52 53 /* Returns 1 if the lock is obtained, 0 otherwise. */ 54 55 static inline int arch_spin_trylock(arch_spinlock_t *lock) 56 { 57 unsigned long tmp; 58 59 __asm__ __volatile__( 60 " movi %0, 0\n" 61 " wsr %0, scompare1\n" 62 " movi %0, 1\n" 63 " s32c1i %0, %1, 0\n" 64 : "=&a" (tmp) 65 : "a" (&lock->slock) 66 : "memory"); 67 68 return tmp == 0 ? 1 : 0; 69 } 70 71 static inline void arch_spin_unlock(arch_spinlock_t *lock) 72 { 73 unsigned long tmp; 74 75 __asm__ __volatile__( 76 " movi %0, 0\n" 77 " s32ri %0, %1, 0\n" 78 : "=&a" (tmp) 79 : "a" (&lock->slock) 80 : "memory"); 81 } 82 83 /* 84 * rwlock 85 * 86 * Read-write locks are really a more flexible spinlock. They allow 87 * multiple readers but only one writer. Write ownership is exclusive 88 * (i.e., all other readers and writers are blocked from ownership while 89 * there is a write owner). These rwlocks are unfair to writers. Writers 90 * can be starved for an indefinite time by readers. 91 * 92 * possible values: 93 * 94 * 0 nobody owns the rwlock 95 * >0 one or more readers own the rwlock 96 * (the positive value is the actual number of readers) 97 * 0x80000000 one writer owns the rwlock, no other writers, no readers 98 */ 99 100 static inline void arch_write_lock(arch_rwlock_t *rw) 101 { 102 unsigned long tmp; 103 104 __asm__ __volatile__( 105 " movi %0, 0\n" 106 " wsr %0, scompare1\n" 107 "1: movi %0, 1\n" 108 " slli %0, %0, 31\n" 109 " s32c1i %0, %1, 0\n" 110 " bnez %0, 1b\n" 111 : "=&a" (tmp) 112 : "a" (&rw->lock) 113 : "memory"); 114 } 115 116 /* Returns 1 if the lock is obtained, 0 otherwise. */ 117 118 static inline int arch_write_trylock(arch_rwlock_t *rw) 119 { 120 unsigned long tmp; 121 122 __asm__ __volatile__( 123 " movi %0, 0\n" 124 " wsr %0, scompare1\n" 125 " movi %0, 1\n" 126 " slli %0, %0, 31\n" 127 " s32c1i %0, %1, 0\n" 128 : "=&a" (tmp) 129 : "a" (&rw->lock) 130 : "memory"); 131 132 return tmp == 0 ? 1 : 0; 133 } 134 135 static inline void arch_write_unlock(arch_rwlock_t *rw) 136 { 137 unsigned long tmp; 138 139 __asm__ __volatile__( 140 " movi %0, 0\n" 141 " s32ri %0, %1, 0\n" 142 : "=&a" (tmp) 143 : "a" (&rw->lock) 144 : "memory"); 145 } 146 147 static inline void arch_read_lock(arch_rwlock_t *rw) 148 { 149 unsigned long tmp; 150 unsigned long result; 151 152 __asm__ __volatile__( 153 "1: l32i %1, %2, 0\n" 154 " bltz %1, 1b\n" 155 " wsr %1, scompare1\n" 156 " addi %0, %1, 1\n" 157 " s32c1i %0, %2, 0\n" 158 " bne %0, %1, 1b\n" 159 : "=&a" (result), "=&a" (tmp) 160 : "a" (&rw->lock) 161 : "memory"); 162 } 163 164 /* Returns 1 if the lock is obtained, 0 otherwise. */ 165 166 static inline int arch_read_trylock(arch_rwlock_t *rw) 167 { 168 unsigned long result; 169 unsigned long tmp; 170 171 __asm__ __volatile__( 172 " l32i %1, %2, 0\n" 173 " addi %0, %1, 1\n" 174 " bltz %0, 1f\n" 175 " wsr %1, scompare1\n" 176 " s32c1i %0, %2, 0\n" 177 " sub %0, %0, %1\n" 178 "1:\n" 179 : "=&a" (result), "=&a" (tmp) 180 : "a" (&rw->lock) 181 : "memory"); 182 183 return result == 0; 184 } 185 186 static inline void arch_read_unlock(arch_rwlock_t *rw) 187 { 188 unsigned long tmp1, tmp2; 189 190 __asm__ __volatile__( 191 "1: l32i %1, %2, 0\n" 192 " addi %0, %1, -1\n" 193 " wsr %1, scompare1\n" 194 " s32c1i %0, %2, 0\n" 195 " bne %0, %1, 1b\n" 196 : "=&a" (tmp1), "=&a" (tmp2) 197 : "a" (&rw->lock) 198 : "memory"); 199 } 200 201 #define arch_read_lock_flags(lock, flags) arch_read_lock(lock) 202 #define arch_write_lock_flags(lock, flags) arch_write_lock(lock) 203 204 #endif /* _XTENSA_SPINLOCK_H */ 205