xref: /openbmc/linux/arch/xtensa/Kconfig (revision 4b0aaace)
1# SPDX-License-Identifier: GPL-2.0
2config ZONE_DMA
3	def_bool y
4
5config XTENSA
6	def_bool y
7	select ARCH_HAS_SG_CHAIN
8	select ARCH_HAS_SYNC_DMA_FOR_CPU
9	select ARCH_HAS_SYNC_DMA_FOR_DEVICE
10	select ARCH_NO_COHERENT_DMA_MMAP if !MMU
11	select ARCH_WANT_FRAME_POINTERS
12	select ARCH_WANT_IPC_PARSE_VERSION
13	select BUILDTIME_EXTABLE_SORT
14	select CLONE_BACKWARDS
15	select COMMON_CLK
16	select DMA_NONCOHERENT_OPS
17	select GENERIC_ATOMIC64
18	select GENERIC_CLOCKEVENTS
19	select GENERIC_IRQ_SHOW
20	select GENERIC_PCI_IOMAP
21	select GENERIC_SCHED_CLOCK
22	select GENERIC_STRNCPY_FROM_USER if KASAN
23	select HAVE_ARCH_KASAN if MMU
24	select HAVE_DEBUG_KMEMLEAK
25	select HAVE_DMA_CONTIGUOUS
26	select HAVE_EXIT_THREAD
27	select HAVE_FUNCTION_TRACER
28	select HAVE_FUTEX_CMPXCHG if !MMU
29	select HAVE_HW_BREAKPOINT if PERF_EVENTS
30	select HAVE_IRQ_TIME_ACCOUNTING
31	select HAVE_MEMBLOCK
32	select HAVE_OPROFILE
33	select HAVE_PERF_EVENTS
34	select HAVE_STACKPROTECTOR
35	select IRQ_DOMAIN
36	select MODULES_USE_ELF_RELA
37	select NO_BOOTMEM
38	select PERF_USE_VMALLOC
39	select VIRT_TO_BUS
40	help
41	  Xtensa processors are 32-bit RISC machines designed by Tensilica
42	  primarily for embedded systems.  These processors are both
43	  configurable and extensible.  The Linux port to the Xtensa
44	  architecture supports all processor configurations and extensions,
45	  with reasonable minimum requirements.  The Xtensa Linux project has
46	  a home page at <http://www.linux-xtensa.org/>.
47
48config RWSEM_XCHGADD_ALGORITHM
49	def_bool y
50
51config GENERIC_HWEIGHT
52	def_bool y
53
54config ARCH_HAS_ILOG2_U32
55	def_bool n
56
57config ARCH_HAS_ILOG2_U64
58	def_bool n
59
60config NO_IOPORT_MAP
61	def_bool n
62
63config HZ
64	int
65	default 100
66
67config LOCKDEP_SUPPORT
68	def_bool y
69
70config STACKTRACE_SUPPORT
71	def_bool y
72
73config TRACE_IRQFLAGS_SUPPORT
74	def_bool y
75
76config MMU
77	def_bool n
78
79config HAVE_XTENSA_GPIO32
80	def_bool n
81
82config KASAN_SHADOW_OFFSET
83	hex
84	default 0x6e400000
85
86menu "Processor type and features"
87
88choice
89	prompt "Xtensa Processor Configuration"
90	default XTENSA_VARIANT_FSF
91
92config XTENSA_VARIANT_FSF
93	bool "fsf - default (not generic) configuration"
94	select MMU
95
96config XTENSA_VARIANT_DC232B
97	bool "dc232b - Diamond 232L Standard Core Rev.B (LE)"
98	select MMU
99	select HAVE_XTENSA_GPIO32
100	help
101	  This variant refers to Tensilica's Diamond 232L Standard core Rev.B (LE).
102
103config XTENSA_VARIANT_DC233C
104	bool "dc233c - Diamond 233L Standard Core Rev.C (LE)"
105	select MMU
106	select HAVE_XTENSA_GPIO32
107	help
108	  This variant refers to Tensilica's Diamond 233L Standard core Rev.C (LE).
109
110config XTENSA_VARIANT_CUSTOM
111	bool "Custom Xtensa processor configuration"
112	select HAVE_XTENSA_GPIO32
113	help
114	  Select this variant to use a custom Xtensa processor configuration.
115	  You will be prompted for a processor variant CORENAME.
116endchoice
117
118config XTENSA_VARIANT_CUSTOM_NAME
119	string "Xtensa Processor Custom Core Variant Name"
120	depends on XTENSA_VARIANT_CUSTOM
121	help
122	  Provide the name of a custom Xtensa processor variant.
123	  This CORENAME selects arch/xtensa/variant/CORENAME.
124	  Dont forget you have to select MMU if you have one.
125
126config XTENSA_VARIANT_NAME
127	string
128	default "dc232b"			if XTENSA_VARIANT_DC232B
129	default "dc233c"			if XTENSA_VARIANT_DC233C
130	default "fsf"				if XTENSA_VARIANT_FSF
131	default XTENSA_VARIANT_CUSTOM_NAME	if XTENSA_VARIANT_CUSTOM
132
133config XTENSA_VARIANT_MMU
134	bool "Core variant has a Full MMU (TLB, Pages, Protection, etc)"
135	depends on XTENSA_VARIANT_CUSTOM
136	default y
137	select MMU
138	help
139	  Build a Conventional Kernel with full MMU support,
140	  ie: it supports a TLB with auto-loading, page protection.
141
142config XTENSA_VARIANT_HAVE_PERF_EVENTS
143	bool "Core variant has Performance Monitor Module"
144	depends on XTENSA_VARIANT_CUSTOM
145	default n
146	help
147	  Enable if core variant has Performance Monitor Module with
148	  External Registers Interface.
149
150	  If unsure, say N.
151
152config XTENSA_FAKE_NMI
153	bool "Treat PMM IRQ as NMI"
154	depends on XTENSA_VARIANT_HAVE_PERF_EVENTS
155	default n
156	help
157	  If PMM IRQ is the only IRQ at EXCM level it is safe to
158	  treat it as NMI, which improves accuracy of profiling.
159
160	  If there are other interrupts at or above PMM IRQ priority level
161	  but not above the EXCM level, PMM IRQ still may be treated as NMI,
162	  but only if these IRQs are not used. There will be a build warning
163	  saying that this is not safe, and a bugcheck if one of these IRQs
164	  actually fire.
165
166	  If unsure, say N.
167
168config XTENSA_UNALIGNED_USER
169	bool "Unaligned memory access in use space"
170	help
171	  The Xtensa architecture currently does not handle unaligned
172	  memory accesses in hardware but through an exception handler.
173	  Per default, unaligned memory accesses are disabled in user space.
174
175	  Say Y here to enable unaligned memory access in user space.
176
177config HAVE_SMP
178	bool "System Supports SMP (MX)"
179	depends on XTENSA_VARIANT_CUSTOM
180	select XTENSA_MX
181	help
182	  This option is use to indicate that the system-on-a-chip (SOC)
183	  supports Multiprocessing. Multiprocessor support implemented above
184	  the CPU core definition and currently needs to be selected manually.
185
186	  Multiprocessor support in implemented with external cache and
187	  interrupt controllers.
188
189	  The MX interrupt distributer adds Interprocessor Interrupts
190	  and causes the IRQ numbers to be increased by 4 for devices
191	  like the open cores ethernet driver and the serial interface.
192
193	  You still have to select "Enable SMP" to enable SMP on this SOC.
194
195config SMP
196	bool "Enable Symmetric multi-processing support"
197	depends on HAVE_SMP
198	select GENERIC_SMP_IDLE_THREAD
199	help
200	  Enabled SMP Software; allows more than one CPU/CORE
201	  to be activated during startup.
202
203config NR_CPUS
204	depends on SMP
205	int "Maximum number of CPUs (2-32)"
206	range 2 32
207	default "4"
208
209config HOTPLUG_CPU
210	bool "Enable CPU hotplug support"
211	depends on SMP
212	help
213	  Say Y here to allow turning CPUs off and on. CPUs can be
214	  controlled through /sys/devices/system/cpu.
215
216	  Say N if you want to disable CPU hotplug.
217
218config INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
219	bool "Initialize Xtensa MMU inside the Linux kernel code"
220	depends on !XTENSA_VARIANT_FSF && !XTENSA_VARIANT_DC232B
221	default y if XTENSA_VARIANT_DC233C || XTENSA_VARIANT_CUSTOM
222	help
223	  Earlier version initialized the MMU in the exception vector
224	  before jumping to _startup in head.S and had an advantage that
225	  it was possible to place a software breakpoint at 'reset' and
226	  then enter your normal kernel breakpoints once the MMU was mapped
227	  to the kernel mappings (0XC0000000).
228
229	  This unfortunately won't work for U-Boot and likely also wont
230	  work for using KEXEC to have a hot kernel ready for doing a
231	  KDUMP.
232
233	  So now the MMU is initialized in head.S but it's necessary to
234	  use hardware breakpoints (gdb 'hbreak' cmd) to break at _startup.
235	  xt-gdb can't place a Software Breakpoint in the  0XD region prior
236	  to mapping the MMU and after mapping even if the area of low memory
237	  was mapped gdb wouldn't remove the breakpoint on hitting it as the
238	  PC wouldn't match. Since Hardware Breakpoints are recommended for
239	  Linux configurations it seems reasonable to just assume they exist
240	  and leave this older mechanism for unfortunate souls that choose
241	  not to follow Tensilica's recommendation.
242
243	  Selecting this will cause U-Boot to set the KERNEL Load and Entry
244	  address at 0x00003000 instead of the mapped std of 0xD0003000.
245
246	  If in doubt, say Y.
247
248config MEMMAP_CACHEATTR
249	hex "Cache attributes for the memory address space"
250	depends on !MMU
251	default 0x22222222
252	help
253	  These cache attributes are set up for noMMU systems. Each hex digit
254	  specifies cache attributes for the corresponding 512MB memory
255	  region: bits 0..3 -- for addresses 0x00000000..0x1fffffff,
256	  bits 4..7 -- for addresses 0x20000000..0x3fffffff, and so on.
257
258	  Cache attribute values are specific for the MMU type, so e.g.
259	  for region protection MMUs: 2 is cache bypass, 4 is WB cached,
260	  1 is WT cached, f is illegal. For ful MMU: bit 0 makes it executable,
261	  bit 1 makes it writable, bits 2..3 meaning is 0: cache bypass,
262	  1: WB cache, 2: WT cache, 3: special (c and e are illegal, f is
263	  reserved).
264
265config KSEG_PADDR
266	hex "Physical address of the KSEG mapping"
267	depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX && MMU
268	default 0x00000000
269	help
270	  This is the physical address where KSEG is mapped. Please refer to
271	  the chosen KSEG layout help for the required address alignment.
272	  Unpacked kernel image (including vectors) must be located completely
273	  within KSEG.
274	  Physical memory below this address is not available to linux.
275
276	  If unsure, leave the default value here.
277
278config KERNEL_LOAD_ADDRESS
279	hex "Kernel load address"
280	default 0x60003000 if !MMU
281	default 0x00003000 if MMU && INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
282	default 0xd0003000 if MMU && !INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
283	help
284	  This is the address where the kernel is loaded.
285	  It is virtual address for MMUv2 configurations and physical address
286	  for all other configurations.
287
288	  If unsure, leave the default value here.
289
290config VECTORS_OFFSET
291	hex "Kernel vectors offset"
292	default 0x00003000
293	help
294	  This is the offset of the kernel image from the relocatable vectors
295	  base.
296
297	  If unsure, leave the default value here.
298
299choice
300	prompt "KSEG layout"
301	depends on MMU
302	default XTENSA_KSEG_MMU_V2
303
304config XTENSA_KSEG_MMU_V2
305	bool "MMUv2: 128MB cached + 128MB uncached"
306	help
307	  MMUv2 compatible kernel memory map: TLB way 5 maps 128MB starting
308	  at KSEG_PADDR to 0xd0000000 with cache and to 0xd8000000
309	  without cache.
310	  KSEG_PADDR must be aligned to 128MB.
311
312config XTENSA_KSEG_256M
313	bool "256MB cached + 256MB uncached"
314	depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
315	help
316	  TLB way 6 maps 256MB starting at KSEG_PADDR to 0xb0000000
317	  with cache and to 0xc0000000 without cache.
318	  KSEG_PADDR must be aligned to 256MB.
319
320config XTENSA_KSEG_512M
321	bool "512MB cached + 512MB uncached"
322	depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
323	help
324	  TLB way 6 maps 512MB starting at KSEG_PADDR to 0xa0000000
325	  with cache and to 0xc0000000 without cache.
326	  KSEG_PADDR must be aligned to 256MB.
327
328endchoice
329
330config HIGHMEM
331	bool "High Memory Support"
332	depends on MMU
333	help
334	  Linux can use the full amount of RAM in the system by
335	  default. However, the default MMUv2 setup only maps the
336	  lowermost 128 MB of memory linearly to the areas starting
337	  at 0xd0000000 (cached) and 0xd8000000 (uncached).
338	  When there are more than 128 MB memory in the system not
339	  all of it can be "permanently mapped" by the kernel.
340	  The physical memory that's not permanently mapped is called
341	  "high memory".
342
343	  If you are compiling a kernel which will never run on a
344	  machine with more than 128 MB total physical RAM, answer
345	  N here.
346
347	  If unsure, say Y.
348
349config FAST_SYSCALL_XTENSA
350	bool "Enable fast atomic syscalls"
351	default n
352	help
353	  fast_syscall_xtensa is a syscall that can make atomic operations
354	  on UP kernel when processor has no s32c1i support.
355
356	  This syscall is deprecated. It may have issues when called with
357	  invalid arguments. It is provided only for backwards compatibility.
358	  Only enable it if your userspace software requires it.
359
360	  If unsure, say N.
361
362config FAST_SYSCALL_SPILL_REGISTERS
363	bool "Enable spill registers syscall"
364	default n
365	help
366	  fast_syscall_spill_registers is a syscall that spills all active
367	  register windows of a calling userspace task onto its stack.
368
369	  This syscall is deprecated. It may have issues when called with
370	  invalid arguments. It is provided only for backwards compatibility.
371	  Only enable it if your userspace software requires it.
372
373	  If unsure, say N.
374
375endmenu
376
377config XTENSA_CALIBRATE_CCOUNT
378	def_bool n
379	help
380	  On some platforms (XT2000, for example), the CPU clock rate can
381	  vary.  The frequency can be determined, however, by measuring
382	  against a well known, fixed frequency, such as an UART oscillator.
383
384config SERIAL_CONSOLE
385	def_bool n
386
387menu "Bus options"
388
389config PCI
390	bool "PCI support"
391	default y
392	help
393	  Find out whether you have a PCI motherboard. PCI is the name of a
394	  bus system, i.e. the way the CPU talks to the other stuff inside
395	  your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
396	  VESA. If you have PCI, say Y, otherwise N.
397
398source "drivers/pci/Kconfig"
399
400endmenu
401
402menu "Platform options"
403
404choice
405	prompt "Xtensa System Type"
406	default XTENSA_PLATFORM_ISS
407
408config XTENSA_PLATFORM_ISS
409	bool "ISS"
410	select XTENSA_CALIBRATE_CCOUNT
411	select SERIAL_CONSOLE
412	help
413	  ISS is an acronym for Tensilica's Instruction Set Simulator.
414
415config XTENSA_PLATFORM_XT2000
416	bool "XT2000"
417	select HAVE_IDE
418	help
419	  XT2000 is the name of Tensilica's feature-rich emulation platform.
420	  This hardware is capable of running a full Linux distribution.
421
422config XTENSA_PLATFORM_XTFPGA
423	bool "XTFPGA"
424	select ETHOC if ETHERNET
425	select PLATFORM_WANT_DEFAULT_MEM if !MMU
426	select SERIAL_CONSOLE
427	select XTENSA_CALIBRATE_CCOUNT
428	help
429	  XTFPGA is the name of Tensilica board family (LX60, LX110, LX200, ML605).
430	  This hardware is capable of running a full Linux distribution.
431
432endchoice
433
434config PLATFORM_NR_IRQS
435	int
436	default 3 if XTENSA_PLATFORM_XT2000
437	default 0
438
439config XTENSA_CPU_CLOCK
440	int "CPU clock rate [MHz]"
441	depends on !XTENSA_CALIBRATE_CCOUNT
442	default 16
443
444config GENERIC_CALIBRATE_DELAY
445	bool "Auto calibration of the BogoMIPS value"
446	help
447	  The BogoMIPS value can easily be derived from the CPU frequency.
448
449config CMDLINE_BOOL
450	bool "Default bootloader kernel arguments"
451
452config CMDLINE
453	string "Initial kernel command string"
454	depends on CMDLINE_BOOL
455	default "console=ttyS0,38400 root=/dev/ram"
456	help
457	  On some architectures (EBSA110 and CATS), there is currently no way
458	  for the boot loader to pass arguments to the kernel. For these
459	  architectures, you should supply some command-line options at build
460	  time by entering them here. As a minimum, you should specify the
461	  memory size and the root device (e.g., mem=64M root=/dev/nfs).
462
463config USE_OF
464	bool "Flattened Device Tree support"
465	select OF
466	select OF_EARLY_FLATTREE
467	select OF_RESERVED_MEM
468	help
469	  Include support for flattened device tree machine descriptions.
470
471config BUILTIN_DTB
472	string "DTB to build into the kernel image"
473	depends on OF
474
475config PARSE_BOOTPARAM
476	bool "Parse bootparam block"
477	default y
478	help
479	  Parse parameters passed to the kernel from the bootloader. It may
480	  be disabled if the kernel is known to run without the bootloader.
481
482	  If unsure, say Y.
483
484config BLK_DEV_SIMDISK
485	tristate "Host file-based simulated block device support"
486	default n
487	depends on XTENSA_PLATFORM_ISS && BLOCK
488	help
489	  Create block devices that map to files in the host file system.
490	  Device binding to host file may be changed at runtime via proc
491	  interface provided the device is not in use.
492
493config BLK_DEV_SIMDISK_COUNT
494	int "Number of host file-based simulated block devices"
495	range 1 10
496	depends on BLK_DEV_SIMDISK
497	default 2
498	help
499	  This is the default minimal number of created block devices.
500	  Kernel/module parameter 'simdisk_count' may be used to change this
501	  value at runtime. More file names (but no more than 10) may be
502	  specified as parameters, simdisk_count grows accordingly.
503
504config SIMDISK0_FILENAME
505	string "Host filename for the first simulated device"
506	depends on BLK_DEV_SIMDISK = y
507	default ""
508	help
509	  Attach a first simdisk to a host file. Conventionally, this file
510	  contains a root file system.
511
512config SIMDISK1_FILENAME
513	string "Host filename for the second simulated device"
514	depends on BLK_DEV_SIMDISK = y && BLK_DEV_SIMDISK_COUNT != 1
515	default ""
516	help
517	  Another simulated disk in a host file for a buildroot-independent
518	  storage.
519
520config FORCE_MAX_ZONEORDER
521	int "Maximum zone order"
522	default "11"
523	help
524	  The kernel memory allocator divides physically contiguous memory
525	  blocks into "zones", where each zone is a power of two number of
526	  pages.  This option selects the largest power of two that the kernel
527	  keeps in the memory allocator.  If you need to allocate very large
528	  blocks of physically contiguous memory, then you may need to
529	  increase this value.
530
531	  This config option is actually maximum order plus one. For example,
532	  a value of 11 means that the largest free memory block is 2^10 pages.
533
534source "drivers/pcmcia/Kconfig"
535
536config PLATFORM_WANT_DEFAULT_MEM
537	def_bool n
538
539config DEFAULT_MEM_START
540	hex
541	prompt "PAGE_OFFSET/PHYS_OFFSET" if !MMU && PLATFORM_WANT_DEFAULT_MEM
542	default 0x60000000 if PLATFORM_WANT_DEFAULT_MEM
543	default 0x00000000
544	help
545	  This is the base address used for both PAGE_OFFSET and PHYS_OFFSET
546	  in noMMU configurations.
547
548	  If unsure, leave the default value here.
549
550config XTFPGA_LCD
551	bool "Enable XTFPGA LCD driver"
552	depends on XTENSA_PLATFORM_XTFPGA
553	default n
554	help
555	  There's a 2x16 LCD on most of XTFPGA boards, kernel may output
556	  progress messages there during bootup/shutdown. It may be useful
557	  during board bringup.
558
559	  If unsure, say N.
560
561config XTFPGA_LCD_BASE_ADDR
562	hex "XTFPGA LCD base address"
563	depends on XTFPGA_LCD
564	default "0x0d0c0000"
565	help
566	  Base address of the LCD controller inside KIO region.
567	  Different boards from XTFPGA family have LCD controller at different
568	  addresses. Please consult prototyping user guide for your board for
569	  the correct address. Wrong address here may lead to hardware lockup.
570
571config XTFPGA_LCD_8BIT_ACCESS
572	bool "Use 8-bit access to XTFPGA LCD"
573	depends on XTFPGA_LCD
574	default n
575	help
576	  LCD may be connected with 4- or 8-bit interface, 8-bit access may
577	  only be used with 8-bit interface. Please consult prototyping user
578	  guide for your board for the correct interface width.
579
580endmenu
581
582menu "Power management options"
583
584source "kernel/power/Kconfig"
585
586endmenu
587