1 /* 2 * Xen mmu operations 3 * 4 * This file contains the various mmu fetch and update operations. 5 * The most important job they must perform is the mapping between the 6 * domain's pfn and the overall machine mfns. 7 * 8 * Xen allows guests to directly update the pagetable, in a controlled 9 * fashion. In other words, the guest modifies the same pagetable 10 * that the CPU actually uses, which eliminates the overhead of having 11 * a separate shadow pagetable. 12 * 13 * In order to allow this, it falls on the guest domain to map its 14 * notion of a "physical" pfn - which is just a domain-local linear 15 * address - into a real "machine address" which the CPU's MMU can 16 * use. 17 * 18 * A pgd_t/pmd_t/pte_t will typically contain an mfn, and so can be 19 * inserted directly into the pagetable. When creating a new 20 * pte/pmd/pgd, it converts the passed pfn into an mfn. Conversely, 21 * when reading the content back with __(pgd|pmd|pte)_val, it converts 22 * the mfn back into a pfn. 23 * 24 * The other constraint is that all pages which make up a pagetable 25 * must be mapped read-only in the guest. This prevents uncontrolled 26 * guest updates to the pagetable. Xen strictly enforces this, and 27 * will disallow any pagetable update which will end up mapping a 28 * pagetable page RW, and will disallow using any writable page as a 29 * pagetable. 30 * 31 * Naively, when loading %cr3 with the base of a new pagetable, Xen 32 * would need to validate the whole pagetable before going on. 33 * Naturally, this is quite slow. The solution is to "pin" a 34 * pagetable, which enforces all the constraints on the pagetable even 35 * when it is not actively in use. This menas that Xen can be assured 36 * that it is still valid when you do load it into %cr3, and doesn't 37 * need to revalidate it. 38 * 39 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007 40 */ 41 #include <linux/sched/mm.h> 42 #include <linux/highmem.h> 43 #include <linux/debugfs.h> 44 #include <linux/bug.h> 45 #include <linux/vmalloc.h> 46 #include <linux/export.h> 47 #include <linux/init.h> 48 #include <linux/gfp.h> 49 #include <linux/memblock.h> 50 #include <linux/seq_file.h> 51 #include <linux/crash_dump.h> 52 #ifdef CONFIG_KEXEC_CORE 53 #include <linux/kexec.h> 54 #endif 55 56 #include <trace/events/xen.h> 57 58 #include <asm/pgtable.h> 59 #include <asm/tlbflush.h> 60 #include <asm/fixmap.h> 61 #include <asm/mmu_context.h> 62 #include <asm/setup.h> 63 #include <asm/paravirt.h> 64 #include <asm/e820/api.h> 65 #include <asm/linkage.h> 66 #include <asm/page.h> 67 #include <asm/init.h> 68 #include <asm/pat.h> 69 #include <asm/smp.h> 70 71 #include <asm/xen/hypercall.h> 72 #include <asm/xen/hypervisor.h> 73 74 #include <xen/xen.h> 75 #include <xen/page.h> 76 #include <xen/interface/xen.h> 77 #include <xen/interface/hvm/hvm_op.h> 78 #include <xen/interface/version.h> 79 #include <xen/interface/memory.h> 80 #include <xen/hvc-console.h> 81 82 #include "multicalls.h" 83 #include "mmu.h" 84 #include "debugfs.h" 85 86 #ifdef CONFIG_X86_32 87 /* 88 * Identity map, in addition to plain kernel map. This needs to be 89 * large enough to allocate page table pages to allocate the rest. 90 * Each page can map 2MB. 91 */ 92 #define LEVEL1_IDENT_ENTRIES (PTRS_PER_PTE * 4) 93 static RESERVE_BRK_ARRAY(pte_t, level1_ident_pgt, LEVEL1_IDENT_ENTRIES); 94 #endif 95 #ifdef CONFIG_X86_64 96 /* l3 pud for userspace vsyscall mapping */ 97 static pud_t level3_user_vsyscall[PTRS_PER_PUD] __page_aligned_bss; 98 #endif /* CONFIG_X86_64 */ 99 100 /* 101 * Note about cr3 (pagetable base) values: 102 * 103 * xen_cr3 contains the current logical cr3 value; it contains the 104 * last set cr3. This may not be the current effective cr3, because 105 * its update may be being lazily deferred. However, a vcpu looking 106 * at its own cr3 can use this value knowing that it everything will 107 * be self-consistent. 108 * 109 * xen_current_cr3 contains the actual vcpu cr3; it is set once the 110 * hypercall to set the vcpu cr3 is complete (so it may be a little 111 * out of date, but it will never be set early). If one vcpu is 112 * looking at another vcpu's cr3 value, it should use this variable. 113 */ 114 DEFINE_PER_CPU(unsigned long, xen_cr3); /* cr3 stored as physaddr */ 115 DEFINE_PER_CPU(unsigned long, xen_current_cr3); /* actual vcpu cr3 */ 116 117 static phys_addr_t xen_pt_base, xen_pt_size __initdata; 118 119 static DEFINE_STATIC_KEY_FALSE(xen_struct_pages_ready); 120 121 /* 122 * Just beyond the highest usermode address. STACK_TOP_MAX has a 123 * redzone above it, so round it up to a PGD boundary. 124 */ 125 #define USER_LIMIT ((STACK_TOP_MAX + PGDIR_SIZE - 1) & PGDIR_MASK) 126 127 void make_lowmem_page_readonly(void *vaddr) 128 { 129 pte_t *pte, ptev; 130 unsigned long address = (unsigned long)vaddr; 131 unsigned int level; 132 133 pte = lookup_address(address, &level); 134 if (pte == NULL) 135 return; /* vaddr missing */ 136 137 ptev = pte_wrprotect(*pte); 138 139 if (HYPERVISOR_update_va_mapping(address, ptev, 0)) 140 BUG(); 141 } 142 143 void make_lowmem_page_readwrite(void *vaddr) 144 { 145 pte_t *pte, ptev; 146 unsigned long address = (unsigned long)vaddr; 147 unsigned int level; 148 149 pte = lookup_address(address, &level); 150 if (pte == NULL) 151 return; /* vaddr missing */ 152 153 ptev = pte_mkwrite(*pte); 154 155 if (HYPERVISOR_update_va_mapping(address, ptev, 0)) 156 BUG(); 157 } 158 159 160 /* 161 * During early boot all page table pages are pinned, but we do not have struct 162 * pages, so return true until struct pages are ready. 163 */ 164 static bool xen_page_pinned(void *ptr) 165 { 166 if (static_branch_likely(&xen_struct_pages_ready)) { 167 struct page *page = virt_to_page(ptr); 168 169 return PagePinned(page); 170 } 171 return true; 172 } 173 174 static void xen_extend_mmu_update(const struct mmu_update *update) 175 { 176 struct multicall_space mcs; 177 struct mmu_update *u; 178 179 mcs = xen_mc_extend_args(__HYPERVISOR_mmu_update, sizeof(*u)); 180 181 if (mcs.mc != NULL) { 182 mcs.mc->args[1]++; 183 } else { 184 mcs = __xen_mc_entry(sizeof(*u)); 185 MULTI_mmu_update(mcs.mc, mcs.args, 1, NULL, DOMID_SELF); 186 } 187 188 u = mcs.args; 189 *u = *update; 190 } 191 192 static void xen_extend_mmuext_op(const struct mmuext_op *op) 193 { 194 struct multicall_space mcs; 195 struct mmuext_op *u; 196 197 mcs = xen_mc_extend_args(__HYPERVISOR_mmuext_op, sizeof(*u)); 198 199 if (mcs.mc != NULL) { 200 mcs.mc->args[1]++; 201 } else { 202 mcs = __xen_mc_entry(sizeof(*u)); 203 MULTI_mmuext_op(mcs.mc, mcs.args, 1, NULL, DOMID_SELF); 204 } 205 206 u = mcs.args; 207 *u = *op; 208 } 209 210 static void xen_set_pmd_hyper(pmd_t *ptr, pmd_t val) 211 { 212 struct mmu_update u; 213 214 preempt_disable(); 215 216 xen_mc_batch(); 217 218 /* ptr may be ioremapped for 64-bit pagetable setup */ 219 u.ptr = arbitrary_virt_to_machine(ptr).maddr; 220 u.val = pmd_val_ma(val); 221 xen_extend_mmu_update(&u); 222 223 xen_mc_issue(PARAVIRT_LAZY_MMU); 224 225 preempt_enable(); 226 } 227 228 static void xen_set_pmd(pmd_t *ptr, pmd_t val) 229 { 230 trace_xen_mmu_set_pmd(ptr, val); 231 232 /* If page is not pinned, we can just update the entry 233 directly */ 234 if (!xen_page_pinned(ptr)) { 235 *ptr = val; 236 return; 237 } 238 239 xen_set_pmd_hyper(ptr, val); 240 } 241 242 /* 243 * Associate a virtual page frame with a given physical page frame 244 * and protection flags for that frame. 245 */ 246 void set_pte_mfn(unsigned long vaddr, unsigned long mfn, pgprot_t flags) 247 { 248 set_pte_vaddr(vaddr, mfn_pte(mfn, flags)); 249 } 250 251 static bool xen_batched_set_pte(pte_t *ptep, pte_t pteval) 252 { 253 struct mmu_update u; 254 255 if (paravirt_get_lazy_mode() != PARAVIRT_LAZY_MMU) 256 return false; 257 258 xen_mc_batch(); 259 260 u.ptr = virt_to_machine(ptep).maddr | MMU_NORMAL_PT_UPDATE; 261 u.val = pte_val_ma(pteval); 262 xen_extend_mmu_update(&u); 263 264 xen_mc_issue(PARAVIRT_LAZY_MMU); 265 266 return true; 267 } 268 269 static inline void __xen_set_pte(pte_t *ptep, pte_t pteval) 270 { 271 if (!xen_batched_set_pte(ptep, pteval)) { 272 /* 273 * Could call native_set_pte() here and trap and 274 * emulate the PTE write but with 32-bit guests this 275 * needs two traps (one for each of the two 32-bit 276 * words in the PTE) so do one hypercall directly 277 * instead. 278 */ 279 struct mmu_update u; 280 281 u.ptr = virt_to_machine(ptep).maddr | MMU_NORMAL_PT_UPDATE; 282 u.val = pte_val_ma(pteval); 283 HYPERVISOR_mmu_update(&u, 1, NULL, DOMID_SELF); 284 } 285 } 286 287 static void xen_set_pte(pte_t *ptep, pte_t pteval) 288 { 289 trace_xen_mmu_set_pte(ptep, pteval); 290 __xen_set_pte(ptep, pteval); 291 } 292 293 static void xen_set_pte_at(struct mm_struct *mm, unsigned long addr, 294 pte_t *ptep, pte_t pteval) 295 { 296 trace_xen_mmu_set_pte_at(mm, addr, ptep, pteval); 297 __xen_set_pte(ptep, pteval); 298 } 299 300 pte_t xen_ptep_modify_prot_start(struct mm_struct *mm, 301 unsigned long addr, pte_t *ptep) 302 { 303 /* Just return the pte as-is. We preserve the bits on commit */ 304 trace_xen_mmu_ptep_modify_prot_start(mm, addr, ptep, *ptep); 305 return *ptep; 306 } 307 308 void xen_ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr, 309 pte_t *ptep, pte_t pte) 310 { 311 struct mmu_update u; 312 313 trace_xen_mmu_ptep_modify_prot_commit(mm, addr, ptep, pte); 314 xen_mc_batch(); 315 316 u.ptr = virt_to_machine(ptep).maddr | MMU_PT_UPDATE_PRESERVE_AD; 317 u.val = pte_val_ma(pte); 318 xen_extend_mmu_update(&u); 319 320 xen_mc_issue(PARAVIRT_LAZY_MMU); 321 } 322 323 /* Assume pteval_t is equivalent to all the other *val_t types. */ 324 static pteval_t pte_mfn_to_pfn(pteval_t val) 325 { 326 if (val & _PAGE_PRESENT) { 327 unsigned long mfn = (val & XEN_PTE_MFN_MASK) >> PAGE_SHIFT; 328 unsigned long pfn = mfn_to_pfn(mfn); 329 330 pteval_t flags = val & PTE_FLAGS_MASK; 331 if (unlikely(pfn == ~0)) 332 val = flags & ~_PAGE_PRESENT; 333 else 334 val = ((pteval_t)pfn << PAGE_SHIFT) | flags; 335 } 336 337 return val; 338 } 339 340 static pteval_t pte_pfn_to_mfn(pteval_t val) 341 { 342 if (val & _PAGE_PRESENT) { 343 unsigned long pfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT; 344 pteval_t flags = val & PTE_FLAGS_MASK; 345 unsigned long mfn; 346 347 mfn = __pfn_to_mfn(pfn); 348 349 /* 350 * If there's no mfn for the pfn, then just create an 351 * empty non-present pte. Unfortunately this loses 352 * information about the original pfn, so 353 * pte_mfn_to_pfn is asymmetric. 354 */ 355 if (unlikely(mfn == INVALID_P2M_ENTRY)) { 356 mfn = 0; 357 flags = 0; 358 } else 359 mfn &= ~(FOREIGN_FRAME_BIT | IDENTITY_FRAME_BIT); 360 val = ((pteval_t)mfn << PAGE_SHIFT) | flags; 361 } 362 363 return val; 364 } 365 366 __visible pteval_t xen_pte_val(pte_t pte) 367 { 368 pteval_t pteval = pte.pte; 369 370 return pte_mfn_to_pfn(pteval); 371 } 372 PV_CALLEE_SAVE_REGS_THUNK(xen_pte_val); 373 374 __visible pgdval_t xen_pgd_val(pgd_t pgd) 375 { 376 return pte_mfn_to_pfn(pgd.pgd); 377 } 378 PV_CALLEE_SAVE_REGS_THUNK(xen_pgd_val); 379 380 __visible pte_t xen_make_pte(pteval_t pte) 381 { 382 pte = pte_pfn_to_mfn(pte); 383 384 return native_make_pte(pte); 385 } 386 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte); 387 388 __visible pgd_t xen_make_pgd(pgdval_t pgd) 389 { 390 pgd = pte_pfn_to_mfn(pgd); 391 return native_make_pgd(pgd); 392 } 393 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pgd); 394 395 __visible pmdval_t xen_pmd_val(pmd_t pmd) 396 { 397 return pte_mfn_to_pfn(pmd.pmd); 398 } 399 PV_CALLEE_SAVE_REGS_THUNK(xen_pmd_val); 400 401 static void xen_set_pud_hyper(pud_t *ptr, pud_t val) 402 { 403 struct mmu_update u; 404 405 preempt_disable(); 406 407 xen_mc_batch(); 408 409 /* ptr may be ioremapped for 64-bit pagetable setup */ 410 u.ptr = arbitrary_virt_to_machine(ptr).maddr; 411 u.val = pud_val_ma(val); 412 xen_extend_mmu_update(&u); 413 414 xen_mc_issue(PARAVIRT_LAZY_MMU); 415 416 preempt_enable(); 417 } 418 419 static void xen_set_pud(pud_t *ptr, pud_t val) 420 { 421 trace_xen_mmu_set_pud(ptr, val); 422 423 /* If page is not pinned, we can just update the entry 424 directly */ 425 if (!xen_page_pinned(ptr)) { 426 *ptr = val; 427 return; 428 } 429 430 xen_set_pud_hyper(ptr, val); 431 } 432 433 #ifdef CONFIG_X86_PAE 434 static void xen_set_pte_atomic(pte_t *ptep, pte_t pte) 435 { 436 trace_xen_mmu_set_pte_atomic(ptep, pte); 437 set_64bit((u64 *)ptep, native_pte_val(pte)); 438 } 439 440 static void xen_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) 441 { 442 trace_xen_mmu_pte_clear(mm, addr, ptep); 443 if (!xen_batched_set_pte(ptep, native_make_pte(0))) 444 native_pte_clear(mm, addr, ptep); 445 } 446 447 static void xen_pmd_clear(pmd_t *pmdp) 448 { 449 trace_xen_mmu_pmd_clear(pmdp); 450 set_pmd(pmdp, __pmd(0)); 451 } 452 #endif /* CONFIG_X86_PAE */ 453 454 __visible pmd_t xen_make_pmd(pmdval_t pmd) 455 { 456 pmd = pte_pfn_to_mfn(pmd); 457 return native_make_pmd(pmd); 458 } 459 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pmd); 460 461 #ifdef CONFIG_X86_64 462 __visible pudval_t xen_pud_val(pud_t pud) 463 { 464 return pte_mfn_to_pfn(pud.pud); 465 } 466 PV_CALLEE_SAVE_REGS_THUNK(xen_pud_val); 467 468 __visible pud_t xen_make_pud(pudval_t pud) 469 { 470 pud = pte_pfn_to_mfn(pud); 471 472 return native_make_pud(pud); 473 } 474 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pud); 475 476 static pgd_t *xen_get_user_pgd(pgd_t *pgd) 477 { 478 pgd_t *pgd_page = (pgd_t *)(((unsigned long)pgd) & PAGE_MASK); 479 unsigned offset = pgd - pgd_page; 480 pgd_t *user_ptr = NULL; 481 482 if (offset < pgd_index(USER_LIMIT)) { 483 struct page *page = virt_to_page(pgd_page); 484 user_ptr = (pgd_t *)page->private; 485 if (user_ptr) 486 user_ptr += offset; 487 } 488 489 return user_ptr; 490 } 491 492 static void __xen_set_p4d_hyper(p4d_t *ptr, p4d_t val) 493 { 494 struct mmu_update u; 495 496 u.ptr = virt_to_machine(ptr).maddr; 497 u.val = p4d_val_ma(val); 498 xen_extend_mmu_update(&u); 499 } 500 501 /* 502 * Raw hypercall-based set_p4d, intended for in early boot before 503 * there's a page structure. This implies: 504 * 1. The only existing pagetable is the kernel's 505 * 2. It is always pinned 506 * 3. It has no user pagetable attached to it 507 */ 508 static void __init xen_set_p4d_hyper(p4d_t *ptr, p4d_t val) 509 { 510 preempt_disable(); 511 512 xen_mc_batch(); 513 514 __xen_set_p4d_hyper(ptr, val); 515 516 xen_mc_issue(PARAVIRT_LAZY_MMU); 517 518 preempt_enable(); 519 } 520 521 static void xen_set_p4d(p4d_t *ptr, p4d_t val) 522 { 523 pgd_t *user_ptr = xen_get_user_pgd((pgd_t *)ptr); 524 pgd_t pgd_val; 525 526 trace_xen_mmu_set_p4d(ptr, (p4d_t *)user_ptr, val); 527 528 /* If page is not pinned, we can just update the entry 529 directly */ 530 if (!xen_page_pinned(ptr)) { 531 *ptr = val; 532 if (user_ptr) { 533 WARN_ON(xen_page_pinned(user_ptr)); 534 pgd_val.pgd = p4d_val_ma(val); 535 *user_ptr = pgd_val; 536 } 537 return; 538 } 539 540 /* If it's pinned, then we can at least batch the kernel and 541 user updates together. */ 542 xen_mc_batch(); 543 544 __xen_set_p4d_hyper(ptr, val); 545 if (user_ptr) 546 __xen_set_p4d_hyper((p4d_t *)user_ptr, val); 547 548 xen_mc_issue(PARAVIRT_LAZY_MMU); 549 } 550 551 #if CONFIG_PGTABLE_LEVELS >= 5 552 __visible p4dval_t xen_p4d_val(p4d_t p4d) 553 { 554 return pte_mfn_to_pfn(p4d.p4d); 555 } 556 PV_CALLEE_SAVE_REGS_THUNK(xen_p4d_val); 557 558 __visible p4d_t xen_make_p4d(p4dval_t p4d) 559 { 560 p4d = pte_pfn_to_mfn(p4d); 561 562 return native_make_p4d(p4d); 563 } 564 PV_CALLEE_SAVE_REGS_THUNK(xen_make_p4d); 565 #endif /* CONFIG_PGTABLE_LEVELS >= 5 */ 566 #endif /* CONFIG_X86_64 */ 567 568 static int xen_pmd_walk(struct mm_struct *mm, pmd_t *pmd, 569 int (*func)(struct mm_struct *mm, struct page *, enum pt_level), 570 bool last, unsigned long limit) 571 { 572 int i, nr, flush = 0; 573 574 nr = last ? pmd_index(limit) + 1 : PTRS_PER_PMD; 575 for (i = 0; i < nr; i++) { 576 if (!pmd_none(pmd[i])) 577 flush |= (*func)(mm, pmd_page(pmd[i]), PT_PTE); 578 } 579 return flush; 580 } 581 582 static int xen_pud_walk(struct mm_struct *mm, pud_t *pud, 583 int (*func)(struct mm_struct *mm, struct page *, enum pt_level), 584 bool last, unsigned long limit) 585 { 586 int i, nr, flush = 0; 587 588 nr = last ? pud_index(limit) + 1 : PTRS_PER_PUD; 589 for (i = 0; i < nr; i++) { 590 pmd_t *pmd; 591 592 if (pud_none(pud[i])) 593 continue; 594 595 pmd = pmd_offset(&pud[i], 0); 596 if (PTRS_PER_PMD > 1) 597 flush |= (*func)(mm, virt_to_page(pmd), PT_PMD); 598 flush |= xen_pmd_walk(mm, pmd, func, 599 last && i == nr - 1, limit); 600 } 601 return flush; 602 } 603 604 static int xen_p4d_walk(struct mm_struct *mm, p4d_t *p4d, 605 int (*func)(struct mm_struct *mm, struct page *, enum pt_level), 606 bool last, unsigned long limit) 607 { 608 int flush = 0; 609 pud_t *pud; 610 611 612 if (p4d_none(*p4d)) 613 return flush; 614 615 pud = pud_offset(p4d, 0); 616 if (PTRS_PER_PUD > 1) 617 flush |= (*func)(mm, virt_to_page(pud), PT_PUD); 618 flush |= xen_pud_walk(mm, pud, func, last, limit); 619 return flush; 620 } 621 622 /* 623 * (Yet another) pagetable walker. This one is intended for pinning a 624 * pagetable. This means that it walks a pagetable and calls the 625 * callback function on each page it finds making up the page table, 626 * at every level. It walks the entire pagetable, but it only bothers 627 * pinning pte pages which are below limit. In the normal case this 628 * will be STACK_TOP_MAX, but at boot we need to pin up to 629 * FIXADDR_TOP. 630 * 631 * For 32-bit the important bit is that we don't pin beyond there, 632 * because then we start getting into Xen's ptes. 633 * 634 * For 64-bit, we must skip the Xen hole in the middle of the address 635 * space, just after the big x86-64 virtual hole. 636 */ 637 static int __xen_pgd_walk(struct mm_struct *mm, pgd_t *pgd, 638 int (*func)(struct mm_struct *mm, struct page *, 639 enum pt_level), 640 unsigned long limit) 641 { 642 int i, nr, flush = 0; 643 unsigned hole_low, hole_high; 644 645 /* The limit is the last byte to be touched */ 646 limit--; 647 BUG_ON(limit >= FIXADDR_TOP); 648 649 /* 650 * 64-bit has a great big hole in the middle of the address 651 * space, which contains the Xen mappings. On 32-bit these 652 * will end up making a zero-sized hole and so is a no-op. 653 */ 654 hole_low = pgd_index(USER_LIMIT); 655 hole_high = pgd_index(PAGE_OFFSET); 656 657 nr = pgd_index(limit) + 1; 658 for (i = 0; i < nr; i++) { 659 p4d_t *p4d; 660 661 if (i >= hole_low && i < hole_high) 662 continue; 663 664 if (pgd_none(pgd[i])) 665 continue; 666 667 p4d = p4d_offset(&pgd[i], 0); 668 flush |= xen_p4d_walk(mm, p4d, func, i == nr - 1, limit); 669 } 670 671 /* Do the top level last, so that the callbacks can use it as 672 a cue to do final things like tlb flushes. */ 673 flush |= (*func)(mm, virt_to_page(pgd), PT_PGD); 674 675 return flush; 676 } 677 678 static int xen_pgd_walk(struct mm_struct *mm, 679 int (*func)(struct mm_struct *mm, struct page *, 680 enum pt_level), 681 unsigned long limit) 682 { 683 return __xen_pgd_walk(mm, mm->pgd, func, limit); 684 } 685 686 /* If we're using split pte locks, then take the page's lock and 687 return a pointer to it. Otherwise return NULL. */ 688 static spinlock_t *xen_pte_lock(struct page *page, struct mm_struct *mm) 689 { 690 spinlock_t *ptl = NULL; 691 692 #if USE_SPLIT_PTE_PTLOCKS 693 ptl = ptlock_ptr(page); 694 spin_lock_nest_lock(ptl, &mm->page_table_lock); 695 #endif 696 697 return ptl; 698 } 699 700 static void xen_pte_unlock(void *v) 701 { 702 spinlock_t *ptl = v; 703 spin_unlock(ptl); 704 } 705 706 static void xen_do_pin(unsigned level, unsigned long pfn) 707 { 708 struct mmuext_op op; 709 710 op.cmd = level; 711 op.arg1.mfn = pfn_to_mfn(pfn); 712 713 xen_extend_mmuext_op(&op); 714 } 715 716 static int xen_pin_page(struct mm_struct *mm, struct page *page, 717 enum pt_level level) 718 { 719 unsigned pgfl = TestSetPagePinned(page); 720 int flush; 721 722 if (pgfl) 723 flush = 0; /* already pinned */ 724 else if (PageHighMem(page)) 725 /* kmaps need flushing if we found an unpinned 726 highpage */ 727 flush = 1; 728 else { 729 void *pt = lowmem_page_address(page); 730 unsigned long pfn = page_to_pfn(page); 731 struct multicall_space mcs = __xen_mc_entry(0); 732 spinlock_t *ptl; 733 734 flush = 0; 735 736 /* 737 * We need to hold the pagetable lock between the time 738 * we make the pagetable RO and when we actually pin 739 * it. If we don't, then other users may come in and 740 * attempt to update the pagetable by writing it, 741 * which will fail because the memory is RO but not 742 * pinned, so Xen won't do the trap'n'emulate. 743 * 744 * If we're using split pte locks, we can't hold the 745 * entire pagetable's worth of locks during the 746 * traverse, because we may wrap the preempt count (8 747 * bits). The solution is to mark RO and pin each PTE 748 * page while holding the lock. This means the number 749 * of locks we end up holding is never more than a 750 * batch size (~32 entries, at present). 751 * 752 * If we're not using split pte locks, we needn't pin 753 * the PTE pages independently, because we're 754 * protected by the overall pagetable lock. 755 */ 756 ptl = NULL; 757 if (level == PT_PTE) 758 ptl = xen_pte_lock(page, mm); 759 760 MULTI_update_va_mapping(mcs.mc, (unsigned long)pt, 761 pfn_pte(pfn, PAGE_KERNEL_RO), 762 level == PT_PGD ? UVMF_TLB_FLUSH : 0); 763 764 if (ptl) { 765 xen_do_pin(MMUEXT_PIN_L1_TABLE, pfn); 766 767 /* Queue a deferred unlock for when this batch 768 is completed. */ 769 xen_mc_callback(xen_pte_unlock, ptl); 770 } 771 } 772 773 return flush; 774 } 775 776 /* This is called just after a mm has been created, but it has not 777 been used yet. We need to make sure that its pagetable is all 778 read-only, and can be pinned. */ 779 static void __xen_pgd_pin(struct mm_struct *mm, pgd_t *pgd) 780 { 781 trace_xen_mmu_pgd_pin(mm, pgd); 782 783 xen_mc_batch(); 784 785 if (__xen_pgd_walk(mm, pgd, xen_pin_page, USER_LIMIT)) { 786 /* re-enable interrupts for flushing */ 787 xen_mc_issue(0); 788 789 kmap_flush_unused(); 790 791 xen_mc_batch(); 792 } 793 794 #ifdef CONFIG_X86_64 795 { 796 pgd_t *user_pgd = xen_get_user_pgd(pgd); 797 798 xen_do_pin(MMUEXT_PIN_L4_TABLE, PFN_DOWN(__pa(pgd))); 799 800 if (user_pgd) { 801 xen_pin_page(mm, virt_to_page(user_pgd), PT_PGD); 802 xen_do_pin(MMUEXT_PIN_L4_TABLE, 803 PFN_DOWN(__pa(user_pgd))); 804 } 805 } 806 #else /* CONFIG_X86_32 */ 807 #ifdef CONFIG_X86_PAE 808 /* Need to make sure unshared kernel PMD is pinnable */ 809 xen_pin_page(mm, pgd_page(pgd[pgd_index(TASK_SIZE)]), 810 PT_PMD); 811 #endif 812 xen_do_pin(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(pgd))); 813 #endif /* CONFIG_X86_64 */ 814 xen_mc_issue(0); 815 } 816 817 static void xen_pgd_pin(struct mm_struct *mm) 818 { 819 __xen_pgd_pin(mm, mm->pgd); 820 } 821 822 /* 823 * On save, we need to pin all pagetables to make sure they get their 824 * mfns turned into pfns. Search the list for any unpinned pgds and pin 825 * them (unpinned pgds are not currently in use, probably because the 826 * process is under construction or destruction). 827 * 828 * Expected to be called in stop_machine() ("equivalent to taking 829 * every spinlock in the system"), so the locking doesn't really 830 * matter all that much. 831 */ 832 void xen_mm_pin_all(void) 833 { 834 struct page *page; 835 836 spin_lock(&pgd_lock); 837 838 list_for_each_entry(page, &pgd_list, lru) { 839 if (!PagePinned(page)) { 840 __xen_pgd_pin(&init_mm, (pgd_t *)page_address(page)); 841 SetPageSavePinned(page); 842 } 843 } 844 845 spin_unlock(&pgd_lock); 846 } 847 848 static int __init xen_mark_pinned(struct mm_struct *mm, struct page *page, 849 enum pt_level level) 850 { 851 SetPagePinned(page); 852 return 0; 853 } 854 855 /* 856 * The init_mm pagetable is really pinned as soon as its created, but 857 * that's before we have page structures to store the bits. So do all 858 * the book-keeping now once struct pages for allocated pages are 859 * initialized. This happens only after free_all_bootmem() is called. 860 */ 861 static void __init xen_after_bootmem(void) 862 { 863 static_branch_enable(&xen_struct_pages_ready); 864 #ifdef CONFIG_X86_64 865 SetPagePinned(virt_to_page(level3_user_vsyscall)); 866 #endif 867 xen_pgd_walk(&init_mm, xen_mark_pinned, FIXADDR_TOP); 868 } 869 870 static int xen_unpin_page(struct mm_struct *mm, struct page *page, 871 enum pt_level level) 872 { 873 unsigned pgfl = TestClearPagePinned(page); 874 875 if (pgfl && !PageHighMem(page)) { 876 void *pt = lowmem_page_address(page); 877 unsigned long pfn = page_to_pfn(page); 878 spinlock_t *ptl = NULL; 879 struct multicall_space mcs; 880 881 /* 882 * Do the converse to pin_page. If we're using split 883 * pte locks, we must be holding the lock for while 884 * the pte page is unpinned but still RO to prevent 885 * concurrent updates from seeing it in this 886 * partially-pinned state. 887 */ 888 if (level == PT_PTE) { 889 ptl = xen_pte_lock(page, mm); 890 891 if (ptl) 892 xen_do_pin(MMUEXT_UNPIN_TABLE, pfn); 893 } 894 895 mcs = __xen_mc_entry(0); 896 897 MULTI_update_va_mapping(mcs.mc, (unsigned long)pt, 898 pfn_pte(pfn, PAGE_KERNEL), 899 level == PT_PGD ? UVMF_TLB_FLUSH : 0); 900 901 if (ptl) { 902 /* unlock when batch completed */ 903 xen_mc_callback(xen_pte_unlock, ptl); 904 } 905 } 906 907 return 0; /* never need to flush on unpin */ 908 } 909 910 /* Release a pagetables pages back as normal RW */ 911 static void __xen_pgd_unpin(struct mm_struct *mm, pgd_t *pgd) 912 { 913 trace_xen_mmu_pgd_unpin(mm, pgd); 914 915 xen_mc_batch(); 916 917 xen_do_pin(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd))); 918 919 #ifdef CONFIG_X86_64 920 { 921 pgd_t *user_pgd = xen_get_user_pgd(pgd); 922 923 if (user_pgd) { 924 xen_do_pin(MMUEXT_UNPIN_TABLE, 925 PFN_DOWN(__pa(user_pgd))); 926 xen_unpin_page(mm, virt_to_page(user_pgd), PT_PGD); 927 } 928 } 929 #endif 930 931 #ifdef CONFIG_X86_PAE 932 /* Need to make sure unshared kernel PMD is unpinned */ 933 xen_unpin_page(mm, pgd_page(pgd[pgd_index(TASK_SIZE)]), 934 PT_PMD); 935 #endif 936 937 __xen_pgd_walk(mm, pgd, xen_unpin_page, USER_LIMIT); 938 939 xen_mc_issue(0); 940 } 941 942 static void xen_pgd_unpin(struct mm_struct *mm) 943 { 944 __xen_pgd_unpin(mm, mm->pgd); 945 } 946 947 /* 948 * On resume, undo any pinning done at save, so that the rest of the 949 * kernel doesn't see any unexpected pinned pagetables. 950 */ 951 void xen_mm_unpin_all(void) 952 { 953 struct page *page; 954 955 spin_lock(&pgd_lock); 956 957 list_for_each_entry(page, &pgd_list, lru) { 958 if (PageSavePinned(page)) { 959 BUG_ON(!PagePinned(page)); 960 __xen_pgd_unpin(&init_mm, (pgd_t *)page_address(page)); 961 ClearPageSavePinned(page); 962 } 963 } 964 965 spin_unlock(&pgd_lock); 966 } 967 968 static void xen_activate_mm(struct mm_struct *prev, struct mm_struct *next) 969 { 970 spin_lock(&next->page_table_lock); 971 xen_pgd_pin(next); 972 spin_unlock(&next->page_table_lock); 973 } 974 975 static void xen_dup_mmap(struct mm_struct *oldmm, struct mm_struct *mm) 976 { 977 spin_lock(&mm->page_table_lock); 978 xen_pgd_pin(mm); 979 spin_unlock(&mm->page_table_lock); 980 } 981 982 static void drop_mm_ref_this_cpu(void *info) 983 { 984 struct mm_struct *mm = info; 985 986 if (this_cpu_read(cpu_tlbstate.loaded_mm) == mm) 987 leave_mm(smp_processor_id()); 988 989 /* 990 * If this cpu still has a stale cr3 reference, then make sure 991 * it has been flushed. 992 */ 993 if (this_cpu_read(xen_current_cr3) == __pa(mm->pgd)) 994 xen_mc_flush(); 995 } 996 997 #ifdef CONFIG_SMP 998 /* 999 * Another cpu may still have their %cr3 pointing at the pagetable, so 1000 * we need to repoint it somewhere else before we can unpin it. 1001 */ 1002 static void xen_drop_mm_ref(struct mm_struct *mm) 1003 { 1004 cpumask_var_t mask; 1005 unsigned cpu; 1006 1007 drop_mm_ref_this_cpu(mm); 1008 1009 /* Get the "official" set of cpus referring to our pagetable. */ 1010 if (!alloc_cpumask_var(&mask, GFP_ATOMIC)) { 1011 for_each_online_cpu(cpu) { 1012 if (per_cpu(xen_current_cr3, cpu) != __pa(mm->pgd)) 1013 continue; 1014 smp_call_function_single(cpu, drop_mm_ref_this_cpu, mm, 1); 1015 } 1016 return; 1017 } 1018 1019 /* 1020 * It's possible that a vcpu may have a stale reference to our 1021 * cr3, because its in lazy mode, and it hasn't yet flushed 1022 * its set of pending hypercalls yet. In this case, we can 1023 * look at its actual current cr3 value, and force it to flush 1024 * if needed. 1025 */ 1026 cpumask_clear(mask); 1027 for_each_online_cpu(cpu) { 1028 if (per_cpu(xen_current_cr3, cpu) == __pa(mm->pgd)) 1029 cpumask_set_cpu(cpu, mask); 1030 } 1031 1032 smp_call_function_many(mask, drop_mm_ref_this_cpu, mm, 1); 1033 free_cpumask_var(mask); 1034 } 1035 #else 1036 static void xen_drop_mm_ref(struct mm_struct *mm) 1037 { 1038 drop_mm_ref_this_cpu(mm); 1039 } 1040 #endif 1041 1042 /* 1043 * While a process runs, Xen pins its pagetables, which means that the 1044 * hypervisor forces it to be read-only, and it controls all updates 1045 * to it. This means that all pagetable updates have to go via the 1046 * hypervisor, which is moderately expensive. 1047 * 1048 * Since we're pulling the pagetable down, we switch to use init_mm, 1049 * unpin old process pagetable and mark it all read-write, which 1050 * allows further operations on it to be simple memory accesses. 1051 * 1052 * The only subtle point is that another CPU may be still using the 1053 * pagetable because of lazy tlb flushing. This means we need need to 1054 * switch all CPUs off this pagetable before we can unpin it. 1055 */ 1056 static void xen_exit_mmap(struct mm_struct *mm) 1057 { 1058 get_cpu(); /* make sure we don't move around */ 1059 xen_drop_mm_ref(mm); 1060 put_cpu(); 1061 1062 spin_lock(&mm->page_table_lock); 1063 1064 /* pgd may not be pinned in the error exit path of execve */ 1065 if (xen_page_pinned(mm->pgd)) 1066 xen_pgd_unpin(mm); 1067 1068 spin_unlock(&mm->page_table_lock); 1069 } 1070 1071 static void xen_post_allocator_init(void); 1072 1073 static void __init pin_pagetable_pfn(unsigned cmd, unsigned long pfn) 1074 { 1075 struct mmuext_op op; 1076 1077 op.cmd = cmd; 1078 op.arg1.mfn = pfn_to_mfn(pfn); 1079 if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF)) 1080 BUG(); 1081 } 1082 1083 #ifdef CONFIG_X86_64 1084 static void __init xen_cleanhighmap(unsigned long vaddr, 1085 unsigned long vaddr_end) 1086 { 1087 unsigned long kernel_end = roundup((unsigned long)_brk_end, PMD_SIZE) - 1; 1088 pmd_t *pmd = level2_kernel_pgt + pmd_index(vaddr); 1089 1090 /* NOTE: The loop is more greedy than the cleanup_highmap variant. 1091 * We include the PMD passed in on _both_ boundaries. */ 1092 for (; vaddr <= vaddr_end && (pmd < (level2_kernel_pgt + PTRS_PER_PMD)); 1093 pmd++, vaddr += PMD_SIZE) { 1094 if (pmd_none(*pmd)) 1095 continue; 1096 if (vaddr < (unsigned long) _text || vaddr > kernel_end) 1097 set_pmd(pmd, __pmd(0)); 1098 } 1099 /* In case we did something silly, we should crash in this function 1100 * instead of somewhere later and be confusing. */ 1101 xen_mc_flush(); 1102 } 1103 1104 /* 1105 * Make a page range writeable and free it. 1106 */ 1107 static void __init xen_free_ro_pages(unsigned long paddr, unsigned long size) 1108 { 1109 void *vaddr = __va(paddr); 1110 void *vaddr_end = vaddr + size; 1111 1112 for (; vaddr < vaddr_end; vaddr += PAGE_SIZE) 1113 make_lowmem_page_readwrite(vaddr); 1114 1115 memblock_free(paddr, size); 1116 } 1117 1118 static void __init xen_cleanmfnmap_free_pgtbl(void *pgtbl, bool unpin) 1119 { 1120 unsigned long pa = __pa(pgtbl) & PHYSICAL_PAGE_MASK; 1121 1122 if (unpin) 1123 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(pa)); 1124 ClearPagePinned(virt_to_page(__va(pa))); 1125 xen_free_ro_pages(pa, PAGE_SIZE); 1126 } 1127 1128 static void __init xen_cleanmfnmap_pmd(pmd_t *pmd, bool unpin) 1129 { 1130 unsigned long pa; 1131 pte_t *pte_tbl; 1132 int i; 1133 1134 if (pmd_large(*pmd)) { 1135 pa = pmd_val(*pmd) & PHYSICAL_PAGE_MASK; 1136 xen_free_ro_pages(pa, PMD_SIZE); 1137 return; 1138 } 1139 1140 pte_tbl = pte_offset_kernel(pmd, 0); 1141 for (i = 0; i < PTRS_PER_PTE; i++) { 1142 if (pte_none(pte_tbl[i])) 1143 continue; 1144 pa = pte_pfn(pte_tbl[i]) << PAGE_SHIFT; 1145 xen_free_ro_pages(pa, PAGE_SIZE); 1146 } 1147 set_pmd(pmd, __pmd(0)); 1148 xen_cleanmfnmap_free_pgtbl(pte_tbl, unpin); 1149 } 1150 1151 static void __init xen_cleanmfnmap_pud(pud_t *pud, bool unpin) 1152 { 1153 unsigned long pa; 1154 pmd_t *pmd_tbl; 1155 int i; 1156 1157 if (pud_large(*pud)) { 1158 pa = pud_val(*pud) & PHYSICAL_PAGE_MASK; 1159 xen_free_ro_pages(pa, PUD_SIZE); 1160 return; 1161 } 1162 1163 pmd_tbl = pmd_offset(pud, 0); 1164 for (i = 0; i < PTRS_PER_PMD; i++) { 1165 if (pmd_none(pmd_tbl[i])) 1166 continue; 1167 xen_cleanmfnmap_pmd(pmd_tbl + i, unpin); 1168 } 1169 set_pud(pud, __pud(0)); 1170 xen_cleanmfnmap_free_pgtbl(pmd_tbl, unpin); 1171 } 1172 1173 static void __init xen_cleanmfnmap_p4d(p4d_t *p4d, bool unpin) 1174 { 1175 unsigned long pa; 1176 pud_t *pud_tbl; 1177 int i; 1178 1179 if (p4d_large(*p4d)) { 1180 pa = p4d_val(*p4d) & PHYSICAL_PAGE_MASK; 1181 xen_free_ro_pages(pa, P4D_SIZE); 1182 return; 1183 } 1184 1185 pud_tbl = pud_offset(p4d, 0); 1186 for (i = 0; i < PTRS_PER_PUD; i++) { 1187 if (pud_none(pud_tbl[i])) 1188 continue; 1189 xen_cleanmfnmap_pud(pud_tbl + i, unpin); 1190 } 1191 set_p4d(p4d, __p4d(0)); 1192 xen_cleanmfnmap_free_pgtbl(pud_tbl, unpin); 1193 } 1194 1195 /* 1196 * Since it is well isolated we can (and since it is perhaps large we should) 1197 * also free the page tables mapping the initial P->M table. 1198 */ 1199 static void __init xen_cleanmfnmap(unsigned long vaddr) 1200 { 1201 pgd_t *pgd; 1202 p4d_t *p4d; 1203 bool unpin; 1204 1205 unpin = (vaddr == 2 * PGDIR_SIZE); 1206 vaddr &= PMD_MASK; 1207 pgd = pgd_offset_k(vaddr); 1208 p4d = p4d_offset(pgd, 0); 1209 if (!p4d_none(*p4d)) 1210 xen_cleanmfnmap_p4d(p4d, unpin); 1211 } 1212 1213 static void __init xen_pagetable_p2m_free(void) 1214 { 1215 unsigned long size; 1216 unsigned long addr; 1217 1218 size = PAGE_ALIGN(xen_start_info->nr_pages * sizeof(unsigned long)); 1219 1220 /* No memory or already called. */ 1221 if ((unsigned long)xen_p2m_addr == xen_start_info->mfn_list) 1222 return; 1223 1224 /* using __ka address and sticking INVALID_P2M_ENTRY! */ 1225 memset((void *)xen_start_info->mfn_list, 0xff, size); 1226 1227 addr = xen_start_info->mfn_list; 1228 /* 1229 * We could be in __ka space. 1230 * We roundup to the PMD, which means that if anybody at this stage is 1231 * using the __ka address of xen_start_info or 1232 * xen_start_info->shared_info they are in going to crash. Fortunatly 1233 * we have already revectored in xen_setup_kernel_pagetable and in 1234 * xen_setup_shared_info. 1235 */ 1236 size = roundup(size, PMD_SIZE); 1237 1238 if (addr >= __START_KERNEL_map) { 1239 xen_cleanhighmap(addr, addr + size); 1240 size = PAGE_ALIGN(xen_start_info->nr_pages * 1241 sizeof(unsigned long)); 1242 memblock_free(__pa(addr), size); 1243 } else { 1244 xen_cleanmfnmap(addr); 1245 } 1246 } 1247 1248 static void __init xen_pagetable_cleanhighmap(void) 1249 { 1250 unsigned long size; 1251 unsigned long addr; 1252 1253 /* At this stage, cleanup_highmap has already cleaned __ka space 1254 * from _brk_limit way up to the max_pfn_mapped (which is the end of 1255 * the ramdisk). We continue on, erasing PMD entries that point to page 1256 * tables - do note that they are accessible at this stage via __va. 1257 * As Xen is aligning the memory end to a 4MB boundary, for good 1258 * measure we also round up to PMD_SIZE * 2 - which means that if 1259 * anybody is using __ka address to the initial boot-stack - and try 1260 * to use it - they are going to crash. The xen_start_info has been 1261 * taken care of already in xen_setup_kernel_pagetable. */ 1262 addr = xen_start_info->pt_base; 1263 size = xen_start_info->nr_pt_frames * PAGE_SIZE; 1264 1265 xen_cleanhighmap(addr, roundup(addr + size, PMD_SIZE * 2)); 1266 xen_start_info->pt_base = (unsigned long)__va(__pa(xen_start_info->pt_base)); 1267 } 1268 #endif 1269 1270 static void __init xen_pagetable_p2m_setup(void) 1271 { 1272 xen_vmalloc_p2m_tree(); 1273 1274 #ifdef CONFIG_X86_64 1275 xen_pagetable_p2m_free(); 1276 1277 xen_pagetable_cleanhighmap(); 1278 #endif 1279 /* And revector! Bye bye old array */ 1280 xen_start_info->mfn_list = (unsigned long)xen_p2m_addr; 1281 } 1282 1283 static void __init xen_pagetable_init(void) 1284 { 1285 paging_init(); 1286 xen_post_allocator_init(); 1287 1288 xen_pagetable_p2m_setup(); 1289 1290 /* Allocate and initialize top and mid mfn levels for p2m structure */ 1291 xen_build_mfn_list_list(); 1292 1293 /* Remap memory freed due to conflicts with E820 map */ 1294 xen_remap_memory(); 1295 1296 xen_setup_shared_info(); 1297 } 1298 static void xen_write_cr2(unsigned long cr2) 1299 { 1300 this_cpu_read(xen_vcpu)->arch.cr2 = cr2; 1301 } 1302 1303 static unsigned long xen_read_cr2(void) 1304 { 1305 return this_cpu_read(xen_vcpu)->arch.cr2; 1306 } 1307 1308 unsigned long xen_read_cr2_direct(void) 1309 { 1310 return this_cpu_read(xen_vcpu_info.arch.cr2); 1311 } 1312 1313 static void xen_flush_tlb(void) 1314 { 1315 struct mmuext_op *op; 1316 struct multicall_space mcs; 1317 1318 trace_xen_mmu_flush_tlb(0); 1319 1320 preempt_disable(); 1321 1322 mcs = xen_mc_entry(sizeof(*op)); 1323 1324 op = mcs.args; 1325 op->cmd = MMUEXT_TLB_FLUSH_LOCAL; 1326 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); 1327 1328 xen_mc_issue(PARAVIRT_LAZY_MMU); 1329 1330 preempt_enable(); 1331 } 1332 1333 static void xen_flush_tlb_one_user(unsigned long addr) 1334 { 1335 struct mmuext_op *op; 1336 struct multicall_space mcs; 1337 1338 trace_xen_mmu_flush_tlb_one_user(addr); 1339 1340 preempt_disable(); 1341 1342 mcs = xen_mc_entry(sizeof(*op)); 1343 op = mcs.args; 1344 op->cmd = MMUEXT_INVLPG_LOCAL; 1345 op->arg1.linear_addr = addr & PAGE_MASK; 1346 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); 1347 1348 xen_mc_issue(PARAVIRT_LAZY_MMU); 1349 1350 preempt_enable(); 1351 } 1352 1353 static void xen_flush_tlb_others(const struct cpumask *cpus, 1354 const struct flush_tlb_info *info) 1355 { 1356 struct { 1357 struct mmuext_op op; 1358 DECLARE_BITMAP(mask, NR_CPUS); 1359 } *args; 1360 struct multicall_space mcs; 1361 const size_t mc_entry_size = sizeof(args->op) + 1362 sizeof(args->mask[0]) * BITS_TO_LONGS(num_possible_cpus()); 1363 1364 trace_xen_mmu_flush_tlb_others(cpus, info->mm, info->start, info->end); 1365 1366 if (cpumask_empty(cpus)) 1367 return; /* nothing to do */ 1368 1369 mcs = xen_mc_entry(mc_entry_size); 1370 args = mcs.args; 1371 args->op.arg2.vcpumask = to_cpumask(args->mask); 1372 1373 /* Remove us, and any offline CPUS. */ 1374 cpumask_and(to_cpumask(args->mask), cpus, cpu_online_mask); 1375 cpumask_clear_cpu(smp_processor_id(), to_cpumask(args->mask)); 1376 1377 args->op.cmd = MMUEXT_TLB_FLUSH_MULTI; 1378 if (info->end != TLB_FLUSH_ALL && 1379 (info->end - info->start) <= PAGE_SIZE) { 1380 args->op.cmd = MMUEXT_INVLPG_MULTI; 1381 args->op.arg1.linear_addr = info->start; 1382 } 1383 1384 MULTI_mmuext_op(mcs.mc, &args->op, 1, NULL, DOMID_SELF); 1385 1386 xen_mc_issue(PARAVIRT_LAZY_MMU); 1387 } 1388 1389 static unsigned long xen_read_cr3(void) 1390 { 1391 return this_cpu_read(xen_cr3); 1392 } 1393 1394 static void set_current_cr3(void *v) 1395 { 1396 this_cpu_write(xen_current_cr3, (unsigned long)v); 1397 } 1398 1399 static void __xen_write_cr3(bool kernel, unsigned long cr3) 1400 { 1401 struct mmuext_op op; 1402 unsigned long mfn; 1403 1404 trace_xen_mmu_write_cr3(kernel, cr3); 1405 1406 if (cr3) 1407 mfn = pfn_to_mfn(PFN_DOWN(cr3)); 1408 else 1409 mfn = 0; 1410 1411 WARN_ON(mfn == 0 && kernel); 1412 1413 op.cmd = kernel ? MMUEXT_NEW_BASEPTR : MMUEXT_NEW_USER_BASEPTR; 1414 op.arg1.mfn = mfn; 1415 1416 xen_extend_mmuext_op(&op); 1417 1418 if (kernel) { 1419 this_cpu_write(xen_cr3, cr3); 1420 1421 /* Update xen_current_cr3 once the batch has actually 1422 been submitted. */ 1423 xen_mc_callback(set_current_cr3, (void *)cr3); 1424 } 1425 } 1426 static void xen_write_cr3(unsigned long cr3) 1427 { 1428 BUG_ON(preemptible()); 1429 1430 xen_mc_batch(); /* disables interrupts */ 1431 1432 /* Update while interrupts are disabled, so its atomic with 1433 respect to ipis */ 1434 this_cpu_write(xen_cr3, cr3); 1435 1436 __xen_write_cr3(true, cr3); 1437 1438 #ifdef CONFIG_X86_64 1439 { 1440 pgd_t *user_pgd = xen_get_user_pgd(__va(cr3)); 1441 if (user_pgd) 1442 __xen_write_cr3(false, __pa(user_pgd)); 1443 else 1444 __xen_write_cr3(false, 0); 1445 } 1446 #endif 1447 1448 xen_mc_issue(PARAVIRT_LAZY_CPU); /* interrupts restored */ 1449 } 1450 1451 #ifdef CONFIG_X86_64 1452 /* 1453 * At the start of the day - when Xen launches a guest, it has already 1454 * built pagetables for the guest. We diligently look over them 1455 * in xen_setup_kernel_pagetable and graft as appropriate them in the 1456 * init_top_pgt and its friends. Then when we are happy we load 1457 * the new init_top_pgt - and continue on. 1458 * 1459 * The generic code starts (start_kernel) and 'init_mem_mapping' sets 1460 * up the rest of the pagetables. When it has completed it loads the cr3. 1461 * N.B. that baremetal would start at 'start_kernel' (and the early 1462 * #PF handler would create bootstrap pagetables) - so we are running 1463 * with the same assumptions as what to do when write_cr3 is executed 1464 * at this point. 1465 * 1466 * Since there are no user-page tables at all, we have two variants 1467 * of xen_write_cr3 - the early bootup (this one), and the late one 1468 * (xen_write_cr3). The reason we have to do that is that in 64-bit 1469 * the Linux kernel and user-space are both in ring 3 while the 1470 * hypervisor is in ring 0. 1471 */ 1472 static void __init xen_write_cr3_init(unsigned long cr3) 1473 { 1474 BUG_ON(preemptible()); 1475 1476 xen_mc_batch(); /* disables interrupts */ 1477 1478 /* Update while interrupts are disabled, so its atomic with 1479 respect to ipis */ 1480 this_cpu_write(xen_cr3, cr3); 1481 1482 __xen_write_cr3(true, cr3); 1483 1484 xen_mc_issue(PARAVIRT_LAZY_CPU); /* interrupts restored */ 1485 } 1486 #endif 1487 1488 static int xen_pgd_alloc(struct mm_struct *mm) 1489 { 1490 pgd_t *pgd = mm->pgd; 1491 int ret = 0; 1492 1493 BUG_ON(PagePinned(virt_to_page(pgd))); 1494 1495 #ifdef CONFIG_X86_64 1496 { 1497 struct page *page = virt_to_page(pgd); 1498 pgd_t *user_pgd; 1499 1500 BUG_ON(page->private != 0); 1501 1502 ret = -ENOMEM; 1503 1504 user_pgd = (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO); 1505 page->private = (unsigned long)user_pgd; 1506 1507 if (user_pgd != NULL) { 1508 #ifdef CONFIG_X86_VSYSCALL_EMULATION 1509 user_pgd[pgd_index(VSYSCALL_ADDR)] = 1510 __pgd(__pa(level3_user_vsyscall) | _PAGE_TABLE); 1511 #endif 1512 ret = 0; 1513 } 1514 1515 BUG_ON(PagePinned(virt_to_page(xen_get_user_pgd(pgd)))); 1516 } 1517 #endif 1518 return ret; 1519 } 1520 1521 static void xen_pgd_free(struct mm_struct *mm, pgd_t *pgd) 1522 { 1523 #ifdef CONFIG_X86_64 1524 pgd_t *user_pgd = xen_get_user_pgd(pgd); 1525 1526 if (user_pgd) 1527 free_page((unsigned long)user_pgd); 1528 #endif 1529 } 1530 1531 /* 1532 * Init-time set_pte while constructing initial pagetables, which 1533 * doesn't allow RO page table pages to be remapped RW. 1534 * 1535 * If there is no MFN for this PFN then this page is initially 1536 * ballooned out so clear the PTE (as in decrease_reservation() in 1537 * drivers/xen/balloon.c). 1538 * 1539 * Many of these PTE updates are done on unpinned and writable pages 1540 * and doing a hypercall for these is unnecessary and expensive. At 1541 * this point it is not possible to tell if a page is pinned or not, 1542 * so always write the PTE directly and rely on Xen trapping and 1543 * emulating any updates as necessary. 1544 */ 1545 __visible pte_t xen_make_pte_init(pteval_t pte) 1546 { 1547 #ifdef CONFIG_X86_64 1548 unsigned long pfn; 1549 1550 /* 1551 * Pages belonging to the initial p2m list mapped outside the default 1552 * address range must be mapped read-only. This region contains the 1553 * page tables for mapping the p2m list, too, and page tables MUST be 1554 * mapped read-only. 1555 */ 1556 pfn = (pte & PTE_PFN_MASK) >> PAGE_SHIFT; 1557 if (xen_start_info->mfn_list < __START_KERNEL_map && 1558 pfn >= xen_start_info->first_p2m_pfn && 1559 pfn < xen_start_info->first_p2m_pfn + xen_start_info->nr_p2m_frames) 1560 pte &= ~_PAGE_RW; 1561 #endif 1562 pte = pte_pfn_to_mfn(pte); 1563 return native_make_pte(pte); 1564 } 1565 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte_init); 1566 1567 static void __init xen_set_pte_init(pte_t *ptep, pte_t pte) 1568 { 1569 #ifdef CONFIG_X86_32 1570 /* If there's an existing pte, then don't allow _PAGE_RW to be set */ 1571 if (pte_mfn(pte) != INVALID_P2M_ENTRY 1572 && pte_val_ma(*ptep) & _PAGE_PRESENT) 1573 pte = __pte_ma(((pte_val_ma(*ptep) & _PAGE_RW) | ~_PAGE_RW) & 1574 pte_val_ma(pte)); 1575 #endif 1576 native_set_pte(ptep, pte); 1577 } 1578 1579 /* Early in boot, while setting up the initial pagetable, assume 1580 everything is pinned. */ 1581 static void __init xen_alloc_pte_init(struct mm_struct *mm, unsigned long pfn) 1582 { 1583 #ifdef CONFIG_FLATMEM 1584 BUG_ON(mem_map); /* should only be used early */ 1585 #endif 1586 make_lowmem_page_readonly(__va(PFN_PHYS(pfn))); 1587 pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn); 1588 } 1589 1590 /* Used for pmd and pud */ 1591 static void __init xen_alloc_pmd_init(struct mm_struct *mm, unsigned long pfn) 1592 { 1593 #ifdef CONFIG_FLATMEM 1594 BUG_ON(mem_map); /* should only be used early */ 1595 #endif 1596 make_lowmem_page_readonly(__va(PFN_PHYS(pfn))); 1597 } 1598 1599 /* Early release_pte assumes that all pts are pinned, since there's 1600 only init_mm and anything attached to that is pinned. */ 1601 static void __init xen_release_pte_init(unsigned long pfn) 1602 { 1603 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn); 1604 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn))); 1605 } 1606 1607 static void __init xen_release_pmd_init(unsigned long pfn) 1608 { 1609 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn))); 1610 } 1611 1612 static inline void __pin_pagetable_pfn(unsigned cmd, unsigned long pfn) 1613 { 1614 struct multicall_space mcs; 1615 struct mmuext_op *op; 1616 1617 mcs = __xen_mc_entry(sizeof(*op)); 1618 op = mcs.args; 1619 op->cmd = cmd; 1620 op->arg1.mfn = pfn_to_mfn(pfn); 1621 1622 MULTI_mmuext_op(mcs.mc, mcs.args, 1, NULL, DOMID_SELF); 1623 } 1624 1625 static inline void __set_pfn_prot(unsigned long pfn, pgprot_t prot) 1626 { 1627 struct multicall_space mcs; 1628 unsigned long addr = (unsigned long)__va(pfn << PAGE_SHIFT); 1629 1630 mcs = __xen_mc_entry(0); 1631 MULTI_update_va_mapping(mcs.mc, (unsigned long)addr, 1632 pfn_pte(pfn, prot), 0); 1633 } 1634 1635 /* This needs to make sure the new pte page is pinned iff its being 1636 attached to a pinned pagetable. */ 1637 static inline void xen_alloc_ptpage(struct mm_struct *mm, unsigned long pfn, 1638 unsigned level) 1639 { 1640 bool pinned = xen_page_pinned(mm->pgd); 1641 1642 trace_xen_mmu_alloc_ptpage(mm, pfn, level, pinned); 1643 1644 if (pinned) { 1645 struct page *page = pfn_to_page(pfn); 1646 1647 if (static_branch_likely(&xen_struct_pages_ready)) 1648 SetPagePinned(page); 1649 1650 if (!PageHighMem(page)) { 1651 xen_mc_batch(); 1652 1653 __set_pfn_prot(pfn, PAGE_KERNEL_RO); 1654 1655 if (level == PT_PTE && USE_SPLIT_PTE_PTLOCKS) 1656 __pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn); 1657 1658 xen_mc_issue(PARAVIRT_LAZY_MMU); 1659 } else { 1660 /* make sure there are no stray mappings of 1661 this page */ 1662 kmap_flush_unused(); 1663 } 1664 } 1665 } 1666 1667 static void xen_alloc_pte(struct mm_struct *mm, unsigned long pfn) 1668 { 1669 xen_alloc_ptpage(mm, pfn, PT_PTE); 1670 } 1671 1672 static void xen_alloc_pmd(struct mm_struct *mm, unsigned long pfn) 1673 { 1674 xen_alloc_ptpage(mm, pfn, PT_PMD); 1675 } 1676 1677 /* This should never happen until we're OK to use struct page */ 1678 static inline void xen_release_ptpage(unsigned long pfn, unsigned level) 1679 { 1680 struct page *page = pfn_to_page(pfn); 1681 bool pinned = PagePinned(page); 1682 1683 trace_xen_mmu_release_ptpage(pfn, level, pinned); 1684 1685 if (pinned) { 1686 if (!PageHighMem(page)) { 1687 xen_mc_batch(); 1688 1689 if (level == PT_PTE && USE_SPLIT_PTE_PTLOCKS) 1690 __pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn); 1691 1692 __set_pfn_prot(pfn, PAGE_KERNEL); 1693 1694 xen_mc_issue(PARAVIRT_LAZY_MMU); 1695 } 1696 ClearPagePinned(page); 1697 } 1698 } 1699 1700 static void xen_release_pte(unsigned long pfn) 1701 { 1702 xen_release_ptpage(pfn, PT_PTE); 1703 } 1704 1705 static void xen_release_pmd(unsigned long pfn) 1706 { 1707 xen_release_ptpage(pfn, PT_PMD); 1708 } 1709 1710 #ifdef CONFIG_X86_64 1711 static void xen_alloc_pud(struct mm_struct *mm, unsigned long pfn) 1712 { 1713 xen_alloc_ptpage(mm, pfn, PT_PUD); 1714 } 1715 1716 static void xen_release_pud(unsigned long pfn) 1717 { 1718 xen_release_ptpage(pfn, PT_PUD); 1719 } 1720 #endif 1721 1722 void __init xen_reserve_top(void) 1723 { 1724 #ifdef CONFIG_X86_32 1725 unsigned long top = HYPERVISOR_VIRT_START; 1726 struct xen_platform_parameters pp; 1727 1728 if (HYPERVISOR_xen_version(XENVER_platform_parameters, &pp) == 0) 1729 top = pp.virt_start; 1730 1731 reserve_top_address(-top); 1732 #endif /* CONFIG_X86_32 */ 1733 } 1734 1735 /* 1736 * Like __va(), but returns address in the kernel mapping (which is 1737 * all we have until the physical memory mapping has been set up. 1738 */ 1739 static void * __init __ka(phys_addr_t paddr) 1740 { 1741 #ifdef CONFIG_X86_64 1742 return (void *)(paddr + __START_KERNEL_map); 1743 #else 1744 return __va(paddr); 1745 #endif 1746 } 1747 1748 /* Convert a machine address to physical address */ 1749 static unsigned long __init m2p(phys_addr_t maddr) 1750 { 1751 phys_addr_t paddr; 1752 1753 maddr &= XEN_PTE_MFN_MASK; 1754 paddr = mfn_to_pfn(maddr >> PAGE_SHIFT) << PAGE_SHIFT; 1755 1756 return paddr; 1757 } 1758 1759 /* Convert a machine address to kernel virtual */ 1760 static void * __init m2v(phys_addr_t maddr) 1761 { 1762 return __ka(m2p(maddr)); 1763 } 1764 1765 /* Set the page permissions on an identity-mapped pages */ 1766 static void __init set_page_prot_flags(void *addr, pgprot_t prot, 1767 unsigned long flags) 1768 { 1769 unsigned long pfn = __pa(addr) >> PAGE_SHIFT; 1770 pte_t pte = pfn_pte(pfn, prot); 1771 1772 if (HYPERVISOR_update_va_mapping((unsigned long)addr, pte, flags)) 1773 BUG(); 1774 } 1775 static void __init set_page_prot(void *addr, pgprot_t prot) 1776 { 1777 return set_page_prot_flags(addr, prot, UVMF_NONE); 1778 } 1779 #ifdef CONFIG_X86_32 1780 static void __init xen_map_identity_early(pmd_t *pmd, unsigned long max_pfn) 1781 { 1782 unsigned pmdidx, pteidx; 1783 unsigned ident_pte; 1784 unsigned long pfn; 1785 1786 level1_ident_pgt = extend_brk(sizeof(pte_t) * LEVEL1_IDENT_ENTRIES, 1787 PAGE_SIZE); 1788 1789 ident_pte = 0; 1790 pfn = 0; 1791 for (pmdidx = 0; pmdidx < PTRS_PER_PMD && pfn < max_pfn; pmdidx++) { 1792 pte_t *pte_page; 1793 1794 /* Reuse or allocate a page of ptes */ 1795 if (pmd_present(pmd[pmdidx])) 1796 pte_page = m2v(pmd[pmdidx].pmd); 1797 else { 1798 /* Check for free pte pages */ 1799 if (ident_pte == LEVEL1_IDENT_ENTRIES) 1800 break; 1801 1802 pte_page = &level1_ident_pgt[ident_pte]; 1803 ident_pte += PTRS_PER_PTE; 1804 1805 pmd[pmdidx] = __pmd(__pa(pte_page) | _PAGE_TABLE); 1806 } 1807 1808 /* Install mappings */ 1809 for (pteidx = 0; pteidx < PTRS_PER_PTE; pteidx++, pfn++) { 1810 pte_t pte; 1811 1812 if (pfn > max_pfn_mapped) 1813 max_pfn_mapped = pfn; 1814 1815 if (!pte_none(pte_page[pteidx])) 1816 continue; 1817 1818 pte = pfn_pte(pfn, PAGE_KERNEL_EXEC); 1819 pte_page[pteidx] = pte; 1820 } 1821 } 1822 1823 for (pteidx = 0; pteidx < ident_pte; pteidx += PTRS_PER_PTE) 1824 set_page_prot(&level1_ident_pgt[pteidx], PAGE_KERNEL_RO); 1825 1826 set_page_prot(pmd, PAGE_KERNEL_RO); 1827 } 1828 #endif 1829 void __init xen_setup_machphys_mapping(void) 1830 { 1831 struct xen_machphys_mapping mapping; 1832 1833 if (HYPERVISOR_memory_op(XENMEM_machphys_mapping, &mapping) == 0) { 1834 machine_to_phys_mapping = (unsigned long *)mapping.v_start; 1835 machine_to_phys_nr = mapping.max_mfn + 1; 1836 } else { 1837 machine_to_phys_nr = MACH2PHYS_NR_ENTRIES; 1838 } 1839 #ifdef CONFIG_X86_32 1840 WARN_ON((machine_to_phys_mapping + (machine_to_phys_nr - 1)) 1841 < machine_to_phys_mapping); 1842 #endif 1843 } 1844 1845 #ifdef CONFIG_X86_64 1846 static void __init convert_pfn_mfn(void *v) 1847 { 1848 pte_t *pte = v; 1849 int i; 1850 1851 /* All levels are converted the same way, so just treat them 1852 as ptes. */ 1853 for (i = 0; i < PTRS_PER_PTE; i++) 1854 pte[i] = xen_make_pte(pte[i].pte); 1855 } 1856 static void __init check_pt_base(unsigned long *pt_base, unsigned long *pt_end, 1857 unsigned long addr) 1858 { 1859 if (*pt_base == PFN_DOWN(__pa(addr))) { 1860 set_page_prot_flags((void *)addr, PAGE_KERNEL, UVMF_INVLPG); 1861 clear_page((void *)addr); 1862 (*pt_base)++; 1863 } 1864 if (*pt_end == PFN_DOWN(__pa(addr))) { 1865 set_page_prot_flags((void *)addr, PAGE_KERNEL, UVMF_INVLPG); 1866 clear_page((void *)addr); 1867 (*pt_end)--; 1868 } 1869 } 1870 /* 1871 * Set up the initial kernel pagetable. 1872 * 1873 * We can construct this by grafting the Xen provided pagetable into 1874 * head_64.S's preconstructed pagetables. We copy the Xen L2's into 1875 * level2_ident_pgt, and level2_kernel_pgt. This means that only the 1876 * kernel has a physical mapping to start with - but that's enough to 1877 * get __va working. We need to fill in the rest of the physical 1878 * mapping once some sort of allocator has been set up. 1879 */ 1880 void __init xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pfn) 1881 { 1882 pud_t *l3; 1883 pmd_t *l2; 1884 unsigned long addr[3]; 1885 unsigned long pt_base, pt_end; 1886 unsigned i; 1887 1888 /* max_pfn_mapped is the last pfn mapped in the initial memory 1889 * mappings. Considering that on Xen after the kernel mappings we 1890 * have the mappings of some pages that don't exist in pfn space, we 1891 * set max_pfn_mapped to the last real pfn mapped. */ 1892 if (xen_start_info->mfn_list < __START_KERNEL_map) 1893 max_pfn_mapped = xen_start_info->first_p2m_pfn; 1894 else 1895 max_pfn_mapped = PFN_DOWN(__pa(xen_start_info->mfn_list)); 1896 1897 pt_base = PFN_DOWN(__pa(xen_start_info->pt_base)); 1898 pt_end = pt_base + xen_start_info->nr_pt_frames; 1899 1900 /* Zap identity mapping */ 1901 init_top_pgt[0] = __pgd(0); 1902 1903 /* Pre-constructed entries are in pfn, so convert to mfn */ 1904 /* L4[272] -> level3_ident_pgt */ 1905 /* L4[511] -> level3_kernel_pgt */ 1906 convert_pfn_mfn(init_top_pgt); 1907 1908 /* L3_i[0] -> level2_ident_pgt */ 1909 convert_pfn_mfn(level3_ident_pgt); 1910 /* L3_k[510] -> level2_kernel_pgt */ 1911 /* L3_k[511] -> level2_fixmap_pgt */ 1912 convert_pfn_mfn(level3_kernel_pgt); 1913 1914 /* L3_k[511][506] -> level1_fixmap_pgt */ 1915 convert_pfn_mfn(level2_fixmap_pgt); 1916 1917 /* We get [511][511] and have Xen's version of level2_kernel_pgt */ 1918 l3 = m2v(pgd[pgd_index(__START_KERNEL_map)].pgd); 1919 l2 = m2v(l3[pud_index(__START_KERNEL_map)].pud); 1920 1921 addr[0] = (unsigned long)pgd; 1922 addr[1] = (unsigned long)l3; 1923 addr[2] = (unsigned long)l2; 1924 /* Graft it onto L4[272][0]. Note that we creating an aliasing problem: 1925 * Both L4[272][0] and L4[511][510] have entries that point to the same 1926 * L2 (PMD) tables. Meaning that if you modify it in __va space 1927 * it will be also modified in the __ka space! (But if you just 1928 * modify the PMD table to point to other PTE's or none, then you 1929 * are OK - which is what cleanup_highmap does) */ 1930 copy_page(level2_ident_pgt, l2); 1931 /* Graft it onto L4[511][510] */ 1932 copy_page(level2_kernel_pgt, l2); 1933 1934 /* 1935 * Zap execute permission from the ident map. Due to the sharing of 1936 * L1 entries we need to do this in the L2. 1937 */ 1938 if (__supported_pte_mask & _PAGE_NX) { 1939 for (i = 0; i < PTRS_PER_PMD; ++i) { 1940 if (pmd_none(level2_ident_pgt[i])) 1941 continue; 1942 level2_ident_pgt[i] = pmd_set_flags(level2_ident_pgt[i], _PAGE_NX); 1943 } 1944 } 1945 1946 /* Copy the initial P->M table mappings if necessary. */ 1947 i = pgd_index(xen_start_info->mfn_list); 1948 if (i && i < pgd_index(__START_KERNEL_map)) 1949 init_top_pgt[i] = ((pgd_t *)xen_start_info->pt_base)[i]; 1950 1951 /* Make pagetable pieces RO */ 1952 set_page_prot(init_top_pgt, PAGE_KERNEL_RO); 1953 set_page_prot(level3_ident_pgt, PAGE_KERNEL_RO); 1954 set_page_prot(level3_kernel_pgt, PAGE_KERNEL_RO); 1955 set_page_prot(level3_user_vsyscall, PAGE_KERNEL_RO); 1956 set_page_prot(level2_ident_pgt, PAGE_KERNEL_RO); 1957 set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO); 1958 set_page_prot(level2_fixmap_pgt, PAGE_KERNEL_RO); 1959 set_page_prot(level1_fixmap_pgt, PAGE_KERNEL_RO); 1960 1961 /* Pin down new L4 */ 1962 pin_pagetable_pfn(MMUEXT_PIN_L4_TABLE, 1963 PFN_DOWN(__pa_symbol(init_top_pgt))); 1964 1965 /* Unpin Xen-provided one */ 1966 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd))); 1967 1968 /* 1969 * At this stage there can be no user pgd, and no page structure to 1970 * attach it to, so make sure we just set kernel pgd. 1971 */ 1972 xen_mc_batch(); 1973 __xen_write_cr3(true, __pa(init_top_pgt)); 1974 xen_mc_issue(PARAVIRT_LAZY_CPU); 1975 1976 /* We can't that easily rip out L3 and L2, as the Xen pagetables are 1977 * set out this way: [L4], [L1], [L2], [L3], [L1], [L1] ... for 1978 * the initial domain. For guests using the toolstack, they are in: 1979 * [L4], [L3], [L2], [L1], [L1], order .. So for dom0 we can only 1980 * rip out the [L4] (pgd), but for guests we shave off three pages. 1981 */ 1982 for (i = 0; i < ARRAY_SIZE(addr); i++) 1983 check_pt_base(&pt_base, &pt_end, addr[i]); 1984 1985 /* Our (by three pages) smaller Xen pagetable that we are using */ 1986 xen_pt_base = PFN_PHYS(pt_base); 1987 xen_pt_size = (pt_end - pt_base) * PAGE_SIZE; 1988 memblock_reserve(xen_pt_base, xen_pt_size); 1989 1990 /* Revector the xen_start_info */ 1991 xen_start_info = (struct start_info *)__va(__pa(xen_start_info)); 1992 } 1993 1994 /* 1995 * Read a value from a physical address. 1996 */ 1997 static unsigned long __init xen_read_phys_ulong(phys_addr_t addr) 1998 { 1999 unsigned long *vaddr; 2000 unsigned long val; 2001 2002 vaddr = early_memremap_ro(addr, sizeof(val)); 2003 val = *vaddr; 2004 early_memunmap(vaddr, sizeof(val)); 2005 return val; 2006 } 2007 2008 /* 2009 * Translate a virtual address to a physical one without relying on mapped 2010 * page tables. Don't rely on big pages being aligned in (guest) physical 2011 * space! 2012 */ 2013 static phys_addr_t __init xen_early_virt_to_phys(unsigned long vaddr) 2014 { 2015 phys_addr_t pa; 2016 pgd_t pgd; 2017 pud_t pud; 2018 pmd_t pmd; 2019 pte_t pte; 2020 2021 pa = read_cr3_pa(); 2022 pgd = native_make_pgd(xen_read_phys_ulong(pa + pgd_index(vaddr) * 2023 sizeof(pgd))); 2024 if (!pgd_present(pgd)) 2025 return 0; 2026 2027 pa = pgd_val(pgd) & PTE_PFN_MASK; 2028 pud = native_make_pud(xen_read_phys_ulong(pa + pud_index(vaddr) * 2029 sizeof(pud))); 2030 if (!pud_present(pud)) 2031 return 0; 2032 pa = pud_val(pud) & PTE_PFN_MASK; 2033 if (pud_large(pud)) 2034 return pa + (vaddr & ~PUD_MASK); 2035 2036 pmd = native_make_pmd(xen_read_phys_ulong(pa + pmd_index(vaddr) * 2037 sizeof(pmd))); 2038 if (!pmd_present(pmd)) 2039 return 0; 2040 pa = pmd_val(pmd) & PTE_PFN_MASK; 2041 if (pmd_large(pmd)) 2042 return pa + (vaddr & ~PMD_MASK); 2043 2044 pte = native_make_pte(xen_read_phys_ulong(pa + pte_index(vaddr) * 2045 sizeof(pte))); 2046 if (!pte_present(pte)) 2047 return 0; 2048 pa = pte_pfn(pte) << PAGE_SHIFT; 2049 2050 return pa | (vaddr & ~PAGE_MASK); 2051 } 2052 2053 /* 2054 * Find a new area for the hypervisor supplied p2m list and relocate the p2m to 2055 * this area. 2056 */ 2057 void __init xen_relocate_p2m(void) 2058 { 2059 phys_addr_t size, new_area, pt_phys, pmd_phys, pud_phys; 2060 unsigned long p2m_pfn, p2m_pfn_end, n_frames, pfn, pfn_end; 2061 int n_pte, n_pt, n_pmd, n_pud, idx_pte, idx_pt, idx_pmd, idx_pud; 2062 pte_t *pt; 2063 pmd_t *pmd; 2064 pud_t *pud; 2065 pgd_t *pgd; 2066 unsigned long *new_p2m; 2067 int save_pud; 2068 2069 size = PAGE_ALIGN(xen_start_info->nr_pages * sizeof(unsigned long)); 2070 n_pte = roundup(size, PAGE_SIZE) >> PAGE_SHIFT; 2071 n_pt = roundup(size, PMD_SIZE) >> PMD_SHIFT; 2072 n_pmd = roundup(size, PUD_SIZE) >> PUD_SHIFT; 2073 n_pud = roundup(size, P4D_SIZE) >> P4D_SHIFT; 2074 n_frames = n_pte + n_pt + n_pmd + n_pud; 2075 2076 new_area = xen_find_free_area(PFN_PHYS(n_frames)); 2077 if (!new_area) { 2078 xen_raw_console_write("Can't find new memory area for p2m needed due to E820 map conflict\n"); 2079 BUG(); 2080 } 2081 2082 /* 2083 * Setup the page tables for addressing the new p2m list. 2084 * We have asked the hypervisor to map the p2m list at the user address 2085 * PUD_SIZE. It may have done so, or it may have used a kernel space 2086 * address depending on the Xen version. 2087 * To avoid any possible virtual address collision, just use 2088 * 2 * PUD_SIZE for the new area. 2089 */ 2090 pud_phys = new_area; 2091 pmd_phys = pud_phys + PFN_PHYS(n_pud); 2092 pt_phys = pmd_phys + PFN_PHYS(n_pmd); 2093 p2m_pfn = PFN_DOWN(pt_phys) + n_pt; 2094 2095 pgd = __va(read_cr3_pa()); 2096 new_p2m = (unsigned long *)(2 * PGDIR_SIZE); 2097 save_pud = n_pud; 2098 for (idx_pud = 0; idx_pud < n_pud; idx_pud++) { 2099 pud = early_memremap(pud_phys, PAGE_SIZE); 2100 clear_page(pud); 2101 for (idx_pmd = 0; idx_pmd < min(n_pmd, PTRS_PER_PUD); 2102 idx_pmd++) { 2103 pmd = early_memremap(pmd_phys, PAGE_SIZE); 2104 clear_page(pmd); 2105 for (idx_pt = 0; idx_pt < min(n_pt, PTRS_PER_PMD); 2106 idx_pt++) { 2107 pt = early_memremap(pt_phys, PAGE_SIZE); 2108 clear_page(pt); 2109 for (idx_pte = 0; 2110 idx_pte < min(n_pte, PTRS_PER_PTE); 2111 idx_pte++) { 2112 set_pte(pt + idx_pte, 2113 pfn_pte(p2m_pfn, PAGE_KERNEL)); 2114 p2m_pfn++; 2115 } 2116 n_pte -= PTRS_PER_PTE; 2117 early_memunmap(pt, PAGE_SIZE); 2118 make_lowmem_page_readonly(__va(pt_phys)); 2119 pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, 2120 PFN_DOWN(pt_phys)); 2121 set_pmd(pmd + idx_pt, 2122 __pmd(_PAGE_TABLE | pt_phys)); 2123 pt_phys += PAGE_SIZE; 2124 } 2125 n_pt -= PTRS_PER_PMD; 2126 early_memunmap(pmd, PAGE_SIZE); 2127 make_lowmem_page_readonly(__va(pmd_phys)); 2128 pin_pagetable_pfn(MMUEXT_PIN_L2_TABLE, 2129 PFN_DOWN(pmd_phys)); 2130 set_pud(pud + idx_pmd, __pud(_PAGE_TABLE | pmd_phys)); 2131 pmd_phys += PAGE_SIZE; 2132 } 2133 n_pmd -= PTRS_PER_PUD; 2134 early_memunmap(pud, PAGE_SIZE); 2135 make_lowmem_page_readonly(__va(pud_phys)); 2136 pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, PFN_DOWN(pud_phys)); 2137 set_pgd(pgd + 2 + idx_pud, __pgd(_PAGE_TABLE | pud_phys)); 2138 pud_phys += PAGE_SIZE; 2139 } 2140 2141 /* Now copy the old p2m info to the new area. */ 2142 memcpy(new_p2m, xen_p2m_addr, size); 2143 xen_p2m_addr = new_p2m; 2144 2145 /* Release the old p2m list and set new list info. */ 2146 p2m_pfn = PFN_DOWN(xen_early_virt_to_phys(xen_start_info->mfn_list)); 2147 BUG_ON(!p2m_pfn); 2148 p2m_pfn_end = p2m_pfn + PFN_DOWN(size); 2149 2150 if (xen_start_info->mfn_list < __START_KERNEL_map) { 2151 pfn = xen_start_info->first_p2m_pfn; 2152 pfn_end = xen_start_info->first_p2m_pfn + 2153 xen_start_info->nr_p2m_frames; 2154 set_pgd(pgd + 1, __pgd(0)); 2155 } else { 2156 pfn = p2m_pfn; 2157 pfn_end = p2m_pfn_end; 2158 } 2159 2160 memblock_free(PFN_PHYS(pfn), PAGE_SIZE * (pfn_end - pfn)); 2161 while (pfn < pfn_end) { 2162 if (pfn == p2m_pfn) { 2163 pfn = p2m_pfn_end; 2164 continue; 2165 } 2166 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn))); 2167 pfn++; 2168 } 2169 2170 xen_start_info->mfn_list = (unsigned long)xen_p2m_addr; 2171 xen_start_info->first_p2m_pfn = PFN_DOWN(new_area); 2172 xen_start_info->nr_p2m_frames = n_frames; 2173 } 2174 2175 #else /* !CONFIG_X86_64 */ 2176 static RESERVE_BRK_ARRAY(pmd_t, initial_kernel_pmd, PTRS_PER_PMD); 2177 static RESERVE_BRK_ARRAY(pmd_t, swapper_kernel_pmd, PTRS_PER_PMD); 2178 2179 static void __init xen_write_cr3_init(unsigned long cr3) 2180 { 2181 unsigned long pfn = PFN_DOWN(__pa(swapper_pg_dir)); 2182 2183 BUG_ON(read_cr3_pa() != __pa(initial_page_table)); 2184 BUG_ON(cr3 != __pa(swapper_pg_dir)); 2185 2186 /* 2187 * We are switching to swapper_pg_dir for the first time (from 2188 * initial_page_table) and therefore need to mark that page 2189 * read-only and then pin it. 2190 * 2191 * Xen disallows sharing of kernel PMDs for PAE 2192 * guests. Therefore we must copy the kernel PMD from 2193 * initial_page_table into a new kernel PMD to be used in 2194 * swapper_pg_dir. 2195 */ 2196 swapper_kernel_pmd = 2197 extend_brk(sizeof(pmd_t) * PTRS_PER_PMD, PAGE_SIZE); 2198 copy_page(swapper_kernel_pmd, initial_kernel_pmd); 2199 swapper_pg_dir[KERNEL_PGD_BOUNDARY] = 2200 __pgd(__pa(swapper_kernel_pmd) | _PAGE_PRESENT); 2201 set_page_prot(swapper_kernel_pmd, PAGE_KERNEL_RO); 2202 2203 set_page_prot(swapper_pg_dir, PAGE_KERNEL_RO); 2204 xen_write_cr3(cr3); 2205 pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, pfn); 2206 2207 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, 2208 PFN_DOWN(__pa(initial_page_table))); 2209 set_page_prot(initial_page_table, PAGE_KERNEL); 2210 set_page_prot(initial_kernel_pmd, PAGE_KERNEL); 2211 2212 pv_mmu_ops.write_cr3 = &xen_write_cr3; 2213 } 2214 2215 /* 2216 * For 32 bit domains xen_start_info->pt_base is the pgd address which might be 2217 * not the first page table in the page table pool. 2218 * Iterate through the initial page tables to find the real page table base. 2219 */ 2220 static phys_addr_t __init xen_find_pt_base(pmd_t *pmd) 2221 { 2222 phys_addr_t pt_base, paddr; 2223 unsigned pmdidx; 2224 2225 pt_base = min(__pa(xen_start_info->pt_base), __pa(pmd)); 2226 2227 for (pmdidx = 0; pmdidx < PTRS_PER_PMD; pmdidx++) 2228 if (pmd_present(pmd[pmdidx]) && !pmd_large(pmd[pmdidx])) { 2229 paddr = m2p(pmd[pmdidx].pmd); 2230 pt_base = min(pt_base, paddr); 2231 } 2232 2233 return pt_base; 2234 } 2235 2236 void __init xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pfn) 2237 { 2238 pmd_t *kernel_pmd; 2239 2240 kernel_pmd = m2v(pgd[KERNEL_PGD_BOUNDARY].pgd); 2241 2242 xen_pt_base = xen_find_pt_base(kernel_pmd); 2243 xen_pt_size = xen_start_info->nr_pt_frames * PAGE_SIZE; 2244 2245 initial_kernel_pmd = 2246 extend_brk(sizeof(pmd_t) * PTRS_PER_PMD, PAGE_SIZE); 2247 2248 max_pfn_mapped = PFN_DOWN(xen_pt_base + xen_pt_size + 512 * 1024); 2249 2250 copy_page(initial_kernel_pmd, kernel_pmd); 2251 2252 xen_map_identity_early(initial_kernel_pmd, max_pfn); 2253 2254 copy_page(initial_page_table, pgd); 2255 initial_page_table[KERNEL_PGD_BOUNDARY] = 2256 __pgd(__pa(initial_kernel_pmd) | _PAGE_PRESENT); 2257 2258 set_page_prot(initial_kernel_pmd, PAGE_KERNEL_RO); 2259 set_page_prot(initial_page_table, PAGE_KERNEL_RO); 2260 set_page_prot(empty_zero_page, PAGE_KERNEL_RO); 2261 2262 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd))); 2263 2264 pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, 2265 PFN_DOWN(__pa(initial_page_table))); 2266 xen_write_cr3(__pa(initial_page_table)); 2267 2268 memblock_reserve(xen_pt_base, xen_pt_size); 2269 } 2270 #endif /* CONFIG_X86_64 */ 2271 2272 void __init xen_reserve_special_pages(void) 2273 { 2274 phys_addr_t paddr; 2275 2276 memblock_reserve(__pa(xen_start_info), PAGE_SIZE); 2277 if (xen_start_info->store_mfn) { 2278 paddr = PFN_PHYS(mfn_to_pfn(xen_start_info->store_mfn)); 2279 memblock_reserve(paddr, PAGE_SIZE); 2280 } 2281 if (!xen_initial_domain()) { 2282 paddr = PFN_PHYS(mfn_to_pfn(xen_start_info->console.domU.mfn)); 2283 memblock_reserve(paddr, PAGE_SIZE); 2284 } 2285 } 2286 2287 void __init xen_pt_check_e820(void) 2288 { 2289 if (xen_is_e820_reserved(xen_pt_base, xen_pt_size)) { 2290 xen_raw_console_write("Xen hypervisor allocated page table memory conflicts with E820 map\n"); 2291 BUG(); 2292 } 2293 } 2294 2295 static unsigned char dummy_mapping[PAGE_SIZE] __page_aligned_bss; 2296 2297 static void xen_set_fixmap(unsigned idx, phys_addr_t phys, pgprot_t prot) 2298 { 2299 pte_t pte; 2300 2301 phys >>= PAGE_SHIFT; 2302 2303 switch (idx) { 2304 case FIX_BTMAP_END ... FIX_BTMAP_BEGIN: 2305 #ifdef CONFIG_X86_32 2306 case FIX_WP_TEST: 2307 # ifdef CONFIG_HIGHMEM 2308 case FIX_KMAP_BEGIN ... FIX_KMAP_END: 2309 # endif 2310 #elif defined(CONFIG_X86_VSYSCALL_EMULATION) 2311 case VSYSCALL_PAGE: 2312 #endif 2313 case FIX_TEXT_POKE0: 2314 case FIX_TEXT_POKE1: 2315 /* All local page mappings */ 2316 pte = pfn_pte(phys, prot); 2317 break; 2318 2319 #ifdef CONFIG_X86_LOCAL_APIC 2320 case FIX_APIC_BASE: /* maps dummy local APIC */ 2321 pte = pfn_pte(PFN_DOWN(__pa(dummy_mapping)), PAGE_KERNEL); 2322 break; 2323 #endif 2324 2325 #ifdef CONFIG_X86_IO_APIC 2326 case FIX_IO_APIC_BASE_0 ... FIX_IO_APIC_BASE_END: 2327 /* 2328 * We just don't map the IO APIC - all access is via 2329 * hypercalls. Keep the address in the pte for reference. 2330 */ 2331 pte = pfn_pte(PFN_DOWN(__pa(dummy_mapping)), PAGE_KERNEL); 2332 break; 2333 #endif 2334 2335 case FIX_PARAVIRT_BOOTMAP: 2336 /* This is an MFN, but it isn't an IO mapping from the 2337 IO domain */ 2338 pte = mfn_pte(phys, prot); 2339 break; 2340 2341 default: 2342 /* By default, set_fixmap is used for hardware mappings */ 2343 pte = mfn_pte(phys, prot); 2344 break; 2345 } 2346 2347 __native_set_fixmap(idx, pte); 2348 2349 #ifdef CONFIG_X86_VSYSCALL_EMULATION 2350 /* Replicate changes to map the vsyscall page into the user 2351 pagetable vsyscall mapping. */ 2352 if (idx == VSYSCALL_PAGE) { 2353 unsigned long vaddr = __fix_to_virt(idx); 2354 set_pte_vaddr_pud(level3_user_vsyscall, vaddr, pte); 2355 } 2356 #endif 2357 } 2358 2359 static void __init xen_post_allocator_init(void) 2360 { 2361 pv_mmu_ops.set_pte = xen_set_pte; 2362 pv_mmu_ops.set_pmd = xen_set_pmd; 2363 pv_mmu_ops.set_pud = xen_set_pud; 2364 #ifdef CONFIG_X86_64 2365 pv_mmu_ops.set_p4d = xen_set_p4d; 2366 #endif 2367 2368 /* This will work as long as patching hasn't happened yet 2369 (which it hasn't) */ 2370 pv_mmu_ops.alloc_pte = xen_alloc_pte; 2371 pv_mmu_ops.alloc_pmd = xen_alloc_pmd; 2372 pv_mmu_ops.release_pte = xen_release_pte; 2373 pv_mmu_ops.release_pmd = xen_release_pmd; 2374 #ifdef CONFIG_X86_64 2375 pv_mmu_ops.alloc_pud = xen_alloc_pud; 2376 pv_mmu_ops.release_pud = xen_release_pud; 2377 #endif 2378 pv_mmu_ops.make_pte = PV_CALLEE_SAVE(xen_make_pte); 2379 2380 #ifdef CONFIG_X86_64 2381 pv_mmu_ops.write_cr3 = &xen_write_cr3; 2382 #endif 2383 } 2384 2385 static void xen_leave_lazy_mmu(void) 2386 { 2387 preempt_disable(); 2388 xen_mc_flush(); 2389 paravirt_leave_lazy_mmu(); 2390 preempt_enable(); 2391 } 2392 2393 static const struct pv_mmu_ops xen_mmu_ops __initconst = { 2394 .read_cr2 = xen_read_cr2, 2395 .write_cr2 = xen_write_cr2, 2396 2397 .read_cr3 = xen_read_cr3, 2398 .write_cr3 = xen_write_cr3_init, 2399 2400 .flush_tlb_user = xen_flush_tlb, 2401 .flush_tlb_kernel = xen_flush_tlb, 2402 .flush_tlb_one_user = xen_flush_tlb_one_user, 2403 .flush_tlb_others = xen_flush_tlb_others, 2404 2405 .pgd_alloc = xen_pgd_alloc, 2406 .pgd_free = xen_pgd_free, 2407 2408 .alloc_pte = xen_alloc_pte_init, 2409 .release_pte = xen_release_pte_init, 2410 .alloc_pmd = xen_alloc_pmd_init, 2411 .release_pmd = xen_release_pmd_init, 2412 2413 .set_pte = xen_set_pte_init, 2414 .set_pte_at = xen_set_pte_at, 2415 .set_pmd = xen_set_pmd_hyper, 2416 2417 .ptep_modify_prot_start = __ptep_modify_prot_start, 2418 .ptep_modify_prot_commit = __ptep_modify_prot_commit, 2419 2420 .pte_val = PV_CALLEE_SAVE(xen_pte_val), 2421 .pgd_val = PV_CALLEE_SAVE(xen_pgd_val), 2422 2423 .make_pte = PV_CALLEE_SAVE(xen_make_pte_init), 2424 .make_pgd = PV_CALLEE_SAVE(xen_make_pgd), 2425 2426 #ifdef CONFIG_X86_PAE 2427 .set_pte_atomic = xen_set_pte_atomic, 2428 .pte_clear = xen_pte_clear, 2429 .pmd_clear = xen_pmd_clear, 2430 #endif /* CONFIG_X86_PAE */ 2431 .set_pud = xen_set_pud_hyper, 2432 2433 .make_pmd = PV_CALLEE_SAVE(xen_make_pmd), 2434 .pmd_val = PV_CALLEE_SAVE(xen_pmd_val), 2435 2436 #ifdef CONFIG_X86_64 2437 .pud_val = PV_CALLEE_SAVE(xen_pud_val), 2438 .make_pud = PV_CALLEE_SAVE(xen_make_pud), 2439 .set_p4d = xen_set_p4d_hyper, 2440 2441 .alloc_pud = xen_alloc_pmd_init, 2442 .release_pud = xen_release_pmd_init, 2443 2444 #if CONFIG_PGTABLE_LEVELS >= 5 2445 .p4d_val = PV_CALLEE_SAVE(xen_p4d_val), 2446 .make_p4d = PV_CALLEE_SAVE(xen_make_p4d), 2447 #endif 2448 #endif /* CONFIG_X86_64 */ 2449 2450 .activate_mm = xen_activate_mm, 2451 .dup_mmap = xen_dup_mmap, 2452 .exit_mmap = xen_exit_mmap, 2453 2454 .lazy_mode = { 2455 .enter = paravirt_enter_lazy_mmu, 2456 .leave = xen_leave_lazy_mmu, 2457 .flush = paravirt_flush_lazy_mmu, 2458 }, 2459 2460 .set_fixmap = xen_set_fixmap, 2461 }; 2462 2463 void __init xen_init_mmu_ops(void) 2464 { 2465 x86_init.paging.pagetable_init = xen_pagetable_init; 2466 x86_init.hyper.init_after_bootmem = xen_after_bootmem; 2467 2468 pv_mmu_ops = xen_mmu_ops; 2469 2470 memset(dummy_mapping, 0xff, PAGE_SIZE); 2471 } 2472 2473 /* Protected by xen_reservation_lock. */ 2474 #define MAX_CONTIG_ORDER 9 /* 2MB */ 2475 static unsigned long discontig_frames[1<<MAX_CONTIG_ORDER]; 2476 2477 #define VOID_PTE (mfn_pte(0, __pgprot(0))) 2478 static void xen_zap_pfn_range(unsigned long vaddr, unsigned int order, 2479 unsigned long *in_frames, 2480 unsigned long *out_frames) 2481 { 2482 int i; 2483 struct multicall_space mcs; 2484 2485 xen_mc_batch(); 2486 for (i = 0; i < (1UL<<order); i++, vaddr += PAGE_SIZE) { 2487 mcs = __xen_mc_entry(0); 2488 2489 if (in_frames) 2490 in_frames[i] = virt_to_mfn(vaddr); 2491 2492 MULTI_update_va_mapping(mcs.mc, vaddr, VOID_PTE, 0); 2493 __set_phys_to_machine(virt_to_pfn(vaddr), INVALID_P2M_ENTRY); 2494 2495 if (out_frames) 2496 out_frames[i] = virt_to_pfn(vaddr); 2497 } 2498 xen_mc_issue(0); 2499 } 2500 2501 /* 2502 * Update the pfn-to-mfn mappings for a virtual address range, either to 2503 * point to an array of mfns, or contiguously from a single starting 2504 * mfn. 2505 */ 2506 static void xen_remap_exchanged_ptes(unsigned long vaddr, int order, 2507 unsigned long *mfns, 2508 unsigned long first_mfn) 2509 { 2510 unsigned i, limit; 2511 unsigned long mfn; 2512 2513 xen_mc_batch(); 2514 2515 limit = 1u << order; 2516 for (i = 0; i < limit; i++, vaddr += PAGE_SIZE) { 2517 struct multicall_space mcs; 2518 unsigned flags; 2519 2520 mcs = __xen_mc_entry(0); 2521 if (mfns) 2522 mfn = mfns[i]; 2523 else 2524 mfn = first_mfn + i; 2525 2526 if (i < (limit - 1)) 2527 flags = 0; 2528 else { 2529 if (order == 0) 2530 flags = UVMF_INVLPG | UVMF_ALL; 2531 else 2532 flags = UVMF_TLB_FLUSH | UVMF_ALL; 2533 } 2534 2535 MULTI_update_va_mapping(mcs.mc, vaddr, 2536 mfn_pte(mfn, PAGE_KERNEL), flags); 2537 2538 set_phys_to_machine(virt_to_pfn(vaddr), mfn); 2539 } 2540 2541 xen_mc_issue(0); 2542 } 2543 2544 /* 2545 * Perform the hypercall to exchange a region of our pfns to point to 2546 * memory with the required contiguous alignment. Takes the pfns as 2547 * input, and populates mfns as output. 2548 * 2549 * Returns a success code indicating whether the hypervisor was able to 2550 * satisfy the request or not. 2551 */ 2552 static int xen_exchange_memory(unsigned long extents_in, unsigned int order_in, 2553 unsigned long *pfns_in, 2554 unsigned long extents_out, 2555 unsigned int order_out, 2556 unsigned long *mfns_out, 2557 unsigned int address_bits) 2558 { 2559 long rc; 2560 int success; 2561 2562 struct xen_memory_exchange exchange = { 2563 .in = { 2564 .nr_extents = extents_in, 2565 .extent_order = order_in, 2566 .extent_start = pfns_in, 2567 .domid = DOMID_SELF 2568 }, 2569 .out = { 2570 .nr_extents = extents_out, 2571 .extent_order = order_out, 2572 .extent_start = mfns_out, 2573 .address_bits = address_bits, 2574 .domid = DOMID_SELF 2575 } 2576 }; 2577 2578 BUG_ON(extents_in << order_in != extents_out << order_out); 2579 2580 rc = HYPERVISOR_memory_op(XENMEM_exchange, &exchange); 2581 success = (exchange.nr_exchanged == extents_in); 2582 2583 BUG_ON(!success && ((exchange.nr_exchanged != 0) || (rc == 0))); 2584 BUG_ON(success && (rc != 0)); 2585 2586 return success; 2587 } 2588 2589 int xen_create_contiguous_region(phys_addr_t pstart, unsigned int order, 2590 unsigned int address_bits, 2591 dma_addr_t *dma_handle) 2592 { 2593 unsigned long *in_frames = discontig_frames, out_frame; 2594 unsigned long flags; 2595 int success; 2596 unsigned long vstart = (unsigned long)phys_to_virt(pstart); 2597 2598 /* 2599 * Currently an auto-translated guest will not perform I/O, nor will 2600 * it require PAE page directories below 4GB. Therefore any calls to 2601 * this function are redundant and can be ignored. 2602 */ 2603 2604 if (unlikely(order > MAX_CONTIG_ORDER)) 2605 return -ENOMEM; 2606 2607 memset((void *) vstart, 0, PAGE_SIZE << order); 2608 2609 spin_lock_irqsave(&xen_reservation_lock, flags); 2610 2611 /* 1. Zap current PTEs, remembering MFNs. */ 2612 xen_zap_pfn_range(vstart, order, in_frames, NULL); 2613 2614 /* 2. Get a new contiguous memory extent. */ 2615 out_frame = virt_to_pfn(vstart); 2616 success = xen_exchange_memory(1UL << order, 0, in_frames, 2617 1, order, &out_frame, 2618 address_bits); 2619 2620 /* 3. Map the new extent in place of old pages. */ 2621 if (success) 2622 xen_remap_exchanged_ptes(vstart, order, NULL, out_frame); 2623 else 2624 xen_remap_exchanged_ptes(vstart, order, in_frames, 0); 2625 2626 spin_unlock_irqrestore(&xen_reservation_lock, flags); 2627 2628 *dma_handle = virt_to_machine(vstart).maddr; 2629 return success ? 0 : -ENOMEM; 2630 } 2631 EXPORT_SYMBOL_GPL(xen_create_contiguous_region); 2632 2633 void xen_destroy_contiguous_region(phys_addr_t pstart, unsigned int order) 2634 { 2635 unsigned long *out_frames = discontig_frames, in_frame; 2636 unsigned long flags; 2637 int success; 2638 unsigned long vstart; 2639 2640 if (unlikely(order > MAX_CONTIG_ORDER)) 2641 return; 2642 2643 vstart = (unsigned long)phys_to_virt(pstart); 2644 memset((void *) vstart, 0, PAGE_SIZE << order); 2645 2646 spin_lock_irqsave(&xen_reservation_lock, flags); 2647 2648 /* 1. Find start MFN of contiguous extent. */ 2649 in_frame = virt_to_mfn(vstart); 2650 2651 /* 2. Zap current PTEs. */ 2652 xen_zap_pfn_range(vstart, order, NULL, out_frames); 2653 2654 /* 3. Do the exchange for non-contiguous MFNs. */ 2655 success = xen_exchange_memory(1, order, &in_frame, 1UL << order, 2656 0, out_frames, 0); 2657 2658 /* 4. Map new pages in place of old pages. */ 2659 if (success) 2660 xen_remap_exchanged_ptes(vstart, order, out_frames, 0); 2661 else 2662 xen_remap_exchanged_ptes(vstart, order, NULL, in_frame); 2663 2664 spin_unlock_irqrestore(&xen_reservation_lock, flags); 2665 } 2666 EXPORT_SYMBOL_GPL(xen_destroy_contiguous_region); 2667 2668 #ifdef CONFIG_KEXEC_CORE 2669 phys_addr_t paddr_vmcoreinfo_note(void) 2670 { 2671 if (xen_pv_domain()) 2672 return virt_to_machine(vmcoreinfo_note).maddr; 2673 else 2674 return __pa(vmcoreinfo_note); 2675 } 2676 #endif /* CONFIG_KEXEC_CORE */ 2677