1 // SPDX-License-Identifier: GPL-2.0 2 3 /* 4 * Xen mmu operations 5 * 6 * This file contains the various mmu fetch and update operations. 7 * The most important job they must perform is the mapping between the 8 * domain's pfn and the overall machine mfns. 9 * 10 * Xen allows guests to directly update the pagetable, in a controlled 11 * fashion. In other words, the guest modifies the same pagetable 12 * that the CPU actually uses, which eliminates the overhead of having 13 * a separate shadow pagetable. 14 * 15 * In order to allow this, it falls on the guest domain to map its 16 * notion of a "physical" pfn - which is just a domain-local linear 17 * address - into a real "machine address" which the CPU's MMU can 18 * use. 19 * 20 * A pgd_t/pmd_t/pte_t will typically contain an mfn, and so can be 21 * inserted directly into the pagetable. When creating a new 22 * pte/pmd/pgd, it converts the passed pfn into an mfn. Conversely, 23 * when reading the content back with __(pgd|pmd|pte)_val, it converts 24 * the mfn back into a pfn. 25 * 26 * The other constraint is that all pages which make up a pagetable 27 * must be mapped read-only in the guest. This prevents uncontrolled 28 * guest updates to the pagetable. Xen strictly enforces this, and 29 * will disallow any pagetable update which will end up mapping a 30 * pagetable page RW, and will disallow using any writable page as a 31 * pagetable. 32 * 33 * Naively, when loading %cr3 with the base of a new pagetable, Xen 34 * would need to validate the whole pagetable before going on. 35 * Naturally, this is quite slow. The solution is to "pin" a 36 * pagetable, which enforces all the constraints on the pagetable even 37 * when it is not actively in use. This menas that Xen can be assured 38 * that it is still valid when you do load it into %cr3, and doesn't 39 * need to revalidate it. 40 * 41 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007 42 */ 43 #include <linux/sched/mm.h> 44 #include <linux/highmem.h> 45 #include <linux/debugfs.h> 46 #include <linux/bug.h> 47 #include <linux/vmalloc.h> 48 #include <linux/export.h> 49 #include <linux/init.h> 50 #include <linux/gfp.h> 51 #include <linux/memblock.h> 52 #include <linux/seq_file.h> 53 #include <linux/crash_dump.h> 54 #include <linux/pgtable.h> 55 #ifdef CONFIG_KEXEC_CORE 56 #include <linux/kexec.h> 57 #endif 58 59 #include <trace/events/xen.h> 60 61 #include <asm/tlbflush.h> 62 #include <asm/fixmap.h> 63 #include <asm/mmu_context.h> 64 #include <asm/setup.h> 65 #include <asm/paravirt.h> 66 #include <asm/e820/api.h> 67 #include <asm/linkage.h> 68 #include <asm/page.h> 69 #include <asm/init.h> 70 #include <asm/memtype.h> 71 #include <asm/smp.h> 72 #include <asm/tlb.h> 73 74 #include <asm/xen/hypercall.h> 75 #include <asm/xen/hypervisor.h> 76 77 #include <xen/xen.h> 78 #include <xen/page.h> 79 #include <xen/interface/xen.h> 80 #include <xen/interface/hvm/hvm_op.h> 81 #include <xen/interface/version.h> 82 #include <xen/interface/memory.h> 83 #include <xen/hvc-console.h> 84 85 #include "multicalls.h" 86 #include "mmu.h" 87 #include "debugfs.h" 88 89 /* l3 pud for userspace vsyscall mapping */ 90 static pud_t level3_user_vsyscall[PTRS_PER_PUD] __page_aligned_bss; 91 92 /* 93 * Protects atomic reservation decrease/increase against concurrent increases. 94 * Also protects non-atomic updates of current_pages and balloon lists. 95 */ 96 static DEFINE_SPINLOCK(xen_reservation_lock); 97 98 /* 99 * Note about cr3 (pagetable base) values: 100 * 101 * xen_cr3 contains the current logical cr3 value; it contains the 102 * last set cr3. This may not be the current effective cr3, because 103 * its update may be being lazily deferred. However, a vcpu looking 104 * at its own cr3 can use this value knowing that it everything will 105 * be self-consistent. 106 * 107 * xen_current_cr3 contains the actual vcpu cr3; it is set once the 108 * hypercall to set the vcpu cr3 is complete (so it may be a little 109 * out of date, but it will never be set early). If one vcpu is 110 * looking at another vcpu's cr3 value, it should use this variable. 111 */ 112 DEFINE_PER_CPU(unsigned long, xen_cr3); /* cr3 stored as physaddr */ 113 DEFINE_PER_CPU(unsigned long, xen_current_cr3); /* actual vcpu cr3 */ 114 115 static phys_addr_t xen_pt_base, xen_pt_size __initdata; 116 117 static DEFINE_STATIC_KEY_FALSE(xen_struct_pages_ready); 118 119 /* 120 * Just beyond the highest usermode address. STACK_TOP_MAX has a 121 * redzone above it, so round it up to a PGD boundary. 122 */ 123 #define USER_LIMIT ((STACK_TOP_MAX + PGDIR_SIZE - 1) & PGDIR_MASK) 124 125 void make_lowmem_page_readonly(void *vaddr) 126 { 127 pte_t *pte, ptev; 128 unsigned long address = (unsigned long)vaddr; 129 unsigned int level; 130 131 pte = lookup_address(address, &level); 132 if (pte == NULL) 133 return; /* vaddr missing */ 134 135 ptev = pte_wrprotect(*pte); 136 137 if (HYPERVISOR_update_va_mapping(address, ptev, 0)) 138 BUG(); 139 } 140 141 void make_lowmem_page_readwrite(void *vaddr) 142 { 143 pte_t *pte, ptev; 144 unsigned long address = (unsigned long)vaddr; 145 unsigned int level; 146 147 pte = lookup_address(address, &level); 148 if (pte == NULL) 149 return; /* vaddr missing */ 150 151 ptev = pte_mkwrite(*pte); 152 153 if (HYPERVISOR_update_va_mapping(address, ptev, 0)) 154 BUG(); 155 } 156 157 158 /* 159 * During early boot all page table pages are pinned, but we do not have struct 160 * pages, so return true until struct pages are ready. 161 */ 162 static bool xen_page_pinned(void *ptr) 163 { 164 if (static_branch_likely(&xen_struct_pages_ready)) { 165 struct page *page = virt_to_page(ptr); 166 167 return PagePinned(page); 168 } 169 return true; 170 } 171 172 static void xen_extend_mmu_update(const struct mmu_update *update) 173 { 174 struct multicall_space mcs; 175 struct mmu_update *u; 176 177 mcs = xen_mc_extend_args(__HYPERVISOR_mmu_update, sizeof(*u)); 178 179 if (mcs.mc != NULL) { 180 mcs.mc->args[1]++; 181 } else { 182 mcs = __xen_mc_entry(sizeof(*u)); 183 MULTI_mmu_update(mcs.mc, mcs.args, 1, NULL, DOMID_SELF); 184 } 185 186 u = mcs.args; 187 *u = *update; 188 } 189 190 static void xen_extend_mmuext_op(const struct mmuext_op *op) 191 { 192 struct multicall_space mcs; 193 struct mmuext_op *u; 194 195 mcs = xen_mc_extend_args(__HYPERVISOR_mmuext_op, sizeof(*u)); 196 197 if (mcs.mc != NULL) { 198 mcs.mc->args[1]++; 199 } else { 200 mcs = __xen_mc_entry(sizeof(*u)); 201 MULTI_mmuext_op(mcs.mc, mcs.args, 1, NULL, DOMID_SELF); 202 } 203 204 u = mcs.args; 205 *u = *op; 206 } 207 208 static void xen_set_pmd_hyper(pmd_t *ptr, pmd_t val) 209 { 210 struct mmu_update u; 211 212 preempt_disable(); 213 214 xen_mc_batch(); 215 216 /* ptr may be ioremapped for 64-bit pagetable setup */ 217 u.ptr = arbitrary_virt_to_machine(ptr).maddr; 218 u.val = pmd_val_ma(val); 219 xen_extend_mmu_update(&u); 220 221 xen_mc_issue(PARAVIRT_LAZY_MMU); 222 223 preempt_enable(); 224 } 225 226 static void xen_set_pmd(pmd_t *ptr, pmd_t val) 227 { 228 trace_xen_mmu_set_pmd(ptr, val); 229 230 /* If page is not pinned, we can just update the entry 231 directly */ 232 if (!xen_page_pinned(ptr)) { 233 *ptr = val; 234 return; 235 } 236 237 xen_set_pmd_hyper(ptr, val); 238 } 239 240 /* 241 * Associate a virtual page frame with a given physical page frame 242 * and protection flags for that frame. 243 */ 244 void set_pte_mfn(unsigned long vaddr, unsigned long mfn, pgprot_t flags) 245 { 246 set_pte_vaddr(vaddr, mfn_pte(mfn, flags)); 247 } 248 249 static bool xen_batched_set_pte(pte_t *ptep, pte_t pteval) 250 { 251 struct mmu_update u; 252 253 if (paravirt_get_lazy_mode() != PARAVIRT_LAZY_MMU) 254 return false; 255 256 xen_mc_batch(); 257 258 u.ptr = virt_to_machine(ptep).maddr | MMU_NORMAL_PT_UPDATE; 259 u.val = pte_val_ma(pteval); 260 xen_extend_mmu_update(&u); 261 262 xen_mc_issue(PARAVIRT_LAZY_MMU); 263 264 return true; 265 } 266 267 static inline void __xen_set_pte(pte_t *ptep, pte_t pteval) 268 { 269 if (!xen_batched_set_pte(ptep, pteval)) { 270 /* 271 * Could call native_set_pte() here and trap and 272 * emulate the PTE write, but a hypercall is much cheaper. 273 */ 274 struct mmu_update u; 275 276 u.ptr = virt_to_machine(ptep).maddr | MMU_NORMAL_PT_UPDATE; 277 u.val = pte_val_ma(pteval); 278 HYPERVISOR_mmu_update(&u, 1, NULL, DOMID_SELF); 279 } 280 } 281 282 static void xen_set_pte(pte_t *ptep, pte_t pteval) 283 { 284 trace_xen_mmu_set_pte(ptep, pteval); 285 __xen_set_pte(ptep, pteval); 286 } 287 288 static void xen_set_pte_at(struct mm_struct *mm, unsigned long addr, 289 pte_t *ptep, pte_t pteval) 290 { 291 trace_xen_mmu_set_pte_at(mm, addr, ptep, pteval); 292 __xen_set_pte(ptep, pteval); 293 } 294 295 pte_t xen_ptep_modify_prot_start(struct vm_area_struct *vma, 296 unsigned long addr, pte_t *ptep) 297 { 298 /* Just return the pte as-is. We preserve the bits on commit */ 299 trace_xen_mmu_ptep_modify_prot_start(vma->vm_mm, addr, ptep, *ptep); 300 return *ptep; 301 } 302 303 void xen_ptep_modify_prot_commit(struct vm_area_struct *vma, unsigned long addr, 304 pte_t *ptep, pte_t pte) 305 { 306 struct mmu_update u; 307 308 trace_xen_mmu_ptep_modify_prot_commit(vma->vm_mm, addr, ptep, pte); 309 xen_mc_batch(); 310 311 u.ptr = virt_to_machine(ptep).maddr | MMU_PT_UPDATE_PRESERVE_AD; 312 u.val = pte_val_ma(pte); 313 xen_extend_mmu_update(&u); 314 315 xen_mc_issue(PARAVIRT_LAZY_MMU); 316 } 317 318 /* Assume pteval_t is equivalent to all the other *val_t types. */ 319 static pteval_t pte_mfn_to_pfn(pteval_t val) 320 { 321 if (val & _PAGE_PRESENT) { 322 unsigned long mfn = (val & XEN_PTE_MFN_MASK) >> PAGE_SHIFT; 323 unsigned long pfn = mfn_to_pfn(mfn); 324 325 pteval_t flags = val & PTE_FLAGS_MASK; 326 if (unlikely(pfn == ~0)) 327 val = flags & ~_PAGE_PRESENT; 328 else 329 val = ((pteval_t)pfn << PAGE_SHIFT) | flags; 330 } 331 332 return val; 333 } 334 335 static pteval_t pte_pfn_to_mfn(pteval_t val) 336 { 337 if (val & _PAGE_PRESENT) { 338 unsigned long pfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT; 339 pteval_t flags = val & PTE_FLAGS_MASK; 340 unsigned long mfn; 341 342 mfn = __pfn_to_mfn(pfn); 343 344 /* 345 * If there's no mfn for the pfn, then just create an 346 * empty non-present pte. Unfortunately this loses 347 * information about the original pfn, so 348 * pte_mfn_to_pfn is asymmetric. 349 */ 350 if (unlikely(mfn == INVALID_P2M_ENTRY)) { 351 mfn = 0; 352 flags = 0; 353 } else 354 mfn &= ~(FOREIGN_FRAME_BIT | IDENTITY_FRAME_BIT); 355 val = ((pteval_t)mfn << PAGE_SHIFT) | flags; 356 } 357 358 return val; 359 } 360 361 __visible pteval_t xen_pte_val(pte_t pte) 362 { 363 pteval_t pteval = pte.pte; 364 365 return pte_mfn_to_pfn(pteval); 366 } 367 PV_CALLEE_SAVE_REGS_THUNK(xen_pte_val); 368 369 __visible pgdval_t xen_pgd_val(pgd_t pgd) 370 { 371 return pte_mfn_to_pfn(pgd.pgd); 372 } 373 PV_CALLEE_SAVE_REGS_THUNK(xen_pgd_val); 374 375 __visible pte_t xen_make_pte(pteval_t pte) 376 { 377 pte = pte_pfn_to_mfn(pte); 378 379 return native_make_pte(pte); 380 } 381 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte); 382 383 __visible pgd_t xen_make_pgd(pgdval_t pgd) 384 { 385 pgd = pte_pfn_to_mfn(pgd); 386 return native_make_pgd(pgd); 387 } 388 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pgd); 389 390 __visible pmdval_t xen_pmd_val(pmd_t pmd) 391 { 392 return pte_mfn_to_pfn(pmd.pmd); 393 } 394 PV_CALLEE_SAVE_REGS_THUNK(xen_pmd_val); 395 396 static void xen_set_pud_hyper(pud_t *ptr, pud_t val) 397 { 398 struct mmu_update u; 399 400 preempt_disable(); 401 402 xen_mc_batch(); 403 404 /* ptr may be ioremapped for 64-bit pagetable setup */ 405 u.ptr = arbitrary_virt_to_machine(ptr).maddr; 406 u.val = pud_val_ma(val); 407 xen_extend_mmu_update(&u); 408 409 xen_mc_issue(PARAVIRT_LAZY_MMU); 410 411 preempt_enable(); 412 } 413 414 static void xen_set_pud(pud_t *ptr, pud_t val) 415 { 416 trace_xen_mmu_set_pud(ptr, val); 417 418 /* If page is not pinned, we can just update the entry 419 directly */ 420 if (!xen_page_pinned(ptr)) { 421 *ptr = val; 422 return; 423 } 424 425 xen_set_pud_hyper(ptr, val); 426 } 427 428 __visible pmd_t xen_make_pmd(pmdval_t pmd) 429 { 430 pmd = pte_pfn_to_mfn(pmd); 431 return native_make_pmd(pmd); 432 } 433 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pmd); 434 435 __visible pudval_t xen_pud_val(pud_t pud) 436 { 437 return pte_mfn_to_pfn(pud.pud); 438 } 439 PV_CALLEE_SAVE_REGS_THUNK(xen_pud_val); 440 441 __visible pud_t xen_make_pud(pudval_t pud) 442 { 443 pud = pte_pfn_to_mfn(pud); 444 445 return native_make_pud(pud); 446 } 447 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pud); 448 449 static pgd_t *xen_get_user_pgd(pgd_t *pgd) 450 { 451 pgd_t *pgd_page = (pgd_t *)(((unsigned long)pgd) & PAGE_MASK); 452 unsigned offset = pgd - pgd_page; 453 pgd_t *user_ptr = NULL; 454 455 if (offset < pgd_index(USER_LIMIT)) { 456 struct page *page = virt_to_page(pgd_page); 457 user_ptr = (pgd_t *)page->private; 458 if (user_ptr) 459 user_ptr += offset; 460 } 461 462 return user_ptr; 463 } 464 465 static void __xen_set_p4d_hyper(p4d_t *ptr, p4d_t val) 466 { 467 struct mmu_update u; 468 469 u.ptr = virt_to_machine(ptr).maddr; 470 u.val = p4d_val_ma(val); 471 xen_extend_mmu_update(&u); 472 } 473 474 /* 475 * Raw hypercall-based set_p4d, intended for in early boot before 476 * there's a page structure. This implies: 477 * 1. The only existing pagetable is the kernel's 478 * 2. It is always pinned 479 * 3. It has no user pagetable attached to it 480 */ 481 static void __init xen_set_p4d_hyper(p4d_t *ptr, p4d_t val) 482 { 483 preempt_disable(); 484 485 xen_mc_batch(); 486 487 __xen_set_p4d_hyper(ptr, val); 488 489 xen_mc_issue(PARAVIRT_LAZY_MMU); 490 491 preempt_enable(); 492 } 493 494 static void xen_set_p4d(p4d_t *ptr, p4d_t val) 495 { 496 pgd_t *user_ptr = xen_get_user_pgd((pgd_t *)ptr); 497 pgd_t pgd_val; 498 499 trace_xen_mmu_set_p4d(ptr, (p4d_t *)user_ptr, val); 500 501 /* If page is not pinned, we can just update the entry 502 directly */ 503 if (!xen_page_pinned(ptr)) { 504 *ptr = val; 505 if (user_ptr) { 506 WARN_ON(xen_page_pinned(user_ptr)); 507 pgd_val.pgd = p4d_val_ma(val); 508 *user_ptr = pgd_val; 509 } 510 return; 511 } 512 513 /* If it's pinned, then we can at least batch the kernel and 514 user updates together. */ 515 xen_mc_batch(); 516 517 __xen_set_p4d_hyper(ptr, val); 518 if (user_ptr) 519 __xen_set_p4d_hyper((p4d_t *)user_ptr, val); 520 521 xen_mc_issue(PARAVIRT_LAZY_MMU); 522 } 523 524 #if CONFIG_PGTABLE_LEVELS >= 5 525 __visible p4dval_t xen_p4d_val(p4d_t p4d) 526 { 527 return pte_mfn_to_pfn(p4d.p4d); 528 } 529 PV_CALLEE_SAVE_REGS_THUNK(xen_p4d_val); 530 531 __visible p4d_t xen_make_p4d(p4dval_t p4d) 532 { 533 p4d = pte_pfn_to_mfn(p4d); 534 535 return native_make_p4d(p4d); 536 } 537 PV_CALLEE_SAVE_REGS_THUNK(xen_make_p4d); 538 #endif /* CONFIG_PGTABLE_LEVELS >= 5 */ 539 540 static void xen_pmd_walk(struct mm_struct *mm, pmd_t *pmd, 541 void (*func)(struct mm_struct *mm, struct page *, 542 enum pt_level), 543 bool last, unsigned long limit) 544 { 545 int i, nr; 546 547 nr = last ? pmd_index(limit) + 1 : PTRS_PER_PMD; 548 for (i = 0; i < nr; i++) { 549 if (!pmd_none(pmd[i])) 550 (*func)(mm, pmd_page(pmd[i]), PT_PTE); 551 } 552 } 553 554 static void xen_pud_walk(struct mm_struct *mm, pud_t *pud, 555 void (*func)(struct mm_struct *mm, struct page *, 556 enum pt_level), 557 bool last, unsigned long limit) 558 { 559 int i, nr; 560 561 nr = last ? pud_index(limit) + 1 : PTRS_PER_PUD; 562 for (i = 0; i < nr; i++) { 563 pmd_t *pmd; 564 565 if (pud_none(pud[i])) 566 continue; 567 568 pmd = pmd_offset(&pud[i], 0); 569 if (PTRS_PER_PMD > 1) 570 (*func)(mm, virt_to_page(pmd), PT_PMD); 571 xen_pmd_walk(mm, pmd, func, last && i == nr - 1, limit); 572 } 573 } 574 575 static void xen_p4d_walk(struct mm_struct *mm, p4d_t *p4d, 576 void (*func)(struct mm_struct *mm, struct page *, 577 enum pt_level), 578 bool last, unsigned long limit) 579 { 580 pud_t *pud; 581 582 583 if (p4d_none(*p4d)) 584 return; 585 586 pud = pud_offset(p4d, 0); 587 if (PTRS_PER_PUD > 1) 588 (*func)(mm, virt_to_page(pud), PT_PUD); 589 xen_pud_walk(mm, pud, func, last, limit); 590 } 591 592 /* 593 * (Yet another) pagetable walker. This one is intended for pinning a 594 * pagetable. This means that it walks a pagetable and calls the 595 * callback function on each page it finds making up the page table, 596 * at every level. It walks the entire pagetable, but it only bothers 597 * pinning pte pages which are below limit. In the normal case this 598 * will be STACK_TOP_MAX, but at boot we need to pin up to 599 * FIXADDR_TOP. 600 * 601 * We must skip the Xen hole in the middle of the address space, just after 602 * the big x86-64 virtual hole. 603 */ 604 static void __xen_pgd_walk(struct mm_struct *mm, pgd_t *pgd, 605 void (*func)(struct mm_struct *mm, struct page *, 606 enum pt_level), 607 unsigned long limit) 608 { 609 int i, nr; 610 unsigned hole_low = 0, hole_high = 0; 611 612 /* The limit is the last byte to be touched */ 613 limit--; 614 BUG_ON(limit >= FIXADDR_TOP); 615 616 /* 617 * 64-bit has a great big hole in the middle of the address 618 * space, which contains the Xen mappings. 619 */ 620 hole_low = pgd_index(GUARD_HOLE_BASE_ADDR); 621 hole_high = pgd_index(GUARD_HOLE_END_ADDR); 622 623 nr = pgd_index(limit) + 1; 624 for (i = 0; i < nr; i++) { 625 p4d_t *p4d; 626 627 if (i >= hole_low && i < hole_high) 628 continue; 629 630 if (pgd_none(pgd[i])) 631 continue; 632 633 p4d = p4d_offset(&pgd[i], 0); 634 xen_p4d_walk(mm, p4d, func, i == nr - 1, limit); 635 } 636 637 /* Do the top level last, so that the callbacks can use it as 638 a cue to do final things like tlb flushes. */ 639 (*func)(mm, virt_to_page(pgd), PT_PGD); 640 } 641 642 static void xen_pgd_walk(struct mm_struct *mm, 643 void (*func)(struct mm_struct *mm, struct page *, 644 enum pt_level), 645 unsigned long limit) 646 { 647 __xen_pgd_walk(mm, mm->pgd, func, limit); 648 } 649 650 /* If we're using split pte locks, then take the page's lock and 651 return a pointer to it. Otherwise return NULL. */ 652 static spinlock_t *xen_pte_lock(struct page *page, struct mm_struct *mm) 653 { 654 spinlock_t *ptl = NULL; 655 656 #if USE_SPLIT_PTE_PTLOCKS 657 ptl = ptlock_ptr(page); 658 spin_lock_nest_lock(ptl, &mm->page_table_lock); 659 #endif 660 661 return ptl; 662 } 663 664 static void xen_pte_unlock(void *v) 665 { 666 spinlock_t *ptl = v; 667 spin_unlock(ptl); 668 } 669 670 static void xen_do_pin(unsigned level, unsigned long pfn) 671 { 672 struct mmuext_op op; 673 674 op.cmd = level; 675 op.arg1.mfn = pfn_to_mfn(pfn); 676 677 xen_extend_mmuext_op(&op); 678 } 679 680 static void xen_pin_page(struct mm_struct *mm, struct page *page, 681 enum pt_level level) 682 { 683 unsigned pgfl = TestSetPagePinned(page); 684 685 if (!pgfl) { 686 void *pt = lowmem_page_address(page); 687 unsigned long pfn = page_to_pfn(page); 688 struct multicall_space mcs = __xen_mc_entry(0); 689 spinlock_t *ptl; 690 691 /* 692 * We need to hold the pagetable lock between the time 693 * we make the pagetable RO and when we actually pin 694 * it. If we don't, then other users may come in and 695 * attempt to update the pagetable by writing it, 696 * which will fail because the memory is RO but not 697 * pinned, so Xen won't do the trap'n'emulate. 698 * 699 * If we're using split pte locks, we can't hold the 700 * entire pagetable's worth of locks during the 701 * traverse, because we may wrap the preempt count (8 702 * bits). The solution is to mark RO and pin each PTE 703 * page while holding the lock. This means the number 704 * of locks we end up holding is never more than a 705 * batch size (~32 entries, at present). 706 * 707 * If we're not using split pte locks, we needn't pin 708 * the PTE pages independently, because we're 709 * protected by the overall pagetable lock. 710 */ 711 ptl = NULL; 712 if (level == PT_PTE) 713 ptl = xen_pte_lock(page, mm); 714 715 MULTI_update_va_mapping(mcs.mc, (unsigned long)pt, 716 pfn_pte(pfn, PAGE_KERNEL_RO), 717 level == PT_PGD ? UVMF_TLB_FLUSH : 0); 718 719 if (ptl) { 720 xen_do_pin(MMUEXT_PIN_L1_TABLE, pfn); 721 722 /* Queue a deferred unlock for when this batch 723 is completed. */ 724 xen_mc_callback(xen_pte_unlock, ptl); 725 } 726 } 727 } 728 729 /* This is called just after a mm has been created, but it has not 730 been used yet. We need to make sure that its pagetable is all 731 read-only, and can be pinned. */ 732 static void __xen_pgd_pin(struct mm_struct *mm, pgd_t *pgd) 733 { 734 pgd_t *user_pgd = xen_get_user_pgd(pgd); 735 736 trace_xen_mmu_pgd_pin(mm, pgd); 737 738 xen_mc_batch(); 739 740 __xen_pgd_walk(mm, pgd, xen_pin_page, USER_LIMIT); 741 742 xen_do_pin(MMUEXT_PIN_L4_TABLE, PFN_DOWN(__pa(pgd))); 743 744 if (user_pgd) { 745 xen_pin_page(mm, virt_to_page(user_pgd), PT_PGD); 746 xen_do_pin(MMUEXT_PIN_L4_TABLE, 747 PFN_DOWN(__pa(user_pgd))); 748 } 749 750 xen_mc_issue(0); 751 } 752 753 static void xen_pgd_pin(struct mm_struct *mm) 754 { 755 __xen_pgd_pin(mm, mm->pgd); 756 } 757 758 /* 759 * On save, we need to pin all pagetables to make sure they get their 760 * mfns turned into pfns. Search the list for any unpinned pgds and pin 761 * them (unpinned pgds are not currently in use, probably because the 762 * process is under construction or destruction). 763 * 764 * Expected to be called in stop_machine() ("equivalent to taking 765 * every spinlock in the system"), so the locking doesn't really 766 * matter all that much. 767 */ 768 void xen_mm_pin_all(void) 769 { 770 struct page *page; 771 772 spin_lock(&pgd_lock); 773 774 list_for_each_entry(page, &pgd_list, lru) { 775 if (!PagePinned(page)) { 776 __xen_pgd_pin(&init_mm, (pgd_t *)page_address(page)); 777 SetPageSavePinned(page); 778 } 779 } 780 781 spin_unlock(&pgd_lock); 782 } 783 784 static void __init xen_mark_pinned(struct mm_struct *mm, struct page *page, 785 enum pt_level level) 786 { 787 SetPagePinned(page); 788 } 789 790 /* 791 * The init_mm pagetable is really pinned as soon as its created, but 792 * that's before we have page structures to store the bits. So do all 793 * the book-keeping now once struct pages for allocated pages are 794 * initialized. This happens only after memblock_free_all() is called. 795 */ 796 static void __init xen_after_bootmem(void) 797 { 798 static_branch_enable(&xen_struct_pages_ready); 799 SetPagePinned(virt_to_page(level3_user_vsyscall)); 800 xen_pgd_walk(&init_mm, xen_mark_pinned, FIXADDR_TOP); 801 } 802 803 static void xen_unpin_page(struct mm_struct *mm, struct page *page, 804 enum pt_level level) 805 { 806 unsigned pgfl = TestClearPagePinned(page); 807 808 if (pgfl) { 809 void *pt = lowmem_page_address(page); 810 unsigned long pfn = page_to_pfn(page); 811 spinlock_t *ptl = NULL; 812 struct multicall_space mcs; 813 814 /* 815 * Do the converse to pin_page. If we're using split 816 * pte locks, we must be holding the lock for while 817 * the pte page is unpinned but still RO to prevent 818 * concurrent updates from seeing it in this 819 * partially-pinned state. 820 */ 821 if (level == PT_PTE) { 822 ptl = xen_pte_lock(page, mm); 823 824 if (ptl) 825 xen_do_pin(MMUEXT_UNPIN_TABLE, pfn); 826 } 827 828 mcs = __xen_mc_entry(0); 829 830 MULTI_update_va_mapping(mcs.mc, (unsigned long)pt, 831 pfn_pte(pfn, PAGE_KERNEL), 832 level == PT_PGD ? UVMF_TLB_FLUSH : 0); 833 834 if (ptl) { 835 /* unlock when batch completed */ 836 xen_mc_callback(xen_pte_unlock, ptl); 837 } 838 } 839 } 840 841 /* Release a pagetables pages back as normal RW */ 842 static void __xen_pgd_unpin(struct mm_struct *mm, pgd_t *pgd) 843 { 844 pgd_t *user_pgd = xen_get_user_pgd(pgd); 845 846 trace_xen_mmu_pgd_unpin(mm, pgd); 847 848 xen_mc_batch(); 849 850 xen_do_pin(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd))); 851 852 if (user_pgd) { 853 xen_do_pin(MMUEXT_UNPIN_TABLE, 854 PFN_DOWN(__pa(user_pgd))); 855 xen_unpin_page(mm, virt_to_page(user_pgd), PT_PGD); 856 } 857 858 __xen_pgd_walk(mm, pgd, xen_unpin_page, USER_LIMIT); 859 860 xen_mc_issue(0); 861 } 862 863 static void xen_pgd_unpin(struct mm_struct *mm) 864 { 865 __xen_pgd_unpin(mm, mm->pgd); 866 } 867 868 /* 869 * On resume, undo any pinning done at save, so that the rest of the 870 * kernel doesn't see any unexpected pinned pagetables. 871 */ 872 void xen_mm_unpin_all(void) 873 { 874 struct page *page; 875 876 spin_lock(&pgd_lock); 877 878 list_for_each_entry(page, &pgd_list, lru) { 879 if (PageSavePinned(page)) { 880 BUG_ON(!PagePinned(page)); 881 __xen_pgd_unpin(&init_mm, (pgd_t *)page_address(page)); 882 ClearPageSavePinned(page); 883 } 884 } 885 886 spin_unlock(&pgd_lock); 887 } 888 889 static void xen_activate_mm(struct mm_struct *prev, struct mm_struct *next) 890 { 891 spin_lock(&next->page_table_lock); 892 xen_pgd_pin(next); 893 spin_unlock(&next->page_table_lock); 894 } 895 896 static void xen_dup_mmap(struct mm_struct *oldmm, struct mm_struct *mm) 897 { 898 spin_lock(&mm->page_table_lock); 899 xen_pgd_pin(mm); 900 spin_unlock(&mm->page_table_lock); 901 } 902 903 static void drop_mm_ref_this_cpu(void *info) 904 { 905 struct mm_struct *mm = info; 906 907 if (this_cpu_read(cpu_tlbstate.loaded_mm) == mm) 908 leave_mm(smp_processor_id()); 909 910 /* 911 * If this cpu still has a stale cr3 reference, then make sure 912 * it has been flushed. 913 */ 914 if (this_cpu_read(xen_current_cr3) == __pa(mm->pgd)) 915 xen_mc_flush(); 916 } 917 918 #ifdef CONFIG_SMP 919 /* 920 * Another cpu may still have their %cr3 pointing at the pagetable, so 921 * we need to repoint it somewhere else before we can unpin it. 922 */ 923 static void xen_drop_mm_ref(struct mm_struct *mm) 924 { 925 cpumask_var_t mask; 926 unsigned cpu; 927 928 drop_mm_ref_this_cpu(mm); 929 930 /* Get the "official" set of cpus referring to our pagetable. */ 931 if (!alloc_cpumask_var(&mask, GFP_ATOMIC)) { 932 for_each_online_cpu(cpu) { 933 if (per_cpu(xen_current_cr3, cpu) != __pa(mm->pgd)) 934 continue; 935 smp_call_function_single(cpu, drop_mm_ref_this_cpu, mm, 1); 936 } 937 return; 938 } 939 940 /* 941 * It's possible that a vcpu may have a stale reference to our 942 * cr3, because its in lazy mode, and it hasn't yet flushed 943 * its set of pending hypercalls yet. In this case, we can 944 * look at its actual current cr3 value, and force it to flush 945 * if needed. 946 */ 947 cpumask_clear(mask); 948 for_each_online_cpu(cpu) { 949 if (per_cpu(xen_current_cr3, cpu) == __pa(mm->pgd)) 950 cpumask_set_cpu(cpu, mask); 951 } 952 953 smp_call_function_many(mask, drop_mm_ref_this_cpu, mm, 1); 954 free_cpumask_var(mask); 955 } 956 #else 957 static void xen_drop_mm_ref(struct mm_struct *mm) 958 { 959 drop_mm_ref_this_cpu(mm); 960 } 961 #endif 962 963 /* 964 * While a process runs, Xen pins its pagetables, which means that the 965 * hypervisor forces it to be read-only, and it controls all updates 966 * to it. This means that all pagetable updates have to go via the 967 * hypervisor, which is moderately expensive. 968 * 969 * Since we're pulling the pagetable down, we switch to use init_mm, 970 * unpin old process pagetable and mark it all read-write, which 971 * allows further operations on it to be simple memory accesses. 972 * 973 * The only subtle point is that another CPU may be still using the 974 * pagetable because of lazy tlb flushing. This means we need need to 975 * switch all CPUs off this pagetable before we can unpin it. 976 */ 977 static void xen_exit_mmap(struct mm_struct *mm) 978 { 979 get_cpu(); /* make sure we don't move around */ 980 xen_drop_mm_ref(mm); 981 put_cpu(); 982 983 spin_lock(&mm->page_table_lock); 984 985 /* pgd may not be pinned in the error exit path of execve */ 986 if (xen_page_pinned(mm->pgd)) 987 xen_pgd_unpin(mm); 988 989 spin_unlock(&mm->page_table_lock); 990 } 991 992 static void xen_post_allocator_init(void); 993 994 static void __init pin_pagetable_pfn(unsigned cmd, unsigned long pfn) 995 { 996 struct mmuext_op op; 997 998 op.cmd = cmd; 999 op.arg1.mfn = pfn_to_mfn(pfn); 1000 if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF)) 1001 BUG(); 1002 } 1003 1004 static void __init xen_cleanhighmap(unsigned long vaddr, 1005 unsigned long vaddr_end) 1006 { 1007 unsigned long kernel_end = roundup((unsigned long)_brk_end, PMD_SIZE) - 1; 1008 pmd_t *pmd = level2_kernel_pgt + pmd_index(vaddr); 1009 1010 /* NOTE: The loop is more greedy than the cleanup_highmap variant. 1011 * We include the PMD passed in on _both_ boundaries. */ 1012 for (; vaddr <= vaddr_end && (pmd < (level2_kernel_pgt + PTRS_PER_PMD)); 1013 pmd++, vaddr += PMD_SIZE) { 1014 if (pmd_none(*pmd)) 1015 continue; 1016 if (vaddr < (unsigned long) _text || vaddr > kernel_end) 1017 set_pmd(pmd, __pmd(0)); 1018 } 1019 /* In case we did something silly, we should crash in this function 1020 * instead of somewhere later and be confusing. */ 1021 xen_mc_flush(); 1022 } 1023 1024 /* 1025 * Make a page range writeable and free it. 1026 */ 1027 static void __init xen_free_ro_pages(unsigned long paddr, unsigned long size) 1028 { 1029 void *vaddr = __va(paddr); 1030 void *vaddr_end = vaddr + size; 1031 1032 for (; vaddr < vaddr_end; vaddr += PAGE_SIZE) 1033 make_lowmem_page_readwrite(vaddr); 1034 1035 memblock_free(paddr, size); 1036 } 1037 1038 static void __init xen_cleanmfnmap_free_pgtbl(void *pgtbl, bool unpin) 1039 { 1040 unsigned long pa = __pa(pgtbl) & PHYSICAL_PAGE_MASK; 1041 1042 if (unpin) 1043 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(pa)); 1044 ClearPagePinned(virt_to_page(__va(pa))); 1045 xen_free_ro_pages(pa, PAGE_SIZE); 1046 } 1047 1048 static void __init xen_cleanmfnmap_pmd(pmd_t *pmd, bool unpin) 1049 { 1050 unsigned long pa; 1051 pte_t *pte_tbl; 1052 int i; 1053 1054 if (pmd_large(*pmd)) { 1055 pa = pmd_val(*pmd) & PHYSICAL_PAGE_MASK; 1056 xen_free_ro_pages(pa, PMD_SIZE); 1057 return; 1058 } 1059 1060 pte_tbl = pte_offset_kernel(pmd, 0); 1061 for (i = 0; i < PTRS_PER_PTE; i++) { 1062 if (pte_none(pte_tbl[i])) 1063 continue; 1064 pa = pte_pfn(pte_tbl[i]) << PAGE_SHIFT; 1065 xen_free_ro_pages(pa, PAGE_SIZE); 1066 } 1067 set_pmd(pmd, __pmd(0)); 1068 xen_cleanmfnmap_free_pgtbl(pte_tbl, unpin); 1069 } 1070 1071 static void __init xen_cleanmfnmap_pud(pud_t *pud, bool unpin) 1072 { 1073 unsigned long pa; 1074 pmd_t *pmd_tbl; 1075 int i; 1076 1077 if (pud_large(*pud)) { 1078 pa = pud_val(*pud) & PHYSICAL_PAGE_MASK; 1079 xen_free_ro_pages(pa, PUD_SIZE); 1080 return; 1081 } 1082 1083 pmd_tbl = pmd_offset(pud, 0); 1084 for (i = 0; i < PTRS_PER_PMD; i++) { 1085 if (pmd_none(pmd_tbl[i])) 1086 continue; 1087 xen_cleanmfnmap_pmd(pmd_tbl + i, unpin); 1088 } 1089 set_pud(pud, __pud(0)); 1090 xen_cleanmfnmap_free_pgtbl(pmd_tbl, unpin); 1091 } 1092 1093 static void __init xen_cleanmfnmap_p4d(p4d_t *p4d, bool unpin) 1094 { 1095 unsigned long pa; 1096 pud_t *pud_tbl; 1097 int i; 1098 1099 if (p4d_large(*p4d)) { 1100 pa = p4d_val(*p4d) & PHYSICAL_PAGE_MASK; 1101 xen_free_ro_pages(pa, P4D_SIZE); 1102 return; 1103 } 1104 1105 pud_tbl = pud_offset(p4d, 0); 1106 for (i = 0; i < PTRS_PER_PUD; i++) { 1107 if (pud_none(pud_tbl[i])) 1108 continue; 1109 xen_cleanmfnmap_pud(pud_tbl + i, unpin); 1110 } 1111 set_p4d(p4d, __p4d(0)); 1112 xen_cleanmfnmap_free_pgtbl(pud_tbl, unpin); 1113 } 1114 1115 /* 1116 * Since it is well isolated we can (and since it is perhaps large we should) 1117 * also free the page tables mapping the initial P->M table. 1118 */ 1119 static void __init xen_cleanmfnmap(unsigned long vaddr) 1120 { 1121 pgd_t *pgd; 1122 p4d_t *p4d; 1123 bool unpin; 1124 1125 unpin = (vaddr == 2 * PGDIR_SIZE); 1126 vaddr &= PMD_MASK; 1127 pgd = pgd_offset_k(vaddr); 1128 p4d = p4d_offset(pgd, 0); 1129 if (!p4d_none(*p4d)) 1130 xen_cleanmfnmap_p4d(p4d, unpin); 1131 } 1132 1133 static void __init xen_pagetable_p2m_free(void) 1134 { 1135 unsigned long size; 1136 unsigned long addr; 1137 1138 size = PAGE_ALIGN(xen_start_info->nr_pages * sizeof(unsigned long)); 1139 1140 /* No memory or already called. */ 1141 if ((unsigned long)xen_p2m_addr == xen_start_info->mfn_list) 1142 return; 1143 1144 /* using __ka address and sticking INVALID_P2M_ENTRY! */ 1145 memset((void *)xen_start_info->mfn_list, 0xff, size); 1146 1147 addr = xen_start_info->mfn_list; 1148 /* 1149 * We could be in __ka space. 1150 * We roundup to the PMD, which means that if anybody at this stage is 1151 * using the __ka address of xen_start_info or 1152 * xen_start_info->shared_info they are in going to crash. Fortunatly 1153 * we have already revectored in xen_setup_kernel_pagetable. 1154 */ 1155 size = roundup(size, PMD_SIZE); 1156 1157 if (addr >= __START_KERNEL_map) { 1158 xen_cleanhighmap(addr, addr + size); 1159 size = PAGE_ALIGN(xen_start_info->nr_pages * 1160 sizeof(unsigned long)); 1161 memblock_free(__pa(addr), size); 1162 } else { 1163 xen_cleanmfnmap(addr); 1164 } 1165 } 1166 1167 static void __init xen_pagetable_cleanhighmap(void) 1168 { 1169 unsigned long size; 1170 unsigned long addr; 1171 1172 /* At this stage, cleanup_highmap has already cleaned __ka space 1173 * from _brk_limit way up to the max_pfn_mapped (which is the end of 1174 * the ramdisk). We continue on, erasing PMD entries that point to page 1175 * tables - do note that they are accessible at this stage via __va. 1176 * As Xen is aligning the memory end to a 4MB boundary, for good 1177 * measure we also round up to PMD_SIZE * 2 - which means that if 1178 * anybody is using __ka address to the initial boot-stack - and try 1179 * to use it - they are going to crash. The xen_start_info has been 1180 * taken care of already in xen_setup_kernel_pagetable. */ 1181 addr = xen_start_info->pt_base; 1182 size = xen_start_info->nr_pt_frames * PAGE_SIZE; 1183 1184 xen_cleanhighmap(addr, roundup(addr + size, PMD_SIZE * 2)); 1185 xen_start_info->pt_base = (unsigned long)__va(__pa(xen_start_info->pt_base)); 1186 } 1187 1188 static void __init xen_pagetable_p2m_setup(void) 1189 { 1190 xen_vmalloc_p2m_tree(); 1191 1192 xen_pagetable_p2m_free(); 1193 1194 xen_pagetable_cleanhighmap(); 1195 1196 /* And revector! Bye bye old array */ 1197 xen_start_info->mfn_list = (unsigned long)xen_p2m_addr; 1198 } 1199 1200 static void __init xen_pagetable_init(void) 1201 { 1202 paging_init(); 1203 xen_post_allocator_init(); 1204 1205 xen_pagetable_p2m_setup(); 1206 1207 /* Allocate and initialize top and mid mfn levels for p2m structure */ 1208 xen_build_mfn_list_list(); 1209 1210 /* Remap memory freed due to conflicts with E820 map */ 1211 xen_remap_memory(); 1212 xen_setup_mfn_list_list(); 1213 } 1214 static void xen_write_cr2(unsigned long cr2) 1215 { 1216 this_cpu_read(xen_vcpu)->arch.cr2 = cr2; 1217 } 1218 1219 static noinline void xen_flush_tlb(void) 1220 { 1221 struct mmuext_op *op; 1222 struct multicall_space mcs; 1223 1224 preempt_disable(); 1225 1226 mcs = xen_mc_entry(sizeof(*op)); 1227 1228 op = mcs.args; 1229 op->cmd = MMUEXT_TLB_FLUSH_LOCAL; 1230 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); 1231 1232 xen_mc_issue(PARAVIRT_LAZY_MMU); 1233 1234 preempt_enable(); 1235 } 1236 1237 static void xen_flush_tlb_one_user(unsigned long addr) 1238 { 1239 struct mmuext_op *op; 1240 struct multicall_space mcs; 1241 1242 trace_xen_mmu_flush_tlb_one_user(addr); 1243 1244 preempt_disable(); 1245 1246 mcs = xen_mc_entry(sizeof(*op)); 1247 op = mcs.args; 1248 op->cmd = MMUEXT_INVLPG_LOCAL; 1249 op->arg1.linear_addr = addr & PAGE_MASK; 1250 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); 1251 1252 xen_mc_issue(PARAVIRT_LAZY_MMU); 1253 1254 preempt_enable(); 1255 } 1256 1257 static void xen_flush_tlb_others(const struct cpumask *cpus, 1258 const struct flush_tlb_info *info) 1259 { 1260 struct { 1261 struct mmuext_op op; 1262 DECLARE_BITMAP(mask, NR_CPUS); 1263 } *args; 1264 struct multicall_space mcs; 1265 const size_t mc_entry_size = sizeof(args->op) + 1266 sizeof(args->mask[0]) * BITS_TO_LONGS(num_possible_cpus()); 1267 1268 trace_xen_mmu_flush_tlb_others(cpus, info->mm, info->start, info->end); 1269 1270 if (cpumask_empty(cpus)) 1271 return; /* nothing to do */ 1272 1273 mcs = xen_mc_entry(mc_entry_size); 1274 args = mcs.args; 1275 args->op.arg2.vcpumask = to_cpumask(args->mask); 1276 1277 /* Remove us, and any offline CPUS. */ 1278 cpumask_and(to_cpumask(args->mask), cpus, cpu_online_mask); 1279 cpumask_clear_cpu(smp_processor_id(), to_cpumask(args->mask)); 1280 1281 args->op.cmd = MMUEXT_TLB_FLUSH_MULTI; 1282 if (info->end != TLB_FLUSH_ALL && 1283 (info->end - info->start) <= PAGE_SIZE) { 1284 args->op.cmd = MMUEXT_INVLPG_MULTI; 1285 args->op.arg1.linear_addr = info->start; 1286 } 1287 1288 MULTI_mmuext_op(mcs.mc, &args->op, 1, NULL, DOMID_SELF); 1289 1290 xen_mc_issue(PARAVIRT_LAZY_MMU); 1291 } 1292 1293 static unsigned long xen_read_cr3(void) 1294 { 1295 return this_cpu_read(xen_cr3); 1296 } 1297 1298 static void set_current_cr3(void *v) 1299 { 1300 this_cpu_write(xen_current_cr3, (unsigned long)v); 1301 } 1302 1303 static void __xen_write_cr3(bool kernel, unsigned long cr3) 1304 { 1305 struct mmuext_op op; 1306 unsigned long mfn; 1307 1308 trace_xen_mmu_write_cr3(kernel, cr3); 1309 1310 if (cr3) 1311 mfn = pfn_to_mfn(PFN_DOWN(cr3)); 1312 else 1313 mfn = 0; 1314 1315 WARN_ON(mfn == 0 && kernel); 1316 1317 op.cmd = kernel ? MMUEXT_NEW_BASEPTR : MMUEXT_NEW_USER_BASEPTR; 1318 op.arg1.mfn = mfn; 1319 1320 xen_extend_mmuext_op(&op); 1321 1322 if (kernel) { 1323 this_cpu_write(xen_cr3, cr3); 1324 1325 /* Update xen_current_cr3 once the batch has actually 1326 been submitted. */ 1327 xen_mc_callback(set_current_cr3, (void *)cr3); 1328 } 1329 } 1330 static void xen_write_cr3(unsigned long cr3) 1331 { 1332 pgd_t *user_pgd = xen_get_user_pgd(__va(cr3)); 1333 1334 BUG_ON(preemptible()); 1335 1336 xen_mc_batch(); /* disables interrupts */ 1337 1338 /* Update while interrupts are disabled, so its atomic with 1339 respect to ipis */ 1340 this_cpu_write(xen_cr3, cr3); 1341 1342 __xen_write_cr3(true, cr3); 1343 1344 if (user_pgd) 1345 __xen_write_cr3(false, __pa(user_pgd)); 1346 else 1347 __xen_write_cr3(false, 0); 1348 1349 xen_mc_issue(PARAVIRT_LAZY_CPU); /* interrupts restored */ 1350 } 1351 1352 /* 1353 * At the start of the day - when Xen launches a guest, it has already 1354 * built pagetables for the guest. We diligently look over them 1355 * in xen_setup_kernel_pagetable and graft as appropriate them in the 1356 * init_top_pgt and its friends. Then when we are happy we load 1357 * the new init_top_pgt - and continue on. 1358 * 1359 * The generic code starts (start_kernel) and 'init_mem_mapping' sets 1360 * up the rest of the pagetables. When it has completed it loads the cr3. 1361 * N.B. that baremetal would start at 'start_kernel' (and the early 1362 * #PF handler would create bootstrap pagetables) - so we are running 1363 * with the same assumptions as what to do when write_cr3 is executed 1364 * at this point. 1365 * 1366 * Since there are no user-page tables at all, we have two variants 1367 * of xen_write_cr3 - the early bootup (this one), and the late one 1368 * (xen_write_cr3). The reason we have to do that is that in 64-bit 1369 * the Linux kernel and user-space are both in ring 3 while the 1370 * hypervisor is in ring 0. 1371 */ 1372 static void __init xen_write_cr3_init(unsigned long cr3) 1373 { 1374 BUG_ON(preemptible()); 1375 1376 xen_mc_batch(); /* disables interrupts */ 1377 1378 /* Update while interrupts are disabled, so its atomic with 1379 respect to ipis */ 1380 this_cpu_write(xen_cr3, cr3); 1381 1382 __xen_write_cr3(true, cr3); 1383 1384 xen_mc_issue(PARAVIRT_LAZY_CPU); /* interrupts restored */ 1385 } 1386 1387 static int xen_pgd_alloc(struct mm_struct *mm) 1388 { 1389 pgd_t *pgd = mm->pgd; 1390 struct page *page = virt_to_page(pgd); 1391 pgd_t *user_pgd; 1392 int ret = -ENOMEM; 1393 1394 BUG_ON(PagePinned(virt_to_page(pgd))); 1395 BUG_ON(page->private != 0); 1396 1397 user_pgd = (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO); 1398 page->private = (unsigned long)user_pgd; 1399 1400 if (user_pgd != NULL) { 1401 #ifdef CONFIG_X86_VSYSCALL_EMULATION 1402 user_pgd[pgd_index(VSYSCALL_ADDR)] = 1403 __pgd(__pa(level3_user_vsyscall) | _PAGE_TABLE); 1404 #endif 1405 ret = 0; 1406 } 1407 1408 BUG_ON(PagePinned(virt_to_page(xen_get_user_pgd(pgd)))); 1409 1410 return ret; 1411 } 1412 1413 static void xen_pgd_free(struct mm_struct *mm, pgd_t *pgd) 1414 { 1415 pgd_t *user_pgd = xen_get_user_pgd(pgd); 1416 1417 if (user_pgd) 1418 free_page((unsigned long)user_pgd); 1419 } 1420 1421 /* 1422 * Init-time set_pte while constructing initial pagetables, which 1423 * doesn't allow RO page table pages to be remapped RW. 1424 * 1425 * If there is no MFN for this PFN then this page is initially 1426 * ballooned out so clear the PTE (as in decrease_reservation() in 1427 * drivers/xen/balloon.c). 1428 * 1429 * Many of these PTE updates are done on unpinned and writable pages 1430 * and doing a hypercall for these is unnecessary and expensive. At 1431 * this point it is not possible to tell if a page is pinned or not, 1432 * so always write the PTE directly and rely on Xen trapping and 1433 * emulating any updates as necessary. 1434 */ 1435 __visible pte_t xen_make_pte_init(pteval_t pte) 1436 { 1437 unsigned long pfn; 1438 1439 /* 1440 * Pages belonging to the initial p2m list mapped outside the default 1441 * address range must be mapped read-only. This region contains the 1442 * page tables for mapping the p2m list, too, and page tables MUST be 1443 * mapped read-only. 1444 */ 1445 pfn = (pte & PTE_PFN_MASK) >> PAGE_SHIFT; 1446 if (xen_start_info->mfn_list < __START_KERNEL_map && 1447 pfn >= xen_start_info->first_p2m_pfn && 1448 pfn < xen_start_info->first_p2m_pfn + xen_start_info->nr_p2m_frames) 1449 pte &= ~_PAGE_RW; 1450 1451 pte = pte_pfn_to_mfn(pte); 1452 return native_make_pte(pte); 1453 } 1454 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte_init); 1455 1456 static void __init xen_set_pte_init(pte_t *ptep, pte_t pte) 1457 { 1458 __xen_set_pte(ptep, pte); 1459 } 1460 1461 /* Early in boot, while setting up the initial pagetable, assume 1462 everything is pinned. */ 1463 static void __init xen_alloc_pte_init(struct mm_struct *mm, unsigned long pfn) 1464 { 1465 #ifdef CONFIG_FLATMEM 1466 BUG_ON(mem_map); /* should only be used early */ 1467 #endif 1468 make_lowmem_page_readonly(__va(PFN_PHYS(pfn))); 1469 pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn); 1470 } 1471 1472 /* Used for pmd and pud */ 1473 static void __init xen_alloc_pmd_init(struct mm_struct *mm, unsigned long pfn) 1474 { 1475 #ifdef CONFIG_FLATMEM 1476 BUG_ON(mem_map); /* should only be used early */ 1477 #endif 1478 make_lowmem_page_readonly(__va(PFN_PHYS(pfn))); 1479 } 1480 1481 /* Early release_pte assumes that all pts are pinned, since there's 1482 only init_mm and anything attached to that is pinned. */ 1483 static void __init xen_release_pte_init(unsigned long pfn) 1484 { 1485 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn); 1486 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn))); 1487 } 1488 1489 static void __init xen_release_pmd_init(unsigned long pfn) 1490 { 1491 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn))); 1492 } 1493 1494 static inline void __pin_pagetable_pfn(unsigned cmd, unsigned long pfn) 1495 { 1496 struct multicall_space mcs; 1497 struct mmuext_op *op; 1498 1499 mcs = __xen_mc_entry(sizeof(*op)); 1500 op = mcs.args; 1501 op->cmd = cmd; 1502 op->arg1.mfn = pfn_to_mfn(pfn); 1503 1504 MULTI_mmuext_op(mcs.mc, mcs.args, 1, NULL, DOMID_SELF); 1505 } 1506 1507 static inline void __set_pfn_prot(unsigned long pfn, pgprot_t prot) 1508 { 1509 struct multicall_space mcs; 1510 unsigned long addr = (unsigned long)__va(pfn << PAGE_SHIFT); 1511 1512 mcs = __xen_mc_entry(0); 1513 MULTI_update_va_mapping(mcs.mc, (unsigned long)addr, 1514 pfn_pte(pfn, prot), 0); 1515 } 1516 1517 /* This needs to make sure the new pte page is pinned iff its being 1518 attached to a pinned pagetable. */ 1519 static inline void xen_alloc_ptpage(struct mm_struct *mm, unsigned long pfn, 1520 unsigned level) 1521 { 1522 bool pinned = xen_page_pinned(mm->pgd); 1523 1524 trace_xen_mmu_alloc_ptpage(mm, pfn, level, pinned); 1525 1526 if (pinned) { 1527 struct page *page = pfn_to_page(pfn); 1528 1529 if (static_branch_likely(&xen_struct_pages_ready)) 1530 SetPagePinned(page); 1531 1532 xen_mc_batch(); 1533 1534 __set_pfn_prot(pfn, PAGE_KERNEL_RO); 1535 1536 if (level == PT_PTE && USE_SPLIT_PTE_PTLOCKS) 1537 __pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn); 1538 1539 xen_mc_issue(PARAVIRT_LAZY_MMU); 1540 } 1541 } 1542 1543 static void xen_alloc_pte(struct mm_struct *mm, unsigned long pfn) 1544 { 1545 xen_alloc_ptpage(mm, pfn, PT_PTE); 1546 } 1547 1548 static void xen_alloc_pmd(struct mm_struct *mm, unsigned long pfn) 1549 { 1550 xen_alloc_ptpage(mm, pfn, PT_PMD); 1551 } 1552 1553 /* This should never happen until we're OK to use struct page */ 1554 static inline void xen_release_ptpage(unsigned long pfn, unsigned level) 1555 { 1556 struct page *page = pfn_to_page(pfn); 1557 bool pinned = PagePinned(page); 1558 1559 trace_xen_mmu_release_ptpage(pfn, level, pinned); 1560 1561 if (pinned) { 1562 xen_mc_batch(); 1563 1564 if (level == PT_PTE && USE_SPLIT_PTE_PTLOCKS) 1565 __pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn); 1566 1567 __set_pfn_prot(pfn, PAGE_KERNEL); 1568 1569 xen_mc_issue(PARAVIRT_LAZY_MMU); 1570 1571 ClearPagePinned(page); 1572 } 1573 } 1574 1575 static void xen_release_pte(unsigned long pfn) 1576 { 1577 xen_release_ptpage(pfn, PT_PTE); 1578 } 1579 1580 static void xen_release_pmd(unsigned long pfn) 1581 { 1582 xen_release_ptpage(pfn, PT_PMD); 1583 } 1584 1585 static void xen_alloc_pud(struct mm_struct *mm, unsigned long pfn) 1586 { 1587 xen_alloc_ptpage(mm, pfn, PT_PUD); 1588 } 1589 1590 static void xen_release_pud(unsigned long pfn) 1591 { 1592 xen_release_ptpage(pfn, PT_PUD); 1593 } 1594 1595 /* 1596 * Like __va(), but returns address in the kernel mapping (which is 1597 * all we have until the physical memory mapping has been set up. 1598 */ 1599 static void * __init __ka(phys_addr_t paddr) 1600 { 1601 return (void *)(paddr + __START_KERNEL_map); 1602 } 1603 1604 /* Convert a machine address to physical address */ 1605 static unsigned long __init m2p(phys_addr_t maddr) 1606 { 1607 phys_addr_t paddr; 1608 1609 maddr &= XEN_PTE_MFN_MASK; 1610 paddr = mfn_to_pfn(maddr >> PAGE_SHIFT) << PAGE_SHIFT; 1611 1612 return paddr; 1613 } 1614 1615 /* Convert a machine address to kernel virtual */ 1616 static void * __init m2v(phys_addr_t maddr) 1617 { 1618 return __ka(m2p(maddr)); 1619 } 1620 1621 /* Set the page permissions on an identity-mapped pages */ 1622 static void __init set_page_prot_flags(void *addr, pgprot_t prot, 1623 unsigned long flags) 1624 { 1625 unsigned long pfn = __pa(addr) >> PAGE_SHIFT; 1626 pte_t pte = pfn_pte(pfn, prot); 1627 1628 if (HYPERVISOR_update_va_mapping((unsigned long)addr, pte, flags)) 1629 BUG(); 1630 } 1631 static void __init set_page_prot(void *addr, pgprot_t prot) 1632 { 1633 return set_page_prot_flags(addr, prot, UVMF_NONE); 1634 } 1635 1636 void __init xen_setup_machphys_mapping(void) 1637 { 1638 struct xen_machphys_mapping mapping; 1639 1640 if (HYPERVISOR_memory_op(XENMEM_machphys_mapping, &mapping) == 0) { 1641 machine_to_phys_mapping = (unsigned long *)mapping.v_start; 1642 machine_to_phys_nr = mapping.max_mfn + 1; 1643 } else { 1644 machine_to_phys_nr = MACH2PHYS_NR_ENTRIES; 1645 } 1646 } 1647 1648 static void __init convert_pfn_mfn(void *v) 1649 { 1650 pte_t *pte = v; 1651 int i; 1652 1653 /* All levels are converted the same way, so just treat them 1654 as ptes. */ 1655 for (i = 0; i < PTRS_PER_PTE; i++) 1656 pte[i] = xen_make_pte(pte[i].pte); 1657 } 1658 static void __init check_pt_base(unsigned long *pt_base, unsigned long *pt_end, 1659 unsigned long addr) 1660 { 1661 if (*pt_base == PFN_DOWN(__pa(addr))) { 1662 set_page_prot_flags((void *)addr, PAGE_KERNEL, UVMF_INVLPG); 1663 clear_page((void *)addr); 1664 (*pt_base)++; 1665 } 1666 if (*pt_end == PFN_DOWN(__pa(addr))) { 1667 set_page_prot_flags((void *)addr, PAGE_KERNEL, UVMF_INVLPG); 1668 clear_page((void *)addr); 1669 (*pt_end)--; 1670 } 1671 } 1672 /* 1673 * Set up the initial kernel pagetable. 1674 * 1675 * We can construct this by grafting the Xen provided pagetable into 1676 * head_64.S's preconstructed pagetables. We copy the Xen L2's into 1677 * level2_ident_pgt, and level2_kernel_pgt. This means that only the 1678 * kernel has a physical mapping to start with - but that's enough to 1679 * get __va working. We need to fill in the rest of the physical 1680 * mapping once some sort of allocator has been set up. 1681 */ 1682 void __init xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pfn) 1683 { 1684 pud_t *l3; 1685 pmd_t *l2; 1686 unsigned long addr[3]; 1687 unsigned long pt_base, pt_end; 1688 unsigned i; 1689 1690 /* max_pfn_mapped is the last pfn mapped in the initial memory 1691 * mappings. Considering that on Xen after the kernel mappings we 1692 * have the mappings of some pages that don't exist in pfn space, we 1693 * set max_pfn_mapped to the last real pfn mapped. */ 1694 if (xen_start_info->mfn_list < __START_KERNEL_map) 1695 max_pfn_mapped = xen_start_info->first_p2m_pfn; 1696 else 1697 max_pfn_mapped = PFN_DOWN(__pa(xen_start_info->mfn_list)); 1698 1699 pt_base = PFN_DOWN(__pa(xen_start_info->pt_base)); 1700 pt_end = pt_base + xen_start_info->nr_pt_frames; 1701 1702 /* Zap identity mapping */ 1703 init_top_pgt[0] = __pgd(0); 1704 1705 /* Pre-constructed entries are in pfn, so convert to mfn */ 1706 /* L4[273] -> level3_ident_pgt */ 1707 /* L4[511] -> level3_kernel_pgt */ 1708 convert_pfn_mfn(init_top_pgt); 1709 1710 /* L3_i[0] -> level2_ident_pgt */ 1711 convert_pfn_mfn(level3_ident_pgt); 1712 /* L3_k[510] -> level2_kernel_pgt */ 1713 /* L3_k[511] -> level2_fixmap_pgt */ 1714 convert_pfn_mfn(level3_kernel_pgt); 1715 1716 /* L3_k[511][508-FIXMAP_PMD_NUM ... 507] -> level1_fixmap_pgt */ 1717 convert_pfn_mfn(level2_fixmap_pgt); 1718 1719 /* We get [511][511] and have Xen's version of level2_kernel_pgt */ 1720 l3 = m2v(pgd[pgd_index(__START_KERNEL_map)].pgd); 1721 l2 = m2v(l3[pud_index(__START_KERNEL_map)].pud); 1722 1723 addr[0] = (unsigned long)pgd; 1724 addr[1] = (unsigned long)l3; 1725 addr[2] = (unsigned long)l2; 1726 /* Graft it onto L4[273][0]. Note that we creating an aliasing problem: 1727 * Both L4[273][0] and L4[511][510] have entries that point to the same 1728 * L2 (PMD) tables. Meaning that if you modify it in __va space 1729 * it will be also modified in the __ka space! (But if you just 1730 * modify the PMD table to point to other PTE's or none, then you 1731 * are OK - which is what cleanup_highmap does) */ 1732 copy_page(level2_ident_pgt, l2); 1733 /* Graft it onto L4[511][510] */ 1734 copy_page(level2_kernel_pgt, l2); 1735 1736 /* 1737 * Zap execute permission from the ident map. Due to the sharing of 1738 * L1 entries we need to do this in the L2. 1739 */ 1740 if (__supported_pte_mask & _PAGE_NX) { 1741 for (i = 0; i < PTRS_PER_PMD; ++i) { 1742 if (pmd_none(level2_ident_pgt[i])) 1743 continue; 1744 level2_ident_pgt[i] = pmd_set_flags(level2_ident_pgt[i], _PAGE_NX); 1745 } 1746 } 1747 1748 /* Copy the initial P->M table mappings if necessary. */ 1749 i = pgd_index(xen_start_info->mfn_list); 1750 if (i && i < pgd_index(__START_KERNEL_map)) 1751 init_top_pgt[i] = ((pgd_t *)xen_start_info->pt_base)[i]; 1752 1753 /* Make pagetable pieces RO */ 1754 set_page_prot(init_top_pgt, PAGE_KERNEL_RO); 1755 set_page_prot(level3_ident_pgt, PAGE_KERNEL_RO); 1756 set_page_prot(level3_kernel_pgt, PAGE_KERNEL_RO); 1757 set_page_prot(level3_user_vsyscall, PAGE_KERNEL_RO); 1758 set_page_prot(level2_ident_pgt, PAGE_KERNEL_RO); 1759 set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO); 1760 set_page_prot(level2_fixmap_pgt, PAGE_KERNEL_RO); 1761 1762 for (i = 0; i < FIXMAP_PMD_NUM; i++) { 1763 set_page_prot(level1_fixmap_pgt + i * PTRS_PER_PTE, 1764 PAGE_KERNEL_RO); 1765 } 1766 1767 /* Pin down new L4 */ 1768 pin_pagetable_pfn(MMUEXT_PIN_L4_TABLE, 1769 PFN_DOWN(__pa_symbol(init_top_pgt))); 1770 1771 /* Unpin Xen-provided one */ 1772 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd))); 1773 1774 /* 1775 * At this stage there can be no user pgd, and no page structure to 1776 * attach it to, so make sure we just set kernel pgd. 1777 */ 1778 xen_mc_batch(); 1779 __xen_write_cr3(true, __pa(init_top_pgt)); 1780 xen_mc_issue(PARAVIRT_LAZY_CPU); 1781 1782 /* We can't that easily rip out L3 and L2, as the Xen pagetables are 1783 * set out this way: [L4], [L1], [L2], [L3], [L1], [L1] ... for 1784 * the initial domain. For guests using the toolstack, they are in: 1785 * [L4], [L3], [L2], [L1], [L1], order .. So for dom0 we can only 1786 * rip out the [L4] (pgd), but for guests we shave off three pages. 1787 */ 1788 for (i = 0; i < ARRAY_SIZE(addr); i++) 1789 check_pt_base(&pt_base, &pt_end, addr[i]); 1790 1791 /* Our (by three pages) smaller Xen pagetable that we are using */ 1792 xen_pt_base = PFN_PHYS(pt_base); 1793 xen_pt_size = (pt_end - pt_base) * PAGE_SIZE; 1794 memblock_reserve(xen_pt_base, xen_pt_size); 1795 1796 /* Revector the xen_start_info */ 1797 xen_start_info = (struct start_info *)__va(__pa(xen_start_info)); 1798 } 1799 1800 /* 1801 * Read a value from a physical address. 1802 */ 1803 static unsigned long __init xen_read_phys_ulong(phys_addr_t addr) 1804 { 1805 unsigned long *vaddr; 1806 unsigned long val; 1807 1808 vaddr = early_memremap_ro(addr, sizeof(val)); 1809 val = *vaddr; 1810 early_memunmap(vaddr, sizeof(val)); 1811 return val; 1812 } 1813 1814 /* 1815 * Translate a virtual address to a physical one without relying on mapped 1816 * page tables. Don't rely on big pages being aligned in (guest) physical 1817 * space! 1818 */ 1819 static phys_addr_t __init xen_early_virt_to_phys(unsigned long vaddr) 1820 { 1821 phys_addr_t pa; 1822 pgd_t pgd; 1823 pud_t pud; 1824 pmd_t pmd; 1825 pte_t pte; 1826 1827 pa = read_cr3_pa(); 1828 pgd = native_make_pgd(xen_read_phys_ulong(pa + pgd_index(vaddr) * 1829 sizeof(pgd))); 1830 if (!pgd_present(pgd)) 1831 return 0; 1832 1833 pa = pgd_val(pgd) & PTE_PFN_MASK; 1834 pud = native_make_pud(xen_read_phys_ulong(pa + pud_index(vaddr) * 1835 sizeof(pud))); 1836 if (!pud_present(pud)) 1837 return 0; 1838 pa = pud_val(pud) & PTE_PFN_MASK; 1839 if (pud_large(pud)) 1840 return pa + (vaddr & ~PUD_MASK); 1841 1842 pmd = native_make_pmd(xen_read_phys_ulong(pa + pmd_index(vaddr) * 1843 sizeof(pmd))); 1844 if (!pmd_present(pmd)) 1845 return 0; 1846 pa = pmd_val(pmd) & PTE_PFN_MASK; 1847 if (pmd_large(pmd)) 1848 return pa + (vaddr & ~PMD_MASK); 1849 1850 pte = native_make_pte(xen_read_phys_ulong(pa + pte_index(vaddr) * 1851 sizeof(pte))); 1852 if (!pte_present(pte)) 1853 return 0; 1854 pa = pte_pfn(pte) << PAGE_SHIFT; 1855 1856 return pa | (vaddr & ~PAGE_MASK); 1857 } 1858 1859 /* 1860 * Find a new area for the hypervisor supplied p2m list and relocate the p2m to 1861 * this area. 1862 */ 1863 void __init xen_relocate_p2m(void) 1864 { 1865 phys_addr_t size, new_area, pt_phys, pmd_phys, pud_phys; 1866 unsigned long p2m_pfn, p2m_pfn_end, n_frames, pfn, pfn_end; 1867 int n_pte, n_pt, n_pmd, n_pud, idx_pte, idx_pt, idx_pmd, idx_pud; 1868 pte_t *pt; 1869 pmd_t *pmd; 1870 pud_t *pud; 1871 pgd_t *pgd; 1872 unsigned long *new_p2m; 1873 1874 size = PAGE_ALIGN(xen_start_info->nr_pages * sizeof(unsigned long)); 1875 n_pte = roundup(size, PAGE_SIZE) >> PAGE_SHIFT; 1876 n_pt = roundup(size, PMD_SIZE) >> PMD_SHIFT; 1877 n_pmd = roundup(size, PUD_SIZE) >> PUD_SHIFT; 1878 n_pud = roundup(size, P4D_SIZE) >> P4D_SHIFT; 1879 n_frames = n_pte + n_pt + n_pmd + n_pud; 1880 1881 new_area = xen_find_free_area(PFN_PHYS(n_frames)); 1882 if (!new_area) { 1883 xen_raw_console_write("Can't find new memory area for p2m needed due to E820 map conflict\n"); 1884 BUG(); 1885 } 1886 1887 /* 1888 * Setup the page tables for addressing the new p2m list. 1889 * We have asked the hypervisor to map the p2m list at the user address 1890 * PUD_SIZE. It may have done so, or it may have used a kernel space 1891 * address depending on the Xen version. 1892 * To avoid any possible virtual address collision, just use 1893 * 2 * PUD_SIZE for the new area. 1894 */ 1895 pud_phys = new_area; 1896 pmd_phys = pud_phys + PFN_PHYS(n_pud); 1897 pt_phys = pmd_phys + PFN_PHYS(n_pmd); 1898 p2m_pfn = PFN_DOWN(pt_phys) + n_pt; 1899 1900 pgd = __va(read_cr3_pa()); 1901 new_p2m = (unsigned long *)(2 * PGDIR_SIZE); 1902 for (idx_pud = 0; idx_pud < n_pud; idx_pud++) { 1903 pud = early_memremap(pud_phys, PAGE_SIZE); 1904 clear_page(pud); 1905 for (idx_pmd = 0; idx_pmd < min(n_pmd, PTRS_PER_PUD); 1906 idx_pmd++) { 1907 pmd = early_memremap(pmd_phys, PAGE_SIZE); 1908 clear_page(pmd); 1909 for (idx_pt = 0; idx_pt < min(n_pt, PTRS_PER_PMD); 1910 idx_pt++) { 1911 pt = early_memremap(pt_phys, PAGE_SIZE); 1912 clear_page(pt); 1913 for (idx_pte = 0; 1914 idx_pte < min(n_pte, PTRS_PER_PTE); 1915 idx_pte++) { 1916 pt[idx_pte] = pfn_pte(p2m_pfn, 1917 PAGE_KERNEL); 1918 p2m_pfn++; 1919 } 1920 n_pte -= PTRS_PER_PTE; 1921 early_memunmap(pt, PAGE_SIZE); 1922 make_lowmem_page_readonly(__va(pt_phys)); 1923 pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, 1924 PFN_DOWN(pt_phys)); 1925 pmd[idx_pt] = __pmd(_PAGE_TABLE | pt_phys); 1926 pt_phys += PAGE_SIZE; 1927 } 1928 n_pt -= PTRS_PER_PMD; 1929 early_memunmap(pmd, PAGE_SIZE); 1930 make_lowmem_page_readonly(__va(pmd_phys)); 1931 pin_pagetable_pfn(MMUEXT_PIN_L2_TABLE, 1932 PFN_DOWN(pmd_phys)); 1933 pud[idx_pmd] = __pud(_PAGE_TABLE | pmd_phys); 1934 pmd_phys += PAGE_SIZE; 1935 } 1936 n_pmd -= PTRS_PER_PUD; 1937 early_memunmap(pud, PAGE_SIZE); 1938 make_lowmem_page_readonly(__va(pud_phys)); 1939 pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, PFN_DOWN(pud_phys)); 1940 set_pgd(pgd + 2 + idx_pud, __pgd(_PAGE_TABLE | pud_phys)); 1941 pud_phys += PAGE_SIZE; 1942 } 1943 1944 /* Now copy the old p2m info to the new area. */ 1945 memcpy(new_p2m, xen_p2m_addr, size); 1946 xen_p2m_addr = new_p2m; 1947 1948 /* Release the old p2m list and set new list info. */ 1949 p2m_pfn = PFN_DOWN(xen_early_virt_to_phys(xen_start_info->mfn_list)); 1950 BUG_ON(!p2m_pfn); 1951 p2m_pfn_end = p2m_pfn + PFN_DOWN(size); 1952 1953 if (xen_start_info->mfn_list < __START_KERNEL_map) { 1954 pfn = xen_start_info->first_p2m_pfn; 1955 pfn_end = xen_start_info->first_p2m_pfn + 1956 xen_start_info->nr_p2m_frames; 1957 set_pgd(pgd + 1, __pgd(0)); 1958 } else { 1959 pfn = p2m_pfn; 1960 pfn_end = p2m_pfn_end; 1961 } 1962 1963 memblock_free(PFN_PHYS(pfn), PAGE_SIZE * (pfn_end - pfn)); 1964 while (pfn < pfn_end) { 1965 if (pfn == p2m_pfn) { 1966 pfn = p2m_pfn_end; 1967 continue; 1968 } 1969 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn))); 1970 pfn++; 1971 } 1972 1973 xen_start_info->mfn_list = (unsigned long)xen_p2m_addr; 1974 xen_start_info->first_p2m_pfn = PFN_DOWN(new_area); 1975 xen_start_info->nr_p2m_frames = n_frames; 1976 } 1977 1978 void __init xen_reserve_special_pages(void) 1979 { 1980 phys_addr_t paddr; 1981 1982 memblock_reserve(__pa(xen_start_info), PAGE_SIZE); 1983 if (xen_start_info->store_mfn) { 1984 paddr = PFN_PHYS(mfn_to_pfn(xen_start_info->store_mfn)); 1985 memblock_reserve(paddr, PAGE_SIZE); 1986 } 1987 if (!xen_initial_domain()) { 1988 paddr = PFN_PHYS(mfn_to_pfn(xen_start_info->console.domU.mfn)); 1989 memblock_reserve(paddr, PAGE_SIZE); 1990 } 1991 } 1992 1993 void __init xen_pt_check_e820(void) 1994 { 1995 if (xen_is_e820_reserved(xen_pt_base, xen_pt_size)) { 1996 xen_raw_console_write("Xen hypervisor allocated page table memory conflicts with E820 map\n"); 1997 BUG(); 1998 } 1999 } 2000 2001 static unsigned char dummy_mapping[PAGE_SIZE] __page_aligned_bss; 2002 2003 static void xen_set_fixmap(unsigned idx, phys_addr_t phys, pgprot_t prot) 2004 { 2005 pte_t pte; 2006 2007 phys >>= PAGE_SHIFT; 2008 2009 switch (idx) { 2010 case FIX_BTMAP_END ... FIX_BTMAP_BEGIN: 2011 #ifdef CONFIG_X86_VSYSCALL_EMULATION 2012 case VSYSCALL_PAGE: 2013 #endif 2014 /* All local page mappings */ 2015 pte = pfn_pte(phys, prot); 2016 break; 2017 2018 #ifdef CONFIG_X86_LOCAL_APIC 2019 case FIX_APIC_BASE: /* maps dummy local APIC */ 2020 pte = pfn_pte(PFN_DOWN(__pa(dummy_mapping)), PAGE_KERNEL); 2021 break; 2022 #endif 2023 2024 #ifdef CONFIG_X86_IO_APIC 2025 case FIX_IO_APIC_BASE_0 ... FIX_IO_APIC_BASE_END: 2026 /* 2027 * We just don't map the IO APIC - all access is via 2028 * hypercalls. Keep the address in the pte for reference. 2029 */ 2030 pte = pfn_pte(PFN_DOWN(__pa(dummy_mapping)), PAGE_KERNEL); 2031 break; 2032 #endif 2033 2034 case FIX_PARAVIRT_BOOTMAP: 2035 /* This is an MFN, but it isn't an IO mapping from the 2036 IO domain */ 2037 pte = mfn_pte(phys, prot); 2038 break; 2039 2040 default: 2041 /* By default, set_fixmap is used for hardware mappings */ 2042 pte = mfn_pte(phys, prot); 2043 break; 2044 } 2045 2046 __native_set_fixmap(idx, pte); 2047 2048 #ifdef CONFIG_X86_VSYSCALL_EMULATION 2049 /* Replicate changes to map the vsyscall page into the user 2050 pagetable vsyscall mapping. */ 2051 if (idx == VSYSCALL_PAGE) { 2052 unsigned long vaddr = __fix_to_virt(idx); 2053 set_pte_vaddr_pud(level3_user_vsyscall, vaddr, pte); 2054 } 2055 #endif 2056 } 2057 2058 static void __init xen_post_allocator_init(void) 2059 { 2060 pv_ops.mmu.set_pte = xen_set_pte; 2061 pv_ops.mmu.set_pmd = xen_set_pmd; 2062 pv_ops.mmu.set_pud = xen_set_pud; 2063 pv_ops.mmu.set_p4d = xen_set_p4d; 2064 2065 /* This will work as long as patching hasn't happened yet 2066 (which it hasn't) */ 2067 pv_ops.mmu.alloc_pte = xen_alloc_pte; 2068 pv_ops.mmu.alloc_pmd = xen_alloc_pmd; 2069 pv_ops.mmu.release_pte = xen_release_pte; 2070 pv_ops.mmu.release_pmd = xen_release_pmd; 2071 pv_ops.mmu.alloc_pud = xen_alloc_pud; 2072 pv_ops.mmu.release_pud = xen_release_pud; 2073 pv_ops.mmu.make_pte = PV_CALLEE_SAVE(xen_make_pte); 2074 2075 pv_ops.mmu.write_cr3 = &xen_write_cr3; 2076 } 2077 2078 static void xen_leave_lazy_mmu(void) 2079 { 2080 preempt_disable(); 2081 xen_mc_flush(); 2082 paravirt_leave_lazy_mmu(); 2083 preempt_enable(); 2084 } 2085 2086 static const struct pv_mmu_ops xen_mmu_ops __initconst = { 2087 .read_cr2 = __PV_IS_CALLEE_SAVE(xen_read_cr2), 2088 .write_cr2 = xen_write_cr2, 2089 2090 .read_cr3 = xen_read_cr3, 2091 .write_cr3 = xen_write_cr3_init, 2092 2093 .flush_tlb_user = xen_flush_tlb, 2094 .flush_tlb_kernel = xen_flush_tlb, 2095 .flush_tlb_one_user = xen_flush_tlb_one_user, 2096 .flush_tlb_others = xen_flush_tlb_others, 2097 .tlb_remove_table = tlb_remove_table, 2098 2099 .pgd_alloc = xen_pgd_alloc, 2100 .pgd_free = xen_pgd_free, 2101 2102 .alloc_pte = xen_alloc_pte_init, 2103 .release_pte = xen_release_pte_init, 2104 .alloc_pmd = xen_alloc_pmd_init, 2105 .release_pmd = xen_release_pmd_init, 2106 2107 .set_pte = xen_set_pte_init, 2108 .set_pte_at = xen_set_pte_at, 2109 .set_pmd = xen_set_pmd_hyper, 2110 2111 .ptep_modify_prot_start = __ptep_modify_prot_start, 2112 .ptep_modify_prot_commit = __ptep_modify_prot_commit, 2113 2114 .pte_val = PV_CALLEE_SAVE(xen_pte_val), 2115 .pgd_val = PV_CALLEE_SAVE(xen_pgd_val), 2116 2117 .make_pte = PV_CALLEE_SAVE(xen_make_pte_init), 2118 .make_pgd = PV_CALLEE_SAVE(xen_make_pgd), 2119 2120 .set_pud = xen_set_pud_hyper, 2121 2122 .make_pmd = PV_CALLEE_SAVE(xen_make_pmd), 2123 .pmd_val = PV_CALLEE_SAVE(xen_pmd_val), 2124 2125 .pud_val = PV_CALLEE_SAVE(xen_pud_val), 2126 .make_pud = PV_CALLEE_SAVE(xen_make_pud), 2127 .set_p4d = xen_set_p4d_hyper, 2128 2129 .alloc_pud = xen_alloc_pmd_init, 2130 .release_pud = xen_release_pmd_init, 2131 2132 #if CONFIG_PGTABLE_LEVELS >= 5 2133 .p4d_val = PV_CALLEE_SAVE(xen_p4d_val), 2134 .make_p4d = PV_CALLEE_SAVE(xen_make_p4d), 2135 #endif 2136 2137 .activate_mm = xen_activate_mm, 2138 .dup_mmap = xen_dup_mmap, 2139 .exit_mmap = xen_exit_mmap, 2140 2141 .lazy_mode = { 2142 .enter = paravirt_enter_lazy_mmu, 2143 .leave = xen_leave_lazy_mmu, 2144 .flush = paravirt_flush_lazy_mmu, 2145 }, 2146 2147 .set_fixmap = xen_set_fixmap, 2148 }; 2149 2150 void __init xen_init_mmu_ops(void) 2151 { 2152 x86_init.paging.pagetable_init = xen_pagetable_init; 2153 x86_init.hyper.init_after_bootmem = xen_after_bootmem; 2154 2155 pv_ops.mmu = xen_mmu_ops; 2156 2157 memset(dummy_mapping, 0xff, PAGE_SIZE); 2158 } 2159 2160 /* Protected by xen_reservation_lock. */ 2161 #define MAX_CONTIG_ORDER 9 /* 2MB */ 2162 static unsigned long discontig_frames[1<<MAX_CONTIG_ORDER]; 2163 2164 #define VOID_PTE (mfn_pte(0, __pgprot(0))) 2165 static void xen_zap_pfn_range(unsigned long vaddr, unsigned int order, 2166 unsigned long *in_frames, 2167 unsigned long *out_frames) 2168 { 2169 int i; 2170 struct multicall_space mcs; 2171 2172 xen_mc_batch(); 2173 for (i = 0; i < (1UL<<order); i++, vaddr += PAGE_SIZE) { 2174 mcs = __xen_mc_entry(0); 2175 2176 if (in_frames) 2177 in_frames[i] = virt_to_mfn(vaddr); 2178 2179 MULTI_update_va_mapping(mcs.mc, vaddr, VOID_PTE, 0); 2180 __set_phys_to_machine(virt_to_pfn(vaddr), INVALID_P2M_ENTRY); 2181 2182 if (out_frames) 2183 out_frames[i] = virt_to_pfn(vaddr); 2184 } 2185 xen_mc_issue(0); 2186 } 2187 2188 /* 2189 * Update the pfn-to-mfn mappings for a virtual address range, either to 2190 * point to an array of mfns, or contiguously from a single starting 2191 * mfn. 2192 */ 2193 static void xen_remap_exchanged_ptes(unsigned long vaddr, int order, 2194 unsigned long *mfns, 2195 unsigned long first_mfn) 2196 { 2197 unsigned i, limit; 2198 unsigned long mfn; 2199 2200 xen_mc_batch(); 2201 2202 limit = 1u << order; 2203 for (i = 0; i < limit; i++, vaddr += PAGE_SIZE) { 2204 struct multicall_space mcs; 2205 unsigned flags; 2206 2207 mcs = __xen_mc_entry(0); 2208 if (mfns) 2209 mfn = mfns[i]; 2210 else 2211 mfn = first_mfn + i; 2212 2213 if (i < (limit - 1)) 2214 flags = 0; 2215 else { 2216 if (order == 0) 2217 flags = UVMF_INVLPG | UVMF_ALL; 2218 else 2219 flags = UVMF_TLB_FLUSH | UVMF_ALL; 2220 } 2221 2222 MULTI_update_va_mapping(mcs.mc, vaddr, 2223 mfn_pte(mfn, PAGE_KERNEL), flags); 2224 2225 set_phys_to_machine(virt_to_pfn(vaddr), mfn); 2226 } 2227 2228 xen_mc_issue(0); 2229 } 2230 2231 /* 2232 * Perform the hypercall to exchange a region of our pfns to point to 2233 * memory with the required contiguous alignment. Takes the pfns as 2234 * input, and populates mfns as output. 2235 * 2236 * Returns a success code indicating whether the hypervisor was able to 2237 * satisfy the request or not. 2238 */ 2239 static int xen_exchange_memory(unsigned long extents_in, unsigned int order_in, 2240 unsigned long *pfns_in, 2241 unsigned long extents_out, 2242 unsigned int order_out, 2243 unsigned long *mfns_out, 2244 unsigned int address_bits) 2245 { 2246 long rc; 2247 int success; 2248 2249 struct xen_memory_exchange exchange = { 2250 .in = { 2251 .nr_extents = extents_in, 2252 .extent_order = order_in, 2253 .extent_start = pfns_in, 2254 .domid = DOMID_SELF 2255 }, 2256 .out = { 2257 .nr_extents = extents_out, 2258 .extent_order = order_out, 2259 .extent_start = mfns_out, 2260 .address_bits = address_bits, 2261 .domid = DOMID_SELF 2262 } 2263 }; 2264 2265 BUG_ON(extents_in << order_in != extents_out << order_out); 2266 2267 rc = HYPERVISOR_memory_op(XENMEM_exchange, &exchange); 2268 success = (exchange.nr_exchanged == extents_in); 2269 2270 BUG_ON(!success && ((exchange.nr_exchanged != 0) || (rc == 0))); 2271 BUG_ON(success && (rc != 0)); 2272 2273 return success; 2274 } 2275 2276 int xen_create_contiguous_region(phys_addr_t pstart, unsigned int order, 2277 unsigned int address_bits, 2278 dma_addr_t *dma_handle) 2279 { 2280 unsigned long *in_frames = discontig_frames, out_frame; 2281 unsigned long flags; 2282 int success; 2283 unsigned long vstart = (unsigned long)phys_to_virt(pstart); 2284 2285 /* 2286 * Currently an auto-translated guest will not perform I/O, nor will 2287 * it require PAE page directories below 4GB. Therefore any calls to 2288 * this function are redundant and can be ignored. 2289 */ 2290 2291 if (unlikely(order > MAX_CONTIG_ORDER)) 2292 return -ENOMEM; 2293 2294 memset((void *) vstart, 0, PAGE_SIZE << order); 2295 2296 spin_lock_irqsave(&xen_reservation_lock, flags); 2297 2298 /* 1. Zap current PTEs, remembering MFNs. */ 2299 xen_zap_pfn_range(vstart, order, in_frames, NULL); 2300 2301 /* 2. Get a new contiguous memory extent. */ 2302 out_frame = virt_to_pfn(vstart); 2303 success = xen_exchange_memory(1UL << order, 0, in_frames, 2304 1, order, &out_frame, 2305 address_bits); 2306 2307 /* 3. Map the new extent in place of old pages. */ 2308 if (success) 2309 xen_remap_exchanged_ptes(vstart, order, NULL, out_frame); 2310 else 2311 xen_remap_exchanged_ptes(vstart, order, in_frames, 0); 2312 2313 spin_unlock_irqrestore(&xen_reservation_lock, flags); 2314 2315 *dma_handle = virt_to_machine(vstart).maddr; 2316 return success ? 0 : -ENOMEM; 2317 } 2318 2319 void xen_destroy_contiguous_region(phys_addr_t pstart, unsigned int order) 2320 { 2321 unsigned long *out_frames = discontig_frames, in_frame; 2322 unsigned long flags; 2323 int success; 2324 unsigned long vstart; 2325 2326 if (unlikely(order > MAX_CONTIG_ORDER)) 2327 return; 2328 2329 vstart = (unsigned long)phys_to_virt(pstart); 2330 memset((void *) vstart, 0, PAGE_SIZE << order); 2331 2332 spin_lock_irqsave(&xen_reservation_lock, flags); 2333 2334 /* 1. Find start MFN of contiguous extent. */ 2335 in_frame = virt_to_mfn(vstart); 2336 2337 /* 2. Zap current PTEs. */ 2338 xen_zap_pfn_range(vstart, order, NULL, out_frames); 2339 2340 /* 3. Do the exchange for non-contiguous MFNs. */ 2341 success = xen_exchange_memory(1, order, &in_frame, 1UL << order, 2342 0, out_frames, 0); 2343 2344 /* 4. Map new pages in place of old pages. */ 2345 if (success) 2346 xen_remap_exchanged_ptes(vstart, order, out_frames, 0); 2347 else 2348 xen_remap_exchanged_ptes(vstart, order, NULL, in_frame); 2349 2350 spin_unlock_irqrestore(&xen_reservation_lock, flags); 2351 } 2352 2353 static noinline void xen_flush_tlb_all(void) 2354 { 2355 struct mmuext_op *op; 2356 struct multicall_space mcs; 2357 2358 preempt_disable(); 2359 2360 mcs = xen_mc_entry(sizeof(*op)); 2361 2362 op = mcs.args; 2363 op->cmd = MMUEXT_TLB_FLUSH_ALL; 2364 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); 2365 2366 xen_mc_issue(PARAVIRT_LAZY_MMU); 2367 2368 preempt_enable(); 2369 } 2370 2371 #define REMAP_BATCH_SIZE 16 2372 2373 struct remap_data { 2374 xen_pfn_t *pfn; 2375 bool contiguous; 2376 bool no_translate; 2377 pgprot_t prot; 2378 struct mmu_update *mmu_update; 2379 }; 2380 2381 static int remap_area_pfn_pte_fn(pte_t *ptep, unsigned long addr, void *data) 2382 { 2383 struct remap_data *rmd = data; 2384 pte_t pte = pte_mkspecial(mfn_pte(*rmd->pfn, rmd->prot)); 2385 2386 /* 2387 * If we have a contiguous range, just update the pfn itself, 2388 * else update pointer to be "next pfn". 2389 */ 2390 if (rmd->contiguous) 2391 (*rmd->pfn)++; 2392 else 2393 rmd->pfn++; 2394 2395 rmd->mmu_update->ptr = virt_to_machine(ptep).maddr; 2396 rmd->mmu_update->ptr |= rmd->no_translate ? 2397 MMU_PT_UPDATE_NO_TRANSLATE : 2398 MMU_NORMAL_PT_UPDATE; 2399 rmd->mmu_update->val = pte_val_ma(pte); 2400 rmd->mmu_update++; 2401 2402 return 0; 2403 } 2404 2405 int xen_remap_pfn(struct vm_area_struct *vma, unsigned long addr, 2406 xen_pfn_t *pfn, int nr, int *err_ptr, pgprot_t prot, 2407 unsigned int domid, bool no_translate, struct page **pages) 2408 { 2409 int err = 0; 2410 struct remap_data rmd; 2411 struct mmu_update mmu_update[REMAP_BATCH_SIZE]; 2412 unsigned long range; 2413 int mapped = 0; 2414 2415 BUG_ON(!((vma->vm_flags & (VM_PFNMAP | VM_IO)) == (VM_PFNMAP | VM_IO))); 2416 2417 rmd.pfn = pfn; 2418 rmd.prot = prot; 2419 /* 2420 * We use the err_ptr to indicate if there we are doing a contiguous 2421 * mapping or a discontigious mapping. 2422 */ 2423 rmd.contiguous = !err_ptr; 2424 rmd.no_translate = no_translate; 2425 2426 while (nr) { 2427 int index = 0; 2428 int done = 0; 2429 int batch = min(REMAP_BATCH_SIZE, nr); 2430 int batch_left = batch; 2431 2432 range = (unsigned long)batch << PAGE_SHIFT; 2433 2434 rmd.mmu_update = mmu_update; 2435 err = apply_to_page_range(vma->vm_mm, addr, range, 2436 remap_area_pfn_pte_fn, &rmd); 2437 if (err) 2438 goto out; 2439 2440 /* 2441 * We record the error for each page that gives an error, but 2442 * continue mapping until the whole set is done 2443 */ 2444 do { 2445 int i; 2446 2447 err = HYPERVISOR_mmu_update(&mmu_update[index], 2448 batch_left, &done, domid); 2449 2450 /* 2451 * @err_ptr may be the same buffer as @gfn, so 2452 * only clear it after each chunk of @gfn is 2453 * used. 2454 */ 2455 if (err_ptr) { 2456 for (i = index; i < index + done; i++) 2457 err_ptr[i] = 0; 2458 } 2459 if (err < 0) { 2460 if (!err_ptr) 2461 goto out; 2462 err_ptr[i] = err; 2463 done++; /* Skip failed frame. */ 2464 } else 2465 mapped += done; 2466 batch_left -= done; 2467 index += done; 2468 } while (batch_left); 2469 2470 nr -= batch; 2471 addr += range; 2472 if (err_ptr) 2473 err_ptr += batch; 2474 cond_resched(); 2475 } 2476 out: 2477 2478 xen_flush_tlb_all(); 2479 2480 return err < 0 ? err : mapped; 2481 } 2482 EXPORT_SYMBOL_GPL(xen_remap_pfn); 2483 2484 #ifdef CONFIG_KEXEC_CORE 2485 phys_addr_t paddr_vmcoreinfo_note(void) 2486 { 2487 if (xen_pv_domain()) 2488 return virt_to_machine(vmcoreinfo_note).maddr; 2489 else 2490 return __pa(vmcoreinfo_note); 2491 } 2492 #endif /* CONFIG_KEXEC_CORE */ 2493