xref: /openbmc/linux/arch/x86/xen/mmu.c (revision 9c1f8594)
1 /*
2  * Xen mmu operations
3  *
4  * This file contains the various mmu fetch and update operations.
5  * The most important job they must perform is the mapping between the
6  * domain's pfn and the overall machine mfns.
7  *
8  * Xen allows guests to directly update the pagetable, in a controlled
9  * fashion.  In other words, the guest modifies the same pagetable
10  * that the CPU actually uses, which eliminates the overhead of having
11  * a separate shadow pagetable.
12  *
13  * In order to allow this, it falls on the guest domain to map its
14  * notion of a "physical" pfn - which is just a domain-local linear
15  * address - into a real "machine address" which the CPU's MMU can
16  * use.
17  *
18  * A pgd_t/pmd_t/pte_t will typically contain an mfn, and so can be
19  * inserted directly into the pagetable.  When creating a new
20  * pte/pmd/pgd, it converts the passed pfn into an mfn.  Conversely,
21  * when reading the content back with __(pgd|pmd|pte)_val, it converts
22  * the mfn back into a pfn.
23  *
24  * The other constraint is that all pages which make up a pagetable
25  * must be mapped read-only in the guest.  This prevents uncontrolled
26  * guest updates to the pagetable.  Xen strictly enforces this, and
27  * will disallow any pagetable update which will end up mapping a
28  * pagetable page RW, and will disallow using any writable page as a
29  * pagetable.
30  *
31  * Naively, when loading %cr3 with the base of a new pagetable, Xen
32  * would need to validate the whole pagetable before going on.
33  * Naturally, this is quite slow.  The solution is to "pin" a
34  * pagetable, which enforces all the constraints on the pagetable even
35  * when it is not actively in use.  This menas that Xen can be assured
36  * that it is still valid when you do load it into %cr3, and doesn't
37  * need to revalidate it.
38  *
39  * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
40  */
41 #include <linux/sched.h>
42 #include <linux/highmem.h>
43 #include <linux/debugfs.h>
44 #include <linux/bug.h>
45 #include <linux/vmalloc.h>
46 #include <linux/module.h>
47 #include <linux/gfp.h>
48 #include <linux/memblock.h>
49 #include <linux/seq_file.h>
50 
51 #include <trace/events/xen.h>
52 
53 #include <asm/pgtable.h>
54 #include <asm/tlbflush.h>
55 #include <asm/fixmap.h>
56 #include <asm/mmu_context.h>
57 #include <asm/setup.h>
58 #include <asm/paravirt.h>
59 #include <asm/e820.h>
60 #include <asm/linkage.h>
61 #include <asm/page.h>
62 #include <asm/init.h>
63 #include <asm/pat.h>
64 #include <asm/smp.h>
65 
66 #include <asm/xen/hypercall.h>
67 #include <asm/xen/hypervisor.h>
68 
69 #include <xen/xen.h>
70 #include <xen/page.h>
71 #include <xen/interface/xen.h>
72 #include <xen/interface/hvm/hvm_op.h>
73 #include <xen/interface/version.h>
74 #include <xen/interface/memory.h>
75 #include <xen/hvc-console.h>
76 
77 #include "multicalls.h"
78 #include "mmu.h"
79 #include "debugfs.h"
80 
81 /*
82  * Protects atomic reservation decrease/increase against concurrent increases.
83  * Also protects non-atomic updates of current_pages and balloon lists.
84  */
85 DEFINE_SPINLOCK(xen_reservation_lock);
86 
87 /*
88  * Identity map, in addition to plain kernel map.  This needs to be
89  * large enough to allocate page table pages to allocate the rest.
90  * Each page can map 2MB.
91  */
92 #define LEVEL1_IDENT_ENTRIES	(PTRS_PER_PTE * 4)
93 static RESERVE_BRK_ARRAY(pte_t, level1_ident_pgt, LEVEL1_IDENT_ENTRIES);
94 
95 #ifdef CONFIG_X86_64
96 /* l3 pud for userspace vsyscall mapping */
97 static pud_t level3_user_vsyscall[PTRS_PER_PUD] __page_aligned_bss;
98 #endif /* CONFIG_X86_64 */
99 
100 /*
101  * Note about cr3 (pagetable base) values:
102  *
103  * xen_cr3 contains the current logical cr3 value; it contains the
104  * last set cr3.  This may not be the current effective cr3, because
105  * its update may be being lazily deferred.  However, a vcpu looking
106  * at its own cr3 can use this value knowing that it everything will
107  * be self-consistent.
108  *
109  * xen_current_cr3 contains the actual vcpu cr3; it is set once the
110  * hypercall to set the vcpu cr3 is complete (so it may be a little
111  * out of date, but it will never be set early).  If one vcpu is
112  * looking at another vcpu's cr3 value, it should use this variable.
113  */
114 DEFINE_PER_CPU(unsigned long, xen_cr3);	 /* cr3 stored as physaddr */
115 DEFINE_PER_CPU(unsigned long, xen_current_cr3);	 /* actual vcpu cr3 */
116 
117 
118 /*
119  * Just beyond the highest usermode address.  STACK_TOP_MAX has a
120  * redzone above it, so round it up to a PGD boundary.
121  */
122 #define USER_LIMIT	((STACK_TOP_MAX + PGDIR_SIZE - 1) & PGDIR_MASK)
123 
124 unsigned long arbitrary_virt_to_mfn(void *vaddr)
125 {
126 	xmaddr_t maddr = arbitrary_virt_to_machine(vaddr);
127 
128 	return PFN_DOWN(maddr.maddr);
129 }
130 
131 xmaddr_t arbitrary_virt_to_machine(void *vaddr)
132 {
133 	unsigned long address = (unsigned long)vaddr;
134 	unsigned int level;
135 	pte_t *pte;
136 	unsigned offset;
137 
138 	/*
139 	 * if the PFN is in the linear mapped vaddr range, we can just use
140 	 * the (quick) virt_to_machine() p2m lookup
141 	 */
142 	if (virt_addr_valid(vaddr))
143 		return virt_to_machine(vaddr);
144 
145 	/* otherwise we have to do a (slower) full page-table walk */
146 
147 	pte = lookup_address(address, &level);
148 	BUG_ON(pte == NULL);
149 	offset = address & ~PAGE_MASK;
150 	return XMADDR(((phys_addr_t)pte_mfn(*pte) << PAGE_SHIFT) + offset);
151 }
152 EXPORT_SYMBOL_GPL(arbitrary_virt_to_machine);
153 
154 void make_lowmem_page_readonly(void *vaddr)
155 {
156 	pte_t *pte, ptev;
157 	unsigned long address = (unsigned long)vaddr;
158 	unsigned int level;
159 
160 	pte = lookup_address(address, &level);
161 	if (pte == NULL)
162 		return;		/* vaddr missing */
163 
164 	ptev = pte_wrprotect(*pte);
165 
166 	if (HYPERVISOR_update_va_mapping(address, ptev, 0))
167 		BUG();
168 }
169 
170 void make_lowmem_page_readwrite(void *vaddr)
171 {
172 	pte_t *pte, ptev;
173 	unsigned long address = (unsigned long)vaddr;
174 	unsigned int level;
175 
176 	pte = lookup_address(address, &level);
177 	if (pte == NULL)
178 		return;		/* vaddr missing */
179 
180 	ptev = pte_mkwrite(*pte);
181 
182 	if (HYPERVISOR_update_va_mapping(address, ptev, 0))
183 		BUG();
184 }
185 
186 
187 static bool xen_page_pinned(void *ptr)
188 {
189 	struct page *page = virt_to_page(ptr);
190 
191 	return PagePinned(page);
192 }
193 
194 void xen_set_domain_pte(pte_t *ptep, pte_t pteval, unsigned domid)
195 {
196 	struct multicall_space mcs;
197 	struct mmu_update *u;
198 
199 	trace_xen_mmu_set_domain_pte(ptep, pteval, domid);
200 
201 	mcs = xen_mc_entry(sizeof(*u));
202 	u = mcs.args;
203 
204 	/* ptep might be kmapped when using 32-bit HIGHPTE */
205 	u->ptr = virt_to_machine(ptep).maddr;
206 	u->val = pte_val_ma(pteval);
207 
208 	MULTI_mmu_update(mcs.mc, mcs.args, 1, NULL, domid);
209 
210 	xen_mc_issue(PARAVIRT_LAZY_MMU);
211 }
212 EXPORT_SYMBOL_GPL(xen_set_domain_pte);
213 
214 static void xen_extend_mmu_update(const struct mmu_update *update)
215 {
216 	struct multicall_space mcs;
217 	struct mmu_update *u;
218 
219 	mcs = xen_mc_extend_args(__HYPERVISOR_mmu_update, sizeof(*u));
220 
221 	if (mcs.mc != NULL) {
222 		mcs.mc->args[1]++;
223 	} else {
224 		mcs = __xen_mc_entry(sizeof(*u));
225 		MULTI_mmu_update(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
226 	}
227 
228 	u = mcs.args;
229 	*u = *update;
230 }
231 
232 static void xen_extend_mmuext_op(const struct mmuext_op *op)
233 {
234 	struct multicall_space mcs;
235 	struct mmuext_op *u;
236 
237 	mcs = xen_mc_extend_args(__HYPERVISOR_mmuext_op, sizeof(*u));
238 
239 	if (mcs.mc != NULL) {
240 		mcs.mc->args[1]++;
241 	} else {
242 		mcs = __xen_mc_entry(sizeof(*u));
243 		MULTI_mmuext_op(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
244 	}
245 
246 	u = mcs.args;
247 	*u = *op;
248 }
249 
250 static void xen_set_pmd_hyper(pmd_t *ptr, pmd_t val)
251 {
252 	struct mmu_update u;
253 
254 	preempt_disable();
255 
256 	xen_mc_batch();
257 
258 	/* ptr may be ioremapped for 64-bit pagetable setup */
259 	u.ptr = arbitrary_virt_to_machine(ptr).maddr;
260 	u.val = pmd_val_ma(val);
261 	xen_extend_mmu_update(&u);
262 
263 	xen_mc_issue(PARAVIRT_LAZY_MMU);
264 
265 	preempt_enable();
266 }
267 
268 static void xen_set_pmd(pmd_t *ptr, pmd_t val)
269 {
270 	trace_xen_mmu_set_pmd(ptr, val);
271 
272 	/* If page is not pinned, we can just update the entry
273 	   directly */
274 	if (!xen_page_pinned(ptr)) {
275 		*ptr = val;
276 		return;
277 	}
278 
279 	xen_set_pmd_hyper(ptr, val);
280 }
281 
282 /*
283  * Associate a virtual page frame with a given physical page frame
284  * and protection flags for that frame.
285  */
286 void set_pte_mfn(unsigned long vaddr, unsigned long mfn, pgprot_t flags)
287 {
288 	set_pte_vaddr(vaddr, mfn_pte(mfn, flags));
289 }
290 
291 static bool xen_batched_set_pte(pte_t *ptep, pte_t pteval)
292 {
293 	struct mmu_update u;
294 
295 	if (paravirt_get_lazy_mode() != PARAVIRT_LAZY_MMU)
296 		return false;
297 
298 	xen_mc_batch();
299 
300 	u.ptr = virt_to_machine(ptep).maddr | MMU_NORMAL_PT_UPDATE;
301 	u.val = pte_val_ma(pteval);
302 	xen_extend_mmu_update(&u);
303 
304 	xen_mc_issue(PARAVIRT_LAZY_MMU);
305 
306 	return true;
307 }
308 
309 static inline void __xen_set_pte(pte_t *ptep, pte_t pteval)
310 {
311 	if (!xen_batched_set_pte(ptep, pteval))
312 		native_set_pte(ptep, pteval);
313 }
314 
315 static void xen_set_pte(pte_t *ptep, pte_t pteval)
316 {
317 	trace_xen_mmu_set_pte(ptep, pteval);
318 	__xen_set_pte(ptep, pteval);
319 }
320 
321 static void xen_set_pte_at(struct mm_struct *mm, unsigned long addr,
322 		    pte_t *ptep, pte_t pteval)
323 {
324 	trace_xen_mmu_set_pte_at(mm, addr, ptep, pteval);
325 	__xen_set_pte(ptep, pteval);
326 }
327 
328 pte_t xen_ptep_modify_prot_start(struct mm_struct *mm,
329 				 unsigned long addr, pte_t *ptep)
330 {
331 	/* Just return the pte as-is.  We preserve the bits on commit */
332 	trace_xen_mmu_ptep_modify_prot_start(mm, addr, ptep, *ptep);
333 	return *ptep;
334 }
335 
336 void xen_ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
337 				 pte_t *ptep, pte_t pte)
338 {
339 	struct mmu_update u;
340 
341 	trace_xen_mmu_ptep_modify_prot_commit(mm, addr, ptep, pte);
342 	xen_mc_batch();
343 
344 	u.ptr = virt_to_machine(ptep).maddr | MMU_PT_UPDATE_PRESERVE_AD;
345 	u.val = pte_val_ma(pte);
346 	xen_extend_mmu_update(&u);
347 
348 	xen_mc_issue(PARAVIRT_LAZY_MMU);
349 }
350 
351 /* Assume pteval_t is equivalent to all the other *val_t types. */
352 static pteval_t pte_mfn_to_pfn(pteval_t val)
353 {
354 	if (val & _PAGE_PRESENT) {
355 		unsigned long mfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT;
356 		pteval_t flags = val & PTE_FLAGS_MASK;
357 		val = ((pteval_t)mfn_to_pfn(mfn) << PAGE_SHIFT) | flags;
358 	}
359 
360 	return val;
361 }
362 
363 static pteval_t pte_pfn_to_mfn(pteval_t val)
364 {
365 	if (val & _PAGE_PRESENT) {
366 		unsigned long pfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT;
367 		pteval_t flags = val & PTE_FLAGS_MASK;
368 		unsigned long mfn;
369 
370 		if (!xen_feature(XENFEAT_auto_translated_physmap))
371 			mfn = get_phys_to_machine(pfn);
372 		else
373 			mfn = pfn;
374 		/*
375 		 * If there's no mfn for the pfn, then just create an
376 		 * empty non-present pte.  Unfortunately this loses
377 		 * information about the original pfn, so
378 		 * pte_mfn_to_pfn is asymmetric.
379 		 */
380 		if (unlikely(mfn == INVALID_P2M_ENTRY)) {
381 			mfn = 0;
382 			flags = 0;
383 		} else {
384 			/*
385 			 * Paramount to do this test _after_ the
386 			 * INVALID_P2M_ENTRY as INVALID_P2M_ENTRY &
387 			 * IDENTITY_FRAME_BIT resolves to true.
388 			 */
389 			mfn &= ~FOREIGN_FRAME_BIT;
390 			if (mfn & IDENTITY_FRAME_BIT) {
391 				mfn &= ~IDENTITY_FRAME_BIT;
392 				flags |= _PAGE_IOMAP;
393 			}
394 		}
395 		val = ((pteval_t)mfn << PAGE_SHIFT) | flags;
396 	}
397 
398 	return val;
399 }
400 
401 static pteval_t iomap_pte(pteval_t val)
402 {
403 	if (val & _PAGE_PRESENT) {
404 		unsigned long pfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT;
405 		pteval_t flags = val & PTE_FLAGS_MASK;
406 
407 		/* We assume the pte frame number is a MFN, so
408 		   just use it as-is. */
409 		val = ((pteval_t)pfn << PAGE_SHIFT) | flags;
410 	}
411 
412 	return val;
413 }
414 
415 static pteval_t xen_pte_val(pte_t pte)
416 {
417 	pteval_t pteval = pte.pte;
418 
419 	/* If this is a WC pte, convert back from Xen WC to Linux WC */
420 	if ((pteval & (_PAGE_PAT | _PAGE_PCD | _PAGE_PWT)) == _PAGE_PAT) {
421 		WARN_ON(!pat_enabled);
422 		pteval = (pteval & ~_PAGE_PAT) | _PAGE_PWT;
423 	}
424 
425 	if (xen_initial_domain() && (pteval & _PAGE_IOMAP))
426 		return pteval;
427 
428 	return pte_mfn_to_pfn(pteval);
429 }
430 PV_CALLEE_SAVE_REGS_THUNK(xen_pte_val);
431 
432 static pgdval_t xen_pgd_val(pgd_t pgd)
433 {
434 	return pte_mfn_to_pfn(pgd.pgd);
435 }
436 PV_CALLEE_SAVE_REGS_THUNK(xen_pgd_val);
437 
438 /*
439  * Xen's PAT setup is part of its ABI, though I assume entries 6 & 7
440  * are reserved for now, to correspond to the Intel-reserved PAT
441  * types.
442  *
443  * We expect Linux's PAT set as follows:
444  *
445  * Idx  PTE flags        Linux    Xen    Default
446  * 0                     WB       WB     WB
447  * 1            PWT      WC       WT     WT
448  * 2        PCD          UC-      UC-    UC-
449  * 3        PCD PWT      UC       UC     UC
450  * 4    PAT              WB       WC     WB
451  * 5    PAT     PWT      WC       WP     WT
452  * 6    PAT PCD          UC-      UC     UC-
453  * 7    PAT PCD PWT      UC       UC     UC
454  */
455 
456 void xen_set_pat(u64 pat)
457 {
458 	/* We expect Linux to use a PAT setting of
459 	 * UC UC- WC WB (ignoring the PAT flag) */
460 	WARN_ON(pat != 0x0007010600070106ull);
461 }
462 
463 static pte_t xen_make_pte(pteval_t pte)
464 {
465 	phys_addr_t addr = (pte & PTE_PFN_MASK);
466 
467 	/* If Linux is trying to set a WC pte, then map to the Xen WC.
468 	 * If _PAGE_PAT is set, then it probably means it is really
469 	 * _PAGE_PSE, so avoid fiddling with the PAT mapping and hope
470 	 * things work out OK...
471 	 *
472 	 * (We should never see kernel mappings with _PAGE_PSE set,
473 	 * but we could see hugetlbfs mappings, I think.).
474 	 */
475 	if (pat_enabled && !WARN_ON(pte & _PAGE_PAT)) {
476 		if ((pte & (_PAGE_PCD | _PAGE_PWT)) == _PAGE_PWT)
477 			pte = (pte & ~(_PAGE_PCD | _PAGE_PWT)) | _PAGE_PAT;
478 	}
479 
480 	/*
481 	 * Unprivileged domains are allowed to do IOMAPpings for
482 	 * PCI passthrough, but not map ISA space.  The ISA
483 	 * mappings are just dummy local mappings to keep other
484 	 * parts of the kernel happy.
485 	 */
486 	if (unlikely(pte & _PAGE_IOMAP) &&
487 	    (xen_initial_domain() || addr >= ISA_END_ADDRESS)) {
488 		pte = iomap_pte(pte);
489 	} else {
490 		pte &= ~_PAGE_IOMAP;
491 		pte = pte_pfn_to_mfn(pte);
492 	}
493 
494 	return native_make_pte(pte);
495 }
496 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte);
497 
498 #ifdef CONFIG_XEN_DEBUG
499 pte_t xen_make_pte_debug(pteval_t pte)
500 {
501 	phys_addr_t addr = (pte & PTE_PFN_MASK);
502 	phys_addr_t other_addr;
503 	bool io_page = false;
504 	pte_t _pte;
505 
506 	if (pte & _PAGE_IOMAP)
507 		io_page = true;
508 
509 	_pte = xen_make_pte(pte);
510 
511 	if (!addr)
512 		return _pte;
513 
514 	if (io_page &&
515 	    (xen_initial_domain() || addr >= ISA_END_ADDRESS)) {
516 		other_addr = pfn_to_mfn(addr >> PAGE_SHIFT) << PAGE_SHIFT;
517 		WARN_ONCE(addr != other_addr,
518 			"0x%lx is using VM_IO, but it is 0x%lx!\n",
519 			(unsigned long)addr, (unsigned long)other_addr);
520 	} else {
521 		pteval_t iomap_set = (_pte.pte & PTE_FLAGS_MASK) & _PAGE_IOMAP;
522 		other_addr = (_pte.pte & PTE_PFN_MASK);
523 		WARN_ONCE((addr == other_addr) && (!io_page) && (!iomap_set),
524 			"0x%lx is missing VM_IO (and wasn't fixed)!\n",
525 			(unsigned long)addr);
526 	}
527 
528 	return _pte;
529 }
530 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte_debug);
531 #endif
532 
533 static pgd_t xen_make_pgd(pgdval_t pgd)
534 {
535 	pgd = pte_pfn_to_mfn(pgd);
536 	return native_make_pgd(pgd);
537 }
538 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pgd);
539 
540 static pmdval_t xen_pmd_val(pmd_t pmd)
541 {
542 	return pte_mfn_to_pfn(pmd.pmd);
543 }
544 PV_CALLEE_SAVE_REGS_THUNK(xen_pmd_val);
545 
546 static void xen_set_pud_hyper(pud_t *ptr, pud_t val)
547 {
548 	struct mmu_update u;
549 
550 	preempt_disable();
551 
552 	xen_mc_batch();
553 
554 	/* ptr may be ioremapped for 64-bit pagetable setup */
555 	u.ptr = arbitrary_virt_to_machine(ptr).maddr;
556 	u.val = pud_val_ma(val);
557 	xen_extend_mmu_update(&u);
558 
559 	xen_mc_issue(PARAVIRT_LAZY_MMU);
560 
561 	preempt_enable();
562 }
563 
564 static void xen_set_pud(pud_t *ptr, pud_t val)
565 {
566 	trace_xen_mmu_set_pud(ptr, val);
567 
568 	/* If page is not pinned, we can just update the entry
569 	   directly */
570 	if (!xen_page_pinned(ptr)) {
571 		*ptr = val;
572 		return;
573 	}
574 
575 	xen_set_pud_hyper(ptr, val);
576 }
577 
578 #ifdef CONFIG_X86_PAE
579 static void xen_set_pte_atomic(pte_t *ptep, pte_t pte)
580 {
581 	trace_xen_mmu_set_pte_atomic(ptep, pte);
582 	set_64bit((u64 *)ptep, native_pte_val(pte));
583 }
584 
585 static void xen_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
586 {
587 	trace_xen_mmu_pte_clear(mm, addr, ptep);
588 	if (!xen_batched_set_pte(ptep, native_make_pte(0)))
589 		native_pte_clear(mm, addr, ptep);
590 }
591 
592 static void xen_pmd_clear(pmd_t *pmdp)
593 {
594 	trace_xen_mmu_pmd_clear(pmdp);
595 	set_pmd(pmdp, __pmd(0));
596 }
597 #endif	/* CONFIG_X86_PAE */
598 
599 static pmd_t xen_make_pmd(pmdval_t pmd)
600 {
601 	pmd = pte_pfn_to_mfn(pmd);
602 	return native_make_pmd(pmd);
603 }
604 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pmd);
605 
606 #if PAGETABLE_LEVELS == 4
607 static pudval_t xen_pud_val(pud_t pud)
608 {
609 	return pte_mfn_to_pfn(pud.pud);
610 }
611 PV_CALLEE_SAVE_REGS_THUNK(xen_pud_val);
612 
613 static pud_t xen_make_pud(pudval_t pud)
614 {
615 	pud = pte_pfn_to_mfn(pud);
616 
617 	return native_make_pud(pud);
618 }
619 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pud);
620 
621 static pgd_t *xen_get_user_pgd(pgd_t *pgd)
622 {
623 	pgd_t *pgd_page = (pgd_t *)(((unsigned long)pgd) & PAGE_MASK);
624 	unsigned offset = pgd - pgd_page;
625 	pgd_t *user_ptr = NULL;
626 
627 	if (offset < pgd_index(USER_LIMIT)) {
628 		struct page *page = virt_to_page(pgd_page);
629 		user_ptr = (pgd_t *)page->private;
630 		if (user_ptr)
631 			user_ptr += offset;
632 	}
633 
634 	return user_ptr;
635 }
636 
637 static void __xen_set_pgd_hyper(pgd_t *ptr, pgd_t val)
638 {
639 	struct mmu_update u;
640 
641 	u.ptr = virt_to_machine(ptr).maddr;
642 	u.val = pgd_val_ma(val);
643 	xen_extend_mmu_update(&u);
644 }
645 
646 /*
647  * Raw hypercall-based set_pgd, intended for in early boot before
648  * there's a page structure.  This implies:
649  *  1. The only existing pagetable is the kernel's
650  *  2. It is always pinned
651  *  3. It has no user pagetable attached to it
652  */
653 static void __init xen_set_pgd_hyper(pgd_t *ptr, pgd_t val)
654 {
655 	preempt_disable();
656 
657 	xen_mc_batch();
658 
659 	__xen_set_pgd_hyper(ptr, val);
660 
661 	xen_mc_issue(PARAVIRT_LAZY_MMU);
662 
663 	preempt_enable();
664 }
665 
666 static void xen_set_pgd(pgd_t *ptr, pgd_t val)
667 {
668 	pgd_t *user_ptr = xen_get_user_pgd(ptr);
669 
670 	trace_xen_mmu_set_pgd(ptr, user_ptr, val);
671 
672 	/* If page is not pinned, we can just update the entry
673 	   directly */
674 	if (!xen_page_pinned(ptr)) {
675 		*ptr = val;
676 		if (user_ptr) {
677 			WARN_ON(xen_page_pinned(user_ptr));
678 			*user_ptr = val;
679 		}
680 		return;
681 	}
682 
683 	/* If it's pinned, then we can at least batch the kernel and
684 	   user updates together. */
685 	xen_mc_batch();
686 
687 	__xen_set_pgd_hyper(ptr, val);
688 	if (user_ptr)
689 		__xen_set_pgd_hyper(user_ptr, val);
690 
691 	xen_mc_issue(PARAVIRT_LAZY_MMU);
692 }
693 #endif	/* PAGETABLE_LEVELS == 4 */
694 
695 /*
696  * (Yet another) pagetable walker.  This one is intended for pinning a
697  * pagetable.  This means that it walks a pagetable and calls the
698  * callback function on each page it finds making up the page table,
699  * at every level.  It walks the entire pagetable, but it only bothers
700  * pinning pte pages which are below limit.  In the normal case this
701  * will be STACK_TOP_MAX, but at boot we need to pin up to
702  * FIXADDR_TOP.
703  *
704  * For 32-bit the important bit is that we don't pin beyond there,
705  * because then we start getting into Xen's ptes.
706  *
707  * For 64-bit, we must skip the Xen hole in the middle of the address
708  * space, just after the big x86-64 virtual hole.
709  */
710 static int __xen_pgd_walk(struct mm_struct *mm, pgd_t *pgd,
711 			  int (*func)(struct mm_struct *mm, struct page *,
712 				      enum pt_level),
713 			  unsigned long limit)
714 {
715 	int flush = 0;
716 	unsigned hole_low, hole_high;
717 	unsigned pgdidx_limit, pudidx_limit, pmdidx_limit;
718 	unsigned pgdidx, pudidx, pmdidx;
719 
720 	/* The limit is the last byte to be touched */
721 	limit--;
722 	BUG_ON(limit >= FIXADDR_TOP);
723 
724 	if (xen_feature(XENFEAT_auto_translated_physmap))
725 		return 0;
726 
727 	/*
728 	 * 64-bit has a great big hole in the middle of the address
729 	 * space, which contains the Xen mappings.  On 32-bit these
730 	 * will end up making a zero-sized hole and so is a no-op.
731 	 */
732 	hole_low = pgd_index(USER_LIMIT);
733 	hole_high = pgd_index(PAGE_OFFSET);
734 
735 	pgdidx_limit = pgd_index(limit);
736 #if PTRS_PER_PUD > 1
737 	pudidx_limit = pud_index(limit);
738 #else
739 	pudidx_limit = 0;
740 #endif
741 #if PTRS_PER_PMD > 1
742 	pmdidx_limit = pmd_index(limit);
743 #else
744 	pmdidx_limit = 0;
745 #endif
746 
747 	for (pgdidx = 0; pgdidx <= pgdidx_limit; pgdidx++) {
748 		pud_t *pud;
749 
750 		if (pgdidx >= hole_low && pgdidx < hole_high)
751 			continue;
752 
753 		if (!pgd_val(pgd[pgdidx]))
754 			continue;
755 
756 		pud = pud_offset(&pgd[pgdidx], 0);
757 
758 		if (PTRS_PER_PUD > 1) /* not folded */
759 			flush |= (*func)(mm, virt_to_page(pud), PT_PUD);
760 
761 		for (pudidx = 0; pudidx < PTRS_PER_PUD; pudidx++) {
762 			pmd_t *pmd;
763 
764 			if (pgdidx == pgdidx_limit &&
765 			    pudidx > pudidx_limit)
766 				goto out;
767 
768 			if (pud_none(pud[pudidx]))
769 				continue;
770 
771 			pmd = pmd_offset(&pud[pudidx], 0);
772 
773 			if (PTRS_PER_PMD > 1) /* not folded */
774 				flush |= (*func)(mm, virt_to_page(pmd), PT_PMD);
775 
776 			for (pmdidx = 0; pmdidx < PTRS_PER_PMD; pmdidx++) {
777 				struct page *pte;
778 
779 				if (pgdidx == pgdidx_limit &&
780 				    pudidx == pudidx_limit &&
781 				    pmdidx > pmdidx_limit)
782 					goto out;
783 
784 				if (pmd_none(pmd[pmdidx]))
785 					continue;
786 
787 				pte = pmd_page(pmd[pmdidx]);
788 				flush |= (*func)(mm, pte, PT_PTE);
789 			}
790 		}
791 	}
792 
793 out:
794 	/* Do the top level last, so that the callbacks can use it as
795 	   a cue to do final things like tlb flushes. */
796 	flush |= (*func)(mm, virt_to_page(pgd), PT_PGD);
797 
798 	return flush;
799 }
800 
801 static int xen_pgd_walk(struct mm_struct *mm,
802 			int (*func)(struct mm_struct *mm, struct page *,
803 				    enum pt_level),
804 			unsigned long limit)
805 {
806 	return __xen_pgd_walk(mm, mm->pgd, func, limit);
807 }
808 
809 /* If we're using split pte locks, then take the page's lock and
810    return a pointer to it.  Otherwise return NULL. */
811 static spinlock_t *xen_pte_lock(struct page *page, struct mm_struct *mm)
812 {
813 	spinlock_t *ptl = NULL;
814 
815 #if USE_SPLIT_PTLOCKS
816 	ptl = __pte_lockptr(page);
817 	spin_lock_nest_lock(ptl, &mm->page_table_lock);
818 #endif
819 
820 	return ptl;
821 }
822 
823 static void xen_pte_unlock(void *v)
824 {
825 	spinlock_t *ptl = v;
826 	spin_unlock(ptl);
827 }
828 
829 static void xen_do_pin(unsigned level, unsigned long pfn)
830 {
831 	struct mmuext_op op;
832 
833 	op.cmd = level;
834 	op.arg1.mfn = pfn_to_mfn(pfn);
835 
836 	xen_extend_mmuext_op(&op);
837 }
838 
839 static int xen_pin_page(struct mm_struct *mm, struct page *page,
840 			enum pt_level level)
841 {
842 	unsigned pgfl = TestSetPagePinned(page);
843 	int flush;
844 
845 	if (pgfl)
846 		flush = 0;		/* already pinned */
847 	else if (PageHighMem(page))
848 		/* kmaps need flushing if we found an unpinned
849 		   highpage */
850 		flush = 1;
851 	else {
852 		void *pt = lowmem_page_address(page);
853 		unsigned long pfn = page_to_pfn(page);
854 		struct multicall_space mcs = __xen_mc_entry(0);
855 		spinlock_t *ptl;
856 
857 		flush = 0;
858 
859 		/*
860 		 * We need to hold the pagetable lock between the time
861 		 * we make the pagetable RO and when we actually pin
862 		 * it.  If we don't, then other users may come in and
863 		 * attempt to update the pagetable by writing it,
864 		 * which will fail because the memory is RO but not
865 		 * pinned, so Xen won't do the trap'n'emulate.
866 		 *
867 		 * If we're using split pte locks, we can't hold the
868 		 * entire pagetable's worth of locks during the
869 		 * traverse, because we may wrap the preempt count (8
870 		 * bits).  The solution is to mark RO and pin each PTE
871 		 * page while holding the lock.  This means the number
872 		 * of locks we end up holding is never more than a
873 		 * batch size (~32 entries, at present).
874 		 *
875 		 * If we're not using split pte locks, we needn't pin
876 		 * the PTE pages independently, because we're
877 		 * protected by the overall pagetable lock.
878 		 */
879 		ptl = NULL;
880 		if (level == PT_PTE)
881 			ptl = xen_pte_lock(page, mm);
882 
883 		MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
884 					pfn_pte(pfn, PAGE_KERNEL_RO),
885 					level == PT_PGD ? UVMF_TLB_FLUSH : 0);
886 
887 		if (ptl) {
888 			xen_do_pin(MMUEXT_PIN_L1_TABLE, pfn);
889 
890 			/* Queue a deferred unlock for when this batch
891 			   is completed. */
892 			xen_mc_callback(xen_pte_unlock, ptl);
893 		}
894 	}
895 
896 	return flush;
897 }
898 
899 /* This is called just after a mm has been created, but it has not
900    been used yet.  We need to make sure that its pagetable is all
901    read-only, and can be pinned. */
902 static void __xen_pgd_pin(struct mm_struct *mm, pgd_t *pgd)
903 {
904 	trace_xen_mmu_pgd_pin(mm, pgd);
905 
906 	xen_mc_batch();
907 
908 	if (__xen_pgd_walk(mm, pgd, xen_pin_page, USER_LIMIT)) {
909 		/* re-enable interrupts for flushing */
910 		xen_mc_issue(0);
911 
912 		kmap_flush_unused();
913 
914 		xen_mc_batch();
915 	}
916 
917 #ifdef CONFIG_X86_64
918 	{
919 		pgd_t *user_pgd = xen_get_user_pgd(pgd);
920 
921 		xen_do_pin(MMUEXT_PIN_L4_TABLE, PFN_DOWN(__pa(pgd)));
922 
923 		if (user_pgd) {
924 			xen_pin_page(mm, virt_to_page(user_pgd), PT_PGD);
925 			xen_do_pin(MMUEXT_PIN_L4_TABLE,
926 				   PFN_DOWN(__pa(user_pgd)));
927 		}
928 	}
929 #else /* CONFIG_X86_32 */
930 #ifdef CONFIG_X86_PAE
931 	/* Need to make sure unshared kernel PMD is pinnable */
932 	xen_pin_page(mm, pgd_page(pgd[pgd_index(TASK_SIZE)]),
933 		     PT_PMD);
934 #endif
935 	xen_do_pin(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(pgd)));
936 #endif /* CONFIG_X86_64 */
937 	xen_mc_issue(0);
938 }
939 
940 static void xen_pgd_pin(struct mm_struct *mm)
941 {
942 	__xen_pgd_pin(mm, mm->pgd);
943 }
944 
945 /*
946  * On save, we need to pin all pagetables to make sure they get their
947  * mfns turned into pfns.  Search the list for any unpinned pgds and pin
948  * them (unpinned pgds are not currently in use, probably because the
949  * process is under construction or destruction).
950  *
951  * Expected to be called in stop_machine() ("equivalent to taking
952  * every spinlock in the system"), so the locking doesn't really
953  * matter all that much.
954  */
955 void xen_mm_pin_all(void)
956 {
957 	struct page *page;
958 
959 	spin_lock(&pgd_lock);
960 
961 	list_for_each_entry(page, &pgd_list, lru) {
962 		if (!PagePinned(page)) {
963 			__xen_pgd_pin(&init_mm, (pgd_t *)page_address(page));
964 			SetPageSavePinned(page);
965 		}
966 	}
967 
968 	spin_unlock(&pgd_lock);
969 }
970 
971 /*
972  * The init_mm pagetable is really pinned as soon as its created, but
973  * that's before we have page structures to store the bits.  So do all
974  * the book-keeping now.
975  */
976 static int __init xen_mark_pinned(struct mm_struct *mm, struct page *page,
977 				  enum pt_level level)
978 {
979 	SetPagePinned(page);
980 	return 0;
981 }
982 
983 static void __init xen_mark_init_mm_pinned(void)
984 {
985 	xen_pgd_walk(&init_mm, xen_mark_pinned, FIXADDR_TOP);
986 }
987 
988 static int xen_unpin_page(struct mm_struct *mm, struct page *page,
989 			  enum pt_level level)
990 {
991 	unsigned pgfl = TestClearPagePinned(page);
992 
993 	if (pgfl && !PageHighMem(page)) {
994 		void *pt = lowmem_page_address(page);
995 		unsigned long pfn = page_to_pfn(page);
996 		spinlock_t *ptl = NULL;
997 		struct multicall_space mcs;
998 
999 		/*
1000 		 * Do the converse to pin_page.  If we're using split
1001 		 * pte locks, we must be holding the lock for while
1002 		 * the pte page is unpinned but still RO to prevent
1003 		 * concurrent updates from seeing it in this
1004 		 * partially-pinned state.
1005 		 */
1006 		if (level == PT_PTE) {
1007 			ptl = xen_pte_lock(page, mm);
1008 
1009 			if (ptl)
1010 				xen_do_pin(MMUEXT_UNPIN_TABLE, pfn);
1011 		}
1012 
1013 		mcs = __xen_mc_entry(0);
1014 
1015 		MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
1016 					pfn_pte(pfn, PAGE_KERNEL),
1017 					level == PT_PGD ? UVMF_TLB_FLUSH : 0);
1018 
1019 		if (ptl) {
1020 			/* unlock when batch completed */
1021 			xen_mc_callback(xen_pte_unlock, ptl);
1022 		}
1023 	}
1024 
1025 	return 0;		/* never need to flush on unpin */
1026 }
1027 
1028 /* Release a pagetables pages back as normal RW */
1029 static void __xen_pgd_unpin(struct mm_struct *mm, pgd_t *pgd)
1030 {
1031 	trace_xen_mmu_pgd_unpin(mm, pgd);
1032 
1033 	xen_mc_batch();
1034 
1035 	xen_do_pin(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
1036 
1037 #ifdef CONFIG_X86_64
1038 	{
1039 		pgd_t *user_pgd = xen_get_user_pgd(pgd);
1040 
1041 		if (user_pgd) {
1042 			xen_do_pin(MMUEXT_UNPIN_TABLE,
1043 				   PFN_DOWN(__pa(user_pgd)));
1044 			xen_unpin_page(mm, virt_to_page(user_pgd), PT_PGD);
1045 		}
1046 	}
1047 #endif
1048 
1049 #ifdef CONFIG_X86_PAE
1050 	/* Need to make sure unshared kernel PMD is unpinned */
1051 	xen_unpin_page(mm, pgd_page(pgd[pgd_index(TASK_SIZE)]),
1052 		       PT_PMD);
1053 #endif
1054 
1055 	__xen_pgd_walk(mm, pgd, xen_unpin_page, USER_LIMIT);
1056 
1057 	xen_mc_issue(0);
1058 }
1059 
1060 static void xen_pgd_unpin(struct mm_struct *mm)
1061 {
1062 	__xen_pgd_unpin(mm, mm->pgd);
1063 }
1064 
1065 /*
1066  * On resume, undo any pinning done at save, so that the rest of the
1067  * kernel doesn't see any unexpected pinned pagetables.
1068  */
1069 void xen_mm_unpin_all(void)
1070 {
1071 	struct page *page;
1072 
1073 	spin_lock(&pgd_lock);
1074 
1075 	list_for_each_entry(page, &pgd_list, lru) {
1076 		if (PageSavePinned(page)) {
1077 			BUG_ON(!PagePinned(page));
1078 			__xen_pgd_unpin(&init_mm, (pgd_t *)page_address(page));
1079 			ClearPageSavePinned(page);
1080 		}
1081 	}
1082 
1083 	spin_unlock(&pgd_lock);
1084 }
1085 
1086 static void xen_activate_mm(struct mm_struct *prev, struct mm_struct *next)
1087 {
1088 	spin_lock(&next->page_table_lock);
1089 	xen_pgd_pin(next);
1090 	spin_unlock(&next->page_table_lock);
1091 }
1092 
1093 static void xen_dup_mmap(struct mm_struct *oldmm, struct mm_struct *mm)
1094 {
1095 	spin_lock(&mm->page_table_lock);
1096 	xen_pgd_pin(mm);
1097 	spin_unlock(&mm->page_table_lock);
1098 }
1099 
1100 
1101 #ifdef CONFIG_SMP
1102 /* Another cpu may still have their %cr3 pointing at the pagetable, so
1103    we need to repoint it somewhere else before we can unpin it. */
1104 static void drop_other_mm_ref(void *info)
1105 {
1106 	struct mm_struct *mm = info;
1107 	struct mm_struct *active_mm;
1108 
1109 	active_mm = percpu_read(cpu_tlbstate.active_mm);
1110 
1111 	if (active_mm == mm && percpu_read(cpu_tlbstate.state) != TLBSTATE_OK)
1112 		leave_mm(smp_processor_id());
1113 
1114 	/* If this cpu still has a stale cr3 reference, then make sure
1115 	   it has been flushed. */
1116 	if (percpu_read(xen_current_cr3) == __pa(mm->pgd))
1117 		load_cr3(swapper_pg_dir);
1118 }
1119 
1120 static void xen_drop_mm_ref(struct mm_struct *mm)
1121 {
1122 	cpumask_var_t mask;
1123 	unsigned cpu;
1124 
1125 	if (current->active_mm == mm) {
1126 		if (current->mm == mm)
1127 			load_cr3(swapper_pg_dir);
1128 		else
1129 			leave_mm(smp_processor_id());
1130 	}
1131 
1132 	/* Get the "official" set of cpus referring to our pagetable. */
1133 	if (!alloc_cpumask_var(&mask, GFP_ATOMIC)) {
1134 		for_each_online_cpu(cpu) {
1135 			if (!cpumask_test_cpu(cpu, mm_cpumask(mm))
1136 			    && per_cpu(xen_current_cr3, cpu) != __pa(mm->pgd))
1137 				continue;
1138 			smp_call_function_single(cpu, drop_other_mm_ref, mm, 1);
1139 		}
1140 		return;
1141 	}
1142 	cpumask_copy(mask, mm_cpumask(mm));
1143 
1144 	/* It's possible that a vcpu may have a stale reference to our
1145 	   cr3, because its in lazy mode, and it hasn't yet flushed
1146 	   its set of pending hypercalls yet.  In this case, we can
1147 	   look at its actual current cr3 value, and force it to flush
1148 	   if needed. */
1149 	for_each_online_cpu(cpu) {
1150 		if (per_cpu(xen_current_cr3, cpu) == __pa(mm->pgd))
1151 			cpumask_set_cpu(cpu, mask);
1152 	}
1153 
1154 	if (!cpumask_empty(mask))
1155 		smp_call_function_many(mask, drop_other_mm_ref, mm, 1);
1156 	free_cpumask_var(mask);
1157 }
1158 #else
1159 static void xen_drop_mm_ref(struct mm_struct *mm)
1160 {
1161 	if (current->active_mm == mm)
1162 		load_cr3(swapper_pg_dir);
1163 }
1164 #endif
1165 
1166 /*
1167  * While a process runs, Xen pins its pagetables, which means that the
1168  * hypervisor forces it to be read-only, and it controls all updates
1169  * to it.  This means that all pagetable updates have to go via the
1170  * hypervisor, which is moderately expensive.
1171  *
1172  * Since we're pulling the pagetable down, we switch to use init_mm,
1173  * unpin old process pagetable and mark it all read-write, which
1174  * allows further operations on it to be simple memory accesses.
1175  *
1176  * The only subtle point is that another CPU may be still using the
1177  * pagetable because of lazy tlb flushing.  This means we need need to
1178  * switch all CPUs off this pagetable before we can unpin it.
1179  */
1180 static void xen_exit_mmap(struct mm_struct *mm)
1181 {
1182 	get_cpu();		/* make sure we don't move around */
1183 	xen_drop_mm_ref(mm);
1184 	put_cpu();
1185 
1186 	spin_lock(&mm->page_table_lock);
1187 
1188 	/* pgd may not be pinned in the error exit path of execve */
1189 	if (xen_page_pinned(mm->pgd))
1190 		xen_pgd_unpin(mm);
1191 
1192 	spin_unlock(&mm->page_table_lock);
1193 }
1194 
1195 static void __init xen_pagetable_setup_start(pgd_t *base)
1196 {
1197 }
1198 
1199 static __init void xen_mapping_pagetable_reserve(u64 start, u64 end)
1200 {
1201 	/* reserve the range used */
1202 	native_pagetable_reserve(start, end);
1203 
1204 	/* set as RW the rest */
1205 	printk(KERN_DEBUG "xen: setting RW the range %llx - %llx\n", end,
1206 			PFN_PHYS(pgt_buf_top));
1207 	while (end < PFN_PHYS(pgt_buf_top)) {
1208 		make_lowmem_page_readwrite(__va(end));
1209 		end += PAGE_SIZE;
1210 	}
1211 }
1212 
1213 static void xen_post_allocator_init(void);
1214 
1215 static void __init xen_pagetable_setup_done(pgd_t *base)
1216 {
1217 	xen_setup_shared_info();
1218 	xen_post_allocator_init();
1219 }
1220 
1221 static void xen_write_cr2(unsigned long cr2)
1222 {
1223 	percpu_read(xen_vcpu)->arch.cr2 = cr2;
1224 }
1225 
1226 static unsigned long xen_read_cr2(void)
1227 {
1228 	return percpu_read(xen_vcpu)->arch.cr2;
1229 }
1230 
1231 unsigned long xen_read_cr2_direct(void)
1232 {
1233 	return percpu_read(xen_vcpu_info.arch.cr2);
1234 }
1235 
1236 static void xen_flush_tlb(void)
1237 {
1238 	struct mmuext_op *op;
1239 	struct multicall_space mcs;
1240 
1241 	trace_xen_mmu_flush_tlb(0);
1242 
1243 	preempt_disable();
1244 
1245 	mcs = xen_mc_entry(sizeof(*op));
1246 
1247 	op = mcs.args;
1248 	op->cmd = MMUEXT_TLB_FLUSH_LOCAL;
1249 	MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
1250 
1251 	xen_mc_issue(PARAVIRT_LAZY_MMU);
1252 
1253 	preempt_enable();
1254 }
1255 
1256 static void xen_flush_tlb_single(unsigned long addr)
1257 {
1258 	struct mmuext_op *op;
1259 	struct multicall_space mcs;
1260 
1261 	trace_xen_mmu_flush_tlb_single(addr);
1262 
1263 	preempt_disable();
1264 
1265 	mcs = xen_mc_entry(sizeof(*op));
1266 	op = mcs.args;
1267 	op->cmd = MMUEXT_INVLPG_LOCAL;
1268 	op->arg1.linear_addr = addr & PAGE_MASK;
1269 	MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
1270 
1271 	xen_mc_issue(PARAVIRT_LAZY_MMU);
1272 
1273 	preempt_enable();
1274 }
1275 
1276 static void xen_flush_tlb_others(const struct cpumask *cpus,
1277 				 struct mm_struct *mm, unsigned long va)
1278 {
1279 	struct {
1280 		struct mmuext_op op;
1281 #ifdef CONFIG_SMP
1282 		DECLARE_BITMAP(mask, num_processors);
1283 #else
1284 		DECLARE_BITMAP(mask, NR_CPUS);
1285 #endif
1286 	} *args;
1287 	struct multicall_space mcs;
1288 
1289 	trace_xen_mmu_flush_tlb_others(cpus, mm, va);
1290 
1291 	if (cpumask_empty(cpus))
1292 		return;		/* nothing to do */
1293 
1294 	mcs = xen_mc_entry(sizeof(*args));
1295 	args = mcs.args;
1296 	args->op.arg2.vcpumask = to_cpumask(args->mask);
1297 
1298 	/* Remove us, and any offline CPUS. */
1299 	cpumask_and(to_cpumask(args->mask), cpus, cpu_online_mask);
1300 	cpumask_clear_cpu(smp_processor_id(), to_cpumask(args->mask));
1301 
1302 	if (va == TLB_FLUSH_ALL) {
1303 		args->op.cmd = MMUEXT_TLB_FLUSH_MULTI;
1304 	} else {
1305 		args->op.cmd = MMUEXT_INVLPG_MULTI;
1306 		args->op.arg1.linear_addr = va;
1307 	}
1308 
1309 	MULTI_mmuext_op(mcs.mc, &args->op, 1, NULL, DOMID_SELF);
1310 
1311 	xen_mc_issue(PARAVIRT_LAZY_MMU);
1312 }
1313 
1314 static unsigned long xen_read_cr3(void)
1315 {
1316 	return percpu_read(xen_cr3);
1317 }
1318 
1319 static void set_current_cr3(void *v)
1320 {
1321 	percpu_write(xen_current_cr3, (unsigned long)v);
1322 }
1323 
1324 static void __xen_write_cr3(bool kernel, unsigned long cr3)
1325 {
1326 	struct mmuext_op op;
1327 	unsigned long mfn;
1328 
1329 	trace_xen_mmu_write_cr3(kernel, cr3);
1330 
1331 	if (cr3)
1332 		mfn = pfn_to_mfn(PFN_DOWN(cr3));
1333 	else
1334 		mfn = 0;
1335 
1336 	WARN_ON(mfn == 0 && kernel);
1337 
1338 	op.cmd = kernel ? MMUEXT_NEW_BASEPTR : MMUEXT_NEW_USER_BASEPTR;
1339 	op.arg1.mfn = mfn;
1340 
1341 	xen_extend_mmuext_op(&op);
1342 
1343 	if (kernel) {
1344 		percpu_write(xen_cr3, cr3);
1345 
1346 		/* Update xen_current_cr3 once the batch has actually
1347 		   been submitted. */
1348 		xen_mc_callback(set_current_cr3, (void *)cr3);
1349 	}
1350 }
1351 
1352 static void xen_write_cr3(unsigned long cr3)
1353 {
1354 	BUG_ON(preemptible());
1355 
1356 	xen_mc_batch();  /* disables interrupts */
1357 
1358 	/* Update while interrupts are disabled, so its atomic with
1359 	   respect to ipis */
1360 	percpu_write(xen_cr3, cr3);
1361 
1362 	__xen_write_cr3(true, cr3);
1363 
1364 #ifdef CONFIG_X86_64
1365 	{
1366 		pgd_t *user_pgd = xen_get_user_pgd(__va(cr3));
1367 		if (user_pgd)
1368 			__xen_write_cr3(false, __pa(user_pgd));
1369 		else
1370 			__xen_write_cr3(false, 0);
1371 	}
1372 #endif
1373 
1374 	xen_mc_issue(PARAVIRT_LAZY_CPU);  /* interrupts restored */
1375 }
1376 
1377 static int xen_pgd_alloc(struct mm_struct *mm)
1378 {
1379 	pgd_t *pgd = mm->pgd;
1380 	int ret = 0;
1381 
1382 	BUG_ON(PagePinned(virt_to_page(pgd)));
1383 
1384 #ifdef CONFIG_X86_64
1385 	{
1386 		struct page *page = virt_to_page(pgd);
1387 		pgd_t *user_pgd;
1388 
1389 		BUG_ON(page->private != 0);
1390 
1391 		ret = -ENOMEM;
1392 
1393 		user_pgd = (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO);
1394 		page->private = (unsigned long)user_pgd;
1395 
1396 		if (user_pgd != NULL) {
1397 			user_pgd[pgd_index(VSYSCALL_START)] =
1398 				__pgd(__pa(level3_user_vsyscall) | _PAGE_TABLE);
1399 			ret = 0;
1400 		}
1401 
1402 		BUG_ON(PagePinned(virt_to_page(xen_get_user_pgd(pgd))));
1403 	}
1404 #endif
1405 
1406 	return ret;
1407 }
1408 
1409 static void xen_pgd_free(struct mm_struct *mm, pgd_t *pgd)
1410 {
1411 #ifdef CONFIG_X86_64
1412 	pgd_t *user_pgd = xen_get_user_pgd(pgd);
1413 
1414 	if (user_pgd)
1415 		free_page((unsigned long)user_pgd);
1416 #endif
1417 }
1418 
1419 #ifdef CONFIG_X86_32
1420 static pte_t __init mask_rw_pte(pte_t *ptep, pte_t pte)
1421 {
1422 	/* If there's an existing pte, then don't allow _PAGE_RW to be set */
1423 	if (pte_val_ma(*ptep) & _PAGE_PRESENT)
1424 		pte = __pte_ma(((pte_val_ma(*ptep) & _PAGE_RW) | ~_PAGE_RW) &
1425 			       pte_val_ma(pte));
1426 
1427 	return pte;
1428 }
1429 #else /* CONFIG_X86_64 */
1430 static pte_t __init mask_rw_pte(pte_t *ptep, pte_t pte)
1431 {
1432 	unsigned long pfn = pte_pfn(pte);
1433 
1434 	/*
1435 	 * If the new pfn is within the range of the newly allocated
1436 	 * kernel pagetable, and it isn't being mapped into an
1437 	 * early_ioremap fixmap slot as a freshly allocated page, make sure
1438 	 * it is RO.
1439 	 */
1440 	if (((!is_early_ioremap_ptep(ptep) &&
1441 			pfn >= pgt_buf_start && pfn < pgt_buf_top)) ||
1442 			(is_early_ioremap_ptep(ptep) && pfn != (pgt_buf_end - 1)))
1443 		pte = pte_wrprotect(pte);
1444 
1445 	return pte;
1446 }
1447 #endif /* CONFIG_X86_64 */
1448 
1449 /* Init-time set_pte while constructing initial pagetables, which
1450    doesn't allow RO pagetable pages to be remapped RW */
1451 static void __init xen_set_pte_init(pte_t *ptep, pte_t pte)
1452 {
1453 	pte = mask_rw_pte(ptep, pte);
1454 
1455 	xen_set_pte(ptep, pte);
1456 }
1457 
1458 static void pin_pagetable_pfn(unsigned cmd, unsigned long pfn)
1459 {
1460 	struct mmuext_op op;
1461 	op.cmd = cmd;
1462 	op.arg1.mfn = pfn_to_mfn(pfn);
1463 	if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF))
1464 		BUG();
1465 }
1466 
1467 /* Early in boot, while setting up the initial pagetable, assume
1468    everything is pinned. */
1469 static void __init xen_alloc_pte_init(struct mm_struct *mm, unsigned long pfn)
1470 {
1471 #ifdef CONFIG_FLATMEM
1472 	BUG_ON(mem_map);	/* should only be used early */
1473 #endif
1474 	make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
1475 	pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
1476 }
1477 
1478 /* Used for pmd and pud */
1479 static void __init xen_alloc_pmd_init(struct mm_struct *mm, unsigned long pfn)
1480 {
1481 #ifdef CONFIG_FLATMEM
1482 	BUG_ON(mem_map);	/* should only be used early */
1483 #endif
1484 	make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
1485 }
1486 
1487 /* Early release_pte assumes that all pts are pinned, since there's
1488    only init_mm and anything attached to that is pinned. */
1489 static void __init xen_release_pte_init(unsigned long pfn)
1490 {
1491 	pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
1492 	make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
1493 }
1494 
1495 static void __init xen_release_pmd_init(unsigned long pfn)
1496 {
1497 	make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
1498 }
1499 
1500 static inline void __pin_pagetable_pfn(unsigned cmd, unsigned long pfn)
1501 {
1502 	struct multicall_space mcs;
1503 	struct mmuext_op *op;
1504 
1505 	mcs = __xen_mc_entry(sizeof(*op));
1506 	op = mcs.args;
1507 	op->cmd = cmd;
1508 	op->arg1.mfn = pfn_to_mfn(pfn);
1509 
1510 	MULTI_mmuext_op(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
1511 }
1512 
1513 static inline void __set_pfn_prot(unsigned long pfn, pgprot_t prot)
1514 {
1515 	struct multicall_space mcs;
1516 	unsigned long addr = (unsigned long)__va(pfn << PAGE_SHIFT);
1517 
1518 	mcs = __xen_mc_entry(0);
1519 	MULTI_update_va_mapping(mcs.mc, (unsigned long)addr,
1520 				pfn_pte(pfn, prot), 0);
1521 }
1522 
1523 /* This needs to make sure the new pte page is pinned iff its being
1524    attached to a pinned pagetable. */
1525 static inline void xen_alloc_ptpage(struct mm_struct *mm, unsigned long pfn,
1526 				    unsigned level)
1527 {
1528 	bool pinned = PagePinned(virt_to_page(mm->pgd));
1529 
1530 	trace_xen_mmu_alloc_ptpage(mm, pfn, level, pinned);
1531 
1532 	if (pinned) {
1533 		struct page *page = pfn_to_page(pfn);
1534 
1535 		SetPagePinned(page);
1536 
1537 		if (!PageHighMem(page)) {
1538 			xen_mc_batch();
1539 
1540 			__set_pfn_prot(pfn, PAGE_KERNEL_RO);
1541 
1542 			if (level == PT_PTE && USE_SPLIT_PTLOCKS)
1543 				__pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
1544 
1545 			xen_mc_issue(PARAVIRT_LAZY_MMU);
1546 		} else {
1547 			/* make sure there are no stray mappings of
1548 			   this page */
1549 			kmap_flush_unused();
1550 		}
1551 	}
1552 }
1553 
1554 static void xen_alloc_pte(struct mm_struct *mm, unsigned long pfn)
1555 {
1556 	xen_alloc_ptpage(mm, pfn, PT_PTE);
1557 }
1558 
1559 static void xen_alloc_pmd(struct mm_struct *mm, unsigned long pfn)
1560 {
1561 	xen_alloc_ptpage(mm, pfn, PT_PMD);
1562 }
1563 
1564 /* This should never happen until we're OK to use struct page */
1565 static inline void xen_release_ptpage(unsigned long pfn, unsigned level)
1566 {
1567 	struct page *page = pfn_to_page(pfn);
1568 	bool pinned = PagePinned(page);
1569 
1570 	trace_xen_mmu_release_ptpage(pfn, level, pinned);
1571 
1572 	if (pinned) {
1573 		if (!PageHighMem(page)) {
1574 			xen_mc_batch();
1575 
1576 			if (level == PT_PTE && USE_SPLIT_PTLOCKS)
1577 				__pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
1578 
1579 			__set_pfn_prot(pfn, PAGE_KERNEL);
1580 
1581 			xen_mc_issue(PARAVIRT_LAZY_MMU);
1582 		}
1583 		ClearPagePinned(page);
1584 	}
1585 }
1586 
1587 static void xen_release_pte(unsigned long pfn)
1588 {
1589 	xen_release_ptpage(pfn, PT_PTE);
1590 }
1591 
1592 static void xen_release_pmd(unsigned long pfn)
1593 {
1594 	xen_release_ptpage(pfn, PT_PMD);
1595 }
1596 
1597 #if PAGETABLE_LEVELS == 4
1598 static void xen_alloc_pud(struct mm_struct *mm, unsigned long pfn)
1599 {
1600 	xen_alloc_ptpage(mm, pfn, PT_PUD);
1601 }
1602 
1603 static void xen_release_pud(unsigned long pfn)
1604 {
1605 	xen_release_ptpage(pfn, PT_PUD);
1606 }
1607 #endif
1608 
1609 void __init xen_reserve_top(void)
1610 {
1611 #ifdef CONFIG_X86_32
1612 	unsigned long top = HYPERVISOR_VIRT_START;
1613 	struct xen_platform_parameters pp;
1614 
1615 	if (HYPERVISOR_xen_version(XENVER_platform_parameters, &pp) == 0)
1616 		top = pp.virt_start;
1617 
1618 	reserve_top_address(-top);
1619 #endif	/* CONFIG_X86_32 */
1620 }
1621 
1622 /*
1623  * Like __va(), but returns address in the kernel mapping (which is
1624  * all we have until the physical memory mapping has been set up.
1625  */
1626 static void *__ka(phys_addr_t paddr)
1627 {
1628 #ifdef CONFIG_X86_64
1629 	return (void *)(paddr + __START_KERNEL_map);
1630 #else
1631 	return __va(paddr);
1632 #endif
1633 }
1634 
1635 /* Convert a machine address to physical address */
1636 static unsigned long m2p(phys_addr_t maddr)
1637 {
1638 	phys_addr_t paddr;
1639 
1640 	maddr &= PTE_PFN_MASK;
1641 	paddr = mfn_to_pfn(maddr >> PAGE_SHIFT) << PAGE_SHIFT;
1642 
1643 	return paddr;
1644 }
1645 
1646 /* Convert a machine address to kernel virtual */
1647 static void *m2v(phys_addr_t maddr)
1648 {
1649 	return __ka(m2p(maddr));
1650 }
1651 
1652 /* Set the page permissions on an identity-mapped pages */
1653 static void set_page_prot(void *addr, pgprot_t prot)
1654 {
1655 	unsigned long pfn = __pa(addr) >> PAGE_SHIFT;
1656 	pte_t pte = pfn_pte(pfn, prot);
1657 
1658 	if (HYPERVISOR_update_va_mapping((unsigned long)addr, pte, 0))
1659 		BUG();
1660 }
1661 
1662 static void __init xen_map_identity_early(pmd_t *pmd, unsigned long max_pfn)
1663 {
1664 	unsigned pmdidx, pteidx;
1665 	unsigned ident_pte;
1666 	unsigned long pfn;
1667 
1668 	level1_ident_pgt = extend_brk(sizeof(pte_t) * LEVEL1_IDENT_ENTRIES,
1669 				      PAGE_SIZE);
1670 
1671 	ident_pte = 0;
1672 	pfn = 0;
1673 	for (pmdidx = 0; pmdidx < PTRS_PER_PMD && pfn < max_pfn; pmdidx++) {
1674 		pte_t *pte_page;
1675 
1676 		/* Reuse or allocate a page of ptes */
1677 		if (pmd_present(pmd[pmdidx]))
1678 			pte_page = m2v(pmd[pmdidx].pmd);
1679 		else {
1680 			/* Check for free pte pages */
1681 			if (ident_pte == LEVEL1_IDENT_ENTRIES)
1682 				break;
1683 
1684 			pte_page = &level1_ident_pgt[ident_pte];
1685 			ident_pte += PTRS_PER_PTE;
1686 
1687 			pmd[pmdidx] = __pmd(__pa(pte_page) | _PAGE_TABLE);
1688 		}
1689 
1690 		/* Install mappings */
1691 		for (pteidx = 0; pteidx < PTRS_PER_PTE; pteidx++, pfn++) {
1692 			pte_t pte;
1693 
1694 #ifdef CONFIG_X86_32
1695 			if (pfn > max_pfn_mapped)
1696 				max_pfn_mapped = pfn;
1697 #endif
1698 
1699 			if (!pte_none(pte_page[pteidx]))
1700 				continue;
1701 
1702 			pte = pfn_pte(pfn, PAGE_KERNEL_EXEC);
1703 			pte_page[pteidx] = pte;
1704 		}
1705 	}
1706 
1707 	for (pteidx = 0; pteidx < ident_pte; pteidx += PTRS_PER_PTE)
1708 		set_page_prot(&level1_ident_pgt[pteidx], PAGE_KERNEL_RO);
1709 
1710 	set_page_prot(pmd, PAGE_KERNEL_RO);
1711 }
1712 
1713 void __init xen_setup_machphys_mapping(void)
1714 {
1715 	struct xen_machphys_mapping mapping;
1716 
1717 	if (HYPERVISOR_memory_op(XENMEM_machphys_mapping, &mapping) == 0) {
1718 		machine_to_phys_mapping = (unsigned long *)mapping.v_start;
1719 		machine_to_phys_nr = mapping.max_mfn + 1;
1720 	} else {
1721 		machine_to_phys_nr = MACH2PHYS_NR_ENTRIES;
1722 	}
1723 #ifdef CONFIG_X86_32
1724 	WARN_ON((machine_to_phys_mapping + (machine_to_phys_nr - 1))
1725 		< machine_to_phys_mapping);
1726 #endif
1727 }
1728 
1729 #ifdef CONFIG_X86_64
1730 static void convert_pfn_mfn(void *v)
1731 {
1732 	pte_t *pte = v;
1733 	int i;
1734 
1735 	/* All levels are converted the same way, so just treat them
1736 	   as ptes. */
1737 	for (i = 0; i < PTRS_PER_PTE; i++)
1738 		pte[i] = xen_make_pte(pte[i].pte);
1739 }
1740 
1741 /*
1742  * Set up the initial kernel pagetable.
1743  *
1744  * We can construct this by grafting the Xen provided pagetable into
1745  * head_64.S's preconstructed pagetables.  We copy the Xen L2's into
1746  * level2_ident_pgt, level2_kernel_pgt and level2_fixmap_pgt.  This
1747  * means that only the kernel has a physical mapping to start with -
1748  * but that's enough to get __va working.  We need to fill in the rest
1749  * of the physical mapping once some sort of allocator has been set
1750  * up.
1751  */
1752 pgd_t * __init xen_setup_kernel_pagetable(pgd_t *pgd,
1753 					 unsigned long max_pfn)
1754 {
1755 	pud_t *l3;
1756 	pmd_t *l2;
1757 
1758 	/* max_pfn_mapped is the last pfn mapped in the initial memory
1759 	 * mappings. Considering that on Xen after the kernel mappings we
1760 	 * have the mappings of some pages that don't exist in pfn space, we
1761 	 * set max_pfn_mapped to the last real pfn mapped. */
1762 	max_pfn_mapped = PFN_DOWN(__pa(xen_start_info->mfn_list));
1763 
1764 	/* Zap identity mapping */
1765 	init_level4_pgt[0] = __pgd(0);
1766 
1767 	/* Pre-constructed entries are in pfn, so convert to mfn */
1768 	convert_pfn_mfn(init_level4_pgt);
1769 	convert_pfn_mfn(level3_ident_pgt);
1770 	convert_pfn_mfn(level3_kernel_pgt);
1771 
1772 	l3 = m2v(pgd[pgd_index(__START_KERNEL_map)].pgd);
1773 	l2 = m2v(l3[pud_index(__START_KERNEL_map)].pud);
1774 
1775 	memcpy(level2_ident_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
1776 	memcpy(level2_kernel_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
1777 
1778 	l3 = m2v(pgd[pgd_index(__START_KERNEL_map + PMD_SIZE)].pgd);
1779 	l2 = m2v(l3[pud_index(__START_KERNEL_map + PMD_SIZE)].pud);
1780 	memcpy(level2_fixmap_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
1781 
1782 	/* Set up identity map */
1783 	xen_map_identity_early(level2_ident_pgt, max_pfn);
1784 
1785 	/* Make pagetable pieces RO */
1786 	set_page_prot(init_level4_pgt, PAGE_KERNEL_RO);
1787 	set_page_prot(level3_ident_pgt, PAGE_KERNEL_RO);
1788 	set_page_prot(level3_kernel_pgt, PAGE_KERNEL_RO);
1789 	set_page_prot(level3_user_vsyscall, PAGE_KERNEL_RO);
1790 	set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO);
1791 	set_page_prot(level2_fixmap_pgt, PAGE_KERNEL_RO);
1792 
1793 	/* Pin down new L4 */
1794 	pin_pagetable_pfn(MMUEXT_PIN_L4_TABLE,
1795 			  PFN_DOWN(__pa_symbol(init_level4_pgt)));
1796 
1797 	/* Unpin Xen-provided one */
1798 	pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
1799 
1800 	/* Switch over */
1801 	pgd = init_level4_pgt;
1802 
1803 	/*
1804 	 * At this stage there can be no user pgd, and no page
1805 	 * structure to attach it to, so make sure we just set kernel
1806 	 * pgd.
1807 	 */
1808 	xen_mc_batch();
1809 	__xen_write_cr3(true, __pa(pgd));
1810 	xen_mc_issue(PARAVIRT_LAZY_CPU);
1811 
1812 	memblock_x86_reserve_range(__pa(xen_start_info->pt_base),
1813 		      __pa(xen_start_info->pt_base +
1814 			   xen_start_info->nr_pt_frames * PAGE_SIZE),
1815 		      "XEN PAGETABLES");
1816 
1817 	return pgd;
1818 }
1819 #else	/* !CONFIG_X86_64 */
1820 static RESERVE_BRK_ARRAY(pmd_t, initial_kernel_pmd, PTRS_PER_PMD);
1821 static RESERVE_BRK_ARRAY(pmd_t, swapper_kernel_pmd, PTRS_PER_PMD);
1822 
1823 static void __init xen_write_cr3_init(unsigned long cr3)
1824 {
1825 	unsigned long pfn = PFN_DOWN(__pa(swapper_pg_dir));
1826 
1827 	BUG_ON(read_cr3() != __pa(initial_page_table));
1828 	BUG_ON(cr3 != __pa(swapper_pg_dir));
1829 
1830 	/*
1831 	 * We are switching to swapper_pg_dir for the first time (from
1832 	 * initial_page_table) and therefore need to mark that page
1833 	 * read-only and then pin it.
1834 	 *
1835 	 * Xen disallows sharing of kernel PMDs for PAE
1836 	 * guests. Therefore we must copy the kernel PMD from
1837 	 * initial_page_table into a new kernel PMD to be used in
1838 	 * swapper_pg_dir.
1839 	 */
1840 	swapper_kernel_pmd =
1841 		extend_brk(sizeof(pmd_t) * PTRS_PER_PMD, PAGE_SIZE);
1842 	memcpy(swapper_kernel_pmd, initial_kernel_pmd,
1843 	       sizeof(pmd_t) * PTRS_PER_PMD);
1844 	swapper_pg_dir[KERNEL_PGD_BOUNDARY] =
1845 		__pgd(__pa(swapper_kernel_pmd) | _PAGE_PRESENT);
1846 	set_page_prot(swapper_kernel_pmd, PAGE_KERNEL_RO);
1847 
1848 	set_page_prot(swapper_pg_dir, PAGE_KERNEL_RO);
1849 	xen_write_cr3(cr3);
1850 	pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, pfn);
1851 
1852 	pin_pagetable_pfn(MMUEXT_UNPIN_TABLE,
1853 			  PFN_DOWN(__pa(initial_page_table)));
1854 	set_page_prot(initial_page_table, PAGE_KERNEL);
1855 	set_page_prot(initial_kernel_pmd, PAGE_KERNEL);
1856 
1857 	pv_mmu_ops.write_cr3 = &xen_write_cr3;
1858 }
1859 
1860 pgd_t * __init xen_setup_kernel_pagetable(pgd_t *pgd,
1861 					 unsigned long max_pfn)
1862 {
1863 	pmd_t *kernel_pmd;
1864 
1865 	initial_kernel_pmd =
1866 		extend_brk(sizeof(pmd_t) * PTRS_PER_PMD, PAGE_SIZE);
1867 
1868 	max_pfn_mapped = PFN_DOWN(__pa(xen_start_info->pt_base) +
1869 				  xen_start_info->nr_pt_frames * PAGE_SIZE +
1870 				  512*1024);
1871 
1872 	kernel_pmd = m2v(pgd[KERNEL_PGD_BOUNDARY].pgd);
1873 	memcpy(initial_kernel_pmd, kernel_pmd, sizeof(pmd_t) * PTRS_PER_PMD);
1874 
1875 	xen_map_identity_early(initial_kernel_pmd, max_pfn);
1876 
1877 	memcpy(initial_page_table, pgd, sizeof(pgd_t) * PTRS_PER_PGD);
1878 	initial_page_table[KERNEL_PGD_BOUNDARY] =
1879 		__pgd(__pa(initial_kernel_pmd) | _PAGE_PRESENT);
1880 
1881 	set_page_prot(initial_kernel_pmd, PAGE_KERNEL_RO);
1882 	set_page_prot(initial_page_table, PAGE_KERNEL_RO);
1883 	set_page_prot(empty_zero_page, PAGE_KERNEL_RO);
1884 
1885 	pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
1886 
1887 	pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE,
1888 			  PFN_DOWN(__pa(initial_page_table)));
1889 	xen_write_cr3(__pa(initial_page_table));
1890 
1891 	memblock_x86_reserve_range(__pa(xen_start_info->pt_base),
1892 		      __pa(xen_start_info->pt_base +
1893 			   xen_start_info->nr_pt_frames * PAGE_SIZE),
1894 		      "XEN PAGETABLES");
1895 
1896 	return initial_page_table;
1897 }
1898 #endif	/* CONFIG_X86_64 */
1899 
1900 static unsigned char dummy_mapping[PAGE_SIZE] __page_aligned_bss;
1901 
1902 static void xen_set_fixmap(unsigned idx, phys_addr_t phys, pgprot_t prot)
1903 {
1904 	pte_t pte;
1905 
1906 	phys >>= PAGE_SHIFT;
1907 
1908 	switch (idx) {
1909 	case FIX_BTMAP_END ... FIX_BTMAP_BEGIN:
1910 #ifdef CONFIG_X86_F00F_BUG
1911 	case FIX_F00F_IDT:
1912 #endif
1913 #ifdef CONFIG_X86_32
1914 	case FIX_WP_TEST:
1915 	case FIX_VDSO:
1916 # ifdef CONFIG_HIGHMEM
1917 	case FIX_KMAP_BEGIN ... FIX_KMAP_END:
1918 # endif
1919 #else
1920 	case VSYSCALL_LAST_PAGE ... VSYSCALL_FIRST_PAGE:
1921 	case VVAR_PAGE:
1922 #endif
1923 	case FIX_TEXT_POKE0:
1924 	case FIX_TEXT_POKE1:
1925 		/* All local page mappings */
1926 		pte = pfn_pte(phys, prot);
1927 		break;
1928 
1929 #ifdef CONFIG_X86_LOCAL_APIC
1930 	case FIX_APIC_BASE:	/* maps dummy local APIC */
1931 		pte = pfn_pte(PFN_DOWN(__pa(dummy_mapping)), PAGE_KERNEL);
1932 		break;
1933 #endif
1934 
1935 #ifdef CONFIG_X86_IO_APIC
1936 	case FIX_IO_APIC_BASE_0 ... FIX_IO_APIC_BASE_END:
1937 		/*
1938 		 * We just don't map the IO APIC - all access is via
1939 		 * hypercalls.  Keep the address in the pte for reference.
1940 		 */
1941 		pte = pfn_pte(PFN_DOWN(__pa(dummy_mapping)), PAGE_KERNEL);
1942 		break;
1943 #endif
1944 
1945 	case FIX_PARAVIRT_BOOTMAP:
1946 		/* This is an MFN, but it isn't an IO mapping from the
1947 		   IO domain */
1948 		pte = mfn_pte(phys, prot);
1949 		break;
1950 
1951 	default:
1952 		/* By default, set_fixmap is used for hardware mappings */
1953 		pte = mfn_pte(phys, __pgprot(pgprot_val(prot) | _PAGE_IOMAP));
1954 		break;
1955 	}
1956 
1957 	__native_set_fixmap(idx, pte);
1958 
1959 #ifdef CONFIG_X86_64
1960 	/* Replicate changes to map the vsyscall page into the user
1961 	   pagetable vsyscall mapping. */
1962 	if ((idx >= VSYSCALL_LAST_PAGE && idx <= VSYSCALL_FIRST_PAGE) ||
1963 	    idx == VVAR_PAGE) {
1964 		unsigned long vaddr = __fix_to_virt(idx);
1965 		set_pte_vaddr_pud(level3_user_vsyscall, vaddr, pte);
1966 	}
1967 #endif
1968 }
1969 
1970 void __init xen_ident_map_ISA(void)
1971 {
1972 	unsigned long pa;
1973 
1974 	/*
1975 	 * If we're dom0, then linear map the ISA machine addresses into
1976 	 * the kernel's address space.
1977 	 */
1978 	if (!xen_initial_domain())
1979 		return;
1980 
1981 	xen_raw_printk("Xen: setup ISA identity maps\n");
1982 
1983 	for (pa = ISA_START_ADDRESS; pa < ISA_END_ADDRESS; pa += PAGE_SIZE) {
1984 		pte_t pte = mfn_pte(PFN_DOWN(pa), PAGE_KERNEL_IO);
1985 
1986 		if (HYPERVISOR_update_va_mapping(PAGE_OFFSET + pa, pte, 0))
1987 			BUG();
1988 	}
1989 
1990 	xen_flush_tlb();
1991 }
1992 
1993 static void __init xen_post_allocator_init(void)
1994 {
1995 #ifdef CONFIG_XEN_DEBUG
1996 	pv_mmu_ops.make_pte = PV_CALLEE_SAVE(xen_make_pte_debug);
1997 #endif
1998 	pv_mmu_ops.set_pte = xen_set_pte;
1999 	pv_mmu_ops.set_pmd = xen_set_pmd;
2000 	pv_mmu_ops.set_pud = xen_set_pud;
2001 #if PAGETABLE_LEVELS == 4
2002 	pv_mmu_ops.set_pgd = xen_set_pgd;
2003 #endif
2004 
2005 	/* This will work as long as patching hasn't happened yet
2006 	   (which it hasn't) */
2007 	pv_mmu_ops.alloc_pte = xen_alloc_pte;
2008 	pv_mmu_ops.alloc_pmd = xen_alloc_pmd;
2009 	pv_mmu_ops.release_pte = xen_release_pte;
2010 	pv_mmu_ops.release_pmd = xen_release_pmd;
2011 #if PAGETABLE_LEVELS == 4
2012 	pv_mmu_ops.alloc_pud = xen_alloc_pud;
2013 	pv_mmu_ops.release_pud = xen_release_pud;
2014 #endif
2015 
2016 #ifdef CONFIG_X86_64
2017 	SetPagePinned(virt_to_page(level3_user_vsyscall));
2018 #endif
2019 	xen_mark_init_mm_pinned();
2020 }
2021 
2022 static void xen_leave_lazy_mmu(void)
2023 {
2024 	preempt_disable();
2025 	xen_mc_flush();
2026 	paravirt_leave_lazy_mmu();
2027 	preempt_enable();
2028 }
2029 
2030 static const struct pv_mmu_ops xen_mmu_ops __initconst = {
2031 	.read_cr2 = xen_read_cr2,
2032 	.write_cr2 = xen_write_cr2,
2033 
2034 	.read_cr3 = xen_read_cr3,
2035 #ifdef CONFIG_X86_32
2036 	.write_cr3 = xen_write_cr3_init,
2037 #else
2038 	.write_cr3 = xen_write_cr3,
2039 #endif
2040 
2041 	.flush_tlb_user = xen_flush_tlb,
2042 	.flush_tlb_kernel = xen_flush_tlb,
2043 	.flush_tlb_single = xen_flush_tlb_single,
2044 	.flush_tlb_others = xen_flush_tlb_others,
2045 
2046 	.pte_update = paravirt_nop,
2047 	.pte_update_defer = paravirt_nop,
2048 
2049 	.pgd_alloc = xen_pgd_alloc,
2050 	.pgd_free = xen_pgd_free,
2051 
2052 	.alloc_pte = xen_alloc_pte_init,
2053 	.release_pte = xen_release_pte_init,
2054 	.alloc_pmd = xen_alloc_pmd_init,
2055 	.release_pmd = xen_release_pmd_init,
2056 
2057 	.set_pte = xen_set_pte_init,
2058 	.set_pte_at = xen_set_pte_at,
2059 	.set_pmd = xen_set_pmd_hyper,
2060 
2061 	.ptep_modify_prot_start = __ptep_modify_prot_start,
2062 	.ptep_modify_prot_commit = __ptep_modify_prot_commit,
2063 
2064 	.pte_val = PV_CALLEE_SAVE(xen_pte_val),
2065 	.pgd_val = PV_CALLEE_SAVE(xen_pgd_val),
2066 
2067 	.make_pte = PV_CALLEE_SAVE(xen_make_pte),
2068 	.make_pgd = PV_CALLEE_SAVE(xen_make_pgd),
2069 
2070 #ifdef CONFIG_X86_PAE
2071 	.set_pte_atomic = xen_set_pte_atomic,
2072 	.pte_clear = xen_pte_clear,
2073 	.pmd_clear = xen_pmd_clear,
2074 #endif	/* CONFIG_X86_PAE */
2075 	.set_pud = xen_set_pud_hyper,
2076 
2077 	.make_pmd = PV_CALLEE_SAVE(xen_make_pmd),
2078 	.pmd_val = PV_CALLEE_SAVE(xen_pmd_val),
2079 
2080 #if PAGETABLE_LEVELS == 4
2081 	.pud_val = PV_CALLEE_SAVE(xen_pud_val),
2082 	.make_pud = PV_CALLEE_SAVE(xen_make_pud),
2083 	.set_pgd = xen_set_pgd_hyper,
2084 
2085 	.alloc_pud = xen_alloc_pmd_init,
2086 	.release_pud = xen_release_pmd_init,
2087 #endif	/* PAGETABLE_LEVELS == 4 */
2088 
2089 	.activate_mm = xen_activate_mm,
2090 	.dup_mmap = xen_dup_mmap,
2091 	.exit_mmap = xen_exit_mmap,
2092 
2093 	.lazy_mode = {
2094 		.enter = paravirt_enter_lazy_mmu,
2095 		.leave = xen_leave_lazy_mmu,
2096 	},
2097 
2098 	.set_fixmap = xen_set_fixmap,
2099 };
2100 
2101 void __init xen_init_mmu_ops(void)
2102 {
2103 	x86_init.mapping.pagetable_reserve = xen_mapping_pagetable_reserve;
2104 	x86_init.paging.pagetable_setup_start = xen_pagetable_setup_start;
2105 	x86_init.paging.pagetable_setup_done = xen_pagetable_setup_done;
2106 	pv_mmu_ops = xen_mmu_ops;
2107 
2108 	memset(dummy_mapping, 0xff, PAGE_SIZE);
2109 }
2110 
2111 /* Protected by xen_reservation_lock. */
2112 #define MAX_CONTIG_ORDER 9 /* 2MB */
2113 static unsigned long discontig_frames[1<<MAX_CONTIG_ORDER];
2114 
2115 #define VOID_PTE (mfn_pte(0, __pgprot(0)))
2116 static void xen_zap_pfn_range(unsigned long vaddr, unsigned int order,
2117 				unsigned long *in_frames,
2118 				unsigned long *out_frames)
2119 {
2120 	int i;
2121 	struct multicall_space mcs;
2122 
2123 	xen_mc_batch();
2124 	for (i = 0; i < (1UL<<order); i++, vaddr += PAGE_SIZE) {
2125 		mcs = __xen_mc_entry(0);
2126 
2127 		if (in_frames)
2128 			in_frames[i] = virt_to_mfn(vaddr);
2129 
2130 		MULTI_update_va_mapping(mcs.mc, vaddr, VOID_PTE, 0);
2131 		__set_phys_to_machine(virt_to_pfn(vaddr), INVALID_P2M_ENTRY);
2132 
2133 		if (out_frames)
2134 			out_frames[i] = virt_to_pfn(vaddr);
2135 	}
2136 	xen_mc_issue(0);
2137 }
2138 
2139 /*
2140  * Update the pfn-to-mfn mappings for a virtual address range, either to
2141  * point to an array of mfns, or contiguously from a single starting
2142  * mfn.
2143  */
2144 static void xen_remap_exchanged_ptes(unsigned long vaddr, int order,
2145 				     unsigned long *mfns,
2146 				     unsigned long first_mfn)
2147 {
2148 	unsigned i, limit;
2149 	unsigned long mfn;
2150 
2151 	xen_mc_batch();
2152 
2153 	limit = 1u << order;
2154 	for (i = 0; i < limit; i++, vaddr += PAGE_SIZE) {
2155 		struct multicall_space mcs;
2156 		unsigned flags;
2157 
2158 		mcs = __xen_mc_entry(0);
2159 		if (mfns)
2160 			mfn = mfns[i];
2161 		else
2162 			mfn = first_mfn + i;
2163 
2164 		if (i < (limit - 1))
2165 			flags = 0;
2166 		else {
2167 			if (order == 0)
2168 				flags = UVMF_INVLPG | UVMF_ALL;
2169 			else
2170 				flags = UVMF_TLB_FLUSH | UVMF_ALL;
2171 		}
2172 
2173 		MULTI_update_va_mapping(mcs.mc, vaddr,
2174 				mfn_pte(mfn, PAGE_KERNEL), flags);
2175 
2176 		set_phys_to_machine(virt_to_pfn(vaddr), mfn);
2177 	}
2178 
2179 	xen_mc_issue(0);
2180 }
2181 
2182 /*
2183  * Perform the hypercall to exchange a region of our pfns to point to
2184  * memory with the required contiguous alignment.  Takes the pfns as
2185  * input, and populates mfns as output.
2186  *
2187  * Returns a success code indicating whether the hypervisor was able to
2188  * satisfy the request or not.
2189  */
2190 static int xen_exchange_memory(unsigned long extents_in, unsigned int order_in,
2191 			       unsigned long *pfns_in,
2192 			       unsigned long extents_out,
2193 			       unsigned int order_out,
2194 			       unsigned long *mfns_out,
2195 			       unsigned int address_bits)
2196 {
2197 	long rc;
2198 	int success;
2199 
2200 	struct xen_memory_exchange exchange = {
2201 		.in = {
2202 			.nr_extents   = extents_in,
2203 			.extent_order = order_in,
2204 			.extent_start = pfns_in,
2205 			.domid        = DOMID_SELF
2206 		},
2207 		.out = {
2208 			.nr_extents   = extents_out,
2209 			.extent_order = order_out,
2210 			.extent_start = mfns_out,
2211 			.address_bits = address_bits,
2212 			.domid        = DOMID_SELF
2213 		}
2214 	};
2215 
2216 	BUG_ON(extents_in << order_in != extents_out << order_out);
2217 
2218 	rc = HYPERVISOR_memory_op(XENMEM_exchange, &exchange);
2219 	success = (exchange.nr_exchanged == extents_in);
2220 
2221 	BUG_ON(!success && ((exchange.nr_exchanged != 0) || (rc == 0)));
2222 	BUG_ON(success && (rc != 0));
2223 
2224 	return success;
2225 }
2226 
2227 int xen_create_contiguous_region(unsigned long vstart, unsigned int order,
2228 				 unsigned int address_bits)
2229 {
2230 	unsigned long *in_frames = discontig_frames, out_frame;
2231 	unsigned long  flags;
2232 	int            success;
2233 
2234 	/*
2235 	 * Currently an auto-translated guest will not perform I/O, nor will
2236 	 * it require PAE page directories below 4GB. Therefore any calls to
2237 	 * this function are redundant and can be ignored.
2238 	 */
2239 
2240 	if (xen_feature(XENFEAT_auto_translated_physmap))
2241 		return 0;
2242 
2243 	if (unlikely(order > MAX_CONTIG_ORDER))
2244 		return -ENOMEM;
2245 
2246 	memset((void *) vstart, 0, PAGE_SIZE << order);
2247 
2248 	spin_lock_irqsave(&xen_reservation_lock, flags);
2249 
2250 	/* 1. Zap current PTEs, remembering MFNs. */
2251 	xen_zap_pfn_range(vstart, order, in_frames, NULL);
2252 
2253 	/* 2. Get a new contiguous memory extent. */
2254 	out_frame = virt_to_pfn(vstart);
2255 	success = xen_exchange_memory(1UL << order, 0, in_frames,
2256 				      1, order, &out_frame,
2257 				      address_bits);
2258 
2259 	/* 3. Map the new extent in place of old pages. */
2260 	if (success)
2261 		xen_remap_exchanged_ptes(vstart, order, NULL, out_frame);
2262 	else
2263 		xen_remap_exchanged_ptes(vstart, order, in_frames, 0);
2264 
2265 	spin_unlock_irqrestore(&xen_reservation_lock, flags);
2266 
2267 	return success ? 0 : -ENOMEM;
2268 }
2269 EXPORT_SYMBOL_GPL(xen_create_contiguous_region);
2270 
2271 void xen_destroy_contiguous_region(unsigned long vstart, unsigned int order)
2272 {
2273 	unsigned long *out_frames = discontig_frames, in_frame;
2274 	unsigned long  flags;
2275 	int success;
2276 
2277 	if (xen_feature(XENFEAT_auto_translated_physmap))
2278 		return;
2279 
2280 	if (unlikely(order > MAX_CONTIG_ORDER))
2281 		return;
2282 
2283 	memset((void *) vstart, 0, PAGE_SIZE << order);
2284 
2285 	spin_lock_irqsave(&xen_reservation_lock, flags);
2286 
2287 	/* 1. Find start MFN of contiguous extent. */
2288 	in_frame = virt_to_mfn(vstart);
2289 
2290 	/* 2. Zap current PTEs. */
2291 	xen_zap_pfn_range(vstart, order, NULL, out_frames);
2292 
2293 	/* 3. Do the exchange for non-contiguous MFNs. */
2294 	success = xen_exchange_memory(1, order, &in_frame, 1UL << order,
2295 					0, out_frames, 0);
2296 
2297 	/* 4. Map new pages in place of old pages. */
2298 	if (success)
2299 		xen_remap_exchanged_ptes(vstart, order, out_frames, 0);
2300 	else
2301 		xen_remap_exchanged_ptes(vstart, order, NULL, in_frame);
2302 
2303 	spin_unlock_irqrestore(&xen_reservation_lock, flags);
2304 }
2305 EXPORT_SYMBOL_GPL(xen_destroy_contiguous_region);
2306 
2307 #ifdef CONFIG_XEN_PVHVM
2308 static void xen_hvm_exit_mmap(struct mm_struct *mm)
2309 {
2310 	struct xen_hvm_pagetable_dying a;
2311 	int rc;
2312 
2313 	a.domid = DOMID_SELF;
2314 	a.gpa = __pa(mm->pgd);
2315 	rc = HYPERVISOR_hvm_op(HVMOP_pagetable_dying, &a);
2316 	WARN_ON_ONCE(rc < 0);
2317 }
2318 
2319 static int is_pagetable_dying_supported(void)
2320 {
2321 	struct xen_hvm_pagetable_dying a;
2322 	int rc = 0;
2323 
2324 	a.domid = DOMID_SELF;
2325 	a.gpa = 0x00;
2326 	rc = HYPERVISOR_hvm_op(HVMOP_pagetable_dying, &a);
2327 	if (rc < 0) {
2328 		printk(KERN_DEBUG "HVMOP_pagetable_dying not supported\n");
2329 		return 0;
2330 	}
2331 	return 1;
2332 }
2333 
2334 void __init xen_hvm_init_mmu_ops(void)
2335 {
2336 	if (is_pagetable_dying_supported())
2337 		pv_mmu_ops.exit_mmap = xen_hvm_exit_mmap;
2338 }
2339 #endif
2340 
2341 #define REMAP_BATCH_SIZE 16
2342 
2343 struct remap_data {
2344 	unsigned long mfn;
2345 	pgprot_t prot;
2346 	struct mmu_update *mmu_update;
2347 };
2348 
2349 static int remap_area_mfn_pte_fn(pte_t *ptep, pgtable_t token,
2350 				 unsigned long addr, void *data)
2351 {
2352 	struct remap_data *rmd = data;
2353 	pte_t pte = pte_mkspecial(pfn_pte(rmd->mfn++, rmd->prot));
2354 
2355 	rmd->mmu_update->ptr = virt_to_machine(ptep).maddr;
2356 	rmd->mmu_update->val = pte_val_ma(pte);
2357 	rmd->mmu_update++;
2358 
2359 	return 0;
2360 }
2361 
2362 int xen_remap_domain_mfn_range(struct vm_area_struct *vma,
2363 			       unsigned long addr,
2364 			       unsigned long mfn, int nr,
2365 			       pgprot_t prot, unsigned domid)
2366 {
2367 	struct remap_data rmd;
2368 	struct mmu_update mmu_update[REMAP_BATCH_SIZE];
2369 	int batch;
2370 	unsigned long range;
2371 	int err = 0;
2372 
2373 	prot = __pgprot(pgprot_val(prot) | _PAGE_IOMAP);
2374 
2375 	BUG_ON(!((vma->vm_flags & (VM_PFNMAP | VM_RESERVED | VM_IO)) ==
2376 				(VM_PFNMAP | VM_RESERVED | VM_IO)));
2377 
2378 	rmd.mfn = mfn;
2379 	rmd.prot = prot;
2380 
2381 	while (nr) {
2382 		batch = min(REMAP_BATCH_SIZE, nr);
2383 		range = (unsigned long)batch << PAGE_SHIFT;
2384 
2385 		rmd.mmu_update = mmu_update;
2386 		err = apply_to_page_range(vma->vm_mm, addr, range,
2387 					  remap_area_mfn_pte_fn, &rmd);
2388 		if (err)
2389 			goto out;
2390 
2391 		err = -EFAULT;
2392 		if (HYPERVISOR_mmu_update(mmu_update, batch, NULL, domid) < 0)
2393 			goto out;
2394 
2395 		nr -= batch;
2396 		addr += range;
2397 	}
2398 
2399 	err = 0;
2400 out:
2401 
2402 	flush_tlb_all();
2403 
2404 	return err;
2405 }
2406 EXPORT_SYMBOL_GPL(xen_remap_domain_mfn_range);
2407 
2408 #ifdef CONFIG_XEN_DEBUG_FS
2409 static int p2m_dump_open(struct inode *inode, struct file *filp)
2410 {
2411 	return single_open(filp, p2m_dump_show, NULL);
2412 }
2413 
2414 static const struct file_operations p2m_dump_fops = {
2415 	.open		= p2m_dump_open,
2416 	.read		= seq_read,
2417 	.llseek		= seq_lseek,
2418 	.release	= single_release,
2419 };
2420 #endif /* CONFIG_XEN_DEBUG_FS */
2421