1 /* 2 * Xen mmu operations 3 * 4 * This file contains the various mmu fetch and update operations. 5 * The most important job they must perform is the mapping between the 6 * domain's pfn and the overall machine mfns. 7 * 8 * Xen allows guests to directly update the pagetable, in a controlled 9 * fashion. In other words, the guest modifies the same pagetable 10 * that the CPU actually uses, which eliminates the overhead of having 11 * a separate shadow pagetable. 12 * 13 * In order to allow this, it falls on the guest domain to map its 14 * notion of a "physical" pfn - which is just a domain-local linear 15 * address - into a real "machine address" which the CPU's MMU can 16 * use. 17 * 18 * A pgd_t/pmd_t/pte_t will typically contain an mfn, and so can be 19 * inserted directly into the pagetable. When creating a new 20 * pte/pmd/pgd, it converts the passed pfn into an mfn. Conversely, 21 * when reading the content back with __(pgd|pmd|pte)_val, it converts 22 * the mfn back into a pfn. 23 * 24 * The other constraint is that all pages which make up a pagetable 25 * must be mapped read-only in the guest. This prevents uncontrolled 26 * guest updates to the pagetable. Xen strictly enforces this, and 27 * will disallow any pagetable update which will end up mapping a 28 * pagetable page RW, and will disallow using any writable page as a 29 * pagetable. 30 * 31 * Naively, when loading %cr3 with the base of a new pagetable, Xen 32 * would need to validate the whole pagetable before going on. 33 * Naturally, this is quite slow. The solution is to "pin" a 34 * pagetable, which enforces all the constraints on the pagetable even 35 * when it is not actively in use. This menas that Xen can be assured 36 * that it is still valid when you do load it into %cr3, and doesn't 37 * need to revalidate it. 38 * 39 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007 40 */ 41 #include <linux/sched.h> 42 #include <linux/highmem.h> 43 #include <linux/debugfs.h> 44 #include <linux/bug.h> 45 46 #include <asm/pgtable.h> 47 #include <asm/tlbflush.h> 48 #include <asm/fixmap.h> 49 #include <asm/mmu_context.h> 50 #include <asm/paravirt.h> 51 #include <asm/linkage.h> 52 53 #include <asm/xen/hypercall.h> 54 #include <asm/xen/hypervisor.h> 55 56 #include <xen/page.h> 57 #include <xen/interface/xen.h> 58 59 #include "multicalls.h" 60 #include "mmu.h" 61 #include "debugfs.h" 62 63 #define MMU_UPDATE_HISTO 30 64 65 #ifdef CONFIG_XEN_DEBUG_FS 66 67 static struct { 68 u32 pgd_update; 69 u32 pgd_update_pinned; 70 u32 pgd_update_batched; 71 72 u32 pud_update; 73 u32 pud_update_pinned; 74 u32 pud_update_batched; 75 76 u32 pmd_update; 77 u32 pmd_update_pinned; 78 u32 pmd_update_batched; 79 80 u32 pte_update; 81 u32 pte_update_pinned; 82 u32 pte_update_batched; 83 84 u32 mmu_update; 85 u32 mmu_update_extended; 86 u32 mmu_update_histo[MMU_UPDATE_HISTO]; 87 88 u32 prot_commit; 89 u32 prot_commit_batched; 90 91 u32 set_pte_at; 92 u32 set_pte_at_batched; 93 u32 set_pte_at_pinned; 94 u32 set_pte_at_current; 95 u32 set_pte_at_kernel; 96 } mmu_stats; 97 98 static u8 zero_stats; 99 100 static inline void check_zero(void) 101 { 102 if (unlikely(zero_stats)) { 103 memset(&mmu_stats, 0, sizeof(mmu_stats)); 104 zero_stats = 0; 105 } 106 } 107 108 #define ADD_STATS(elem, val) \ 109 do { check_zero(); mmu_stats.elem += (val); } while(0) 110 111 #else /* !CONFIG_XEN_DEBUG_FS */ 112 113 #define ADD_STATS(elem, val) do { (void)(val); } while(0) 114 115 #endif /* CONFIG_XEN_DEBUG_FS */ 116 117 /* 118 * Just beyond the highest usermode address. STACK_TOP_MAX has a 119 * redzone above it, so round it up to a PGD boundary. 120 */ 121 #define USER_LIMIT ((STACK_TOP_MAX + PGDIR_SIZE - 1) & PGDIR_MASK) 122 123 124 #define P2M_ENTRIES_PER_PAGE (PAGE_SIZE / sizeof(unsigned long)) 125 #define TOP_ENTRIES (MAX_DOMAIN_PAGES / P2M_ENTRIES_PER_PAGE) 126 127 /* Placeholder for holes in the address space */ 128 static unsigned long p2m_missing[P2M_ENTRIES_PER_PAGE] __page_aligned_data = 129 { [ 0 ... P2M_ENTRIES_PER_PAGE-1 ] = ~0UL }; 130 131 /* Array of pointers to pages containing p2m entries */ 132 static unsigned long *p2m_top[TOP_ENTRIES] __page_aligned_data = 133 { [ 0 ... TOP_ENTRIES - 1] = &p2m_missing[0] }; 134 135 /* Arrays of p2m arrays expressed in mfns used for save/restore */ 136 static unsigned long p2m_top_mfn[TOP_ENTRIES] __page_aligned_bss; 137 138 static unsigned long p2m_top_mfn_list[TOP_ENTRIES / P2M_ENTRIES_PER_PAGE] 139 __page_aligned_bss; 140 141 static inline unsigned p2m_top_index(unsigned long pfn) 142 { 143 BUG_ON(pfn >= MAX_DOMAIN_PAGES); 144 return pfn / P2M_ENTRIES_PER_PAGE; 145 } 146 147 static inline unsigned p2m_index(unsigned long pfn) 148 { 149 return pfn % P2M_ENTRIES_PER_PAGE; 150 } 151 152 /* Build the parallel p2m_top_mfn structures */ 153 void xen_setup_mfn_list_list(void) 154 { 155 unsigned pfn, idx; 156 157 for(pfn = 0; pfn < MAX_DOMAIN_PAGES; pfn += P2M_ENTRIES_PER_PAGE) { 158 unsigned topidx = p2m_top_index(pfn); 159 160 p2m_top_mfn[topidx] = virt_to_mfn(p2m_top[topidx]); 161 } 162 163 for(idx = 0; idx < ARRAY_SIZE(p2m_top_mfn_list); idx++) { 164 unsigned topidx = idx * P2M_ENTRIES_PER_PAGE; 165 p2m_top_mfn_list[idx] = virt_to_mfn(&p2m_top_mfn[topidx]); 166 } 167 168 BUG_ON(HYPERVISOR_shared_info == &xen_dummy_shared_info); 169 170 HYPERVISOR_shared_info->arch.pfn_to_mfn_frame_list_list = 171 virt_to_mfn(p2m_top_mfn_list); 172 HYPERVISOR_shared_info->arch.max_pfn = xen_start_info->nr_pages; 173 } 174 175 /* Set up p2m_top to point to the domain-builder provided p2m pages */ 176 void __init xen_build_dynamic_phys_to_machine(void) 177 { 178 unsigned long *mfn_list = (unsigned long *)xen_start_info->mfn_list; 179 unsigned long max_pfn = min(MAX_DOMAIN_PAGES, xen_start_info->nr_pages); 180 unsigned pfn; 181 182 for(pfn = 0; pfn < max_pfn; pfn += P2M_ENTRIES_PER_PAGE) { 183 unsigned topidx = p2m_top_index(pfn); 184 185 p2m_top[topidx] = &mfn_list[pfn]; 186 } 187 } 188 189 unsigned long get_phys_to_machine(unsigned long pfn) 190 { 191 unsigned topidx, idx; 192 193 if (unlikely(pfn >= MAX_DOMAIN_PAGES)) 194 return INVALID_P2M_ENTRY; 195 196 topidx = p2m_top_index(pfn); 197 idx = p2m_index(pfn); 198 return p2m_top[topidx][idx]; 199 } 200 EXPORT_SYMBOL_GPL(get_phys_to_machine); 201 202 static void alloc_p2m(unsigned long **pp, unsigned long *mfnp) 203 { 204 unsigned long *p; 205 unsigned i; 206 207 p = (void *)__get_free_page(GFP_KERNEL | __GFP_NOFAIL); 208 BUG_ON(p == NULL); 209 210 for(i = 0; i < P2M_ENTRIES_PER_PAGE; i++) 211 p[i] = INVALID_P2M_ENTRY; 212 213 if (cmpxchg(pp, p2m_missing, p) != p2m_missing) 214 free_page((unsigned long)p); 215 else 216 *mfnp = virt_to_mfn(p); 217 } 218 219 void set_phys_to_machine(unsigned long pfn, unsigned long mfn) 220 { 221 unsigned topidx, idx; 222 223 if (unlikely(xen_feature(XENFEAT_auto_translated_physmap))) { 224 BUG_ON(pfn != mfn && mfn != INVALID_P2M_ENTRY); 225 return; 226 } 227 228 if (unlikely(pfn >= MAX_DOMAIN_PAGES)) { 229 BUG_ON(mfn != INVALID_P2M_ENTRY); 230 return; 231 } 232 233 topidx = p2m_top_index(pfn); 234 if (p2m_top[topidx] == p2m_missing) { 235 /* no need to allocate a page to store an invalid entry */ 236 if (mfn == INVALID_P2M_ENTRY) 237 return; 238 alloc_p2m(&p2m_top[topidx], &p2m_top_mfn[topidx]); 239 } 240 241 idx = p2m_index(pfn); 242 p2m_top[topidx][idx] = mfn; 243 } 244 245 xmaddr_t arbitrary_virt_to_machine(void *vaddr) 246 { 247 unsigned long address = (unsigned long)vaddr; 248 unsigned int level; 249 pte_t *pte; 250 unsigned offset; 251 252 /* 253 * if the PFN is in the linear mapped vaddr range, we can just use 254 * the (quick) virt_to_machine() p2m lookup 255 */ 256 if (virt_addr_valid(vaddr)) 257 return virt_to_machine(vaddr); 258 259 /* otherwise we have to do a (slower) full page-table walk */ 260 261 pte = lookup_address(address, &level); 262 BUG_ON(pte == NULL); 263 offset = address & ~PAGE_MASK; 264 return XMADDR(((phys_addr_t)pte_mfn(*pte) << PAGE_SHIFT) + offset); 265 } 266 267 void make_lowmem_page_readonly(void *vaddr) 268 { 269 pte_t *pte, ptev; 270 unsigned long address = (unsigned long)vaddr; 271 unsigned int level; 272 273 pte = lookup_address(address, &level); 274 BUG_ON(pte == NULL); 275 276 ptev = pte_wrprotect(*pte); 277 278 if (HYPERVISOR_update_va_mapping(address, ptev, 0)) 279 BUG(); 280 } 281 282 void make_lowmem_page_readwrite(void *vaddr) 283 { 284 pte_t *pte, ptev; 285 unsigned long address = (unsigned long)vaddr; 286 unsigned int level; 287 288 pte = lookup_address(address, &level); 289 BUG_ON(pte == NULL); 290 291 ptev = pte_mkwrite(*pte); 292 293 if (HYPERVISOR_update_va_mapping(address, ptev, 0)) 294 BUG(); 295 } 296 297 298 static bool xen_page_pinned(void *ptr) 299 { 300 struct page *page = virt_to_page(ptr); 301 302 return PagePinned(page); 303 } 304 305 static void xen_extend_mmu_update(const struct mmu_update *update) 306 { 307 struct multicall_space mcs; 308 struct mmu_update *u; 309 310 mcs = xen_mc_extend_args(__HYPERVISOR_mmu_update, sizeof(*u)); 311 312 if (mcs.mc != NULL) { 313 ADD_STATS(mmu_update_extended, 1); 314 ADD_STATS(mmu_update_histo[mcs.mc->args[1]], -1); 315 316 mcs.mc->args[1]++; 317 318 if (mcs.mc->args[1] < MMU_UPDATE_HISTO) 319 ADD_STATS(mmu_update_histo[mcs.mc->args[1]], 1); 320 else 321 ADD_STATS(mmu_update_histo[0], 1); 322 } else { 323 ADD_STATS(mmu_update, 1); 324 mcs = __xen_mc_entry(sizeof(*u)); 325 MULTI_mmu_update(mcs.mc, mcs.args, 1, NULL, DOMID_SELF); 326 ADD_STATS(mmu_update_histo[1], 1); 327 } 328 329 u = mcs.args; 330 *u = *update; 331 } 332 333 void xen_set_pmd_hyper(pmd_t *ptr, pmd_t val) 334 { 335 struct mmu_update u; 336 337 preempt_disable(); 338 339 xen_mc_batch(); 340 341 /* ptr may be ioremapped for 64-bit pagetable setup */ 342 u.ptr = arbitrary_virt_to_machine(ptr).maddr; 343 u.val = pmd_val_ma(val); 344 xen_extend_mmu_update(&u); 345 346 ADD_STATS(pmd_update_batched, paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU); 347 348 xen_mc_issue(PARAVIRT_LAZY_MMU); 349 350 preempt_enable(); 351 } 352 353 void xen_set_pmd(pmd_t *ptr, pmd_t val) 354 { 355 ADD_STATS(pmd_update, 1); 356 357 /* If page is not pinned, we can just update the entry 358 directly */ 359 if (!xen_page_pinned(ptr)) { 360 *ptr = val; 361 return; 362 } 363 364 ADD_STATS(pmd_update_pinned, 1); 365 366 xen_set_pmd_hyper(ptr, val); 367 } 368 369 /* 370 * Associate a virtual page frame with a given physical page frame 371 * and protection flags for that frame. 372 */ 373 void set_pte_mfn(unsigned long vaddr, unsigned long mfn, pgprot_t flags) 374 { 375 set_pte_vaddr(vaddr, mfn_pte(mfn, flags)); 376 } 377 378 void xen_set_pte_at(struct mm_struct *mm, unsigned long addr, 379 pte_t *ptep, pte_t pteval) 380 { 381 /* updates to init_mm may be done without lock */ 382 if (mm == &init_mm) 383 preempt_disable(); 384 385 ADD_STATS(set_pte_at, 1); 386 // ADD_STATS(set_pte_at_pinned, xen_page_pinned(ptep)); 387 ADD_STATS(set_pte_at_current, mm == current->mm); 388 ADD_STATS(set_pte_at_kernel, mm == &init_mm); 389 390 if (mm == current->mm || mm == &init_mm) { 391 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU) { 392 struct multicall_space mcs; 393 mcs = xen_mc_entry(0); 394 395 MULTI_update_va_mapping(mcs.mc, addr, pteval, 0); 396 ADD_STATS(set_pte_at_batched, 1); 397 xen_mc_issue(PARAVIRT_LAZY_MMU); 398 goto out; 399 } else 400 if (HYPERVISOR_update_va_mapping(addr, pteval, 0) == 0) 401 goto out; 402 } 403 xen_set_pte(ptep, pteval); 404 405 out: 406 if (mm == &init_mm) 407 preempt_enable(); 408 } 409 410 pte_t xen_ptep_modify_prot_start(struct mm_struct *mm, unsigned long addr, pte_t *ptep) 411 { 412 /* Just return the pte as-is. We preserve the bits on commit */ 413 return *ptep; 414 } 415 416 void xen_ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr, 417 pte_t *ptep, pte_t pte) 418 { 419 struct mmu_update u; 420 421 xen_mc_batch(); 422 423 u.ptr = arbitrary_virt_to_machine(ptep).maddr | MMU_PT_UPDATE_PRESERVE_AD; 424 u.val = pte_val_ma(pte); 425 xen_extend_mmu_update(&u); 426 427 ADD_STATS(prot_commit, 1); 428 ADD_STATS(prot_commit_batched, paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU); 429 430 xen_mc_issue(PARAVIRT_LAZY_MMU); 431 } 432 433 /* Assume pteval_t is equivalent to all the other *val_t types. */ 434 static pteval_t pte_mfn_to_pfn(pteval_t val) 435 { 436 if (val & _PAGE_PRESENT) { 437 unsigned long mfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT; 438 pteval_t flags = val & PTE_FLAGS_MASK; 439 val = ((pteval_t)mfn_to_pfn(mfn) << PAGE_SHIFT) | flags; 440 } 441 442 return val; 443 } 444 445 static pteval_t pte_pfn_to_mfn(pteval_t val) 446 { 447 if (val & _PAGE_PRESENT) { 448 unsigned long pfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT; 449 pteval_t flags = val & PTE_FLAGS_MASK; 450 val = ((pteval_t)pfn_to_mfn(pfn) << PAGE_SHIFT) | flags; 451 } 452 453 return val; 454 } 455 456 pteval_t xen_pte_val(pte_t pte) 457 { 458 return pte_mfn_to_pfn(pte.pte); 459 } 460 461 pgdval_t xen_pgd_val(pgd_t pgd) 462 { 463 return pte_mfn_to_pfn(pgd.pgd); 464 } 465 466 pte_t xen_make_pte(pteval_t pte) 467 { 468 pte = pte_pfn_to_mfn(pte); 469 return native_make_pte(pte); 470 } 471 472 pgd_t xen_make_pgd(pgdval_t pgd) 473 { 474 pgd = pte_pfn_to_mfn(pgd); 475 return native_make_pgd(pgd); 476 } 477 478 pmdval_t xen_pmd_val(pmd_t pmd) 479 { 480 return pte_mfn_to_pfn(pmd.pmd); 481 } 482 483 void xen_set_pud_hyper(pud_t *ptr, pud_t val) 484 { 485 struct mmu_update u; 486 487 preempt_disable(); 488 489 xen_mc_batch(); 490 491 /* ptr may be ioremapped for 64-bit pagetable setup */ 492 u.ptr = arbitrary_virt_to_machine(ptr).maddr; 493 u.val = pud_val_ma(val); 494 xen_extend_mmu_update(&u); 495 496 ADD_STATS(pud_update_batched, paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU); 497 498 xen_mc_issue(PARAVIRT_LAZY_MMU); 499 500 preempt_enable(); 501 } 502 503 void xen_set_pud(pud_t *ptr, pud_t val) 504 { 505 ADD_STATS(pud_update, 1); 506 507 /* If page is not pinned, we can just update the entry 508 directly */ 509 if (!xen_page_pinned(ptr)) { 510 *ptr = val; 511 return; 512 } 513 514 ADD_STATS(pud_update_pinned, 1); 515 516 xen_set_pud_hyper(ptr, val); 517 } 518 519 void xen_set_pte(pte_t *ptep, pte_t pte) 520 { 521 ADD_STATS(pte_update, 1); 522 // ADD_STATS(pte_update_pinned, xen_page_pinned(ptep)); 523 ADD_STATS(pte_update_batched, paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU); 524 525 #ifdef CONFIG_X86_PAE 526 ptep->pte_high = pte.pte_high; 527 smp_wmb(); 528 ptep->pte_low = pte.pte_low; 529 #else 530 *ptep = pte; 531 #endif 532 } 533 534 #ifdef CONFIG_X86_PAE 535 void xen_set_pte_atomic(pte_t *ptep, pte_t pte) 536 { 537 set_64bit((u64 *)ptep, native_pte_val(pte)); 538 } 539 540 void xen_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) 541 { 542 ptep->pte_low = 0; 543 smp_wmb(); /* make sure low gets written first */ 544 ptep->pte_high = 0; 545 } 546 547 void xen_pmd_clear(pmd_t *pmdp) 548 { 549 set_pmd(pmdp, __pmd(0)); 550 } 551 #endif /* CONFIG_X86_PAE */ 552 553 pmd_t xen_make_pmd(pmdval_t pmd) 554 { 555 pmd = pte_pfn_to_mfn(pmd); 556 return native_make_pmd(pmd); 557 } 558 559 #if PAGETABLE_LEVELS == 4 560 pudval_t xen_pud_val(pud_t pud) 561 { 562 return pte_mfn_to_pfn(pud.pud); 563 } 564 565 pud_t xen_make_pud(pudval_t pud) 566 { 567 pud = pte_pfn_to_mfn(pud); 568 569 return native_make_pud(pud); 570 } 571 572 pgd_t *xen_get_user_pgd(pgd_t *pgd) 573 { 574 pgd_t *pgd_page = (pgd_t *)(((unsigned long)pgd) & PAGE_MASK); 575 unsigned offset = pgd - pgd_page; 576 pgd_t *user_ptr = NULL; 577 578 if (offset < pgd_index(USER_LIMIT)) { 579 struct page *page = virt_to_page(pgd_page); 580 user_ptr = (pgd_t *)page->private; 581 if (user_ptr) 582 user_ptr += offset; 583 } 584 585 return user_ptr; 586 } 587 588 static void __xen_set_pgd_hyper(pgd_t *ptr, pgd_t val) 589 { 590 struct mmu_update u; 591 592 u.ptr = virt_to_machine(ptr).maddr; 593 u.val = pgd_val_ma(val); 594 xen_extend_mmu_update(&u); 595 } 596 597 /* 598 * Raw hypercall-based set_pgd, intended for in early boot before 599 * there's a page structure. This implies: 600 * 1. The only existing pagetable is the kernel's 601 * 2. It is always pinned 602 * 3. It has no user pagetable attached to it 603 */ 604 void __init xen_set_pgd_hyper(pgd_t *ptr, pgd_t val) 605 { 606 preempt_disable(); 607 608 xen_mc_batch(); 609 610 __xen_set_pgd_hyper(ptr, val); 611 612 xen_mc_issue(PARAVIRT_LAZY_MMU); 613 614 preempt_enable(); 615 } 616 617 void xen_set_pgd(pgd_t *ptr, pgd_t val) 618 { 619 pgd_t *user_ptr = xen_get_user_pgd(ptr); 620 621 ADD_STATS(pgd_update, 1); 622 623 /* If page is not pinned, we can just update the entry 624 directly */ 625 if (!xen_page_pinned(ptr)) { 626 *ptr = val; 627 if (user_ptr) { 628 WARN_ON(xen_page_pinned(user_ptr)); 629 *user_ptr = val; 630 } 631 return; 632 } 633 634 ADD_STATS(pgd_update_pinned, 1); 635 ADD_STATS(pgd_update_batched, paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU); 636 637 /* If it's pinned, then we can at least batch the kernel and 638 user updates together. */ 639 xen_mc_batch(); 640 641 __xen_set_pgd_hyper(ptr, val); 642 if (user_ptr) 643 __xen_set_pgd_hyper(user_ptr, val); 644 645 xen_mc_issue(PARAVIRT_LAZY_MMU); 646 } 647 #endif /* PAGETABLE_LEVELS == 4 */ 648 649 /* 650 * (Yet another) pagetable walker. This one is intended for pinning a 651 * pagetable. This means that it walks a pagetable and calls the 652 * callback function on each page it finds making up the page table, 653 * at every level. It walks the entire pagetable, but it only bothers 654 * pinning pte pages which are below limit. In the normal case this 655 * will be STACK_TOP_MAX, but at boot we need to pin up to 656 * FIXADDR_TOP. 657 * 658 * For 32-bit the important bit is that we don't pin beyond there, 659 * because then we start getting into Xen's ptes. 660 * 661 * For 64-bit, we must skip the Xen hole in the middle of the address 662 * space, just after the big x86-64 virtual hole. 663 */ 664 static int xen_pgd_walk(struct mm_struct *mm, 665 int (*func)(struct mm_struct *mm, struct page *, 666 enum pt_level), 667 unsigned long limit) 668 { 669 pgd_t *pgd = mm->pgd; 670 int flush = 0; 671 unsigned hole_low, hole_high; 672 unsigned pgdidx_limit, pudidx_limit, pmdidx_limit; 673 unsigned pgdidx, pudidx, pmdidx; 674 675 /* The limit is the last byte to be touched */ 676 limit--; 677 BUG_ON(limit >= FIXADDR_TOP); 678 679 if (xen_feature(XENFEAT_auto_translated_physmap)) 680 return 0; 681 682 /* 683 * 64-bit has a great big hole in the middle of the address 684 * space, which contains the Xen mappings. On 32-bit these 685 * will end up making a zero-sized hole and so is a no-op. 686 */ 687 hole_low = pgd_index(USER_LIMIT); 688 hole_high = pgd_index(PAGE_OFFSET); 689 690 pgdidx_limit = pgd_index(limit); 691 #if PTRS_PER_PUD > 1 692 pudidx_limit = pud_index(limit); 693 #else 694 pudidx_limit = 0; 695 #endif 696 #if PTRS_PER_PMD > 1 697 pmdidx_limit = pmd_index(limit); 698 #else 699 pmdidx_limit = 0; 700 #endif 701 702 for (pgdidx = 0; pgdidx <= pgdidx_limit; pgdidx++) { 703 pud_t *pud; 704 705 if (pgdidx >= hole_low && pgdidx < hole_high) 706 continue; 707 708 if (!pgd_val(pgd[pgdidx])) 709 continue; 710 711 pud = pud_offset(&pgd[pgdidx], 0); 712 713 if (PTRS_PER_PUD > 1) /* not folded */ 714 flush |= (*func)(mm, virt_to_page(pud), PT_PUD); 715 716 for (pudidx = 0; pudidx < PTRS_PER_PUD; pudidx++) { 717 pmd_t *pmd; 718 719 if (pgdidx == pgdidx_limit && 720 pudidx > pudidx_limit) 721 goto out; 722 723 if (pud_none(pud[pudidx])) 724 continue; 725 726 pmd = pmd_offset(&pud[pudidx], 0); 727 728 if (PTRS_PER_PMD > 1) /* not folded */ 729 flush |= (*func)(mm, virt_to_page(pmd), PT_PMD); 730 731 for (pmdidx = 0; pmdidx < PTRS_PER_PMD; pmdidx++) { 732 struct page *pte; 733 734 if (pgdidx == pgdidx_limit && 735 pudidx == pudidx_limit && 736 pmdidx > pmdidx_limit) 737 goto out; 738 739 if (pmd_none(pmd[pmdidx])) 740 continue; 741 742 pte = pmd_page(pmd[pmdidx]); 743 flush |= (*func)(mm, pte, PT_PTE); 744 } 745 } 746 } 747 748 out: 749 /* Do the top level last, so that the callbacks can use it as 750 a cue to do final things like tlb flushes. */ 751 flush |= (*func)(mm, virt_to_page(pgd), PT_PGD); 752 753 return flush; 754 } 755 756 /* If we're using split pte locks, then take the page's lock and 757 return a pointer to it. Otherwise return NULL. */ 758 static spinlock_t *xen_pte_lock(struct page *page, struct mm_struct *mm) 759 { 760 spinlock_t *ptl = NULL; 761 762 #if USE_SPLIT_PTLOCKS 763 ptl = __pte_lockptr(page); 764 spin_lock_nest_lock(ptl, &mm->page_table_lock); 765 #endif 766 767 return ptl; 768 } 769 770 static void xen_pte_unlock(void *v) 771 { 772 spinlock_t *ptl = v; 773 spin_unlock(ptl); 774 } 775 776 static void xen_do_pin(unsigned level, unsigned long pfn) 777 { 778 struct mmuext_op *op; 779 struct multicall_space mcs; 780 781 mcs = __xen_mc_entry(sizeof(*op)); 782 op = mcs.args; 783 op->cmd = level; 784 op->arg1.mfn = pfn_to_mfn(pfn); 785 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); 786 } 787 788 static int xen_pin_page(struct mm_struct *mm, struct page *page, 789 enum pt_level level) 790 { 791 unsigned pgfl = TestSetPagePinned(page); 792 int flush; 793 794 if (pgfl) 795 flush = 0; /* already pinned */ 796 else if (PageHighMem(page)) 797 /* kmaps need flushing if we found an unpinned 798 highpage */ 799 flush = 1; 800 else { 801 void *pt = lowmem_page_address(page); 802 unsigned long pfn = page_to_pfn(page); 803 struct multicall_space mcs = __xen_mc_entry(0); 804 spinlock_t *ptl; 805 806 flush = 0; 807 808 /* 809 * We need to hold the pagetable lock between the time 810 * we make the pagetable RO and when we actually pin 811 * it. If we don't, then other users may come in and 812 * attempt to update the pagetable by writing it, 813 * which will fail because the memory is RO but not 814 * pinned, so Xen won't do the trap'n'emulate. 815 * 816 * If we're using split pte locks, we can't hold the 817 * entire pagetable's worth of locks during the 818 * traverse, because we may wrap the preempt count (8 819 * bits). The solution is to mark RO and pin each PTE 820 * page while holding the lock. This means the number 821 * of locks we end up holding is never more than a 822 * batch size (~32 entries, at present). 823 * 824 * If we're not using split pte locks, we needn't pin 825 * the PTE pages independently, because we're 826 * protected by the overall pagetable lock. 827 */ 828 ptl = NULL; 829 if (level == PT_PTE) 830 ptl = xen_pte_lock(page, mm); 831 832 MULTI_update_va_mapping(mcs.mc, (unsigned long)pt, 833 pfn_pte(pfn, PAGE_KERNEL_RO), 834 level == PT_PGD ? UVMF_TLB_FLUSH : 0); 835 836 if (ptl) { 837 xen_do_pin(MMUEXT_PIN_L1_TABLE, pfn); 838 839 /* Queue a deferred unlock for when this batch 840 is completed. */ 841 xen_mc_callback(xen_pte_unlock, ptl); 842 } 843 } 844 845 return flush; 846 } 847 848 /* This is called just after a mm has been created, but it has not 849 been used yet. We need to make sure that its pagetable is all 850 read-only, and can be pinned. */ 851 static void __xen_pgd_pin(struct mm_struct *mm, pgd_t *pgd) 852 { 853 xen_mc_batch(); 854 855 if (xen_pgd_walk(mm, xen_pin_page, USER_LIMIT)) { 856 /* re-enable interrupts for kmap_flush_unused */ 857 xen_mc_issue(0); 858 kmap_flush_unused(); 859 vm_unmap_aliases(); 860 xen_mc_batch(); 861 } 862 863 #ifdef CONFIG_X86_64 864 { 865 pgd_t *user_pgd = xen_get_user_pgd(pgd); 866 867 xen_do_pin(MMUEXT_PIN_L4_TABLE, PFN_DOWN(__pa(pgd))); 868 869 if (user_pgd) { 870 xen_pin_page(mm, virt_to_page(user_pgd), PT_PGD); 871 xen_do_pin(MMUEXT_PIN_L4_TABLE, PFN_DOWN(__pa(user_pgd))); 872 } 873 } 874 #else /* CONFIG_X86_32 */ 875 #ifdef CONFIG_X86_PAE 876 /* Need to make sure unshared kernel PMD is pinnable */ 877 xen_pin_page(mm, virt_to_page(pgd_page(pgd[pgd_index(TASK_SIZE)])), 878 PT_PMD); 879 #endif 880 xen_do_pin(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(pgd))); 881 #endif /* CONFIG_X86_64 */ 882 xen_mc_issue(0); 883 } 884 885 static void xen_pgd_pin(struct mm_struct *mm) 886 { 887 __xen_pgd_pin(mm, mm->pgd); 888 } 889 890 /* 891 * On save, we need to pin all pagetables to make sure they get their 892 * mfns turned into pfns. Search the list for any unpinned pgds and pin 893 * them (unpinned pgds are not currently in use, probably because the 894 * process is under construction or destruction). 895 * 896 * Expected to be called in stop_machine() ("equivalent to taking 897 * every spinlock in the system"), so the locking doesn't really 898 * matter all that much. 899 */ 900 void xen_mm_pin_all(void) 901 { 902 unsigned long flags; 903 struct page *page; 904 905 spin_lock_irqsave(&pgd_lock, flags); 906 907 list_for_each_entry(page, &pgd_list, lru) { 908 if (!PagePinned(page)) { 909 __xen_pgd_pin(&init_mm, (pgd_t *)page_address(page)); 910 SetPageSavePinned(page); 911 } 912 } 913 914 spin_unlock_irqrestore(&pgd_lock, flags); 915 } 916 917 /* 918 * The init_mm pagetable is really pinned as soon as its created, but 919 * that's before we have page structures to store the bits. So do all 920 * the book-keeping now. 921 */ 922 static __init int xen_mark_pinned(struct mm_struct *mm, struct page *page, 923 enum pt_level level) 924 { 925 SetPagePinned(page); 926 return 0; 927 } 928 929 void __init xen_mark_init_mm_pinned(void) 930 { 931 xen_pgd_walk(&init_mm, xen_mark_pinned, FIXADDR_TOP); 932 } 933 934 static int xen_unpin_page(struct mm_struct *mm, struct page *page, 935 enum pt_level level) 936 { 937 unsigned pgfl = TestClearPagePinned(page); 938 939 if (pgfl && !PageHighMem(page)) { 940 void *pt = lowmem_page_address(page); 941 unsigned long pfn = page_to_pfn(page); 942 spinlock_t *ptl = NULL; 943 struct multicall_space mcs; 944 945 /* 946 * Do the converse to pin_page. If we're using split 947 * pte locks, we must be holding the lock for while 948 * the pte page is unpinned but still RO to prevent 949 * concurrent updates from seeing it in this 950 * partially-pinned state. 951 */ 952 if (level == PT_PTE) { 953 ptl = xen_pte_lock(page, mm); 954 955 if (ptl) 956 xen_do_pin(MMUEXT_UNPIN_TABLE, pfn); 957 } 958 959 mcs = __xen_mc_entry(0); 960 961 MULTI_update_va_mapping(mcs.mc, (unsigned long)pt, 962 pfn_pte(pfn, PAGE_KERNEL), 963 level == PT_PGD ? UVMF_TLB_FLUSH : 0); 964 965 if (ptl) { 966 /* unlock when batch completed */ 967 xen_mc_callback(xen_pte_unlock, ptl); 968 } 969 } 970 971 return 0; /* never need to flush on unpin */ 972 } 973 974 /* Release a pagetables pages back as normal RW */ 975 static void __xen_pgd_unpin(struct mm_struct *mm, pgd_t *pgd) 976 { 977 xen_mc_batch(); 978 979 xen_do_pin(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd))); 980 981 #ifdef CONFIG_X86_64 982 { 983 pgd_t *user_pgd = xen_get_user_pgd(pgd); 984 985 if (user_pgd) { 986 xen_do_pin(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(user_pgd))); 987 xen_unpin_page(mm, virt_to_page(user_pgd), PT_PGD); 988 } 989 } 990 #endif 991 992 #ifdef CONFIG_X86_PAE 993 /* Need to make sure unshared kernel PMD is unpinned */ 994 xen_unpin_page(mm, virt_to_page(pgd_page(pgd[pgd_index(TASK_SIZE)])), 995 PT_PMD); 996 #endif 997 998 xen_pgd_walk(mm, xen_unpin_page, USER_LIMIT); 999 1000 xen_mc_issue(0); 1001 } 1002 1003 static void xen_pgd_unpin(struct mm_struct *mm) 1004 { 1005 __xen_pgd_unpin(mm, mm->pgd); 1006 } 1007 1008 /* 1009 * On resume, undo any pinning done at save, so that the rest of the 1010 * kernel doesn't see any unexpected pinned pagetables. 1011 */ 1012 void xen_mm_unpin_all(void) 1013 { 1014 unsigned long flags; 1015 struct page *page; 1016 1017 spin_lock_irqsave(&pgd_lock, flags); 1018 1019 list_for_each_entry(page, &pgd_list, lru) { 1020 if (PageSavePinned(page)) { 1021 BUG_ON(!PagePinned(page)); 1022 __xen_pgd_unpin(&init_mm, (pgd_t *)page_address(page)); 1023 ClearPageSavePinned(page); 1024 } 1025 } 1026 1027 spin_unlock_irqrestore(&pgd_lock, flags); 1028 } 1029 1030 void xen_activate_mm(struct mm_struct *prev, struct mm_struct *next) 1031 { 1032 spin_lock(&next->page_table_lock); 1033 xen_pgd_pin(next); 1034 spin_unlock(&next->page_table_lock); 1035 } 1036 1037 void xen_dup_mmap(struct mm_struct *oldmm, struct mm_struct *mm) 1038 { 1039 spin_lock(&mm->page_table_lock); 1040 xen_pgd_pin(mm); 1041 spin_unlock(&mm->page_table_lock); 1042 } 1043 1044 1045 #ifdef CONFIG_SMP 1046 /* Another cpu may still have their %cr3 pointing at the pagetable, so 1047 we need to repoint it somewhere else before we can unpin it. */ 1048 static void drop_other_mm_ref(void *info) 1049 { 1050 struct mm_struct *mm = info; 1051 struct mm_struct *active_mm; 1052 1053 #ifdef CONFIG_X86_64 1054 active_mm = read_pda(active_mm); 1055 #else 1056 active_mm = __get_cpu_var(cpu_tlbstate).active_mm; 1057 #endif 1058 1059 if (active_mm == mm) 1060 leave_mm(smp_processor_id()); 1061 1062 /* If this cpu still has a stale cr3 reference, then make sure 1063 it has been flushed. */ 1064 if (x86_read_percpu(xen_current_cr3) == __pa(mm->pgd)) { 1065 load_cr3(swapper_pg_dir); 1066 arch_flush_lazy_cpu_mode(); 1067 } 1068 } 1069 1070 static void xen_drop_mm_ref(struct mm_struct *mm) 1071 { 1072 cpumask_t mask; 1073 unsigned cpu; 1074 1075 if (current->active_mm == mm) { 1076 if (current->mm == mm) 1077 load_cr3(swapper_pg_dir); 1078 else 1079 leave_mm(smp_processor_id()); 1080 arch_flush_lazy_cpu_mode(); 1081 } 1082 1083 /* Get the "official" set of cpus referring to our pagetable. */ 1084 mask = mm->cpu_vm_mask; 1085 1086 /* It's possible that a vcpu may have a stale reference to our 1087 cr3, because its in lazy mode, and it hasn't yet flushed 1088 its set of pending hypercalls yet. In this case, we can 1089 look at its actual current cr3 value, and force it to flush 1090 if needed. */ 1091 for_each_online_cpu(cpu) { 1092 if (per_cpu(xen_current_cr3, cpu) == __pa(mm->pgd)) 1093 cpu_set(cpu, mask); 1094 } 1095 1096 if (!cpus_empty(mask)) 1097 smp_call_function_mask(mask, drop_other_mm_ref, mm, 1); 1098 } 1099 #else 1100 static void xen_drop_mm_ref(struct mm_struct *mm) 1101 { 1102 if (current->active_mm == mm) 1103 load_cr3(swapper_pg_dir); 1104 } 1105 #endif 1106 1107 /* 1108 * While a process runs, Xen pins its pagetables, which means that the 1109 * hypervisor forces it to be read-only, and it controls all updates 1110 * to it. This means that all pagetable updates have to go via the 1111 * hypervisor, which is moderately expensive. 1112 * 1113 * Since we're pulling the pagetable down, we switch to use init_mm, 1114 * unpin old process pagetable and mark it all read-write, which 1115 * allows further operations on it to be simple memory accesses. 1116 * 1117 * The only subtle point is that another CPU may be still using the 1118 * pagetable because of lazy tlb flushing. This means we need need to 1119 * switch all CPUs off this pagetable before we can unpin it. 1120 */ 1121 void xen_exit_mmap(struct mm_struct *mm) 1122 { 1123 get_cpu(); /* make sure we don't move around */ 1124 xen_drop_mm_ref(mm); 1125 put_cpu(); 1126 1127 spin_lock(&mm->page_table_lock); 1128 1129 /* pgd may not be pinned in the error exit path of execve */ 1130 if (xen_page_pinned(mm->pgd)) 1131 xen_pgd_unpin(mm); 1132 1133 spin_unlock(&mm->page_table_lock); 1134 } 1135 1136 #ifdef CONFIG_XEN_DEBUG_FS 1137 1138 static struct dentry *d_mmu_debug; 1139 1140 static int __init xen_mmu_debugfs(void) 1141 { 1142 struct dentry *d_xen = xen_init_debugfs(); 1143 1144 if (d_xen == NULL) 1145 return -ENOMEM; 1146 1147 d_mmu_debug = debugfs_create_dir("mmu", d_xen); 1148 1149 debugfs_create_u8("zero_stats", 0644, d_mmu_debug, &zero_stats); 1150 1151 debugfs_create_u32("pgd_update", 0444, d_mmu_debug, &mmu_stats.pgd_update); 1152 debugfs_create_u32("pgd_update_pinned", 0444, d_mmu_debug, 1153 &mmu_stats.pgd_update_pinned); 1154 debugfs_create_u32("pgd_update_batched", 0444, d_mmu_debug, 1155 &mmu_stats.pgd_update_pinned); 1156 1157 debugfs_create_u32("pud_update", 0444, d_mmu_debug, &mmu_stats.pud_update); 1158 debugfs_create_u32("pud_update_pinned", 0444, d_mmu_debug, 1159 &mmu_stats.pud_update_pinned); 1160 debugfs_create_u32("pud_update_batched", 0444, d_mmu_debug, 1161 &mmu_stats.pud_update_pinned); 1162 1163 debugfs_create_u32("pmd_update", 0444, d_mmu_debug, &mmu_stats.pmd_update); 1164 debugfs_create_u32("pmd_update_pinned", 0444, d_mmu_debug, 1165 &mmu_stats.pmd_update_pinned); 1166 debugfs_create_u32("pmd_update_batched", 0444, d_mmu_debug, 1167 &mmu_stats.pmd_update_pinned); 1168 1169 debugfs_create_u32("pte_update", 0444, d_mmu_debug, &mmu_stats.pte_update); 1170 // debugfs_create_u32("pte_update_pinned", 0444, d_mmu_debug, 1171 // &mmu_stats.pte_update_pinned); 1172 debugfs_create_u32("pte_update_batched", 0444, d_mmu_debug, 1173 &mmu_stats.pte_update_pinned); 1174 1175 debugfs_create_u32("mmu_update", 0444, d_mmu_debug, &mmu_stats.mmu_update); 1176 debugfs_create_u32("mmu_update_extended", 0444, d_mmu_debug, 1177 &mmu_stats.mmu_update_extended); 1178 xen_debugfs_create_u32_array("mmu_update_histo", 0444, d_mmu_debug, 1179 mmu_stats.mmu_update_histo, 20); 1180 1181 debugfs_create_u32("set_pte_at", 0444, d_mmu_debug, &mmu_stats.set_pte_at); 1182 debugfs_create_u32("set_pte_at_batched", 0444, d_mmu_debug, 1183 &mmu_stats.set_pte_at_batched); 1184 debugfs_create_u32("set_pte_at_current", 0444, d_mmu_debug, 1185 &mmu_stats.set_pte_at_current); 1186 debugfs_create_u32("set_pte_at_kernel", 0444, d_mmu_debug, 1187 &mmu_stats.set_pte_at_kernel); 1188 1189 debugfs_create_u32("prot_commit", 0444, d_mmu_debug, &mmu_stats.prot_commit); 1190 debugfs_create_u32("prot_commit_batched", 0444, d_mmu_debug, 1191 &mmu_stats.prot_commit_batched); 1192 1193 return 0; 1194 } 1195 fs_initcall(xen_mmu_debugfs); 1196 1197 #endif /* CONFIG_XEN_DEBUG_FS */ 1198