1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Core of Xen paravirt_ops implementation. 4 * 5 * This file contains the xen_paravirt_ops structure itself, and the 6 * implementations for: 7 * - privileged instructions 8 * - interrupt flags 9 * - segment operations 10 * - booting and setup 11 * 12 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007 13 */ 14 15 #include <linux/cpu.h> 16 #include <linux/kernel.h> 17 #include <linux/init.h> 18 #include <linux/smp.h> 19 #include <linux/preempt.h> 20 #include <linux/hardirq.h> 21 #include <linux/percpu.h> 22 #include <linux/delay.h> 23 #include <linux/start_kernel.h> 24 #include <linux/sched.h> 25 #include <linux/kprobes.h> 26 #include <linux/memblock.h> 27 #include <linux/export.h> 28 #include <linux/mm.h> 29 #include <linux/page-flags.h> 30 #include <linux/highmem.h> 31 #include <linux/console.h> 32 #include <linux/pci.h> 33 #include <linux/gfp.h> 34 #include <linux/edd.h> 35 #include <linux/frame.h> 36 37 #include <xen/xen.h> 38 #include <xen/events.h> 39 #include <xen/interface/xen.h> 40 #include <xen/interface/version.h> 41 #include <xen/interface/physdev.h> 42 #include <xen/interface/vcpu.h> 43 #include <xen/interface/memory.h> 44 #include <xen/interface/nmi.h> 45 #include <xen/interface/xen-mca.h> 46 #include <xen/features.h> 47 #include <xen/page.h> 48 #include <xen/hvc-console.h> 49 #include <xen/acpi.h> 50 51 #include <asm/paravirt.h> 52 #include <asm/apic.h> 53 #include <asm/page.h> 54 #include <asm/xen/pci.h> 55 #include <asm/xen/hypercall.h> 56 #include <asm/xen/hypervisor.h> 57 #include <asm/xen/cpuid.h> 58 #include <asm/fixmap.h> 59 #include <asm/processor.h> 60 #include <asm/proto.h> 61 #include <asm/msr-index.h> 62 #include <asm/traps.h> 63 #include <asm/setup.h> 64 #include <asm/desc.h> 65 #include <asm/pgalloc.h> 66 #include <asm/pgtable.h> 67 #include <asm/tlbflush.h> 68 #include <asm/reboot.h> 69 #include <asm/stackprotector.h> 70 #include <asm/hypervisor.h> 71 #include <asm/mach_traps.h> 72 #include <asm/mwait.h> 73 #include <asm/pci_x86.h> 74 #include <asm/cpu.h> 75 76 #ifdef CONFIG_ACPI 77 #include <linux/acpi.h> 78 #include <asm/acpi.h> 79 #include <acpi/pdc_intel.h> 80 #include <acpi/processor.h> 81 #include <xen/interface/platform.h> 82 #endif 83 84 #include "xen-ops.h" 85 #include "mmu.h" 86 #include "smp.h" 87 #include "multicalls.h" 88 #include "pmu.h" 89 90 #include "../kernel/cpu/cpu.h" /* get_cpu_cap() */ 91 92 void *xen_initial_gdt; 93 94 static int xen_cpu_up_prepare_pv(unsigned int cpu); 95 static int xen_cpu_dead_pv(unsigned int cpu); 96 97 struct tls_descs { 98 struct desc_struct desc[3]; 99 }; 100 101 /* 102 * Updating the 3 TLS descriptors in the GDT on every task switch is 103 * surprisingly expensive so we avoid updating them if they haven't 104 * changed. Since Xen writes different descriptors than the one 105 * passed in the update_descriptor hypercall we keep shadow copies to 106 * compare against. 107 */ 108 static DEFINE_PER_CPU(struct tls_descs, shadow_tls_desc); 109 110 static void __init xen_banner(void) 111 { 112 unsigned version = HYPERVISOR_xen_version(XENVER_version, NULL); 113 struct xen_extraversion extra; 114 HYPERVISOR_xen_version(XENVER_extraversion, &extra); 115 116 pr_info("Booting paravirtualized kernel on %s\n", pv_info.name); 117 printk(KERN_INFO "Xen version: %d.%d%s%s\n", 118 version >> 16, version & 0xffff, extra.extraversion, 119 xen_feature(XENFEAT_mmu_pt_update_preserve_ad) ? " (preserve-AD)" : ""); 120 121 #ifdef CONFIG_X86_32 122 pr_warn("WARNING! WARNING! WARNING! WARNING! WARNING! WARNING! WARNING!\n" 123 "Support for running as 32-bit PV-guest under Xen will soon be removed\n" 124 "from the Linux kernel!\n" 125 "Please use either a 64-bit kernel or switch to HVM or PVH mode!\n" 126 "WARNING! WARNING! WARNING! WARNING! WARNING! WARNING! WARNING!\n"); 127 #endif 128 } 129 130 static void __init xen_pv_init_platform(void) 131 { 132 populate_extra_pte(fix_to_virt(FIX_PARAVIRT_BOOTMAP)); 133 134 set_fixmap(FIX_PARAVIRT_BOOTMAP, xen_start_info->shared_info); 135 HYPERVISOR_shared_info = (void *)fix_to_virt(FIX_PARAVIRT_BOOTMAP); 136 137 /* xen clock uses per-cpu vcpu_info, need to init it for boot cpu */ 138 xen_vcpu_info_reset(0); 139 140 /* pvclock is in shared info area */ 141 xen_init_time_ops(); 142 } 143 144 static void __init xen_pv_guest_late_init(void) 145 { 146 #ifndef CONFIG_SMP 147 /* Setup shared vcpu info for non-smp configurations */ 148 xen_setup_vcpu_info_placement(); 149 #endif 150 } 151 152 /* Check if running on Xen version (major, minor) or later */ 153 bool 154 xen_running_on_version_or_later(unsigned int major, unsigned int minor) 155 { 156 unsigned int version; 157 158 if (!xen_domain()) 159 return false; 160 161 version = HYPERVISOR_xen_version(XENVER_version, NULL); 162 if ((((version >> 16) == major) && ((version & 0xffff) >= minor)) || 163 ((version >> 16) > major)) 164 return true; 165 return false; 166 } 167 168 static __read_mostly unsigned int cpuid_leaf5_ecx_val; 169 static __read_mostly unsigned int cpuid_leaf5_edx_val; 170 171 static void xen_cpuid(unsigned int *ax, unsigned int *bx, 172 unsigned int *cx, unsigned int *dx) 173 { 174 unsigned maskebx = ~0; 175 176 /* 177 * Mask out inconvenient features, to try and disable as many 178 * unsupported kernel subsystems as possible. 179 */ 180 switch (*ax) { 181 case CPUID_MWAIT_LEAF: 182 /* Synthesize the values.. */ 183 *ax = 0; 184 *bx = 0; 185 *cx = cpuid_leaf5_ecx_val; 186 *dx = cpuid_leaf5_edx_val; 187 return; 188 189 case 0xb: 190 /* Suppress extended topology stuff */ 191 maskebx = 0; 192 break; 193 } 194 195 asm(XEN_EMULATE_PREFIX "cpuid" 196 : "=a" (*ax), 197 "=b" (*bx), 198 "=c" (*cx), 199 "=d" (*dx) 200 : "0" (*ax), "2" (*cx)); 201 202 *bx &= maskebx; 203 } 204 STACK_FRAME_NON_STANDARD(xen_cpuid); /* XEN_EMULATE_PREFIX */ 205 206 static bool __init xen_check_mwait(void) 207 { 208 #ifdef CONFIG_ACPI 209 struct xen_platform_op op = { 210 .cmd = XENPF_set_processor_pminfo, 211 .u.set_pminfo.id = -1, 212 .u.set_pminfo.type = XEN_PM_PDC, 213 }; 214 uint32_t buf[3]; 215 unsigned int ax, bx, cx, dx; 216 unsigned int mwait_mask; 217 218 /* We need to determine whether it is OK to expose the MWAIT 219 * capability to the kernel to harvest deeper than C3 states from ACPI 220 * _CST using the processor_harvest_xen.c module. For this to work, we 221 * need to gather the MWAIT_LEAF values (which the cstate.c code 222 * checks against). The hypervisor won't expose the MWAIT flag because 223 * it would break backwards compatibility; so we will find out directly 224 * from the hardware and hypercall. 225 */ 226 if (!xen_initial_domain()) 227 return false; 228 229 /* 230 * When running under platform earlier than Xen4.2, do not expose 231 * mwait, to avoid the risk of loading native acpi pad driver 232 */ 233 if (!xen_running_on_version_or_later(4, 2)) 234 return false; 235 236 ax = 1; 237 cx = 0; 238 239 native_cpuid(&ax, &bx, &cx, &dx); 240 241 mwait_mask = (1 << (X86_FEATURE_EST % 32)) | 242 (1 << (X86_FEATURE_MWAIT % 32)); 243 244 if ((cx & mwait_mask) != mwait_mask) 245 return false; 246 247 /* We need to emulate the MWAIT_LEAF and for that we need both 248 * ecx and edx. The hypercall provides only partial information. 249 */ 250 251 ax = CPUID_MWAIT_LEAF; 252 bx = 0; 253 cx = 0; 254 dx = 0; 255 256 native_cpuid(&ax, &bx, &cx, &dx); 257 258 /* Ask the Hypervisor whether to clear ACPI_PDC_C_C2C3_FFH. If so, 259 * don't expose MWAIT_LEAF and let ACPI pick the IOPORT version of C3. 260 */ 261 buf[0] = ACPI_PDC_REVISION_ID; 262 buf[1] = 1; 263 buf[2] = (ACPI_PDC_C_CAPABILITY_SMP | ACPI_PDC_EST_CAPABILITY_SWSMP); 264 265 set_xen_guest_handle(op.u.set_pminfo.pdc, buf); 266 267 if ((HYPERVISOR_platform_op(&op) == 0) && 268 (buf[2] & (ACPI_PDC_C_C1_FFH | ACPI_PDC_C_C2C3_FFH))) { 269 cpuid_leaf5_ecx_val = cx; 270 cpuid_leaf5_edx_val = dx; 271 } 272 return true; 273 #else 274 return false; 275 #endif 276 } 277 278 static bool __init xen_check_xsave(void) 279 { 280 unsigned int cx, xsave_mask; 281 282 cx = cpuid_ecx(1); 283 284 xsave_mask = (1 << (X86_FEATURE_XSAVE % 32)) | 285 (1 << (X86_FEATURE_OSXSAVE % 32)); 286 287 /* Xen will set CR4.OSXSAVE if supported and not disabled by force */ 288 return (cx & xsave_mask) == xsave_mask; 289 } 290 291 static void __init xen_init_capabilities(void) 292 { 293 setup_force_cpu_cap(X86_FEATURE_XENPV); 294 setup_clear_cpu_cap(X86_FEATURE_DCA); 295 setup_clear_cpu_cap(X86_FEATURE_APERFMPERF); 296 setup_clear_cpu_cap(X86_FEATURE_MTRR); 297 setup_clear_cpu_cap(X86_FEATURE_ACC); 298 setup_clear_cpu_cap(X86_FEATURE_X2APIC); 299 setup_clear_cpu_cap(X86_FEATURE_SME); 300 301 /* 302 * Xen PV would need some work to support PCID: CR3 handling as well 303 * as xen_flush_tlb_others() would need updating. 304 */ 305 setup_clear_cpu_cap(X86_FEATURE_PCID); 306 307 if (!xen_initial_domain()) 308 setup_clear_cpu_cap(X86_FEATURE_ACPI); 309 310 if (xen_check_mwait()) 311 setup_force_cpu_cap(X86_FEATURE_MWAIT); 312 else 313 setup_clear_cpu_cap(X86_FEATURE_MWAIT); 314 315 if (!xen_check_xsave()) { 316 setup_clear_cpu_cap(X86_FEATURE_XSAVE); 317 setup_clear_cpu_cap(X86_FEATURE_OSXSAVE); 318 } 319 } 320 321 static void xen_set_debugreg(int reg, unsigned long val) 322 { 323 HYPERVISOR_set_debugreg(reg, val); 324 } 325 326 static unsigned long xen_get_debugreg(int reg) 327 { 328 return HYPERVISOR_get_debugreg(reg); 329 } 330 331 static void xen_end_context_switch(struct task_struct *next) 332 { 333 xen_mc_flush(); 334 paravirt_end_context_switch(next); 335 } 336 337 static unsigned long xen_store_tr(void) 338 { 339 return 0; 340 } 341 342 /* 343 * Set the page permissions for a particular virtual address. If the 344 * address is a vmalloc mapping (or other non-linear mapping), then 345 * find the linear mapping of the page and also set its protections to 346 * match. 347 */ 348 static void set_aliased_prot(void *v, pgprot_t prot) 349 { 350 int level; 351 pte_t *ptep; 352 pte_t pte; 353 unsigned long pfn; 354 struct page *page; 355 unsigned char dummy; 356 357 ptep = lookup_address((unsigned long)v, &level); 358 BUG_ON(ptep == NULL); 359 360 pfn = pte_pfn(*ptep); 361 page = pfn_to_page(pfn); 362 363 pte = pfn_pte(pfn, prot); 364 365 /* 366 * Careful: update_va_mapping() will fail if the virtual address 367 * we're poking isn't populated in the page tables. We don't 368 * need to worry about the direct map (that's always in the page 369 * tables), but we need to be careful about vmap space. In 370 * particular, the top level page table can lazily propagate 371 * entries between processes, so if we've switched mms since we 372 * vmapped the target in the first place, we might not have the 373 * top-level page table entry populated. 374 * 375 * We disable preemption because we want the same mm active when 376 * we probe the target and when we issue the hypercall. We'll 377 * have the same nominal mm, but if we're a kernel thread, lazy 378 * mm dropping could change our pgd. 379 * 380 * Out of an abundance of caution, this uses __get_user() to fault 381 * in the target address just in case there's some obscure case 382 * in which the target address isn't readable. 383 */ 384 385 preempt_disable(); 386 387 probe_kernel_read(&dummy, v, 1); 388 389 if (HYPERVISOR_update_va_mapping((unsigned long)v, pte, 0)) 390 BUG(); 391 392 if (!PageHighMem(page)) { 393 void *av = __va(PFN_PHYS(pfn)); 394 395 if (av != v) 396 if (HYPERVISOR_update_va_mapping((unsigned long)av, pte, 0)) 397 BUG(); 398 } else 399 kmap_flush_unused(); 400 401 preempt_enable(); 402 } 403 404 static void xen_alloc_ldt(struct desc_struct *ldt, unsigned entries) 405 { 406 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE; 407 int i; 408 409 /* 410 * We need to mark the all aliases of the LDT pages RO. We 411 * don't need to call vm_flush_aliases(), though, since that's 412 * only responsible for flushing aliases out the TLBs, not the 413 * page tables, and Xen will flush the TLB for us if needed. 414 * 415 * To avoid confusing future readers: none of this is necessary 416 * to load the LDT. The hypervisor only checks this when the 417 * LDT is faulted in due to subsequent descriptor access. 418 */ 419 420 for (i = 0; i < entries; i += entries_per_page) 421 set_aliased_prot(ldt + i, PAGE_KERNEL_RO); 422 } 423 424 static void xen_free_ldt(struct desc_struct *ldt, unsigned entries) 425 { 426 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE; 427 int i; 428 429 for (i = 0; i < entries; i += entries_per_page) 430 set_aliased_prot(ldt + i, PAGE_KERNEL); 431 } 432 433 static void xen_set_ldt(const void *addr, unsigned entries) 434 { 435 struct mmuext_op *op; 436 struct multicall_space mcs = xen_mc_entry(sizeof(*op)); 437 438 trace_xen_cpu_set_ldt(addr, entries); 439 440 op = mcs.args; 441 op->cmd = MMUEXT_SET_LDT; 442 op->arg1.linear_addr = (unsigned long)addr; 443 op->arg2.nr_ents = entries; 444 445 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); 446 447 xen_mc_issue(PARAVIRT_LAZY_CPU); 448 } 449 450 static void xen_load_gdt(const struct desc_ptr *dtr) 451 { 452 unsigned long va = dtr->address; 453 unsigned int size = dtr->size + 1; 454 unsigned long pfn, mfn; 455 int level; 456 pte_t *ptep; 457 void *virt; 458 459 /* @size should be at most GDT_SIZE which is smaller than PAGE_SIZE. */ 460 BUG_ON(size > PAGE_SIZE); 461 BUG_ON(va & ~PAGE_MASK); 462 463 /* 464 * The GDT is per-cpu and is in the percpu data area. 465 * That can be virtually mapped, so we need to do a 466 * page-walk to get the underlying MFN for the 467 * hypercall. The page can also be in the kernel's 468 * linear range, so we need to RO that mapping too. 469 */ 470 ptep = lookup_address(va, &level); 471 BUG_ON(ptep == NULL); 472 473 pfn = pte_pfn(*ptep); 474 mfn = pfn_to_mfn(pfn); 475 virt = __va(PFN_PHYS(pfn)); 476 477 make_lowmem_page_readonly((void *)va); 478 make_lowmem_page_readonly(virt); 479 480 if (HYPERVISOR_set_gdt(&mfn, size / sizeof(struct desc_struct))) 481 BUG(); 482 } 483 484 /* 485 * load_gdt for early boot, when the gdt is only mapped once 486 */ 487 static void __init xen_load_gdt_boot(const struct desc_ptr *dtr) 488 { 489 unsigned long va = dtr->address; 490 unsigned int size = dtr->size + 1; 491 unsigned long pfn, mfn; 492 pte_t pte; 493 494 /* @size should be at most GDT_SIZE which is smaller than PAGE_SIZE. */ 495 BUG_ON(size > PAGE_SIZE); 496 BUG_ON(va & ~PAGE_MASK); 497 498 pfn = virt_to_pfn(va); 499 mfn = pfn_to_mfn(pfn); 500 501 pte = pfn_pte(pfn, PAGE_KERNEL_RO); 502 503 if (HYPERVISOR_update_va_mapping((unsigned long)va, pte, 0)) 504 BUG(); 505 506 if (HYPERVISOR_set_gdt(&mfn, size / sizeof(struct desc_struct))) 507 BUG(); 508 } 509 510 static inline bool desc_equal(const struct desc_struct *d1, 511 const struct desc_struct *d2) 512 { 513 return !memcmp(d1, d2, sizeof(*d1)); 514 } 515 516 static void load_TLS_descriptor(struct thread_struct *t, 517 unsigned int cpu, unsigned int i) 518 { 519 struct desc_struct *shadow = &per_cpu(shadow_tls_desc, cpu).desc[i]; 520 struct desc_struct *gdt; 521 xmaddr_t maddr; 522 struct multicall_space mc; 523 524 if (desc_equal(shadow, &t->tls_array[i])) 525 return; 526 527 *shadow = t->tls_array[i]; 528 529 gdt = get_cpu_gdt_rw(cpu); 530 maddr = arbitrary_virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]); 531 mc = __xen_mc_entry(0); 532 533 MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]); 534 } 535 536 static void xen_load_tls(struct thread_struct *t, unsigned int cpu) 537 { 538 /* 539 * XXX sleazy hack: If we're being called in a lazy-cpu zone 540 * and lazy gs handling is enabled, it means we're in a 541 * context switch, and %gs has just been saved. This means we 542 * can zero it out to prevent faults on exit from the 543 * hypervisor if the next process has no %gs. Either way, it 544 * has been saved, and the new value will get loaded properly. 545 * This will go away as soon as Xen has been modified to not 546 * save/restore %gs for normal hypercalls. 547 * 548 * On x86_64, this hack is not used for %gs, because gs points 549 * to KERNEL_GS_BASE (and uses it for PDA references), so we 550 * must not zero %gs on x86_64 551 * 552 * For x86_64, we need to zero %fs, otherwise we may get an 553 * exception between the new %fs descriptor being loaded and 554 * %fs being effectively cleared at __switch_to(). 555 */ 556 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU) { 557 #ifdef CONFIG_X86_32 558 lazy_load_gs(0); 559 #else 560 loadsegment(fs, 0); 561 #endif 562 } 563 564 xen_mc_batch(); 565 566 load_TLS_descriptor(t, cpu, 0); 567 load_TLS_descriptor(t, cpu, 1); 568 load_TLS_descriptor(t, cpu, 2); 569 570 xen_mc_issue(PARAVIRT_LAZY_CPU); 571 } 572 573 #ifdef CONFIG_X86_64 574 static void xen_load_gs_index(unsigned int idx) 575 { 576 if (HYPERVISOR_set_segment_base(SEGBASE_GS_USER_SEL, idx)) 577 BUG(); 578 } 579 #endif 580 581 static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum, 582 const void *ptr) 583 { 584 xmaddr_t mach_lp = arbitrary_virt_to_machine(&dt[entrynum]); 585 u64 entry = *(u64 *)ptr; 586 587 trace_xen_cpu_write_ldt_entry(dt, entrynum, entry); 588 589 preempt_disable(); 590 591 xen_mc_flush(); 592 if (HYPERVISOR_update_descriptor(mach_lp.maddr, entry)) 593 BUG(); 594 595 preempt_enable(); 596 } 597 598 #ifdef CONFIG_X86_64 599 struct trap_array_entry { 600 void (*orig)(void); 601 void (*xen)(void); 602 bool ist_okay; 603 }; 604 605 static struct trap_array_entry trap_array[] = { 606 { debug, xen_xendebug, true }, 607 { double_fault, xen_double_fault, true }, 608 #ifdef CONFIG_X86_MCE 609 { machine_check, xen_machine_check, true }, 610 #endif 611 { nmi, xen_xennmi, true }, 612 { int3, xen_int3, false }, 613 { overflow, xen_overflow, false }, 614 #ifdef CONFIG_IA32_EMULATION 615 { entry_INT80_compat, xen_entry_INT80_compat, false }, 616 #endif 617 { page_fault, xen_page_fault, false }, 618 { divide_error, xen_divide_error, false }, 619 { bounds, xen_bounds, false }, 620 { invalid_op, xen_invalid_op, false }, 621 { device_not_available, xen_device_not_available, false }, 622 { coprocessor_segment_overrun, xen_coprocessor_segment_overrun, false }, 623 { invalid_TSS, xen_invalid_TSS, false }, 624 { segment_not_present, xen_segment_not_present, false }, 625 { stack_segment, xen_stack_segment, false }, 626 { general_protection, xen_general_protection, false }, 627 { spurious_interrupt_bug, xen_spurious_interrupt_bug, false }, 628 { coprocessor_error, xen_coprocessor_error, false }, 629 { alignment_check, xen_alignment_check, false }, 630 { simd_coprocessor_error, xen_simd_coprocessor_error, false }, 631 }; 632 633 static bool __ref get_trap_addr(void **addr, unsigned int ist) 634 { 635 unsigned int nr; 636 bool ist_okay = false; 637 638 /* 639 * Replace trap handler addresses by Xen specific ones. 640 * Check for known traps using IST and whitelist them. 641 * The debugger ones are the only ones we care about. 642 * Xen will handle faults like double_fault, * so we should never see 643 * them. Warn if there's an unexpected IST-using fault handler. 644 */ 645 for (nr = 0; nr < ARRAY_SIZE(trap_array); nr++) { 646 struct trap_array_entry *entry = trap_array + nr; 647 648 if (*addr == entry->orig) { 649 *addr = entry->xen; 650 ist_okay = entry->ist_okay; 651 break; 652 } 653 } 654 655 if (nr == ARRAY_SIZE(trap_array) && 656 *addr >= (void *)early_idt_handler_array[0] && 657 *addr < (void *)early_idt_handler_array[NUM_EXCEPTION_VECTORS]) { 658 nr = (*addr - (void *)early_idt_handler_array[0]) / 659 EARLY_IDT_HANDLER_SIZE; 660 *addr = (void *)xen_early_idt_handler_array[nr]; 661 } 662 663 if (WARN_ON(ist != 0 && !ist_okay)) 664 return false; 665 666 return true; 667 } 668 #endif 669 670 static int cvt_gate_to_trap(int vector, const gate_desc *val, 671 struct trap_info *info) 672 { 673 unsigned long addr; 674 675 if (val->bits.type != GATE_TRAP && val->bits.type != GATE_INTERRUPT) 676 return 0; 677 678 info->vector = vector; 679 680 addr = gate_offset(val); 681 #ifdef CONFIG_X86_64 682 if (!get_trap_addr((void **)&addr, val->bits.ist)) 683 return 0; 684 #endif /* CONFIG_X86_64 */ 685 info->address = addr; 686 687 info->cs = gate_segment(val); 688 info->flags = val->bits.dpl; 689 /* interrupt gates clear IF */ 690 if (val->bits.type == GATE_INTERRUPT) 691 info->flags |= 1 << 2; 692 693 return 1; 694 } 695 696 /* Locations of each CPU's IDT */ 697 static DEFINE_PER_CPU(struct desc_ptr, idt_desc); 698 699 /* Set an IDT entry. If the entry is part of the current IDT, then 700 also update Xen. */ 701 static void xen_write_idt_entry(gate_desc *dt, int entrynum, const gate_desc *g) 702 { 703 unsigned long p = (unsigned long)&dt[entrynum]; 704 unsigned long start, end; 705 706 trace_xen_cpu_write_idt_entry(dt, entrynum, g); 707 708 preempt_disable(); 709 710 start = __this_cpu_read(idt_desc.address); 711 end = start + __this_cpu_read(idt_desc.size) + 1; 712 713 xen_mc_flush(); 714 715 native_write_idt_entry(dt, entrynum, g); 716 717 if (p >= start && (p + 8) <= end) { 718 struct trap_info info[2]; 719 720 info[1].address = 0; 721 722 if (cvt_gate_to_trap(entrynum, g, &info[0])) 723 if (HYPERVISOR_set_trap_table(info)) 724 BUG(); 725 } 726 727 preempt_enable(); 728 } 729 730 static void xen_convert_trap_info(const struct desc_ptr *desc, 731 struct trap_info *traps) 732 { 733 unsigned in, out, count; 734 735 count = (desc->size+1) / sizeof(gate_desc); 736 BUG_ON(count > 256); 737 738 for (in = out = 0; in < count; in++) { 739 gate_desc *entry = (gate_desc *)(desc->address) + in; 740 741 if (cvt_gate_to_trap(in, entry, &traps[out])) 742 out++; 743 } 744 traps[out].address = 0; 745 } 746 747 void xen_copy_trap_info(struct trap_info *traps) 748 { 749 const struct desc_ptr *desc = this_cpu_ptr(&idt_desc); 750 751 xen_convert_trap_info(desc, traps); 752 } 753 754 /* Load a new IDT into Xen. In principle this can be per-CPU, so we 755 hold a spinlock to protect the static traps[] array (static because 756 it avoids allocation, and saves stack space). */ 757 static void xen_load_idt(const struct desc_ptr *desc) 758 { 759 static DEFINE_SPINLOCK(lock); 760 static struct trap_info traps[257]; 761 762 trace_xen_cpu_load_idt(desc); 763 764 spin_lock(&lock); 765 766 memcpy(this_cpu_ptr(&idt_desc), desc, sizeof(idt_desc)); 767 768 xen_convert_trap_info(desc, traps); 769 770 xen_mc_flush(); 771 if (HYPERVISOR_set_trap_table(traps)) 772 BUG(); 773 774 spin_unlock(&lock); 775 } 776 777 /* Write a GDT descriptor entry. Ignore LDT descriptors, since 778 they're handled differently. */ 779 static void xen_write_gdt_entry(struct desc_struct *dt, int entry, 780 const void *desc, int type) 781 { 782 trace_xen_cpu_write_gdt_entry(dt, entry, desc, type); 783 784 preempt_disable(); 785 786 switch (type) { 787 case DESC_LDT: 788 case DESC_TSS: 789 /* ignore */ 790 break; 791 792 default: { 793 xmaddr_t maddr = arbitrary_virt_to_machine(&dt[entry]); 794 795 xen_mc_flush(); 796 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc)) 797 BUG(); 798 } 799 800 } 801 802 preempt_enable(); 803 } 804 805 /* 806 * Version of write_gdt_entry for use at early boot-time needed to 807 * update an entry as simply as possible. 808 */ 809 static void __init xen_write_gdt_entry_boot(struct desc_struct *dt, int entry, 810 const void *desc, int type) 811 { 812 trace_xen_cpu_write_gdt_entry(dt, entry, desc, type); 813 814 switch (type) { 815 case DESC_LDT: 816 case DESC_TSS: 817 /* ignore */ 818 break; 819 820 default: { 821 xmaddr_t maddr = virt_to_machine(&dt[entry]); 822 823 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc)) 824 dt[entry] = *(struct desc_struct *)desc; 825 } 826 827 } 828 } 829 830 static void xen_load_sp0(unsigned long sp0) 831 { 832 struct multicall_space mcs; 833 834 mcs = xen_mc_entry(0); 835 MULTI_stack_switch(mcs.mc, __KERNEL_DS, sp0); 836 xen_mc_issue(PARAVIRT_LAZY_CPU); 837 this_cpu_write(cpu_tss_rw.x86_tss.sp0, sp0); 838 } 839 840 void xen_set_iopl_mask(unsigned mask) 841 { 842 struct physdev_set_iopl set_iopl; 843 844 /* Force the change at ring 0. */ 845 set_iopl.iopl = (mask == 0) ? 1 : (mask >> 12) & 3; 846 HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl); 847 } 848 849 static void xen_io_delay(void) 850 { 851 } 852 853 static DEFINE_PER_CPU(unsigned long, xen_cr0_value); 854 855 static unsigned long xen_read_cr0(void) 856 { 857 unsigned long cr0 = this_cpu_read(xen_cr0_value); 858 859 if (unlikely(cr0 == 0)) { 860 cr0 = native_read_cr0(); 861 this_cpu_write(xen_cr0_value, cr0); 862 } 863 864 return cr0; 865 } 866 867 static void xen_write_cr0(unsigned long cr0) 868 { 869 struct multicall_space mcs; 870 871 this_cpu_write(xen_cr0_value, cr0); 872 873 /* Only pay attention to cr0.TS; everything else is 874 ignored. */ 875 mcs = xen_mc_entry(0); 876 877 MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0); 878 879 xen_mc_issue(PARAVIRT_LAZY_CPU); 880 } 881 882 static void xen_write_cr4(unsigned long cr4) 883 { 884 cr4 &= ~(X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PCE); 885 886 native_write_cr4(cr4); 887 } 888 889 static u64 xen_read_msr_safe(unsigned int msr, int *err) 890 { 891 u64 val; 892 893 if (pmu_msr_read(msr, &val, err)) 894 return val; 895 896 val = native_read_msr_safe(msr, err); 897 switch (msr) { 898 case MSR_IA32_APICBASE: 899 val &= ~X2APIC_ENABLE; 900 break; 901 } 902 return val; 903 } 904 905 static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high) 906 { 907 int ret; 908 909 ret = 0; 910 911 switch (msr) { 912 #ifdef CONFIG_X86_64 913 unsigned which; 914 u64 base; 915 916 case MSR_FS_BASE: which = SEGBASE_FS; goto set; 917 case MSR_KERNEL_GS_BASE: which = SEGBASE_GS_USER; goto set; 918 case MSR_GS_BASE: which = SEGBASE_GS_KERNEL; goto set; 919 920 set: 921 base = ((u64)high << 32) | low; 922 if (HYPERVISOR_set_segment_base(which, base) != 0) 923 ret = -EIO; 924 break; 925 #endif 926 927 case MSR_STAR: 928 case MSR_CSTAR: 929 case MSR_LSTAR: 930 case MSR_SYSCALL_MASK: 931 case MSR_IA32_SYSENTER_CS: 932 case MSR_IA32_SYSENTER_ESP: 933 case MSR_IA32_SYSENTER_EIP: 934 /* Fast syscall setup is all done in hypercalls, so 935 these are all ignored. Stub them out here to stop 936 Xen console noise. */ 937 break; 938 939 default: 940 if (!pmu_msr_write(msr, low, high, &ret)) 941 ret = native_write_msr_safe(msr, low, high); 942 } 943 944 return ret; 945 } 946 947 static u64 xen_read_msr(unsigned int msr) 948 { 949 /* 950 * This will silently swallow a #GP from RDMSR. It may be worth 951 * changing that. 952 */ 953 int err; 954 955 return xen_read_msr_safe(msr, &err); 956 } 957 958 static void xen_write_msr(unsigned int msr, unsigned low, unsigned high) 959 { 960 /* 961 * This will silently swallow a #GP from WRMSR. It may be worth 962 * changing that. 963 */ 964 xen_write_msr_safe(msr, low, high); 965 } 966 967 /* This is called once we have the cpu_possible_mask */ 968 void __init xen_setup_vcpu_info_placement(void) 969 { 970 int cpu; 971 972 for_each_possible_cpu(cpu) { 973 /* Set up direct vCPU id mapping for PV guests. */ 974 per_cpu(xen_vcpu_id, cpu) = cpu; 975 976 /* 977 * xen_vcpu_setup(cpu) can fail -- in which case it 978 * falls back to the shared_info version for cpus 979 * where xen_vcpu_nr(cpu) < MAX_VIRT_CPUS. 980 * 981 * xen_cpu_up_prepare_pv() handles the rest by failing 982 * them in hotplug. 983 */ 984 (void) xen_vcpu_setup(cpu); 985 } 986 987 /* 988 * xen_vcpu_setup managed to place the vcpu_info within the 989 * percpu area for all cpus, so make use of it. 990 */ 991 if (xen_have_vcpu_info_placement) { 992 pv_ops.irq.save_fl = __PV_IS_CALLEE_SAVE(xen_save_fl_direct); 993 pv_ops.irq.restore_fl = 994 __PV_IS_CALLEE_SAVE(xen_restore_fl_direct); 995 pv_ops.irq.irq_disable = 996 __PV_IS_CALLEE_SAVE(xen_irq_disable_direct); 997 pv_ops.irq.irq_enable = 998 __PV_IS_CALLEE_SAVE(xen_irq_enable_direct); 999 pv_ops.mmu.read_cr2 = 1000 __PV_IS_CALLEE_SAVE(xen_read_cr2_direct); 1001 } 1002 } 1003 1004 static const struct pv_info xen_info __initconst = { 1005 .shared_kernel_pmd = 0, 1006 1007 #ifdef CONFIG_X86_64 1008 .extra_user_64bit_cs = FLAT_USER_CS64, 1009 #endif 1010 .name = "Xen", 1011 }; 1012 1013 static const struct pv_cpu_ops xen_cpu_ops __initconst = { 1014 .cpuid = xen_cpuid, 1015 1016 .set_debugreg = xen_set_debugreg, 1017 .get_debugreg = xen_get_debugreg, 1018 1019 .read_cr0 = xen_read_cr0, 1020 .write_cr0 = xen_write_cr0, 1021 1022 .write_cr4 = xen_write_cr4, 1023 1024 .wbinvd = native_wbinvd, 1025 1026 .read_msr = xen_read_msr, 1027 .write_msr = xen_write_msr, 1028 1029 .read_msr_safe = xen_read_msr_safe, 1030 .write_msr_safe = xen_write_msr_safe, 1031 1032 .read_pmc = xen_read_pmc, 1033 1034 .iret = xen_iret, 1035 #ifdef CONFIG_X86_64 1036 .usergs_sysret64 = xen_sysret64, 1037 #endif 1038 1039 .load_tr_desc = paravirt_nop, 1040 .set_ldt = xen_set_ldt, 1041 .load_gdt = xen_load_gdt, 1042 .load_idt = xen_load_idt, 1043 .load_tls = xen_load_tls, 1044 #ifdef CONFIG_X86_64 1045 .load_gs_index = xen_load_gs_index, 1046 #endif 1047 1048 .alloc_ldt = xen_alloc_ldt, 1049 .free_ldt = xen_free_ldt, 1050 1051 .store_tr = xen_store_tr, 1052 1053 .write_ldt_entry = xen_write_ldt_entry, 1054 .write_gdt_entry = xen_write_gdt_entry, 1055 .write_idt_entry = xen_write_idt_entry, 1056 .load_sp0 = xen_load_sp0, 1057 1058 .set_iopl_mask = xen_set_iopl_mask, 1059 .io_delay = xen_io_delay, 1060 1061 /* Xen takes care of %gs when switching to usermode for us */ 1062 .swapgs = paravirt_nop, 1063 1064 .start_context_switch = paravirt_start_context_switch, 1065 .end_context_switch = xen_end_context_switch, 1066 }; 1067 1068 static void xen_restart(char *msg) 1069 { 1070 xen_reboot(SHUTDOWN_reboot); 1071 } 1072 1073 static void xen_machine_halt(void) 1074 { 1075 xen_reboot(SHUTDOWN_poweroff); 1076 } 1077 1078 static void xen_machine_power_off(void) 1079 { 1080 if (pm_power_off) 1081 pm_power_off(); 1082 xen_reboot(SHUTDOWN_poweroff); 1083 } 1084 1085 static void xen_crash_shutdown(struct pt_regs *regs) 1086 { 1087 xen_reboot(SHUTDOWN_crash); 1088 } 1089 1090 static const struct machine_ops xen_machine_ops __initconst = { 1091 .restart = xen_restart, 1092 .halt = xen_machine_halt, 1093 .power_off = xen_machine_power_off, 1094 .shutdown = xen_machine_halt, 1095 .crash_shutdown = xen_crash_shutdown, 1096 .emergency_restart = xen_emergency_restart, 1097 }; 1098 1099 static unsigned char xen_get_nmi_reason(void) 1100 { 1101 unsigned char reason = 0; 1102 1103 /* Construct a value which looks like it came from port 0x61. */ 1104 if (test_bit(_XEN_NMIREASON_io_error, 1105 &HYPERVISOR_shared_info->arch.nmi_reason)) 1106 reason |= NMI_REASON_IOCHK; 1107 if (test_bit(_XEN_NMIREASON_pci_serr, 1108 &HYPERVISOR_shared_info->arch.nmi_reason)) 1109 reason |= NMI_REASON_SERR; 1110 1111 return reason; 1112 } 1113 1114 static void __init xen_boot_params_init_edd(void) 1115 { 1116 #if IS_ENABLED(CONFIG_EDD) 1117 struct xen_platform_op op; 1118 struct edd_info *edd_info; 1119 u32 *mbr_signature; 1120 unsigned nr; 1121 int ret; 1122 1123 edd_info = boot_params.eddbuf; 1124 mbr_signature = boot_params.edd_mbr_sig_buffer; 1125 1126 op.cmd = XENPF_firmware_info; 1127 1128 op.u.firmware_info.type = XEN_FW_DISK_INFO; 1129 for (nr = 0; nr < EDDMAXNR; nr++) { 1130 struct edd_info *info = edd_info + nr; 1131 1132 op.u.firmware_info.index = nr; 1133 info->params.length = sizeof(info->params); 1134 set_xen_guest_handle(op.u.firmware_info.u.disk_info.edd_params, 1135 &info->params); 1136 ret = HYPERVISOR_platform_op(&op); 1137 if (ret) 1138 break; 1139 1140 #define C(x) info->x = op.u.firmware_info.u.disk_info.x 1141 C(device); 1142 C(version); 1143 C(interface_support); 1144 C(legacy_max_cylinder); 1145 C(legacy_max_head); 1146 C(legacy_sectors_per_track); 1147 #undef C 1148 } 1149 boot_params.eddbuf_entries = nr; 1150 1151 op.u.firmware_info.type = XEN_FW_DISK_MBR_SIGNATURE; 1152 for (nr = 0; nr < EDD_MBR_SIG_MAX; nr++) { 1153 op.u.firmware_info.index = nr; 1154 ret = HYPERVISOR_platform_op(&op); 1155 if (ret) 1156 break; 1157 mbr_signature[nr] = op.u.firmware_info.u.disk_mbr_signature.mbr_signature; 1158 } 1159 boot_params.edd_mbr_sig_buf_entries = nr; 1160 #endif 1161 } 1162 1163 /* 1164 * Set up the GDT and segment registers for -fstack-protector. Until 1165 * we do this, we have to be careful not to call any stack-protected 1166 * function, which is most of the kernel. 1167 */ 1168 static void __init xen_setup_gdt(int cpu) 1169 { 1170 pv_ops.cpu.write_gdt_entry = xen_write_gdt_entry_boot; 1171 pv_ops.cpu.load_gdt = xen_load_gdt_boot; 1172 1173 setup_stack_canary_segment(cpu); 1174 switch_to_new_gdt(cpu); 1175 1176 pv_ops.cpu.write_gdt_entry = xen_write_gdt_entry; 1177 pv_ops.cpu.load_gdt = xen_load_gdt; 1178 } 1179 1180 static void __init xen_dom0_set_legacy_features(void) 1181 { 1182 x86_platform.legacy.rtc = 1; 1183 } 1184 1185 /* First C function to be called on Xen boot */ 1186 asmlinkage __visible void __init xen_start_kernel(void) 1187 { 1188 struct physdev_set_iopl set_iopl; 1189 unsigned long initrd_start = 0; 1190 int rc; 1191 1192 if (!xen_start_info) 1193 return; 1194 1195 xen_domain_type = XEN_PV_DOMAIN; 1196 xen_start_flags = xen_start_info->flags; 1197 1198 xen_setup_features(); 1199 1200 /* Install Xen paravirt ops */ 1201 pv_info = xen_info; 1202 pv_ops.init.patch = paravirt_patch_default; 1203 pv_ops.cpu = xen_cpu_ops; 1204 xen_init_irq_ops(); 1205 1206 /* 1207 * Setup xen_vcpu early because it is needed for 1208 * local_irq_disable(), irqs_disabled(), e.g. in printk(). 1209 * 1210 * Don't do the full vcpu_info placement stuff until we have 1211 * the cpu_possible_mask and a non-dummy shared_info. 1212 */ 1213 xen_vcpu_info_reset(0); 1214 1215 x86_platform.get_nmi_reason = xen_get_nmi_reason; 1216 1217 x86_init.resources.memory_setup = xen_memory_setup; 1218 x86_init.irqs.intr_mode_init = x86_init_noop; 1219 x86_init.oem.arch_setup = xen_arch_setup; 1220 x86_init.oem.banner = xen_banner; 1221 x86_init.hyper.init_platform = xen_pv_init_platform; 1222 x86_init.hyper.guest_late_init = xen_pv_guest_late_init; 1223 1224 /* 1225 * Set up some pagetable state before starting to set any ptes. 1226 */ 1227 1228 xen_setup_machphys_mapping(); 1229 xen_init_mmu_ops(); 1230 1231 /* Prevent unwanted bits from being set in PTEs. */ 1232 __supported_pte_mask &= ~_PAGE_GLOBAL; 1233 __default_kernel_pte_mask &= ~_PAGE_GLOBAL; 1234 1235 /* 1236 * Prevent page tables from being allocated in highmem, even 1237 * if CONFIG_HIGHPTE is enabled. 1238 */ 1239 __userpte_alloc_gfp &= ~__GFP_HIGHMEM; 1240 1241 /* Get mfn list */ 1242 xen_build_dynamic_phys_to_machine(); 1243 1244 /* 1245 * Set up kernel GDT and segment registers, mainly so that 1246 * -fstack-protector code can be executed. 1247 */ 1248 xen_setup_gdt(0); 1249 1250 /* Work out if we support NX */ 1251 get_cpu_cap(&boot_cpu_data); 1252 x86_configure_nx(); 1253 1254 /* Determine virtual and physical address sizes */ 1255 get_cpu_address_sizes(&boot_cpu_data); 1256 1257 /* Let's presume PV guests always boot on vCPU with id 0. */ 1258 per_cpu(xen_vcpu_id, 0) = 0; 1259 1260 idt_setup_early_handler(); 1261 1262 xen_init_capabilities(); 1263 1264 #ifdef CONFIG_X86_LOCAL_APIC 1265 /* 1266 * set up the basic apic ops. 1267 */ 1268 xen_init_apic(); 1269 #endif 1270 1271 if (xen_feature(XENFEAT_mmu_pt_update_preserve_ad)) { 1272 pv_ops.mmu.ptep_modify_prot_start = 1273 xen_ptep_modify_prot_start; 1274 pv_ops.mmu.ptep_modify_prot_commit = 1275 xen_ptep_modify_prot_commit; 1276 } 1277 1278 machine_ops = xen_machine_ops; 1279 1280 /* 1281 * The only reliable way to retain the initial address of the 1282 * percpu gdt_page is to remember it here, so we can go and 1283 * mark it RW later, when the initial percpu area is freed. 1284 */ 1285 xen_initial_gdt = &per_cpu(gdt_page, 0); 1286 1287 xen_smp_init(); 1288 1289 #ifdef CONFIG_ACPI_NUMA 1290 /* 1291 * The pages we from Xen are not related to machine pages, so 1292 * any NUMA information the kernel tries to get from ACPI will 1293 * be meaningless. Prevent it from trying. 1294 */ 1295 acpi_numa = -1; 1296 #endif 1297 WARN_ON(xen_cpuhp_setup(xen_cpu_up_prepare_pv, xen_cpu_dead_pv)); 1298 1299 local_irq_disable(); 1300 early_boot_irqs_disabled = true; 1301 1302 xen_raw_console_write("mapping kernel into physical memory\n"); 1303 xen_setup_kernel_pagetable((pgd_t *)xen_start_info->pt_base, 1304 xen_start_info->nr_pages); 1305 xen_reserve_special_pages(); 1306 1307 /* keep using Xen gdt for now; no urgent need to change it */ 1308 1309 #ifdef CONFIG_X86_32 1310 pv_info.kernel_rpl = 1; 1311 if (xen_feature(XENFEAT_supervisor_mode_kernel)) 1312 pv_info.kernel_rpl = 0; 1313 #else 1314 pv_info.kernel_rpl = 0; 1315 #endif 1316 /* set the limit of our address space */ 1317 xen_reserve_top(); 1318 1319 /* 1320 * We used to do this in xen_arch_setup, but that is too late 1321 * on AMD were early_cpu_init (run before ->arch_setup()) calls 1322 * early_amd_init which pokes 0xcf8 port. 1323 */ 1324 set_iopl.iopl = 1; 1325 rc = HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl); 1326 if (rc != 0) 1327 xen_raw_printk("physdev_op failed %d\n", rc); 1328 1329 #ifdef CONFIG_X86_32 1330 /* set up basic CPUID stuff */ 1331 cpu_detect(&new_cpu_data); 1332 set_cpu_cap(&new_cpu_data, X86_FEATURE_FPU); 1333 new_cpu_data.x86_capability[CPUID_1_EDX] = cpuid_edx(1); 1334 #endif 1335 1336 if (xen_start_info->mod_start) { 1337 if (xen_start_info->flags & SIF_MOD_START_PFN) 1338 initrd_start = PFN_PHYS(xen_start_info->mod_start); 1339 else 1340 initrd_start = __pa(xen_start_info->mod_start); 1341 } 1342 1343 /* Poke various useful things into boot_params */ 1344 boot_params.hdr.type_of_loader = (9 << 4) | 0; 1345 boot_params.hdr.ramdisk_image = initrd_start; 1346 boot_params.hdr.ramdisk_size = xen_start_info->mod_len; 1347 boot_params.hdr.cmd_line_ptr = __pa(xen_start_info->cmd_line); 1348 boot_params.hdr.hardware_subarch = X86_SUBARCH_XEN; 1349 1350 if (!xen_initial_domain()) { 1351 add_preferred_console("xenboot", 0, NULL); 1352 if (pci_xen) 1353 x86_init.pci.arch_init = pci_xen_init; 1354 } else { 1355 const struct dom0_vga_console_info *info = 1356 (void *)((char *)xen_start_info + 1357 xen_start_info->console.dom0.info_off); 1358 struct xen_platform_op op = { 1359 .cmd = XENPF_firmware_info, 1360 .interface_version = XENPF_INTERFACE_VERSION, 1361 .u.firmware_info.type = XEN_FW_KBD_SHIFT_FLAGS, 1362 }; 1363 1364 x86_platform.set_legacy_features = 1365 xen_dom0_set_legacy_features; 1366 xen_init_vga(info, xen_start_info->console.dom0.info_size); 1367 xen_start_info->console.domU.mfn = 0; 1368 xen_start_info->console.domU.evtchn = 0; 1369 1370 if (HYPERVISOR_platform_op(&op) == 0) 1371 boot_params.kbd_status = op.u.firmware_info.u.kbd_shift_flags; 1372 1373 /* Make sure ACS will be enabled */ 1374 pci_request_acs(); 1375 1376 xen_acpi_sleep_register(); 1377 1378 /* Avoid searching for BIOS MP tables */ 1379 x86_init.mpparse.find_smp_config = x86_init_noop; 1380 x86_init.mpparse.get_smp_config = x86_init_uint_noop; 1381 1382 xen_boot_params_init_edd(); 1383 } 1384 1385 if (!boot_params.screen_info.orig_video_isVGA) 1386 add_preferred_console("tty", 0, NULL); 1387 add_preferred_console("hvc", 0, NULL); 1388 if (boot_params.screen_info.orig_video_isVGA) 1389 add_preferred_console("tty", 0, NULL); 1390 1391 #ifdef CONFIG_PCI 1392 /* PCI BIOS service won't work from a PV guest. */ 1393 pci_probe &= ~PCI_PROBE_BIOS; 1394 #endif 1395 xen_raw_console_write("about to get started...\n"); 1396 1397 /* We need this for printk timestamps */ 1398 xen_setup_runstate_info(0); 1399 1400 xen_efi_init(&boot_params); 1401 1402 /* Start the world */ 1403 #ifdef CONFIG_X86_32 1404 i386_start_kernel(); 1405 #else 1406 cr4_init_shadow(); /* 32b kernel does this in i386_start_kernel() */ 1407 x86_64_start_reservations((char *)__pa_symbol(&boot_params)); 1408 #endif 1409 } 1410 1411 static int xen_cpu_up_prepare_pv(unsigned int cpu) 1412 { 1413 int rc; 1414 1415 if (per_cpu(xen_vcpu, cpu) == NULL) 1416 return -ENODEV; 1417 1418 xen_setup_timer(cpu); 1419 1420 rc = xen_smp_intr_init(cpu); 1421 if (rc) { 1422 WARN(1, "xen_smp_intr_init() for CPU %d failed: %d\n", 1423 cpu, rc); 1424 return rc; 1425 } 1426 1427 rc = xen_smp_intr_init_pv(cpu); 1428 if (rc) { 1429 WARN(1, "xen_smp_intr_init_pv() for CPU %d failed: %d\n", 1430 cpu, rc); 1431 return rc; 1432 } 1433 1434 return 0; 1435 } 1436 1437 static int xen_cpu_dead_pv(unsigned int cpu) 1438 { 1439 xen_smp_intr_free(cpu); 1440 xen_smp_intr_free_pv(cpu); 1441 1442 xen_teardown_timer(cpu); 1443 1444 return 0; 1445 } 1446 1447 static uint32_t __init xen_platform_pv(void) 1448 { 1449 if (xen_pv_domain()) 1450 return xen_cpuid_base(); 1451 1452 return 0; 1453 } 1454 1455 const __initconst struct hypervisor_x86 x86_hyper_xen_pv = { 1456 .name = "Xen PV", 1457 .detect = xen_platform_pv, 1458 .type = X86_HYPER_XEN_PV, 1459 .runtime.pin_vcpu = xen_pin_vcpu, 1460 .ignore_nopv = true, 1461 }; 1462