1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Core of Xen paravirt_ops implementation. 4 * 5 * This file contains the xen_paravirt_ops structure itself, and the 6 * implementations for: 7 * - privileged instructions 8 * - interrupt flags 9 * - segment operations 10 * - booting and setup 11 * 12 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007 13 */ 14 15 #include <linux/cpu.h> 16 #include <linux/kernel.h> 17 #include <linux/init.h> 18 #include <linux/smp.h> 19 #include <linux/preempt.h> 20 #include <linux/hardirq.h> 21 #include <linux/percpu.h> 22 #include <linux/delay.h> 23 #include <linux/start_kernel.h> 24 #include <linux/sched.h> 25 #include <linux/kprobes.h> 26 #include <linux/memblock.h> 27 #include <linux/export.h> 28 #include <linux/mm.h> 29 #include <linux/page-flags.h> 30 #include <linux/pci.h> 31 #include <linux/gfp.h> 32 #include <linux/edd.h> 33 #include <linux/reboot.h> 34 35 #include <xen/xen.h> 36 #include <xen/events.h> 37 #include <xen/interface/xen.h> 38 #include <xen/interface/version.h> 39 #include <xen/interface/physdev.h> 40 #include <xen/interface/vcpu.h> 41 #include <xen/interface/memory.h> 42 #include <xen/interface/nmi.h> 43 #include <xen/interface/xen-mca.h> 44 #include <xen/features.h> 45 #include <xen/page.h> 46 #include <xen/hvc-console.h> 47 #include <xen/acpi.h> 48 49 #include <asm/paravirt.h> 50 #include <asm/apic.h> 51 #include <asm/page.h> 52 #include <asm/xen/pci.h> 53 #include <asm/xen/hypercall.h> 54 #include <asm/xen/hypervisor.h> 55 #include <asm/xen/cpuid.h> 56 #include <asm/fixmap.h> 57 #include <asm/processor.h> 58 #include <asm/proto.h> 59 #include <asm/msr-index.h> 60 #include <asm/traps.h> 61 #include <asm/setup.h> 62 #include <asm/desc.h> 63 #include <asm/pgalloc.h> 64 #include <asm/tlbflush.h> 65 #include <asm/reboot.h> 66 #include <asm/stackprotector.h> 67 #include <asm/hypervisor.h> 68 #include <asm/mach_traps.h> 69 #include <asm/mwait.h> 70 #include <asm/pci_x86.h> 71 #include <asm/cpu.h> 72 #ifdef CONFIG_X86_IOPL_IOPERM 73 #include <asm/io_bitmap.h> 74 #endif 75 76 #ifdef CONFIG_ACPI 77 #include <linux/acpi.h> 78 #include <asm/acpi.h> 79 #include <acpi/pdc_intel.h> 80 #include <acpi/processor.h> 81 #include <xen/interface/platform.h> 82 #endif 83 84 #include "xen-ops.h" 85 #include "mmu.h" 86 #include "smp.h" 87 #include "multicalls.h" 88 #include "pmu.h" 89 90 #include "../kernel/cpu/cpu.h" /* get_cpu_cap() */ 91 92 void *xen_initial_gdt; 93 94 static int xen_cpu_up_prepare_pv(unsigned int cpu); 95 static int xen_cpu_dead_pv(unsigned int cpu); 96 97 struct tls_descs { 98 struct desc_struct desc[3]; 99 }; 100 101 /* 102 * Updating the 3 TLS descriptors in the GDT on every task switch is 103 * surprisingly expensive so we avoid updating them if they haven't 104 * changed. Since Xen writes different descriptors than the one 105 * passed in the update_descriptor hypercall we keep shadow copies to 106 * compare against. 107 */ 108 static DEFINE_PER_CPU(struct tls_descs, shadow_tls_desc); 109 110 static void __init xen_pv_init_platform(void) 111 { 112 xen_set_restricted_virtio_memory_access(); 113 114 populate_extra_pte(fix_to_virt(FIX_PARAVIRT_BOOTMAP)); 115 116 set_fixmap(FIX_PARAVIRT_BOOTMAP, xen_start_info->shared_info); 117 HYPERVISOR_shared_info = (void *)fix_to_virt(FIX_PARAVIRT_BOOTMAP); 118 119 /* xen clock uses per-cpu vcpu_info, need to init it for boot cpu */ 120 xen_vcpu_info_reset(0); 121 122 /* pvclock is in shared info area */ 123 xen_init_time_ops(); 124 } 125 126 static void __init xen_pv_guest_late_init(void) 127 { 128 #ifndef CONFIG_SMP 129 /* Setup shared vcpu info for non-smp configurations */ 130 xen_setup_vcpu_info_placement(); 131 #endif 132 } 133 134 static __read_mostly unsigned int cpuid_leaf5_ecx_val; 135 static __read_mostly unsigned int cpuid_leaf5_edx_val; 136 137 static void xen_cpuid(unsigned int *ax, unsigned int *bx, 138 unsigned int *cx, unsigned int *dx) 139 { 140 unsigned maskebx = ~0; 141 142 /* 143 * Mask out inconvenient features, to try and disable as many 144 * unsupported kernel subsystems as possible. 145 */ 146 switch (*ax) { 147 case CPUID_MWAIT_LEAF: 148 /* Synthesize the values.. */ 149 *ax = 0; 150 *bx = 0; 151 *cx = cpuid_leaf5_ecx_val; 152 *dx = cpuid_leaf5_edx_val; 153 return; 154 155 case 0xb: 156 /* Suppress extended topology stuff */ 157 maskebx = 0; 158 break; 159 } 160 161 asm(XEN_EMULATE_PREFIX "cpuid" 162 : "=a" (*ax), 163 "=b" (*bx), 164 "=c" (*cx), 165 "=d" (*dx) 166 : "0" (*ax), "2" (*cx)); 167 168 *bx &= maskebx; 169 } 170 171 static bool __init xen_check_mwait(void) 172 { 173 #ifdef CONFIG_ACPI 174 struct xen_platform_op op = { 175 .cmd = XENPF_set_processor_pminfo, 176 .u.set_pminfo.id = -1, 177 .u.set_pminfo.type = XEN_PM_PDC, 178 }; 179 uint32_t buf[3]; 180 unsigned int ax, bx, cx, dx; 181 unsigned int mwait_mask; 182 183 /* We need to determine whether it is OK to expose the MWAIT 184 * capability to the kernel to harvest deeper than C3 states from ACPI 185 * _CST using the processor_harvest_xen.c module. For this to work, we 186 * need to gather the MWAIT_LEAF values (which the cstate.c code 187 * checks against). The hypervisor won't expose the MWAIT flag because 188 * it would break backwards compatibility; so we will find out directly 189 * from the hardware and hypercall. 190 */ 191 if (!xen_initial_domain()) 192 return false; 193 194 /* 195 * When running under platform earlier than Xen4.2, do not expose 196 * mwait, to avoid the risk of loading native acpi pad driver 197 */ 198 if (!xen_running_on_version_or_later(4, 2)) 199 return false; 200 201 ax = 1; 202 cx = 0; 203 204 native_cpuid(&ax, &bx, &cx, &dx); 205 206 mwait_mask = (1 << (X86_FEATURE_EST % 32)) | 207 (1 << (X86_FEATURE_MWAIT % 32)); 208 209 if ((cx & mwait_mask) != mwait_mask) 210 return false; 211 212 /* We need to emulate the MWAIT_LEAF and for that we need both 213 * ecx and edx. The hypercall provides only partial information. 214 */ 215 216 ax = CPUID_MWAIT_LEAF; 217 bx = 0; 218 cx = 0; 219 dx = 0; 220 221 native_cpuid(&ax, &bx, &cx, &dx); 222 223 /* Ask the Hypervisor whether to clear ACPI_PDC_C_C2C3_FFH. If so, 224 * don't expose MWAIT_LEAF and let ACPI pick the IOPORT version of C3. 225 */ 226 buf[0] = ACPI_PDC_REVISION_ID; 227 buf[1] = 1; 228 buf[2] = (ACPI_PDC_C_CAPABILITY_SMP | ACPI_PDC_EST_CAPABILITY_SWSMP); 229 230 set_xen_guest_handle(op.u.set_pminfo.pdc, buf); 231 232 if ((HYPERVISOR_platform_op(&op) == 0) && 233 (buf[2] & (ACPI_PDC_C_C1_FFH | ACPI_PDC_C_C2C3_FFH))) { 234 cpuid_leaf5_ecx_val = cx; 235 cpuid_leaf5_edx_val = dx; 236 } 237 return true; 238 #else 239 return false; 240 #endif 241 } 242 243 static bool __init xen_check_xsave(void) 244 { 245 unsigned int cx, xsave_mask; 246 247 cx = cpuid_ecx(1); 248 249 xsave_mask = (1 << (X86_FEATURE_XSAVE % 32)) | 250 (1 << (X86_FEATURE_OSXSAVE % 32)); 251 252 /* Xen will set CR4.OSXSAVE if supported and not disabled by force */ 253 return (cx & xsave_mask) == xsave_mask; 254 } 255 256 static void __init xen_init_capabilities(void) 257 { 258 setup_force_cpu_cap(X86_FEATURE_XENPV); 259 setup_clear_cpu_cap(X86_FEATURE_DCA); 260 setup_clear_cpu_cap(X86_FEATURE_APERFMPERF); 261 setup_clear_cpu_cap(X86_FEATURE_MTRR); 262 setup_clear_cpu_cap(X86_FEATURE_ACC); 263 setup_clear_cpu_cap(X86_FEATURE_X2APIC); 264 setup_clear_cpu_cap(X86_FEATURE_SME); 265 266 /* 267 * Xen PV would need some work to support PCID: CR3 handling as well 268 * as xen_flush_tlb_others() would need updating. 269 */ 270 setup_clear_cpu_cap(X86_FEATURE_PCID); 271 272 if (!xen_initial_domain()) 273 setup_clear_cpu_cap(X86_FEATURE_ACPI); 274 275 if (xen_check_mwait()) 276 setup_force_cpu_cap(X86_FEATURE_MWAIT); 277 else 278 setup_clear_cpu_cap(X86_FEATURE_MWAIT); 279 280 if (!xen_check_xsave()) { 281 setup_clear_cpu_cap(X86_FEATURE_XSAVE); 282 setup_clear_cpu_cap(X86_FEATURE_OSXSAVE); 283 } 284 } 285 286 static noinstr void xen_set_debugreg(int reg, unsigned long val) 287 { 288 HYPERVISOR_set_debugreg(reg, val); 289 } 290 291 static noinstr unsigned long xen_get_debugreg(int reg) 292 { 293 return HYPERVISOR_get_debugreg(reg); 294 } 295 296 static void xen_end_context_switch(struct task_struct *next) 297 { 298 xen_mc_flush(); 299 paravirt_end_context_switch(next); 300 } 301 302 static unsigned long xen_store_tr(void) 303 { 304 return 0; 305 } 306 307 /* 308 * Set the page permissions for a particular virtual address. If the 309 * address is a vmalloc mapping (or other non-linear mapping), then 310 * find the linear mapping of the page and also set its protections to 311 * match. 312 */ 313 static void set_aliased_prot(void *v, pgprot_t prot) 314 { 315 int level; 316 pte_t *ptep; 317 pte_t pte; 318 unsigned long pfn; 319 unsigned char dummy; 320 void *va; 321 322 ptep = lookup_address((unsigned long)v, &level); 323 BUG_ON(ptep == NULL); 324 325 pfn = pte_pfn(*ptep); 326 pte = pfn_pte(pfn, prot); 327 328 /* 329 * Careful: update_va_mapping() will fail if the virtual address 330 * we're poking isn't populated in the page tables. We don't 331 * need to worry about the direct map (that's always in the page 332 * tables), but we need to be careful about vmap space. In 333 * particular, the top level page table can lazily propagate 334 * entries between processes, so if we've switched mms since we 335 * vmapped the target in the first place, we might not have the 336 * top-level page table entry populated. 337 * 338 * We disable preemption because we want the same mm active when 339 * we probe the target and when we issue the hypercall. We'll 340 * have the same nominal mm, but if we're a kernel thread, lazy 341 * mm dropping could change our pgd. 342 * 343 * Out of an abundance of caution, this uses __get_user() to fault 344 * in the target address just in case there's some obscure case 345 * in which the target address isn't readable. 346 */ 347 348 preempt_disable(); 349 350 copy_from_kernel_nofault(&dummy, v, 1); 351 352 if (HYPERVISOR_update_va_mapping((unsigned long)v, pte, 0)) 353 BUG(); 354 355 va = __va(PFN_PHYS(pfn)); 356 357 if (va != v && HYPERVISOR_update_va_mapping((unsigned long)va, pte, 0)) 358 BUG(); 359 360 preempt_enable(); 361 } 362 363 static void xen_alloc_ldt(struct desc_struct *ldt, unsigned entries) 364 { 365 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE; 366 int i; 367 368 /* 369 * We need to mark the all aliases of the LDT pages RO. We 370 * don't need to call vm_flush_aliases(), though, since that's 371 * only responsible for flushing aliases out the TLBs, not the 372 * page tables, and Xen will flush the TLB for us if needed. 373 * 374 * To avoid confusing future readers: none of this is necessary 375 * to load the LDT. The hypervisor only checks this when the 376 * LDT is faulted in due to subsequent descriptor access. 377 */ 378 379 for (i = 0; i < entries; i += entries_per_page) 380 set_aliased_prot(ldt + i, PAGE_KERNEL_RO); 381 } 382 383 static void xen_free_ldt(struct desc_struct *ldt, unsigned entries) 384 { 385 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE; 386 int i; 387 388 for (i = 0; i < entries; i += entries_per_page) 389 set_aliased_prot(ldt + i, PAGE_KERNEL); 390 } 391 392 static void xen_set_ldt(const void *addr, unsigned entries) 393 { 394 struct mmuext_op *op; 395 struct multicall_space mcs = xen_mc_entry(sizeof(*op)); 396 397 trace_xen_cpu_set_ldt(addr, entries); 398 399 op = mcs.args; 400 op->cmd = MMUEXT_SET_LDT; 401 op->arg1.linear_addr = (unsigned long)addr; 402 op->arg2.nr_ents = entries; 403 404 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); 405 406 xen_mc_issue(PARAVIRT_LAZY_CPU); 407 } 408 409 static void xen_load_gdt(const struct desc_ptr *dtr) 410 { 411 unsigned long va = dtr->address; 412 unsigned int size = dtr->size + 1; 413 unsigned long pfn, mfn; 414 int level; 415 pte_t *ptep; 416 void *virt; 417 418 /* @size should be at most GDT_SIZE which is smaller than PAGE_SIZE. */ 419 BUG_ON(size > PAGE_SIZE); 420 BUG_ON(va & ~PAGE_MASK); 421 422 /* 423 * The GDT is per-cpu and is in the percpu data area. 424 * That can be virtually mapped, so we need to do a 425 * page-walk to get the underlying MFN for the 426 * hypercall. The page can also be in the kernel's 427 * linear range, so we need to RO that mapping too. 428 */ 429 ptep = lookup_address(va, &level); 430 BUG_ON(ptep == NULL); 431 432 pfn = pte_pfn(*ptep); 433 mfn = pfn_to_mfn(pfn); 434 virt = __va(PFN_PHYS(pfn)); 435 436 make_lowmem_page_readonly((void *)va); 437 make_lowmem_page_readonly(virt); 438 439 if (HYPERVISOR_set_gdt(&mfn, size / sizeof(struct desc_struct))) 440 BUG(); 441 } 442 443 /* 444 * load_gdt for early boot, when the gdt is only mapped once 445 */ 446 static void __init xen_load_gdt_boot(const struct desc_ptr *dtr) 447 { 448 unsigned long va = dtr->address; 449 unsigned int size = dtr->size + 1; 450 unsigned long pfn, mfn; 451 pte_t pte; 452 453 /* @size should be at most GDT_SIZE which is smaller than PAGE_SIZE. */ 454 BUG_ON(size > PAGE_SIZE); 455 BUG_ON(va & ~PAGE_MASK); 456 457 pfn = virt_to_pfn(va); 458 mfn = pfn_to_mfn(pfn); 459 460 pte = pfn_pte(pfn, PAGE_KERNEL_RO); 461 462 if (HYPERVISOR_update_va_mapping((unsigned long)va, pte, 0)) 463 BUG(); 464 465 if (HYPERVISOR_set_gdt(&mfn, size / sizeof(struct desc_struct))) 466 BUG(); 467 } 468 469 static inline bool desc_equal(const struct desc_struct *d1, 470 const struct desc_struct *d2) 471 { 472 return !memcmp(d1, d2, sizeof(*d1)); 473 } 474 475 static void load_TLS_descriptor(struct thread_struct *t, 476 unsigned int cpu, unsigned int i) 477 { 478 struct desc_struct *shadow = &per_cpu(shadow_tls_desc, cpu).desc[i]; 479 struct desc_struct *gdt; 480 xmaddr_t maddr; 481 struct multicall_space mc; 482 483 if (desc_equal(shadow, &t->tls_array[i])) 484 return; 485 486 *shadow = t->tls_array[i]; 487 488 gdt = get_cpu_gdt_rw(cpu); 489 maddr = arbitrary_virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]); 490 mc = __xen_mc_entry(0); 491 492 MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]); 493 } 494 495 static void xen_load_tls(struct thread_struct *t, unsigned int cpu) 496 { 497 /* 498 * In lazy mode we need to zero %fs, otherwise we may get an 499 * exception between the new %fs descriptor being loaded and 500 * %fs being effectively cleared at __switch_to(). 501 */ 502 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU) 503 loadsegment(fs, 0); 504 505 xen_mc_batch(); 506 507 load_TLS_descriptor(t, cpu, 0); 508 load_TLS_descriptor(t, cpu, 1); 509 load_TLS_descriptor(t, cpu, 2); 510 511 xen_mc_issue(PARAVIRT_LAZY_CPU); 512 } 513 514 static void xen_load_gs_index(unsigned int idx) 515 { 516 if (HYPERVISOR_set_segment_base(SEGBASE_GS_USER_SEL, idx)) 517 BUG(); 518 } 519 520 static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum, 521 const void *ptr) 522 { 523 xmaddr_t mach_lp = arbitrary_virt_to_machine(&dt[entrynum]); 524 u64 entry = *(u64 *)ptr; 525 526 trace_xen_cpu_write_ldt_entry(dt, entrynum, entry); 527 528 preempt_disable(); 529 530 xen_mc_flush(); 531 if (HYPERVISOR_update_descriptor(mach_lp.maddr, entry)) 532 BUG(); 533 534 preempt_enable(); 535 } 536 537 void noist_exc_debug(struct pt_regs *regs); 538 539 DEFINE_IDTENTRY_RAW(xenpv_exc_nmi) 540 { 541 /* On Xen PV, NMI doesn't use IST. The C part is the same as native. */ 542 exc_nmi(regs); 543 } 544 545 DEFINE_IDTENTRY_RAW_ERRORCODE(xenpv_exc_double_fault) 546 { 547 /* On Xen PV, DF doesn't use IST. The C part is the same as native. */ 548 exc_double_fault(regs, error_code); 549 } 550 551 DEFINE_IDTENTRY_RAW(xenpv_exc_debug) 552 { 553 /* 554 * There's no IST on Xen PV, but we still need to dispatch 555 * to the correct handler. 556 */ 557 if (user_mode(regs)) 558 noist_exc_debug(regs); 559 else 560 exc_debug(regs); 561 } 562 563 DEFINE_IDTENTRY_RAW(exc_xen_unknown_trap) 564 { 565 /* This should never happen and there is no way to handle it. */ 566 instrumentation_begin(); 567 pr_err("Unknown trap in Xen PV mode."); 568 BUG(); 569 instrumentation_end(); 570 } 571 572 #ifdef CONFIG_X86_MCE 573 DEFINE_IDTENTRY_RAW(xenpv_exc_machine_check) 574 { 575 /* 576 * There's no IST on Xen PV, but we still need to dispatch 577 * to the correct handler. 578 */ 579 if (user_mode(regs)) 580 noist_exc_machine_check(regs); 581 else 582 exc_machine_check(regs); 583 } 584 #endif 585 586 struct trap_array_entry { 587 void (*orig)(void); 588 void (*xen)(void); 589 bool ist_okay; 590 }; 591 592 #define TRAP_ENTRY(func, ist_ok) { \ 593 .orig = asm_##func, \ 594 .xen = xen_asm_##func, \ 595 .ist_okay = ist_ok } 596 597 #define TRAP_ENTRY_REDIR(func, ist_ok) { \ 598 .orig = asm_##func, \ 599 .xen = xen_asm_xenpv_##func, \ 600 .ist_okay = ist_ok } 601 602 static struct trap_array_entry trap_array[] = { 603 TRAP_ENTRY_REDIR(exc_debug, true ), 604 TRAP_ENTRY_REDIR(exc_double_fault, true ), 605 #ifdef CONFIG_X86_MCE 606 TRAP_ENTRY_REDIR(exc_machine_check, true ), 607 #endif 608 TRAP_ENTRY_REDIR(exc_nmi, true ), 609 TRAP_ENTRY(exc_int3, false ), 610 TRAP_ENTRY(exc_overflow, false ), 611 #ifdef CONFIG_IA32_EMULATION 612 { entry_INT80_compat, xen_entry_INT80_compat, false }, 613 #endif 614 TRAP_ENTRY(exc_page_fault, false ), 615 TRAP_ENTRY(exc_divide_error, false ), 616 TRAP_ENTRY(exc_bounds, false ), 617 TRAP_ENTRY(exc_invalid_op, false ), 618 TRAP_ENTRY(exc_device_not_available, false ), 619 TRAP_ENTRY(exc_coproc_segment_overrun, false ), 620 TRAP_ENTRY(exc_invalid_tss, false ), 621 TRAP_ENTRY(exc_segment_not_present, false ), 622 TRAP_ENTRY(exc_stack_segment, false ), 623 TRAP_ENTRY(exc_general_protection, false ), 624 TRAP_ENTRY(exc_spurious_interrupt_bug, false ), 625 TRAP_ENTRY(exc_coprocessor_error, false ), 626 TRAP_ENTRY(exc_alignment_check, false ), 627 TRAP_ENTRY(exc_simd_coprocessor_error, false ), 628 #ifdef CONFIG_X86_KERNEL_IBT 629 TRAP_ENTRY(exc_control_protection, false ), 630 #endif 631 }; 632 633 static bool __ref get_trap_addr(void **addr, unsigned int ist) 634 { 635 unsigned int nr; 636 bool ist_okay = false; 637 bool found = false; 638 639 /* 640 * Replace trap handler addresses by Xen specific ones. 641 * Check for known traps using IST and whitelist them. 642 * The debugger ones are the only ones we care about. 643 * Xen will handle faults like double_fault, so we should never see 644 * them. Warn if there's an unexpected IST-using fault handler. 645 */ 646 for (nr = 0; nr < ARRAY_SIZE(trap_array); nr++) { 647 struct trap_array_entry *entry = trap_array + nr; 648 649 if (*addr == entry->orig) { 650 *addr = entry->xen; 651 ist_okay = entry->ist_okay; 652 found = true; 653 break; 654 } 655 } 656 657 if (nr == ARRAY_SIZE(trap_array) && 658 *addr >= (void *)early_idt_handler_array[0] && 659 *addr < (void *)early_idt_handler_array[NUM_EXCEPTION_VECTORS]) { 660 nr = (*addr - (void *)early_idt_handler_array[0]) / 661 EARLY_IDT_HANDLER_SIZE; 662 *addr = (void *)xen_early_idt_handler_array[nr]; 663 found = true; 664 } 665 666 if (!found) 667 *addr = (void *)xen_asm_exc_xen_unknown_trap; 668 669 if (WARN_ON(found && ist != 0 && !ist_okay)) 670 return false; 671 672 return true; 673 } 674 675 static int cvt_gate_to_trap(int vector, const gate_desc *val, 676 struct trap_info *info) 677 { 678 unsigned long addr; 679 680 if (val->bits.type != GATE_TRAP && val->bits.type != GATE_INTERRUPT) 681 return 0; 682 683 info->vector = vector; 684 685 addr = gate_offset(val); 686 if (!get_trap_addr((void **)&addr, val->bits.ist)) 687 return 0; 688 info->address = addr; 689 690 info->cs = gate_segment(val); 691 info->flags = val->bits.dpl; 692 /* interrupt gates clear IF */ 693 if (val->bits.type == GATE_INTERRUPT) 694 info->flags |= 1 << 2; 695 696 return 1; 697 } 698 699 /* Locations of each CPU's IDT */ 700 static DEFINE_PER_CPU(struct desc_ptr, idt_desc); 701 702 /* Set an IDT entry. If the entry is part of the current IDT, then 703 also update Xen. */ 704 static void xen_write_idt_entry(gate_desc *dt, int entrynum, const gate_desc *g) 705 { 706 unsigned long p = (unsigned long)&dt[entrynum]; 707 unsigned long start, end; 708 709 trace_xen_cpu_write_idt_entry(dt, entrynum, g); 710 711 preempt_disable(); 712 713 start = __this_cpu_read(idt_desc.address); 714 end = start + __this_cpu_read(idt_desc.size) + 1; 715 716 xen_mc_flush(); 717 718 native_write_idt_entry(dt, entrynum, g); 719 720 if (p >= start && (p + 8) <= end) { 721 struct trap_info info[2]; 722 723 info[1].address = 0; 724 725 if (cvt_gate_to_trap(entrynum, g, &info[0])) 726 if (HYPERVISOR_set_trap_table(info)) 727 BUG(); 728 } 729 730 preempt_enable(); 731 } 732 733 static unsigned xen_convert_trap_info(const struct desc_ptr *desc, 734 struct trap_info *traps, bool full) 735 { 736 unsigned in, out, count; 737 738 count = (desc->size+1) / sizeof(gate_desc); 739 BUG_ON(count > 256); 740 741 for (in = out = 0; in < count; in++) { 742 gate_desc *entry = (gate_desc *)(desc->address) + in; 743 744 if (cvt_gate_to_trap(in, entry, &traps[out]) || full) 745 out++; 746 } 747 748 return out; 749 } 750 751 void xen_copy_trap_info(struct trap_info *traps) 752 { 753 const struct desc_ptr *desc = this_cpu_ptr(&idt_desc); 754 755 xen_convert_trap_info(desc, traps, true); 756 } 757 758 /* Load a new IDT into Xen. In principle this can be per-CPU, so we 759 hold a spinlock to protect the static traps[] array (static because 760 it avoids allocation, and saves stack space). */ 761 static void xen_load_idt(const struct desc_ptr *desc) 762 { 763 static DEFINE_SPINLOCK(lock); 764 static struct trap_info traps[257]; 765 unsigned out; 766 767 trace_xen_cpu_load_idt(desc); 768 769 spin_lock(&lock); 770 771 memcpy(this_cpu_ptr(&idt_desc), desc, sizeof(idt_desc)); 772 773 out = xen_convert_trap_info(desc, traps, false); 774 memset(&traps[out], 0, sizeof(traps[0])); 775 776 xen_mc_flush(); 777 if (HYPERVISOR_set_trap_table(traps)) 778 BUG(); 779 780 spin_unlock(&lock); 781 } 782 783 /* Write a GDT descriptor entry. Ignore LDT descriptors, since 784 they're handled differently. */ 785 static void xen_write_gdt_entry(struct desc_struct *dt, int entry, 786 const void *desc, int type) 787 { 788 trace_xen_cpu_write_gdt_entry(dt, entry, desc, type); 789 790 preempt_disable(); 791 792 switch (type) { 793 case DESC_LDT: 794 case DESC_TSS: 795 /* ignore */ 796 break; 797 798 default: { 799 xmaddr_t maddr = arbitrary_virt_to_machine(&dt[entry]); 800 801 xen_mc_flush(); 802 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc)) 803 BUG(); 804 } 805 806 } 807 808 preempt_enable(); 809 } 810 811 /* 812 * Version of write_gdt_entry for use at early boot-time needed to 813 * update an entry as simply as possible. 814 */ 815 static void __init xen_write_gdt_entry_boot(struct desc_struct *dt, int entry, 816 const void *desc, int type) 817 { 818 trace_xen_cpu_write_gdt_entry(dt, entry, desc, type); 819 820 switch (type) { 821 case DESC_LDT: 822 case DESC_TSS: 823 /* ignore */ 824 break; 825 826 default: { 827 xmaddr_t maddr = virt_to_machine(&dt[entry]); 828 829 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc)) 830 dt[entry] = *(struct desc_struct *)desc; 831 } 832 833 } 834 } 835 836 static void xen_load_sp0(unsigned long sp0) 837 { 838 struct multicall_space mcs; 839 840 mcs = xen_mc_entry(0); 841 MULTI_stack_switch(mcs.mc, __KERNEL_DS, sp0); 842 xen_mc_issue(PARAVIRT_LAZY_CPU); 843 this_cpu_write(cpu_tss_rw.x86_tss.sp0, sp0); 844 } 845 846 #ifdef CONFIG_X86_IOPL_IOPERM 847 static void xen_invalidate_io_bitmap(void) 848 { 849 struct physdev_set_iobitmap iobitmap = { 850 .bitmap = NULL, 851 .nr_ports = 0, 852 }; 853 854 native_tss_invalidate_io_bitmap(); 855 HYPERVISOR_physdev_op(PHYSDEVOP_set_iobitmap, &iobitmap); 856 } 857 858 static void xen_update_io_bitmap(void) 859 { 860 struct physdev_set_iobitmap iobitmap; 861 struct tss_struct *tss = this_cpu_ptr(&cpu_tss_rw); 862 863 native_tss_update_io_bitmap(); 864 865 iobitmap.bitmap = (uint8_t *)(&tss->x86_tss) + 866 tss->x86_tss.io_bitmap_base; 867 if (tss->x86_tss.io_bitmap_base == IO_BITMAP_OFFSET_INVALID) 868 iobitmap.nr_ports = 0; 869 else 870 iobitmap.nr_ports = IO_BITMAP_BITS; 871 872 HYPERVISOR_physdev_op(PHYSDEVOP_set_iobitmap, &iobitmap); 873 } 874 #endif 875 876 static void xen_io_delay(void) 877 { 878 } 879 880 static DEFINE_PER_CPU(unsigned long, xen_cr0_value); 881 882 static unsigned long xen_read_cr0(void) 883 { 884 unsigned long cr0 = this_cpu_read(xen_cr0_value); 885 886 if (unlikely(cr0 == 0)) { 887 cr0 = native_read_cr0(); 888 this_cpu_write(xen_cr0_value, cr0); 889 } 890 891 return cr0; 892 } 893 894 static void xen_write_cr0(unsigned long cr0) 895 { 896 struct multicall_space mcs; 897 898 this_cpu_write(xen_cr0_value, cr0); 899 900 /* Only pay attention to cr0.TS; everything else is 901 ignored. */ 902 mcs = xen_mc_entry(0); 903 904 MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0); 905 906 xen_mc_issue(PARAVIRT_LAZY_CPU); 907 } 908 909 static void xen_write_cr4(unsigned long cr4) 910 { 911 cr4 &= ~(X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PCE); 912 913 native_write_cr4(cr4); 914 } 915 916 static u64 xen_read_msr_safe(unsigned int msr, int *err) 917 { 918 u64 val; 919 920 if (pmu_msr_read(msr, &val, err)) 921 return val; 922 923 val = native_read_msr_safe(msr, err); 924 switch (msr) { 925 case MSR_IA32_APICBASE: 926 val &= ~X2APIC_ENABLE; 927 break; 928 } 929 return val; 930 } 931 932 static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high) 933 { 934 int ret; 935 unsigned int which; 936 u64 base; 937 938 ret = 0; 939 940 switch (msr) { 941 case MSR_FS_BASE: which = SEGBASE_FS; goto set; 942 case MSR_KERNEL_GS_BASE: which = SEGBASE_GS_USER; goto set; 943 case MSR_GS_BASE: which = SEGBASE_GS_KERNEL; goto set; 944 945 set: 946 base = ((u64)high << 32) | low; 947 if (HYPERVISOR_set_segment_base(which, base) != 0) 948 ret = -EIO; 949 break; 950 951 case MSR_STAR: 952 case MSR_CSTAR: 953 case MSR_LSTAR: 954 case MSR_SYSCALL_MASK: 955 case MSR_IA32_SYSENTER_CS: 956 case MSR_IA32_SYSENTER_ESP: 957 case MSR_IA32_SYSENTER_EIP: 958 /* Fast syscall setup is all done in hypercalls, so 959 these are all ignored. Stub them out here to stop 960 Xen console noise. */ 961 break; 962 963 default: 964 if (!pmu_msr_write(msr, low, high, &ret)) 965 ret = native_write_msr_safe(msr, low, high); 966 } 967 968 return ret; 969 } 970 971 static u64 xen_read_msr(unsigned int msr) 972 { 973 /* 974 * This will silently swallow a #GP from RDMSR. It may be worth 975 * changing that. 976 */ 977 int err; 978 979 return xen_read_msr_safe(msr, &err); 980 } 981 982 static void xen_write_msr(unsigned int msr, unsigned low, unsigned high) 983 { 984 /* 985 * This will silently swallow a #GP from WRMSR. It may be worth 986 * changing that. 987 */ 988 xen_write_msr_safe(msr, low, high); 989 } 990 991 /* This is called once we have the cpu_possible_mask */ 992 void __init xen_setup_vcpu_info_placement(void) 993 { 994 int cpu; 995 996 for_each_possible_cpu(cpu) { 997 /* Set up direct vCPU id mapping for PV guests. */ 998 per_cpu(xen_vcpu_id, cpu) = cpu; 999 xen_vcpu_setup(cpu); 1000 } 1001 1002 pv_ops.irq.save_fl = __PV_IS_CALLEE_SAVE(xen_save_fl_direct); 1003 pv_ops.irq.irq_disable = __PV_IS_CALLEE_SAVE(xen_irq_disable_direct); 1004 pv_ops.irq.irq_enable = __PV_IS_CALLEE_SAVE(xen_irq_enable_direct); 1005 pv_ops.mmu.read_cr2 = __PV_IS_CALLEE_SAVE(xen_read_cr2_direct); 1006 } 1007 1008 static const struct pv_info xen_info __initconst = { 1009 .extra_user_64bit_cs = FLAT_USER_CS64, 1010 .name = "Xen", 1011 }; 1012 1013 static const typeof(pv_ops) xen_cpu_ops __initconst = { 1014 .cpu = { 1015 .cpuid = xen_cpuid, 1016 1017 .set_debugreg = xen_set_debugreg, 1018 .get_debugreg = xen_get_debugreg, 1019 1020 .read_cr0 = xen_read_cr0, 1021 .write_cr0 = xen_write_cr0, 1022 1023 .write_cr4 = xen_write_cr4, 1024 1025 .wbinvd = native_wbinvd, 1026 1027 .read_msr = xen_read_msr, 1028 .write_msr = xen_write_msr, 1029 1030 .read_msr_safe = xen_read_msr_safe, 1031 .write_msr_safe = xen_write_msr_safe, 1032 1033 .read_pmc = xen_read_pmc, 1034 1035 .load_tr_desc = paravirt_nop, 1036 .set_ldt = xen_set_ldt, 1037 .load_gdt = xen_load_gdt, 1038 .load_idt = xen_load_idt, 1039 .load_tls = xen_load_tls, 1040 .load_gs_index = xen_load_gs_index, 1041 1042 .alloc_ldt = xen_alloc_ldt, 1043 .free_ldt = xen_free_ldt, 1044 1045 .store_tr = xen_store_tr, 1046 1047 .write_ldt_entry = xen_write_ldt_entry, 1048 .write_gdt_entry = xen_write_gdt_entry, 1049 .write_idt_entry = xen_write_idt_entry, 1050 .load_sp0 = xen_load_sp0, 1051 1052 #ifdef CONFIG_X86_IOPL_IOPERM 1053 .invalidate_io_bitmap = xen_invalidate_io_bitmap, 1054 .update_io_bitmap = xen_update_io_bitmap, 1055 #endif 1056 .io_delay = xen_io_delay, 1057 1058 .start_context_switch = paravirt_start_context_switch, 1059 .end_context_switch = xen_end_context_switch, 1060 }, 1061 }; 1062 1063 static void xen_restart(char *msg) 1064 { 1065 xen_reboot(SHUTDOWN_reboot); 1066 } 1067 1068 static void xen_machine_halt(void) 1069 { 1070 xen_reboot(SHUTDOWN_poweroff); 1071 } 1072 1073 static void xen_machine_power_off(void) 1074 { 1075 do_kernel_power_off(); 1076 xen_reboot(SHUTDOWN_poweroff); 1077 } 1078 1079 static void xen_crash_shutdown(struct pt_regs *regs) 1080 { 1081 xen_reboot(SHUTDOWN_crash); 1082 } 1083 1084 static const struct machine_ops xen_machine_ops __initconst = { 1085 .restart = xen_restart, 1086 .halt = xen_machine_halt, 1087 .power_off = xen_machine_power_off, 1088 .shutdown = xen_machine_halt, 1089 .crash_shutdown = xen_crash_shutdown, 1090 .emergency_restart = xen_emergency_restart, 1091 }; 1092 1093 static unsigned char xen_get_nmi_reason(void) 1094 { 1095 unsigned char reason = 0; 1096 1097 /* Construct a value which looks like it came from port 0x61. */ 1098 if (test_bit(_XEN_NMIREASON_io_error, 1099 &HYPERVISOR_shared_info->arch.nmi_reason)) 1100 reason |= NMI_REASON_IOCHK; 1101 if (test_bit(_XEN_NMIREASON_pci_serr, 1102 &HYPERVISOR_shared_info->arch.nmi_reason)) 1103 reason |= NMI_REASON_SERR; 1104 1105 return reason; 1106 } 1107 1108 static void __init xen_boot_params_init_edd(void) 1109 { 1110 #if IS_ENABLED(CONFIG_EDD) 1111 struct xen_platform_op op; 1112 struct edd_info *edd_info; 1113 u32 *mbr_signature; 1114 unsigned nr; 1115 int ret; 1116 1117 edd_info = boot_params.eddbuf; 1118 mbr_signature = boot_params.edd_mbr_sig_buffer; 1119 1120 op.cmd = XENPF_firmware_info; 1121 1122 op.u.firmware_info.type = XEN_FW_DISK_INFO; 1123 for (nr = 0; nr < EDDMAXNR; nr++) { 1124 struct edd_info *info = edd_info + nr; 1125 1126 op.u.firmware_info.index = nr; 1127 info->params.length = sizeof(info->params); 1128 set_xen_guest_handle(op.u.firmware_info.u.disk_info.edd_params, 1129 &info->params); 1130 ret = HYPERVISOR_platform_op(&op); 1131 if (ret) 1132 break; 1133 1134 #define C(x) info->x = op.u.firmware_info.u.disk_info.x 1135 C(device); 1136 C(version); 1137 C(interface_support); 1138 C(legacy_max_cylinder); 1139 C(legacy_max_head); 1140 C(legacy_sectors_per_track); 1141 #undef C 1142 } 1143 boot_params.eddbuf_entries = nr; 1144 1145 op.u.firmware_info.type = XEN_FW_DISK_MBR_SIGNATURE; 1146 for (nr = 0; nr < EDD_MBR_SIG_MAX; nr++) { 1147 op.u.firmware_info.index = nr; 1148 ret = HYPERVISOR_platform_op(&op); 1149 if (ret) 1150 break; 1151 mbr_signature[nr] = op.u.firmware_info.u.disk_mbr_signature.mbr_signature; 1152 } 1153 boot_params.edd_mbr_sig_buf_entries = nr; 1154 #endif 1155 } 1156 1157 /* 1158 * Set up the GDT and segment registers for -fstack-protector. Until 1159 * we do this, we have to be careful not to call any stack-protected 1160 * function, which is most of the kernel. 1161 */ 1162 static void __init xen_setup_gdt(int cpu) 1163 { 1164 pv_ops.cpu.write_gdt_entry = xen_write_gdt_entry_boot; 1165 pv_ops.cpu.load_gdt = xen_load_gdt_boot; 1166 1167 switch_to_new_gdt(cpu); 1168 1169 pv_ops.cpu.write_gdt_entry = xen_write_gdt_entry; 1170 pv_ops.cpu.load_gdt = xen_load_gdt; 1171 } 1172 1173 static void __init xen_dom0_set_legacy_features(void) 1174 { 1175 x86_platform.legacy.rtc = 1; 1176 } 1177 1178 static void __init xen_domu_set_legacy_features(void) 1179 { 1180 x86_platform.legacy.rtc = 0; 1181 } 1182 1183 extern void early_xen_iret_patch(void); 1184 1185 /* First C function to be called on Xen boot */ 1186 asmlinkage __visible void __init xen_start_kernel(struct start_info *si) 1187 { 1188 struct physdev_set_iopl set_iopl; 1189 unsigned long initrd_start = 0; 1190 int rc; 1191 1192 if (!si) 1193 return; 1194 1195 clear_bss(); 1196 1197 xen_start_info = si; 1198 1199 __text_gen_insn(&early_xen_iret_patch, 1200 JMP32_INSN_OPCODE, &early_xen_iret_patch, &xen_iret, 1201 JMP32_INSN_SIZE); 1202 1203 xen_domain_type = XEN_PV_DOMAIN; 1204 xen_start_flags = xen_start_info->flags; 1205 1206 xen_setup_features(); 1207 1208 /* Install Xen paravirt ops */ 1209 pv_info = xen_info; 1210 pv_ops.cpu = xen_cpu_ops.cpu; 1211 xen_init_irq_ops(); 1212 1213 /* 1214 * Setup xen_vcpu early because it is needed for 1215 * local_irq_disable(), irqs_disabled(), e.g. in printk(). 1216 * 1217 * Don't do the full vcpu_info placement stuff until we have 1218 * the cpu_possible_mask and a non-dummy shared_info. 1219 */ 1220 xen_vcpu_info_reset(0); 1221 1222 x86_platform.get_nmi_reason = xen_get_nmi_reason; 1223 1224 x86_init.resources.memory_setup = xen_memory_setup; 1225 x86_init.irqs.intr_mode_select = x86_init_noop; 1226 x86_init.irqs.intr_mode_init = x86_init_noop; 1227 x86_init.oem.arch_setup = xen_arch_setup; 1228 x86_init.oem.banner = xen_banner; 1229 x86_init.hyper.init_platform = xen_pv_init_platform; 1230 x86_init.hyper.guest_late_init = xen_pv_guest_late_init; 1231 1232 /* 1233 * Set up some pagetable state before starting to set any ptes. 1234 */ 1235 1236 xen_setup_machphys_mapping(); 1237 xen_init_mmu_ops(); 1238 1239 /* Prevent unwanted bits from being set in PTEs. */ 1240 __supported_pte_mask &= ~_PAGE_GLOBAL; 1241 __default_kernel_pte_mask &= ~_PAGE_GLOBAL; 1242 1243 /* Get mfn list */ 1244 xen_build_dynamic_phys_to_machine(); 1245 1246 /* Work out if we support NX */ 1247 get_cpu_cap(&boot_cpu_data); 1248 x86_configure_nx(); 1249 1250 /* 1251 * Set up kernel GDT and segment registers, mainly so that 1252 * -fstack-protector code can be executed. 1253 */ 1254 xen_setup_gdt(0); 1255 1256 /* Determine virtual and physical address sizes */ 1257 get_cpu_address_sizes(&boot_cpu_data); 1258 1259 /* Let's presume PV guests always boot on vCPU with id 0. */ 1260 per_cpu(xen_vcpu_id, 0) = 0; 1261 1262 idt_setup_early_handler(); 1263 1264 xen_init_capabilities(); 1265 1266 #ifdef CONFIG_X86_LOCAL_APIC 1267 /* 1268 * set up the basic apic ops. 1269 */ 1270 xen_init_apic(); 1271 #endif 1272 1273 machine_ops = xen_machine_ops; 1274 1275 /* 1276 * The only reliable way to retain the initial address of the 1277 * percpu gdt_page is to remember it here, so we can go and 1278 * mark it RW later, when the initial percpu area is freed. 1279 */ 1280 xen_initial_gdt = &per_cpu(gdt_page, 0); 1281 1282 xen_smp_init(); 1283 1284 #ifdef CONFIG_ACPI_NUMA 1285 /* 1286 * The pages we from Xen are not related to machine pages, so 1287 * any NUMA information the kernel tries to get from ACPI will 1288 * be meaningless. Prevent it from trying. 1289 */ 1290 disable_srat(); 1291 #endif 1292 WARN_ON(xen_cpuhp_setup(xen_cpu_up_prepare_pv, xen_cpu_dead_pv)); 1293 1294 local_irq_disable(); 1295 early_boot_irqs_disabled = true; 1296 1297 xen_raw_console_write("mapping kernel into physical memory\n"); 1298 xen_setup_kernel_pagetable((pgd_t *)xen_start_info->pt_base, 1299 xen_start_info->nr_pages); 1300 xen_reserve_special_pages(); 1301 1302 /* 1303 * We used to do this in xen_arch_setup, but that is too late 1304 * on AMD were early_cpu_init (run before ->arch_setup()) calls 1305 * early_amd_init which pokes 0xcf8 port. 1306 */ 1307 set_iopl.iopl = 1; 1308 rc = HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl); 1309 if (rc != 0) 1310 xen_raw_printk("physdev_op failed %d\n", rc); 1311 1312 1313 if (xen_start_info->mod_start) { 1314 if (xen_start_info->flags & SIF_MOD_START_PFN) 1315 initrd_start = PFN_PHYS(xen_start_info->mod_start); 1316 else 1317 initrd_start = __pa(xen_start_info->mod_start); 1318 } 1319 1320 /* Poke various useful things into boot_params */ 1321 boot_params.hdr.type_of_loader = (9 << 4) | 0; 1322 boot_params.hdr.ramdisk_image = initrd_start; 1323 boot_params.hdr.ramdisk_size = xen_start_info->mod_len; 1324 boot_params.hdr.cmd_line_ptr = __pa(xen_start_info->cmd_line); 1325 boot_params.hdr.hardware_subarch = X86_SUBARCH_XEN; 1326 1327 if (!xen_initial_domain()) { 1328 if (pci_xen) 1329 x86_init.pci.arch_init = pci_xen_init; 1330 x86_platform.set_legacy_features = 1331 xen_domu_set_legacy_features; 1332 } else { 1333 const struct dom0_vga_console_info *info = 1334 (void *)((char *)xen_start_info + 1335 xen_start_info->console.dom0.info_off); 1336 struct xen_platform_op op = { 1337 .cmd = XENPF_firmware_info, 1338 .interface_version = XENPF_INTERFACE_VERSION, 1339 .u.firmware_info.type = XEN_FW_KBD_SHIFT_FLAGS, 1340 }; 1341 1342 x86_platform.set_legacy_features = 1343 xen_dom0_set_legacy_features; 1344 xen_init_vga(info, xen_start_info->console.dom0.info_size); 1345 xen_start_info->console.domU.mfn = 0; 1346 xen_start_info->console.domU.evtchn = 0; 1347 1348 if (HYPERVISOR_platform_op(&op) == 0) 1349 boot_params.kbd_status = op.u.firmware_info.u.kbd_shift_flags; 1350 1351 /* Make sure ACS will be enabled */ 1352 pci_request_acs(); 1353 1354 xen_acpi_sleep_register(); 1355 1356 xen_boot_params_init_edd(); 1357 1358 #ifdef CONFIG_ACPI 1359 /* 1360 * Disable selecting "Firmware First mode" for correctable 1361 * memory errors, as this is the duty of the hypervisor to 1362 * decide. 1363 */ 1364 acpi_disable_cmcff = 1; 1365 #endif 1366 } 1367 1368 xen_add_preferred_consoles(); 1369 1370 #ifdef CONFIG_PCI 1371 /* PCI BIOS service won't work from a PV guest. */ 1372 pci_probe &= ~PCI_PROBE_BIOS; 1373 #endif 1374 xen_raw_console_write("about to get started...\n"); 1375 1376 /* We need this for printk timestamps */ 1377 xen_setup_runstate_info(0); 1378 1379 xen_efi_init(&boot_params); 1380 1381 /* Start the world */ 1382 cr4_init_shadow(); /* 32b kernel does this in i386_start_kernel() */ 1383 x86_64_start_reservations((char *)__pa_symbol(&boot_params)); 1384 } 1385 1386 static int xen_cpu_up_prepare_pv(unsigned int cpu) 1387 { 1388 int rc; 1389 1390 if (per_cpu(xen_vcpu, cpu) == NULL) 1391 return -ENODEV; 1392 1393 xen_setup_timer(cpu); 1394 1395 rc = xen_smp_intr_init(cpu); 1396 if (rc) { 1397 WARN(1, "xen_smp_intr_init() for CPU %d failed: %d\n", 1398 cpu, rc); 1399 return rc; 1400 } 1401 1402 rc = xen_smp_intr_init_pv(cpu); 1403 if (rc) { 1404 WARN(1, "xen_smp_intr_init_pv() for CPU %d failed: %d\n", 1405 cpu, rc); 1406 return rc; 1407 } 1408 1409 return 0; 1410 } 1411 1412 static int xen_cpu_dead_pv(unsigned int cpu) 1413 { 1414 xen_smp_intr_free(cpu); 1415 xen_smp_intr_free_pv(cpu); 1416 1417 xen_teardown_timer(cpu); 1418 1419 return 0; 1420 } 1421 1422 static uint32_t __init xen_platform_pv(void) 1423 { 1424 if (xen_pv_domain()) 1425 return xen_cpuid_base(); 1426 1427 return 0; 1428 } 1429 1430 const __initconst struct hypervisor_x86 x86_hyper_xen_pv = { 1431 .name = "Xen PV", 1432 .detect = xen_platform_pv, 1433 .type = X86_HYPER_XEN_PV, 1434 .runtime.pin_vcpu = xen_pin_vcpu, 1435 .ignore_nopv = true, 1436 }; 1437