1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Core of Xen paravirt_ops implementation. 4 * 5 * This file contains the xen_paravirt_ops structure itself, and the 6 * implementations for: 7 * - privileged instructions 8 * - interrupt flags 9 * - segment operations 10 * - booting and setup 11 * 12 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007 13 */ 14 15 #include <linux/cpu.h> 16 #include <linux/kernel.h> 17 #include <linux/init.h> 18 #include <linux/smp.h> 19 #include <linux/preempt.h> 20 #include <linux/hardirq.h> 21 #include <linux/percpu.h> 22 #include <linux/delay.h> 23 #include <linux/start_kernel.h> 24 #include <linux/sched.h> 25 #include <linux/kprobes.h> 26 #include <linux/memblock.h> 27 #include <linux/export.h> 28 #include <linux/mm.h> 29 #include <linux/page-flags.h> 30 #include <linux/highmem.h> 31 #include <linux/console.h> 32 #include <linux/pci.h> 33 #include <linux/gfp.h> 34 #include <linux/edd.h> 35 #include <linux/frame.h> 36 37 #include <xen/xen.h> 38 #include <xen/events.h> 39 #include <xen/interface/xen.h> 40 #include <xen/interface/version.h> 41 #include <xen/interface/physdev.h> 42 #include <xen/interface/vcpu.h> 43 #include <xen/interface/memory.h> 44 #include <xen/interface/nmi.h> 45 #include <xen/interface/xen-mca.h> 46 #include <xen/features.h> 47 #include <xen/page.h> 48 #include <xen/hvc-console.h> 49 #include <xen/acpi.h> 50 51 #include <asm/paravirt.h> 52 #include <asm/apic.h> 53 #include <asm/page.h> 54 #include <asm/xen/pci.h> 55 #include <asm/xen/hypercall.h> 56 #include <asm/xen/hypervisor.h> 57 #include <asm/xen/cpuid.h> 58 #include <asm/fixmap.h> 59 #include <asm/processor.h> 60 #include <asm/proto.h> 61 #include <asm/msr-index.h> 62 #include <asm/traps.h> 63 #include <asm/setup.h> 64 #include <asm/desc.h> 65 #include <asm/pgalloc.h> 66 #include <asm/tlbflush.h> 67 #include <asm/reboot.h> 68 #include <asm/stackprotector.h> 69 #include <asm/hypervisor.h> 70 #include <asm/mach_traps.h> 71 #include <asm/mwait.h> 72 #include <asm/pci_x86.h> 73 #include <asm/cpu.h> 74 #ifdef CONFIG_X86_IOPL_IOPERM 75 #include <asm/io_bitmap.h> 76 #endif 77 78 #ifdef CONFIG_ACPI 79 #include <linux/acpi.h> 80 #include <asm/acpi.h> 81 #include <acpi/pdc_intel.h> 82 #include <acpi/processor.h> 83 #include <xen/interface/platform.h> 84 #endif 85 86 #include "xen-ops.h" 87 #include "mmu.h" 88 #include "smp.h" 89 #include "multicalls.h" 90 #include "pmu.h" 91 92 #include "../kernel/cpu/cpu.h" /* get_cpu_cap() */ 93 94 void *xen_initial_gdt; 95 96 static int xen_cpu_up_prepare_pv(unsigned int cpu); 97 static int xen_cpu_dead_pv(unsigned int cpu); 98 99 struct tls_descs { 100 struct desc_struct desc[3]; 101 }; 102 103 /* 104 * Updating the 3 TLS descriptors in the GDT on every task switch is 105 * surprisingly expensive so we avoid updating them if they haven't 106 * changed. Since Xen writes different descriptors than the one 107 * passed in the update_descriptor hypercall we keep shadow copies to 108 * compare against. 109 */ 110 static DEFINE_PER_CPU(struct tls_descs, shadow_tls_desc); 111 112 static void __init xen_banner(void) 113 { 114 unsigned version = HYPERVISOR_xen_version(XENVER_version, NULL); 115 struct xen_extraversion extra; 116 HYPERVISOR_xen_version(XENVER_extraversion, &extra); 117 118 pr_info("Booting paravirtualized kernel on %s\n", pv_info.name); 119 printk(KERN_INFO "Xen version: %d.%d%s%s\n", 120 version >> 16, version & 0xffff, extra.extraversion, 121 xen_feature(XENFEAT_mmu_pt_update_preserve_ad) ? " (preserve-AD)" : ""); 122 123 #ifdef CONFIG_X86_32 124 pr_warn("WARNING! WARNING! WARNING! WARNING! WARNING! WARNING! WARNING!\n" 125 "Support for running as 32-bit PV-guest under Xen will soon be removed\n" 126 "from the Linux kernel!\n" 127 "Please use either a 64-bit kernel or switch to HVM or PVH mode!\n" 128 "WARNING! WARNING! WARNING! WARNING! WARNING! WARNING! WARNING!\n"); 129 #endif 130 } 131 132 static void __init xen_pv_init_platform(void) 133 { 134 populate_extra_pte(fix_to_virt(FIX_PARAVIRT_BOOTMAP)); 135 136 set_fixmap(FIX_PARAVIRT_BOOTMAP, xen_start_info->shared_info); 137 HYPERVISOR_shared_info = (void *)fix_to_virt(FIX_PARAVIRT_BOOTMAP); 138 139 /* xen clock uses per-cpu vcpu_info, need to init it for boot cpu */ 140 xen_vcpu_info_reset(0); 141 142 /* pvclock is in shared info area */ 143 xen_init_time_ops(); 144 } 145 146 static void __init xen_pv_guest_late_init(void) 147 { 148 #ifndef CONFIG_SMP 149 /* Setup shared vcpu info for non-smp configurations */ 150 xen_setup_vcpu_info_placement(); 151 #endif 152 } 153 154 /* Check if running on Xen version (major, minor) or later */ 155 bool 156 xen_running_on_version_or_later(unsigned int major, unsigned int minor) 157 { 158 unsigned int version; 159 160 if (!xen_domain()) 161 return false; 162 163 version = HYPERVISOR_xen_version(XENVER_version, NULL); 164 if ((((version >> 16) == major) && ((version & 0xffff) >= minor)) || 165 ((version >> 16) > major)) 166 return true; 167 return false; 168 } 169 170 static __read_mostly unsigned int cpuid_leaf5_ecx_val; 171 static __read_mostly unsigned int cpuid_leaf5_edx_val; 172 173 static void xen_cpuid(unsigned int *ax, unsigned int *bx, 174 unsigned int *cx, unsigned int *dx) 175 { 176 unsigned maskebx = ~0; 177 178 /* 179 * Mask out inconvenient features, to try and disable as many 180 * unsupported kernel subsystems as possible. 181 */ 182 switch (*ax) { 183 case CPUID_MWAIT_LEAF: 184 /* Synthesize the values.. */ 185 *ax = 0; 186 *bx = 0; 187 *cx = cpuid_leaf5_ecx_val; 188 *dx = cpuid_leaf5_edx_val; 189 return; 190 191 case 0xb: 192 /* Suppress extended topology stuff */ 193 maskebx = 0; 194 break; 195 } 196 197 asm(XEN_EMULATE_PREFIX "cpuid" 198 : "=a" (*ax), 199 "=b" (*bx), 200 "=c" (*cx), 201 "=d" (*dx) 202 : "0" (*ax), "2" (*cx)); 203 204 *bx &= maskebx; 205 } 206 STACK_FRAME_NON_STANDARD(xen_cpuid); /* XEN_EMULATE_PREFIX */ 207 208 static bool __init xen_check_mwait(void) 209 { 210 #ifdef CONFIG_ACPI 211 struct xen_platform_op op = { 212 .cmd = XENPF_set_processor_pminfo, 213 .u.set_pminfo.id = -1, 214 .u.set_pminfo.type = XEN_PM_PDC, 215 }; 216 uint32_t buf[3]; 217 unsigned int ax, bx, cx, dx; 218 unsigned int mwait_mask; 219 220 /* We need to determine whether it is OK to expose the MWAIT 221 * capability to the kernel to harvest deeper than C3 states from ACPI 222 * _CST using the processor_harvest_xen.c module. For this to work, we 223 * need to gather the MWAIT_LEAF values (which the cstate.c code 224 * checks against). The hypervisor won't expose the MWAIT flag because 225 * it would break backwards compatibility; so we will find out directly 226 * from the hardware and hypercall. 227 */ 228 if (!xen_initial_domain()) 229 return false; 230 231 /* 232 * When running under platform earlier than Xen4.2, do not expose 233 * mwait, to avoid the risk of loading native acpi pad driver 234 */ 235 if (!xen_running_on_version_or_later(4, 2)) 236 return false; 237 238 ax = 1; 239 cx = 0; 240 241 native_cpuid(&ax, &bx, &cx, &dx); 242 243 mwait_mask = (1 << (X86_FEATURE_EST % 32)) | 244 (1 << (X86_FEATURE_MWAIT % 32)); 245 246 if ((cx & mwait_mask) != mwait_mask) 247 return false; 248 249 /* We need to emulate the MWAIT_LEAF and for that we need both 250 * ecx and edx. The hypercall provides only partial information. 251 */ 252 253 ax = CPUID_MWAIT_LEAF; 254 bx = 0; 255 cx = 0; 256 dx = 0; 257 258 native_cpuid(&ax, &bx, &cx, &dx); 259 260 /* Ask the Hypervisor whether to clear ACPI_PDC_C_C2C3_FFH. If so, 261 * don't expose MWAIT_LEAF and let ACPI pick the IOPORT version of C3. 262 */ 263 buf[0] = ACPI_PDC_REVISION_ID; 264 buf[1] = 1; 265 buf[2] = (ACPI_PDC_C_CAPABILITY_SMP | ACPI_PDC_EST_CAPABILITY_SWSMP); 266 267 set_xen_guest_handle(op.u.set_pminfo.pdc, buf); 268 269 if ((HYPERVISOR_platform_op(&op) == 0) && 270 (buf[2] & (ACPI_PDC_C_C1_FFH | ACPI_PDC_C_C2C3_FFH))) { 271 cpuid_leaf5_ecx_val = cx; 272 cpuid_leaf5_edx_val = dx; 273 } 274 return true; 275 #else 276 return false; 277 #endif 278 } 279 280 static bool __init xen_check_xsave(void) 281 { 282 unsigned int cx, xsave_mask; 283 284 cx = cpuid_ecx(1); 285 286 xsave_mask = (1 << (X86_FEATURE_XSAVE % 32)) | 287 (1 << (X86_FEATURE_OSXSAVE % 32)); 288 289 /* Xen will set CR4.OSXSAVE if supported and not disabled by force */ 290 return (cx & xsave_mask) == xsave_mask; 291 } 292 293 static void __init xen_init_capabilities(void) 294 { 295 setup_force_cpu_cap(X86_FEATURE_XENPV); 296 setup_clear_cpu_cap(X86_FEATURE_DCA); 297 setup_clear_cpu_cap(X86_FEATURE_APERFMPERF); 298 setup_clear_cpu_cap(X86_FEATURE_MTRR); 299 setup_clear_cpu_cap(X86_FEATURE_ACC); 300 setup_clear_cpu_cap(X86_FEATURE_X2APIC); 301 setup_clear_cpu_cap(X86_FEATURE_SME); 302 303 /* 304 * Xen PV would need some work to support PCID: CR3 handling as well 305 * as xen_flush_tlb_others() would need updating. 306 */ 307 setup_clear_cpu_cap(X86_FEATURE_PCID); 308 309 if (!xen_initial_domain()) 310 setup_clear_cpu_cap(X86_FEATURE_ACPI); 311 312 if (xen_check_mwait()) 313 setup_force_cpu_cap(X86_FEATURE_MWAIT); 314 else 315 setup_clear_cpu_cap(X86_FEATURE_MWAIT); 316 317 if (!xen_check_xsave()) { 318 setup_clear_cpu_cap(X86_FEATURE_XSAVE); 319 setup_clear_cpu_cap(X86_FEATURE_OSXSAVE); 320 } 321 } 322 323 static void xen_set_debugreg(int reg, unsigned long val) 324 { 325 HYPERVISOR_set_debugreg(reg, val); 326 } 327 328 static unsigned long xen_get_debugreg(int reg) 329 { 330 return HYPERVISOR_get_debugreg(reg); 331 } 332 333 static void xen_end_context_switch(struct task_struct *next) 334 { 335 xen_mc_flush(); 336 paravirt_end_context_switch(next); 337 } 338 339 static unsigned long xen_store_tr(void) 340 { 341 return 0; 342 } 343 344 /* 345 * Set the page permissions for a particular virtual address. If the 346 * address is a vmalloc mapping (or other non-linear mapping), then 347 * find the linear mapping of the page and also set its protections to 348 * match. 349 */ 350 static void set_aliased_prot(void *v, pgprot_t prot) 351 { 352 int level; 353 pte_t *ptep; 354 pte_t pte; 355 unsigned long pfn; 356 struct page *page; 357 unsigned char dummy; 358 359 ptep = lookup_address((unsigned long)v, &level); 360 BUG_ON(ptep == NULL); 361 362 pfn = pte_pfn(*ptep); 363 page = pfn_to_page(pfn); 364 365 pte = pfn_pte(pfn, prot); 366 367 /* 368 * Careful: update_va_mapping() will fail if the virtual address 369 * we're poking isn't populated in the page tables. We don't 370 * need to worry about the direct map (that's always in the page 371 * tables), but we need to be careful about vmap space. In 372 * particular, the top level page table can lazily propagate 373 * entries between processes, so if we've switched mms since we 374 * vmapped the target in the first place, we might not have the 375 * top-level page table entry populated. 376 * 377 * We disable preemption because we want the same mm active when 378 * we probe the target and when we issue the hypercall. We'll 379 * have the same nominal mm, but if we're a kernel thread, lazy 380 * mm dropping could change our pgd. 381 * 382 * Out of an abundance of caution, this uses __get_user() to fault 383 * in the target address just in case there's some obscure case 384 * in which the target address isn't readable. 385 */ 386 387 preempt_disable(); 388 389 copy_from_kernel_nofault(&dummy, v, 1); 390 391 if (HYPERVISOR_update_va_mapping((unsigned long)v, pte, 0)) 392 BUG(); 393 394 if (!PageHighMem(page)) { 395 void *av = __va(PFN_PHYS(pfn)); 396 397 if (av != v) 398 if (HYPERVISOR_update_va_mapping((unsigned long)av, pte, 0)) 399 BUG(); 400 } else 401 kmap_flush_unused(); 402 403 preempt_enable(); 404 } 405 406 static void xen_alloc_ldt(struct desc_struct *ldt, unsigned entries) 407 { 408 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE; 409 int i; 410 411 /* 412 * We need to mark the all aliases of the LDT pages RO. We 413 * don't need to call vm_flush_aliases(), though, since that's 414 * only responsible for flushing aliases out the TLBs, not the 415 * page tables, and Xen will flush the TLB for us if needed. 416 * 417 * To avoid confusing future readers: none of this is necessary 418 * to load the LDT. The hypervisor only checks this when the 419 * LDT is faulted in due to subsequent descriptor access. 420 */ 421 422 for (i = 0; i < entries; i += entries_per_page) 423 set_aliased_prot(ldt + i, PAGE_KERNEL_RO); 424 } 425 426 static void xen_free_ldt(struct desc_struct *ldt, unsigned entries) 427 { 428 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE; 429 int i; 430 431 for (i = 0; i < entries; i += entries_per_page) 432 set_aliased_prot(ldt + i, PAGE_KERNEL); 433 } 434 435 static void xen_set_ldt(const void *addr, unsigned entries) 436 { 437 struct mmuext_op *op; 438 struct multicall_space mcs = xen_mc_entry(sizeof(*op)); 439 440 trace_xen_cpu_set_ldt(addr, entries); 441 442 op = mcs.args; 443 op->cmd = MMUEXT_SET_LDT; 444 op->arg1.linear_addr = (unsigned long)addr; 445 op->arg2.nr_ents = entries; 446 447 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); 448 449 xen_mc_issue(PARAVIRT_LAZY_CPU); 450 } 451 452 static void xen_load_gdt(const struct desc_ptr *dtr) 453 { 454 unsigned long va = dtr->address; 455 unsigned int size = dtr->size + 1; 456 unsigned long pfn, mfn; 457 int level; 458 pte_t *ptep; 459 void *virt; 460 461 /* @size should be at most GDT_SIZE which is smaller than PAGE_SIZE. */ 462 BUG_ON(size > PAGE_SIZE); 463 BUG_ON(va & ~PAGE_MASK); 464 465 /* 466 * The GDT is per-cpu and is in the percpu data area. 467 * That can be virtually mapped, so we need to do a 468 * page-walk to get the underlying MFN for the 469 * hypercall. The page can also be in the kernel's 470 * linear range, so we need to RO that mapping too. 471 */ 472 ptep = lookup_address(va, &level); 473 BUG_ON(ptep == NULL); 474 475 pfn = pte_pfn(*ptep); 476 mfn = pfn_to_mfn(pfn); 477 virt = __va(PFN_PHYS(pfn)); 478 479 make_lowmem_page_readonly((void *)va); 480 make_lowmem_page_readonly(virt); 481 482 if (HYPERVISOR_set_gdt(&mfn, size / sizeof(struct desc_struct))) 483 BUG(); 484 } 485 486 /* 487 * load_gdt for early boot, when the gdt is only mapped once 488 */ 489 static void __init xen_load_gdt_boot(const struct desc_ptr *dtr) 490 { 491 unsigned long va = dtr->address; 492 unsigned int size = dtr->size + 1; 493 unsigned long pfn, mfn; 494 pte_t pte; 495 496 /* @size should be at most GDT_SIZE which is smaller than PAGE_SIZE. */ 497 BUG_ON(size > PAGE_SIZE); 498 BUG_ON(va & ~PAGE_MASK); 499 500 pfn = virt_to_pfn(va); 501 mfn = pfn_to_mfn(pfn); 502 503 pte = pfn_pte(pfn, PAGE_KERNEL_RO); 504 505 if (HYPERVISOR_update_va_mapping((unsigned long)va, pte, 0)) 506 BUG(); 507 508 if (HYPERVISOR_set_gdt(&mfn, size / sizeof(struct desc_struct))) 509 BUG(); 510 } 511 512 static inline bool desc_equal(const struct desc_struct *d1, 513 const struct desc_struct *d2) 514 { 515 return !memcmp(d1, d2, sizeof(*d1)); 516 } 517 518 static void load_TLS_descriptor(struct thread_struct *t, 519 unsigned int cpu, unsigned int i) 520 { 521 struct desc_struct *shadow = &per_cpu(shadow_tls_desc, cpu).desc[i]; 522 struct desc_struct *gdt; 523 xmaddr_t maddr; 524 struct multicall_space mc; 525 526 if (desc_equal(shadow, &t->tls_array[i])) 527 return; 528 529 *shadow = t->tls_array[i]; 530 531 gdt = get_cpu_gdt_rw(cpu); 532 maddr = arbitrary_virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]); 533 mc = __xen_mc_entry(0); 534 535 MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]); 536 } 537 538 static void xen_load_tls(struct thread_struct *t, unsigned int cpu) 539 { 540 /* 541 * XXX sleazy hack: If we're being called in a lazy-cpu zone 542 * and lazy gs handling is enabled, it means we're in a 543 * context switch, and %gs has just been saved. This means we 544 * can zero it out to prevent faults on exit from the 545 * hypervisor if the next process has no %gs. Either way, it 546 * has been saved, and the new value will get loaded properly. 547 * This will go away as soon as Xen has been modified to not 548 * save/restore %gs for normal hypercalls. 549 * 550 * On x86_64, this hack is not used for %gs, because gs points 551 * to KERNEL_GS_BASE (and uses it for PDA references), so we 552 * must not zero %gs on x86_64 553 * 554 * For x86_64, we need to zero %fs, otherwise we may get an 555 * exception between the new %fs descriptor being loaded and 556 * %fs being effectively cleared at __switch_to(). 557 */ 558 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU) { 559 #ifdef CONFIG_X86_32 560 lazy_load_gs(0); 561 #else 562 loadsegment(fs, 0); 563 #endif 564 } 565 566 xen_mc_batch(); 567 568 load_TLS_descriptor(t, cpu, 0); 569 load_TLS_descriptor(t, cpu, 1); 570 load_TLS_descriptor(t, cpu, 2); 571 572 xen_mc_issue(PARAVIRT_LAZY_CPU); 573 } 574 575 #ifdef CONFIG_X86_64 576 static void xen_load_gs_index(unsigned int idx) 577 { 578 if (HYPERVISOR_set_segment_base(SEGBASE_GS_USER_SEL, idx)) 579 BUG(); 580 } 581 #endif 582 583 static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum, 584 const void *ptr) 585 { 586 xmaddr_t mach_lp = arbitrary_virt_to_machine(&dt[entrynum]); 587 u64 entry = *(u64 *)ptr; 588 589 trace_xen_cpu_write_ldt_entry(dt, entrynum, entry); 590 591 preempt_disable(); 592 593 xen_mc_flush(); 594 if (HYPERVISOR_update_descriptor(mach_lp.maddr, entry)) 595 BUG(); 596 597 preempt_enable(); 598 } 599 600 #ifdef CONFIG_X86_64 601 void noist_exc_debug(struct pt_regs *regs); 602 603 DEFINE_IDTENTRY_RAW(xenpv_exc_nmi) 604 { 605 /* On Xen PV, NMI doesn't use IST. The C part is the sane as native. */ 606 exc_nmi(regs); 607 } 608 609 DEFINE_IDTENTRY_RAW(xenpv_exc_debug) 610 { 611 /* 612 * There's no IST on Xen PV, but we still need to dispatch 613 * to the correct handler. 614 */ 615 if (user_mode(regs)) 616 noist_exc_debug(regs); 617 else 618 exc_debug(regs); 619 } 620 621 struct trap_array_entry { 622 void (*orig)(void); 623 void (*xen)(void); 624 bool ist_okay; 625 }; 626 627 #define TRAP_ENTRY(func, ist_ok) { \ 628 .orig = asm_##func, \ 629 .xen = xen_asm_##func, \ 630 .ist_okay = ist_ok } 631 632 #define TRAP_ENTRY_REDIR(func, ist_ok) { \ 633 .orig = asm_##func, \ 634 .xen = xen_asm_xenpv_##func, \ 635 .ist_okay = ist_ok } 636 637 static struct trap_array_entry trap_array[] = { 638 TRAP_ENTRY_REDIR(exc_debug, true ), 639 TRAP_ENTRY(exc_double_fault, true ), 640 #ifdef CONFIG_X86_MCE 641 TRAP_ENTRY(exc_machine_check, true ), 642 #endif 643 TRAP_ENTRY_REDIR(exc_nmi, true ), 644 TRAP_ENTRY(exc_int3, false ), 645 TRAP_ENTRY(exc_overflow, false ), 646 #ifdef CONFIG_IA32_EMULATION 647 { entry_INT80_compat, xen_entry_INT80_compat, false }, 648 #endif 649 TRAP_ENTRY(exc_page_fault, false ), 650 TRAP_ENTRY(exc_divide_error, false ), 651 TRAP_ENTRY(exc_bounds, false ), 652 TRAP_ENTRY(exc_invalid_op, false ), 653 TRAP_ENTRY(exc_device_not_available, false ), 654 TRAP_ENTRY(exc_coproc_segment_overrun, false ), 655 TRAP_ENTRY(exc_invalid_tss, false ), 656 TRAP_ENTRY(exc_segment_not_present, false ), 657 TRAP_ENTRY(exc_stack_segment, false ), 658 TRAP_ENTRY(exc_general_protection, false ), 659 TRAP_ENTRY(exc_spurious_interrupt_bug, false ), 660 TRAP_ENTRY(exc_coprocessor_error, false ), 661 TRAP_ENTRY(exc_alignment_check, false ), 662 TRAP_ENTRY(exc_simd_coprocessor_error, false ), 663 }; 664 665 static bool __ref get_trap_addr(void **addr, unsigned int ist) 666 { 667 unsigned int nr; 668 bool ist_okay = false; 669 670 /* 671 * Replace trap handler addresses by Xen specific ones. 672 * Check for known traps using IST and whitelist them. 673 * The debugger ones are the only ones we care about. 674 * Xen will handle faults like double_fault, so we should never see 675 * them. Warn if there's an unexpected IST-using fault handler. 676 */ 677 for (nr = 0; nr < ARRAY_SIZE(trap_array); nr++) { 678 struct trap_array_entry *entry = trap_array + nr; 679 680 if (*addr == entry->orig) { 681 *addr = entry->xen; 682 ist_okay = entry->ist_okay; 683 break; 684 } 685 } 686 687 if (nr == ARRAY_SIZE(trap_array) && 688 *addr >= (void *)early_idt_handler_array[0] && 689 *addr < (void *)early_idt_handler_array[NUM_EXCEPTION_VECTORS]) { 690 nr = (*addr - (void *)early_idt_handler_array[0]) / 691 EARLY_IDT_HANDLER_SIZE; 692 *addr = (void *)xen_early_idt_handler_array[nr]; 693 } 694 695 if (WARN_ON(ist != 0 && !ist_okay)) 696 return false; 697 698 return true; 699 } 700 #endif 701 702 static int cvt_gate_to_trap(int vector, const gate_desc *val, 703 struct trap_info *info) 704 { 705 unsigned long addr; 706 707 if (val->bits.type != GATE_TRAP && val->bits.type != GATE_INTERRUPT) 708 return 0; 709 710 info->vector = vector; 711 712 addr = gate_offset(val); 713 #ifdef CONFIG_X86_64 714 if (!get_trap_addr((void **)&addr, val->bits.ist)) 715 return 0; 716 #endif /* CONFIG_X86_64 */ 717 info->address = addr; 718 719 info->cs = gate_segment(val); 720 info->flags = val->bits.dpl; 721 /* interrupt gates clear IF */ 722 if (val->bits.type == GATE_INTERRUPT) 723 info->flags |= 1 << 2; 724 725 return 1; 726 } 727 728 /* Locations of each CPU's IDT */ 729 static DEFINE_PER_CPU(struct desc_ptr, idt_desc); 730 731 /* Set an IDT entry. If the entry is part of the current IDT, then 732 also update Xen. */ 733 static void xen_write_idt_entry(gate_desc *dt, int entrynum, const gate_desc *g) 734 { 735 unsigned long p = (unsigned long)&dt[entrynum]; 736 unsigned long start, end; 737 738 trace_xen_cpu_write_idt_entry(dt, entrynum, g); 739 740 preempt_disable(); 741 742 start = __this_cpu_read(idt_desc.address); 743 end = start + __this_cpu_read(idt_desc.size) + 1; 744 745 xen_mc_flush(); 746 747 native_write_idt_entry(dt, entrynum, g); 748 749 if (p >= start && (p + 8) <= end) { 750 struct trap_info info[2]; 751 752 info[1].address = 0; 753 754 if (cvt_gate_to_trap(entrynum, g, &info[0])) 755 if (HYPERVISOR_set_trap_table(info)) 756 BUG(); 757 } 758 759 preempt_enable(); 760 } 761 762 static void xen_convert_trap_info(const struct desc_ptr *desc, 763 struct trap_info *traps) 764 { 765 unsigned in, out, count; 766 767 count = (desc->size+1) / sizeof(gate_desc); 768 BUG_ON(count > 256); 769 770 for (in = out = 0; in < count; in++) { 771 gate_desc *entry = (gate_desc *)(desc->address) + in; 772 773 if (cvt_gate_to_trap(in, entry, &traps[out])) 774 out++; 775 } 776 traps[out].address = 0; 777 } 778 779 void xen_copy_trap_info(struct trap_info *traps) 780 { 781 const struct desc_ptr *desc = this_cpu_ptr(&idt_desc); 782 783 xen_convert_trap_info(desc, traps); 784 } 785 786 /* Load a new IDT into Xen. In principle this can be per-CPU, so we 787 hold a spinlock to protect the static traps[] array (static because 788 it avoids allocation, and saves stack space). */ 789 static void xen_load_idt(const struct desc_ptr *desc) 790 { 791 static DEFINE_SPINLOCK(lock); 792 static struct trap_info traps[257]; 793 794 trace_xen_cpu_load_idt(desc); 795 796 spin_lock(&lock); 797 798 memcpy(this_cpu_ptr(&idt_desc), desc, sizeof(idt_desc)); 799 800 xen_convert_trap_info(desc, traps); 801 802 xen_mc_flush(); 803 if (HYPERVISOR_set_trap_table(traps)) 804 BUG(); 805 806 spin_unlock(&lock); 807 } 808 809 /* Write a GDT descriptor entry. Ignore LDT descriptors, since 810 they're handled differently. */ 811 static void xen_write_gdt_entry(struct desc_struct *dt, int entry, 812 const void *desc, int type) 813 { 814 trace_xen_cpu_write_gdt_entry(dt, entry, desc, type); 815 816 preempt_disable(); 817 818 switch (type) { 819 case DESC_LDT: 820 case DESC_TSS: 821 /* ignore */ 822 break; 823 824 default: { 825 xmaddr_t maddr = arbitrary_virt_to_machine(&dt[entry]); 826 827 xen_mc_flush(); 828 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc)) 829 BUG(); 830 } 831 832 } 833 834 preempt_enable(); 835 } 836 837 /* 838 * Version of write_gdt_entry for use at early boot-time needed to 839 * update an entry as simply as possible. 840 */ 841 static void __init xen_write_gdt_entry_boot(struct desc_struct *dt, int entry, 842 const void *desc, int type) 843 { 844 trace_xen_cpu_write_gdt_entry(dt, entry, desc, type); 845 846 switch (type) { 847 case DESC_LDT: 848 case DESC_TSS: 849 /* ignore */ 850 break; 851 852 default: { 853 xmaddr_t maddr = virt_to_machine(&dt[entry]); 854 855 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc)) 856 dt[entry] = *(struct desc_struct *)desc; 857 } 858 859 } 860 } 861 862 static void xen_load_sp0(unsigned long sp0) 863 { 864 struct multicall_space mcs; 865 866 mcs = xen_mc_entry(0); 867 MULTI_stack_switch(mcs.mc, __KERNEL_DS, sp0); 868 xen_mc_issue(PARAVIRT_LAZY_CPU); 869 this_cpu_write(cpu_tss_rw.x86_tss.sp0, sp0); 870 } 871 872 #ifdef CONFIG_X86_IOPL_IOPERM 873 static void xen_invalidate_io_bitmap(void) 874 { 875 struct physdev_set_iobitmap iobitmap = { 876 .bitmap = NULL, 877 .nr_ports = 0, 878 }; 879 880 native_tss_invalidate_io_bitmap(); 881 HYPERVISOR_physdev_op(PHYSDEVOP_set_iobitmap, &iobitmap); 882 } 883 884 static void xen_update_io_bitmap(void) 885 { 886 struct physdev_set_iobitmap iobitmap; 887 struct tss_struct *tss = this_cpu_ptr(&cpu_tss_rw); 888 889 native_tss_update_io_bitmap(); 890 891 iobitmap.bitmap = (uint8_t *)(&tss->x86_tss) + 892 tss->x86_tss.io_bitmap_base; 893 if (tss->x86_tss.io_bitmap_base == IO_BITMAP_OFFSET_INVALID) 894 iobitmap.nr_ports = 0; 895 else 896 iobitmap.nr_ports = IO_BITMAP_BITS; 897 898 HYPERVISOR_physdev_op(PHYSDEVOP_set_iobitmap, &iobitmap); 899 } 900 #endif 901 902 static void xen_io_delay(void) 903 { 904 } 905 906 static DEFINE_PER_CPU(unsigned long, xen_cr0_value); 907 908 static unsigned long xen_read_cr0(void) 909 { 910 unsigned long cr0 = this_cpu_read(xen_cr0_value); 911 912 if (unlikely(cr0 == 0)) { 913 cr0 = native_read_cr0(); 914 this_cpu_write(xen_cr0_value, cr0); 915 } 916 917 return cr0; 918 } 919 920 static void xen_write_cr0(unsigned long cr0) 921 { 922 struct multicall_space mcs; 923 924 this_cpu_write(xen_cr0_value, cr0); 925 926 /* Only pay attention to cr0.TS; everything else is 927 ignored. */ 928 mcs = xen_mc_entry(0); 929 930 MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0); 931 932 xen_mc_issue(PARAVIRT_LAZY_CPU); 933 } 934 935 static void xen_write_cr4(unsigned long cr4) 936 { 937 cr4 &= ~(X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PCE); 938 939 native_write_cr4(cr4); 940 } 941 942 static u64 xen_read_msr_safe(unsigned int msr, int *err) 943 { 944 u64 val; 945 946 if (pmu_msr_read(msr, &val, err)) 947 return val; 948 949 val = native_read_msr_safe(msr, err); 950 switch (msr) { 951 case MSR_IA32_APICBASE: 952 val &= ~X2APIC_ENABLE; 953 break; 954 } 955 return val; 956 } 957 958 static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high) 959 { 960 int ret; 961 #ifdef CONFIG_X86_64 962 unsigned int which; 963 u64 base; 964 #endif 965 966 ret = 0; 967 968 switch (msr) { 969 #ifdef CONFIG_X86_64 970 case MSR_FS_BASE: which = SEGBASE_FS; goto set; 971 case MSR_KERNEL_GS_BASE: which = SEGBASE_GS_USER; goto set; 972 case MSR_GS_BASE: which = SEGBASE_GS_KERNEL; goto set; 973 974 set: 975 base = ((u64)high << 32) | low; 976 if (HYPERVISOR_set_segment_base(which, base) != 0) 977 ret = -EIO; 978 break; 979 #endif 980 981 case MSR_STAR: 982 case MSR_CSTAR: 983 case MSR_LSTAR: 984 case MSR_SYSCALL_MASK: 985 case MSR_IA32_SYSENTER_CS: 986 case MSR_IA32_SYSENTER_ESP: 987 case MSR_IA32_SYSENTER_EIP: 988 /* Fast syscall setup is all done in hypercalls, so 989 these are all ignored. Stub them out here to stop 990 Xen console noise. */ 991 break; 992 993 default: 994 if (!pmu_msr_write(msr, low, high, &ret)) 995 ret = native_write_msr_safe(msr, low, high); 996 } 997 998 return ret; 999 } 1000 1001 static u64 xen_read_msr(unsigned int msr) 1002 { 1003 /* 1004 * This will silently swallow a #GP from RDMSR. It may be worth 1005 * changing that. 1006 */ 1007 int err; 1008 1009 return xen_read_msr_safe(msr, &err); 1010 } 1011 1012 static void xen_write_msr(unsigned int msr, unsigned low, unsigned high) 1013 { 1014 /* 1015 * This will silently swallow a #GP from WRMSR. It may be worth 1016 * changing that. 1017 */ 1018 xen_write_msr_safe(msr, low, high); 1019 } 1020 1021 /* This is called once we have the cpu_possible_mask */ 1022 void __init xen_setup_vcpu_info_placement(void) 1023 { 1024 int cpu; 1025 1026 for_each_possible_cpu(cpu) { 1027 /* Set up direct vCPU id mapping for PV guests. */ 1028 per_cpu(xen_vcpu_id, cpu) = cpu; 1029 1030 /* 1031 * xen_vcpu_setup(cpu) can fail -- in which case it 1032 * falls back to the shared_info version for cpus 1033 * where xen_vcpu_nr(cpu) < MAX_VIRT_CPUS. 1034 * 1035 * xen_cpu_up_prepare_pv() handles the rest by failing 1036 * them in hotplug. 1037 */ 1038 (void) xen_vcpu_setup(cpu); 1039 } 1040 1041 /* 1042 * xen_vcpu_setup managed to place the vcpu_info within the 1043 * percpu area for all cpus, so make use of it. 1044 */ 1045 if (xen_have_vcpu_info_placement) { 1046 pv_ops.irq.save_fl = __PV_IS_CALLEE_SAVE(xen_save_fl_direct); 1047 pv_ops.irq.restore_fl = 1048 __PV_IS_CALLEE_SAVE(xen_restore_fl_direct); 1049 pv_ops.irq.irq_disable = 1050 __PV_IS_CALLEE_SAVE(xen_irq_disable_direct); 1051 pv_ops.irq.irq_enable = 1052 __PV_IS_CALLEE_SAVE(xen_irq_enable_direct); 1053 pv_ops.mmu.read_cr2 = 1054 __PV_IS_CALLEE_SAVE(xen_read_cr2_direct); 1055 } 1056 } 1057 1058 static const struct pv_info xen_info __initconst = { 1059 .shared_kernel_pmd = 0, 1060 1061 #ifdef CONFIG_X86_64 1062 .extra_user_64bit_cs = FLAT_USER_CS64, 1063 #endif 1064 .name = "Xen", 1065 }; 1066 1067 static const struct pv_cpu_ops xen_cpu_ops __initconst = { 1068 .cpuid = xen_cpuid, 1069 1070 .set_debugreg = xen_set_debugreg, 1071 .get_debugreg = xen_get_debugreg, 1072 1073 .read_cr0 = xen_read_cr0, 1074 .write_cr0 = xen_write_cr0, 1075 1076 .write_cr4 = xen_write_cr4, 1077 1078 .wbinvd = native_wbinvd, 1079 1080 .read_msr = xen_read_msr, 1081 .write_msr = xen_write_msr, 1082 1083 .read_msr_safe = xen_read_msr_safe, 1084 .write_msr_safe = xen_write_msr_safe, 1085 1086 .read_pmc = xen_read_pmc, 1087 1088 .iret = xen_iret, 1089 #ifdef CONFIG_X86_64 1090 .usergs_sysret64 = xen_sysret64, 1091 #endif 1092 1093 .load_tr_desc = paravirt_nop, 1094 .set_ldt = xen_set_ldt, 1095 .load_gdt = xen_load_gdt, 1096 .load_idt = xen_load_idt, 1097 .load_tls = xen_load_tls, 1098 #ifdef CONFIG_X86_64 1099 .load_gs_index = xen_load_gs_index, 1100 #endif 1101 1102 .alloc_ldt = xen_alloc_ldt, 1103 .free_ldt = xen_free_ldt, 1104 1105 .store_tr = xen_store_tr, 1106 1107 .write_ldt_entry = xen_write_ldt_entry, 1108 .write_gdt_entry = xen_write_gdt_entry, 1109 .write_idt_entry = xen_write_idt_entry, 1110 .load_sp0 = xen_load_sp0, 1111 1112 #ifdef CONFIG_X86_IOPL_IOPERM 1113 .invalidate_io_bitmap = xen_invalidate_io_bitmap, 1114 .update_io_bitmap = xen_update_io_bitmap, 1115 #endif 1116 .io_delay = xen_io_delay, 1117 1118 /* Xen takes care of %gs when switching to usermode for us */ 1119 .swapgs = paravirt_nop, 1120 1121 .start_context_switch = paravirt_start_context_switch, 1122 .end_context_switch = xen_end_context_switch, 1123 }; 1124 1125 static void xen_restart(char *msg) 1126 { 1127 xen_reboot(SHUTDOWN_reboot); 1128 } 1129 1130 static void xen_machine_halt(void) 1131 { 1132 xen_reboot(SHUTDOWN_poweroff); 1133 } 1134 1135 static void xen_machine_power_off(void) 1136 { 1137 if (pm_power_off) 1138 pm_power_off(); 1139 xen_reboot(SHUTDOWN_poweroff); 1140 } 1141 1142 static void xen_crash_shutdown(struct pt_regs *regs) 1143 { 1144 xen_reboot(SHUTDOWN_crash); 1145 } 1146 1147 static const struct machine_ops xen_machine_ops __initconst = { 1148 .restart = xen_restart, 1149 .halt = xen_machine_halt, 1150 .power_off = xen_machine_power_off, 1151 .shutdown = xen_machine_halt, 1152 .crash_shutdown = xen_crash_shutdown, 1153 .emergency_restart = xen_emergency_restart, 1154 }; 1155 1156 static unsigned char xen_get_nmi_reason(void) 1157 { 1158 unsigned char reason = 0; 1159 1160 /* Construct a value which looks like it came from port 0x61. */ 1161 if (test_bit(_XEN_NMIREASON_io_error, 1162 &HYPERVISOR_shared_info->arch.nmi_reason)) 1163 reason |= NMI_REASON_IOCHK; 1164 if (test_bit(_XEN_NMIREASON_pci_serr, 1165 &HYPERVISOR_shared_info->arch.nmi_reason)) 1166 reason |= NMI_REASON_SERR; 1167 1168 return reason; 1169 } 1170 1171 static void __init xen_boot_params_init_edd(void) 1172 { 1173 #if IS_ENABLED(CONFIG_EDD) 1174 struct xen_platform_op op; 1175 struct edd_info *edd_info; 1176 u32 *mbr_signature; 1177 unsigned nr; 1178 int ret; 1179 1180 edd_info = boot_params.eddbuf; 1181 mbr_signature = boot_params.edd_mbr_sig_buffer; 1182 1183 op.cmd = XENPF_firmware_info; 1184 1185 op.u.firmware_info.type = XEN_FW_DISK_INFO; 1186 for (nr = 0; nr < EDDMAXNR; nr++) { 1187 struct edd_info *info = edd_info + nr; 1188 1189 op.u.firmware_info.index = nr; 1190 info->params.length = sizeof(info->params); 1191 set_xen_guest_handle(op.u.firmware_info.u.disk_info.edd_params, 1192 &info->params); 1193 ret = HYPERVISOR_platform_op(&op); 1194 if (ret) 1195 break; 1196 1197 #define C(x) info->x = op.u.firmware_info.u.disk_info.x 1198 C(device); 1199 C(version); 1200 C(interface_support); 1201 C(legacy_max_cylinder); 1202 C(legacy_max_head); 1203 C(legacy_sectors_per_track); 1204 #undef C 1205 } 1206 boot_params.eddbuf_entries = nr; 1207 1208 op.u.firmware_info.type = XEN_FW_DISK_MBR_SIGNATURE; 1209 for (nr = 0; nr < EDD_MBR_SIG_MAX; nr++) { 1210 op.u.firmware_info.index = nr; 1211 ret = HYPERVISOR_platform_op(&op); 1212 if (ret) 1213 break; 1214 mbr_signature[nr] = op.u.firmware_info.u.disk_mbr_signature.mbr_signature; 1215 } 1216 boot_params.edd_mbr_sig_buf_entries = nr; 1217 #endif 1218 } 1219 1220 /* 1221 * Set up the GDT and segment registers for -fstack-protector. Until 1222 * we do this, we have to be careful not to call any stack-protected 1223 * function, which is most of the kernel. 1224 */ 1225 static void __init xen_setup_gdt(int cpu) 1226 { 1227 pv_ops.cpu.write_gdt_entry = xen_write_gdt_entry_boot; 1228 pv_ops.cpu.load_gdt = xen_load_gdt_boot; 1229 1230 setup_stack_canary_segment(cpu); 1231 switch_to_new_gdt(cpu); 1232 1233 pv_ops.cpu.write_gdt_entry = xen_write_gdt_entry; 1234 pv_ops.cpu.load_gdt = xen_load_gdt; 1235 } 1236 1237 static void __init xen_dom0_set_legacy_features(void) 1238 { 1239 x86_platform.legacy.rtc = 1; 1240 } 1241 1242 /* First C function to be called on Xen boot */ 1243 asmlinkage __visible void __init xen_start_kernel(void) 1244 { 1245 struct physdev_set_iopl set_iopl; 1246 unsigned long initrd_start = 0; 1247 int rc; 1248 1249 if (!xen_start_info) 1250 return; 1251 1252 xen_domain_type = XEN_PV_DOMAIN; 1253 xen_start_flags = xen_start_info->flags; 1254 1255 xen_setup_features(); 1256 1257 /* Install Xen paravirt ops */ 1258 pv_info = xen_info; 1259 pv_ops.init.patch = paravirt_patch_default; 1260 pv_ops.cpu = xen_cpu_ops; 1261 xen_init_irq_ops(); 1262 1263 /* 1264 * Setup xen_vcpu early because it is needed for 1265 * local_irq_disable(), irqs_disabled(), e.g. in printk(). 1266 * 1267 * Don't do the full vcpu_info placement stuff until we have 1268 * the cpu_possible_mask and a non-dummy shared_info. 1269 */ 1270 xen_vcpu_info_reset(0); 1271 1272 x86_platform.get_nmi_reason = xen_get_nmi_reason; 1273 1274 x86_init.resources.memory_setup = xen_memory_setup; 1275 x86_init.irqs.intr_mode_select = x86_init_noop; 1276 x86_init.irqs.intr_mode_init = x86_init_noop; 1277 x86_init.oem.arch_setup = xen_arch_setup; 1278 x86_init.oem.banner = xen_banner; 1279 x86_init.hyper.init_platform = xen_pv_init_platform; 1280 x86_init.hyper.guest_late_init = xen_pv_guest_late_init; 1281 1282 /* 1283 * Set up some pagetable state before starting to set any ptes. 1284 */ 1285 1286 xen_setup_machphys_mapping(); 1287 xen_init_mmu_ops(); 1288 1289 /* Prevent unwanted bits from being set in PTEs. */ 1290 __supported_pte_mask &= ~_PAGE_GLOBAL; 1291 __default_kernel_pte_mask &= ~_PAGE_GLOBAL; 1292 1293 /* 1294 * Prevent page tables from being allocated in highmem, even 1295 * if CONFIG_HIGHPTE is enabled. 1296 */ 1297 __userpte_alloc_gfp &= ~__GFP_HIGHMEM; 1298 1299 /* Get mfn list */ 1300 xen_build_dynamic_phys_to_machine(); 1301 1302 /* 1303 * Set up kernel GDT and segment registers, mainly so that 1304 * -fstack-protector code can be executed. 1305 */ 1306 xen_setup_gdt(0); 1307 1308 /* Work out if we support NX */ 1309 get_cpu_cap(&boot_cpu_data); 1310 x86_configure_nx(); 1311 1312 /* Determine virtual and physical address sizes */ 1313 get_cpu_address_sizes(&boot_cpu_data); 1314 1315 /* Let's presume PV guests always boot on vCPU with id 0. */ 1316 per_cpu(xen_vcpu_id, 0) = 0; 1317 1318 idt_setup_early_handler(); 1319 1320 xen_init_capabilities(); 1321 1322 #ifdef CONFIG_X86_LOCAL_APIC 1323 /* 1324 * set up the basic apic ops. 1325 */ 1326 xen_init_apic(); 1327 #endif 1328 1329 if (xen_feature(XENFEAT_mmu_pt_update_preserve_ad)) { 1330 pv_ops.mmu.ptep_modify_prot_start = 1331 xen_ptep_modify_prot_start; 1332 pv_ops.mmu.ptep_modify_prot_commit = 1333 xen_ptep_modify_prot_commit; 1334 } 1335 1336 machine_ops = xen_machine_ops; 1337 1338 /* 1339 * The only reliable way to retain the initial address of the 1340 * percpu gdt_page is to remember it here, so we can go and 1341 * mark it RW later, when the initial percpu area is freed. 1342 */ 1343 xen_initial_gdt = &per_cpu(gdt_page, 0); 1344 1345 xen_smp_init(); 1346 1347 #ifdef CONFIG_ACPI_NUMA 1348 /* 1349 * The pages we from Xen are not related to machine pages, so 1350 * any NUMA information the kernel tries to get from ACPI will 1351 * be meaningless. Prevent it from trying. 1352 */ 1353 acpi_numa = -1; 1354 #endif 1355 WARN_ON(xen_cpuhp_setup(xen_cpu_up_prepare_pv, xen_cpu_dead_pv)); 1356 1357 local_irq_disable(); 1358 early_boot_irqs_disabled = true; 1359 1360 xen_raw_console_write("mapping kernel into physical memory\n"); 1361 xen_setup_kernel_pagetable((pgd_t *)xen_start_info->pt_base, 1362 xen_start_info->nr_pages); 1363 xen_reserve_special_pages(); 1364 1365 /* keep using Xen gdt for now; no urgent need to change it */ 1366 1367 #ifdef CONFIG_X86_32 1368 pv_info.kernel_rpl = 1; 1369 if (xen_feature(XENFEAT_supervisor_mode_kernel)) 1370 pv_info.kernel_rpl = 0; 1371 #else 1372 pv_info.kernel_rpl = 0; 1373 #endif 1374 /* set the limit of our address space */ 1375 xen_reserve_top(); 1376 1377 /* 1378 * We used to do this in xen_arch_setup, but that is too late 1379 * on AMD were early_cpu_init (run before ->arch_setup()) calls 1380 * early_amd_init which pokes 0xcf8 port. 1381 */ 1382 set_iopl.iopl = 1; 1383 rc = HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl); 1384 if (rc != 0) 1385 xen_raw_printk("physdev_op failed %d\n", rc); 1386 1387 #ifdef CONFIG_X86_32 1388 /* set up basic CPUID stuff */ 1389 cpu_detect(&new_cpu_data); 1390 set_cpu_cap(&new_cpu_data, X86_FEATURE_FPU); 1391 new_cpu_data.x86_capability[CPUID_1_EDX] = cpuid_edx(1); 1392 #endif 1393 1394 if (xen_start_info->mod_start) { 1395 if (xen_start_info->flags & SIF_MOD_START_PFN) 1396 initrd_start = PFN_PHYS(xen_start_info->mod_start); 1397 else 1398 initrd_start = __pa(xen_start_info->mod_start); 1399 } 1400 1401 /* Poke various useful things into boot_params */ 1402 boot_params.hdr.type_of_loader = (9 << 4) | 0; 1403 boot_params.hdr.ramdisk_image = initrd_start; 1404 boot_params.hdr.ramdisk_size = xen_start_info->mod_len; 1405 boot_params.hdr.cmd_line_ptr = __pa(xen_start_info->cmd_line); 1406 boot_params.hdr.hardware_subarch = X86_SUBARCH_XEN; 1407 1408 if (!xen_initial_domain()) { 1409 add_preferred_console("xenboot", 0, NULL); 1410 if (pci_xen) 1411 x86_init.pci.arch_init = pci_xen_init; 1412 } else { 1413 const struct dom0_vga_console_info *info = 1414 (void *)((char *)xen_start_info + 1415 xen_start_info->console.dom0.info_off); 1416 struct xen_platform_op op = { 1417 .cmd = XENPF_firmware_info, 1418 .interface_version = XENPF_INTERFACE_VERSION, 1419 .u.firmware_info.type = XEN_FW_KBD_SHIFT_FLAGS, 1420 }; 1421 1422 x86_platform.set_legacy_features = 1423 xen_dom0_set_legacy_features; 1424 xen_init_vga(info, xen_start_info->console.dom0.info_size); 1425 xen_start_info->console.domU.mfn = 0; 1426 xen_start_info->console.domU.evtchn = 0; 1427 1428 if (HYPERVISOR_platform_op(&op) == 0) 1429 boot_params.kbd_status = op.u.firmware_info.u.kbd_shift_flags; 1430 1431 /* Make sure ACS will be enabled */ 1432 pci_request_acs(); 1433 1434 xen_acpi_sleep_register(); 1435 1436 /* Avoid searching for BIOS MP tables */ 1437 x86_init.mpparse.find_smp_config = x86_init_noop; 1438 x86_init.mpparse.get_smp_config = x86_init_uint_noop; 1439 1440 xen_boot_params_init_edd(); 1441 } 1442 1443 if (!boot_params.screen_info.orig_video_isVGA) 1444 add_preferred_console("tty", 0, NULL); 1445 add_preferred_console("hvc", 0, NULL); 1446 if (boot_params.screen_info.orig_video_isVGA) 1447 add_preferred_console("tty", 0, NULL); 1448 1449 #ifdef CONFIG_PCI 1450 /* PCI BIOS service won't work from a PV guest. */ 1451 pci_probe &= ~PCI_PROBE_BIOS; 1452 #endif 1453 xen_raw_console_write("about to get started...\n"); 1454 1455 /* We need this for printk timestamps */ 1456 xen_setup_runstate_info(0); 1457 1458 xen_efi_init(&boot_params); 1459 1460 /* Start the world */ 1461 #ifdef CONFIG_X86_32 1462 i386_start_kernel(); 1463 #else 1464 cr4_init_shadow(); /* 32b kernel does this in i386_start_kernel() */ 1465 x86_64_start_reservations((char *)__pa_symbol(&boot_params)); 1466 #endif 1467 } 1468 1469 static int xen_cpu_up_prepare_pv(unsigned int cpu) 1470 { 1471 int rc; 1472 1473 if (per_cpu(xen_vcpu, cpu) == NULL) 1474 return -ENODEV; 1475 1476 xen_setup_timer(cpu); 1477 1478 rc = xen_smp_intr_init(cpu); 1479 if (rc) { 1480 WARN(1, "xen_smp_intr_init() for CPU %d failed: %d\n", 1481 cpu, rc); 1482 return rc; 1483 } 1484 1485 rc = xen_smp_intr_init_pv(cpu); 1486 if (rc) { 1487 WARN(1, "xen_smp_intr_init_pv() for CPU %d failed: %d\n", 1488 cpu, rc); 1489 return rc; 1490 } 1491 1492 return 0; 1493 } 1494 1495 static int xen_cpu_dead_pv(unsigned int cpu) 1496 { 1497 xen_smp_intr_free(cpu); 1498 xen_smp_intr_free_pv(cpu); 1499 1500 xen_teardown_timer(cpu); 1501 1502 return 0; 1503 } 1504 1505 static uint32_t __init xen_platform_pv(void) 1506 { 1507 if (xen_pv_domain()) 1508 return xen_cpuid_base(); 1509 1510 return 0; 1511 } 1512 1513 const __initconst struct hypervisor_x86 x86_hyper_xen_pv = { 1514 .name = "Xen PV", 1515 .detect = xen_platform_pv, 1516 .type = X86_HYPER_XEN_PV, 1517 .runtime.pin_vcpu = xen_pin_vcpu, 1518 .ignore_nopv = true, 1519 }; 1520