1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Core of Xen paravirt_ops implementation. 4 * 5 * This file contains the xen_paravirt_ops structure itself, and the 6 * implementations for: 7 * - privileged instructions 8 * - interrupt flags 9 * - segment operations 10 * - booting and setup 11 * 12 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007 13 */ 14 15 #include <linux/cpu.h> 16 #include <linux/kernel.h> 17 #include <linux/init.h> 18 #include <linux/smp.h> 19 #include <linux/preempt.h> 20 #include <linux/hardirq.h> 21 #include <linux/percpu.h> 22 #include <linux/delay.h> 23 #include <linux/start_kernel.h> 24 #include <linux/sched.h> 25 #include <linux/kprobes.h> 26 #include <linux/bootmem.h> 27 #include <linux/export.h> 28 #include <linux/mm.h> 29 #include <linux/page-flags.h> 30 #include <linux/highmem.h> 31 #include <linux/console.h> 32 #include <linux/pci.h> 33 #include <linux/gfp.h> 34 #include <linux/memblock.h> 35 #include <linux/edd.h> 36 #include <linux/frame.h> 37 38 #include <xen/xen.h> 39 #include <xen/events.h> 40 #include <xen/interface/xen.h> 41 #include <xen/interface/version.h> 42 #include <xen/interface/physdev.h> 43 #include <xen/interface/vcpu.h> 44 #include <xen/interface/memory.h> 45 #include <xen/interface/nmi.h> 46 #include <xen/interface/xen-mca.h> 47 #include <xen/features.h> 48 #include <xen/page.h> 49 #include <xen/hvc-console.h> 50 #include <xen/acpi.h> 51 52 #include <asm/paravirt.h> 53 #include <asm/apic.h> 54 #include <asm/page.h> 55 #include <asm/xen/pci.h> 56 #include <asm/xen/hypercall.h> 57 #include <asm/xen/hypervisor.h> 58 #include <asm/xen/cpuid.h> 59 #include <asm/fixmap.h> 60 #include <asm/processor.h> 61 #include <asm/proto.h> 62 #include <asm/msr-index.h> 63 #include <asm/traps.h> 64 #include <asm/setup.h> 65 #include <asm/desc.h> 66 #include <asm/pgalloc.h> 67 #include <asm/pgtable.h> 68 #include <asm/tlbflush.h> 69 #include <asm/reboot.h> 70 #include <asm/stackprotector.h> 71 #include <asm/hypervisor.h> 72 #include <asm/mach_traps.h> 73 #include <asm/mwait.h> 74 #include <asm/pci_x86.h> 75 #include <asm/cpu.h> 76 77 #ifdef CONFIG_ACPI 78 #include <linux/acpi.h> 79 #include <asm/acpi.h> 80 #include <acpi/pdc_intel.h> 81 #include <acpi/processor.h> 82 #include <xen/interface/platform.h> 83 #endif 84 85 #include "xen-ops.h" 86 #include "mmu.h" 87 #include "smp.h" 88 #include "multicalls.h" 89 #include "pmu.h" 90 91 void *xen_initial_gdt; 92 93 static int xen_cpu_up_prepare_pv(unsigned int cpu); 94 static int xen_cpu_dead_pv(unsigned int cpu); 95 96 struct tls_descs { 97 struct desc_struct desc[3]; 98 }; 99 100 /* 101 * Updating the 3 TLS descriptors in the GDT on every task switch is 102 * surprisingly expensive so we avoid updating them if they haven't 103 * changed. Since Xen writes different descriptors than the one 104 * passed in the update_descriptor hypercall we keep shadow copies to 105 * compare against. 106 */ 107 static DEFINE_PER_CPU(struct tls_descs, shadow_tls_desc); 108 109 static void __init xen_banner(void) 110 { 111 unsigned version = HYPERVISOR_xen_version(XENVER_version, NULL); 112 struct xen_extraversion extra; 113 HYPERVISOR_xen_version(XENVER_extraversion, &extra); 114 115 pr_info("Booting paravirtualized kernel on %s\n", pv_info.name); 116 printk(KERN_INFO "Xen version: %d.%d%s%s\n", 117 version >> 16, version & 0xffff, extra.extraversion, 118 xen_feature(XENFEAT_mmu_pt_update_preserve_ad) ? " (preserve-AD)" : ""); 119 } 120 /* Check if running on Xen version (major, minor) or later */ 121 bool 122 xen_running_on_version_or_later(unsigned int major, unsigned int minor) 123 { 124 unsigned int version; 125 126 if (!xen_domain()) 127 return false; 128 129 version = HYPERVISOR_xen_version(XENVER_version, NULL); 130 if ((((version >> 16) == major) && ((version & 0xffff) >= minor)) || 131 ((version >> 16) > major)) 132 return true; 133 return false; 134 } 135 136 static __read_mostly unsigned int cpuid_leaf5_ecx_val; 137 static __read_mostly unsigned int cpuid_leaf5_edx_val; 138 139 static void xen_cpuid(unsigned int *ax, unsigned int *bx, 140 unsigned int *cx, unsigned int *dx) 141 { 142 unsigned maskebx = ~0; 143 144 /* 145 * Mask out inconvenient features, to try and disable as many 146 * unsupported kernel subsystems as possible. 147 */ 148 switch (*ax) { 149 case CPUID_MWAIT_LEAF: 150 /* Synthesize the values.. */ 151 *ax = 0; 152 *bx = 0; 153 *cx = cpuid_leaf5_ecx_val; 154 *dx = cpuid_leaf5_edx_val; 155 return; 156 157 case 0xb: 158 /* Suppress extended topology stuff */ 159 maskebx = 0; 160 break; 161 } 162 163 asm(XEN_EMULATE_PREFIX "cpuid" 164 : "=a" (*ax), 165 "=b" (*bx), 166 "=c" (*cx), 167 "=d" (*dx) 168 : "0" (*ax), "2" (*cx)); 169 170 *bx &= maskebx; 171 } 172 STACK_FRAME_NON_STANDARD(xen_cpuid); /* XEN_EMULATE_PREFIX */ 173 174 static bool __init xen_check_mwait(void) 175 { 176 #ifdef CONFIG_ACPI 177 struct xen_platform_op op = { 178 .cmd = XENPF_set_processor_pminfo, 179 .u.set_pminfo.id = -1, 180 .u.set_pminfo.type = XEN_PM_PDC, 181 }; 182 uint32_t buf[3]; 183 unsigned int ax, bx, cx, dx; 184 unsigned int mwait_mask; 185 186 /* We need to determine whether it is OK to expose the MWAIT 187 * capability to the kernel to harvest deeper than C3 states from ACPI 188 * _CST using the processor_harvest_xen.c module. For this to work, we 189 * need to gather the MWAIT_LEAF values (which the cstate.c code 190 * checks against). The hypervisor won't expose the MWAIT flag because 191 * it would break backwards compatibility; so we will find out directly 192 * from the hardware and hypercall. 193 */ 194 if (!xen_initial_domain()) 195 return false; 196 197 /* 198 * When running under platform earlier than Xen4.2, do not expose 199 * mwait, to avoid the risk of loading native acpi pad driver 200 */ 201 if (!xen_running_on_version_or_later(4, 2)) 202 return false; 203 204 ax = 1; 205 cx = 0; 206 207 native_cpuid(&ax, &bx, &cx, &dx); 208 209 mwait_mask = (1 << (X86_FEATURE_EST % 32)) | 210 (1 << (X86_FEATURE_MWAIT % 32)); 211 212 if ((cx & mwait_mask) != mwait_mask) 213 return false; 214 215 /* We need to emulate the MWAIT_LEAF and for that we need both 216 * ecx and edx. The hypercall provides only partial information. 217 */ 218 219 ax = CPUID_MWAIT_LEAF; 220 bx = 0; 221 cx = 0; 222 dx = 0; 223 224 native_cpuid(&ax, &bx, &cx, &dx); 225 226 /* Ask the Hypervisor whether to clear ACPI_PDC_C_C2C3_FFH. If so, 227 * don't expose MWAIT_LEAF and let ACPI pick the IOPORT version of C3. 228 */ 229 buf[0] = ACPI_PDC_REVISION_ID; 230 buf[1] = 1; 231 buf[2] = (ACPI_PDC_C_CAPABILITY_SMP | ACPI_PDC_EST_CAPABILITY_SWSMP); 232 233 set_xen_guest_handle(op.u.set_pminfo.pdc, buf); 234 235 if ((HYPERVISOR_platform_op(&op) == 0) && 236 (buf[2] & (ACPI_PDC_C_C1_FFH | ACPI_PDC_C_C2C3_FFH))) { 237 cpuid_leaf5_ecx_val = cx; 238 cpuid_leaf5_edx_val = dx; 239 } 240 return true; 241 #else 242 return false; 243 #endif 244 } 245 246 static bool __init xen_check_xsave(void) 247 { 248 unsigned int cx, xsave_mask; 249 250 cx = cpuid_ecx(1); 251 252 xsave_mask = (1 << (X86_FEATURE_XSAVE % 32)) | 253 (1 << (X86_FEATURE_OSXSAVE % 32)); 254 255 /* Xen will set CR4.OSXSAVE if supported and not disabled by force */ 256 return (cx & xsave_mask) == xsave_mask; 257 } 258 259 static void __init xen_init_capabilities(void) 260 { 261 setup_force_cpu_cap(X86_FEATURE_XENPV); 262 setup_clear_cpu_cap(X86_FEATURE_DCA); 263 setup_clear_cpu_cap(X86_FEATURE_APERFMPERF); 264 setup_clear_cpu_cap(X86_FEATURE_MTRR); 265 setup_clear_cpu_cap(X86_FEATURE_ACC); 266 setup_clear_cpu_cap(X86_FEATURE_X2APIC); 267 setup_clear_cpu_cap(X86_FEATURE_SME); 268 269 /* 270 * Xen PV would need some work to support PCID: CR3 handling as well 271 * as xen_flush_tlb_others() would need updating. 272 */ 273 setup_clear_cpu_cap(X86_FEATURE_PCID); 274 275 if (!xen_initial_domain()) 276 setup_clear_cpu_cap(X86_FEATURE_ACPI); 277 278 if (xen_check_mwait()) 279 setup_force_cpu_cap(X86_FEATURE_MWAIT); 280 else 281 setup_clear_cpu_cap(X86_FEATURE_MWAIT); 282 283 if (!xen_check_xsave()) { 284 setup_clear_cpu_cap(X86_FEATURE_XSAVE); 285 setup_clear_cpu_cap(X86_FEATURE_OSXSAVE); 286 } 287 } 288 289 static void xen_set_debugreg(int reg, unsigned long val) 290 { 291 HYPERVISOR_set_debugreg(reg, val); 292 } 293 294 static unsigned long xen_get_debugreg(int reg) 295 { 296 return HYPERVISOR_get_debugreg(reg); 297 } 298 299 static void xen_end_context_switch(struct task_struct *next) 300 { 301 xen_mc_flush(); 302 paravirt_end_context_switch(next); 303 } 304 305 static unsigned long xen_store_tr(void) 306 { 307 return 0; 308 } 309 310 /* 311 * Set the page permissions for a particular virtual address. If the 312 * address is a vmalloc mapping (or other non-linear mapping), then 313 * find the linear mapping of the page and also set its protections to 314 * match. 315 */ 316 static void set_aliased_prot(void *v, pgprot_t prot) 317 { 318 int level; 319 pte_t *ptep; 320 pte_t pte; 321 unsigned long pfn; 322 struct page *page; 323 unsigned char dummy; 324 325 ptep = lookup_address((unsigned long)v, &level); 326 BUG_ON(ptep == NULL); 327 328 pfn = pte_pfn(*ptep); 329 page = pfn_to_page(pfn); 330 331 pte = pfn_pte(pfn, prot); 332 333 /* 334 * Careful: update_va_mapping() will fail if the virtual address 335 * we're poking isn't populated in the page tables. We don't 336 * need to worry about the direct map (that's always in the page 337 * tables), but we need to be careful about vmap space. In 338 * particular, the top level page table can lazily propagate 339 * entries between processes, so if we've switched mms since we 340 * vmapped the target in the first place, we might not have the 341 * top-level page table entry populated. 342 * 343 * We disable preemption because we want the same mm active when 344 * we probe the target and when we issue the hypercall. We'll 345 * have the same nominal mm, but if we're a kernel thread, lazy 346 * mm dropping could change our pgd. 347 * 348 * Out of an abundance of caution, this uses __get_user() to fault 349 * in the target address just in case there's some obscure case 350 * in which the target address isn't readable. 351 */ 352 353 preempt_disable(); 354 355 probe_kernel_read(&dummy, v, 1); 356 357 if (HYPERVISOR_update_va_mapping((unsigned long)v, pte, 0)) 358 BUG(); 359 360 if (!PageHighMem(page)) { 361 void *av = __va(PFN_PHYS(pfn)); 362 363 if (av != v) 364 if (HYPERVISOR_update_va_mapping((unsigned long)av, pte, 0)) 365 BUG(); 366 } else 367 kmap_flush_unused(); 368 369 preempt_enable(); 370 } 371 372 static void xen_alloc_ldt(struct desc_struct *ldt, unsigned entries) 373 { 374 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE; 375 int i; 376 377 /* 378 * We need to mark the all aliases of the LDT pages RO. We 379 * don't need to call vm_flush_aliases(), though, since that's 380 * only responsible for flushing aliases out the TLBs, not the 381 * page tables, and Xen will flush the TLB for us if needed. 382 * 383 * To avoid confusing future readers: none of this is necessary 384 * to load the LDT. The hypervisor only checks this when the 385 * LDT is faulted in due to subsequent descriptor access. 386 */ 387 388 for (i = 0; i < entries; i += entries_per_page) 389 set_aliased_prot(ldt + i, PAGE_KERNEL_RO); 390 } 391 392 static void xen_free_ldt(struct desc_struct *ldt, unsigned entries) 393 { 394 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE; 395 int i; 396 397 for (i = 0; i < entries; i += entries_per_page) 398 set_aliased_prot(ldt + i, PAGE_KERNEL); 399 } 400 401 static void xen_set_ldt(const void *addr, unsigned entries) 402 { 403 struct mmuext_op *op; 404 struct multicall_space mcs = xen_mc_entry(sizeof(*op)); 405 406 trace_xen_cpu_set_ldt(addr, entries); 407 408 op = mcs.args; 409 op->cmd = MMUEXT_SET_LDT; 410 op->arg1.linear_addr = (unsigned long)addr; 411 op->arg2.nr_ents = entries; 412 413 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); 414 415 xen_mc_issue(PARAVIRT_LAZY_CPU); 416 } 417 418 static void xen_load_gdt(const struct desc_ptr *dtr) 419 { 420 unsigned long va = dtr->address; 421 unsigned int size = dtr->size + 1; 422 unsigned pages = DIV_ROUND_UP(size, PAGE_SIZE); 423 unsigned long frames[pages]; 424 int f; 425 426 /* 427 * A GDT can be up to 64k in size, which corresponds to 8192 428 * 8-byte entries, or 16 4k pages.. 429 */ 430 431 BUG_ON(size > 65536); 432 BUG_ON(va & ~PAGE_MASK); 433 434 for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) { 435 int level; 436 pte_t *ptep; 437 unsigned long pfn, mfn; 438 void *virt; 439 440 /* 441 * The GDT is per-cpu and is in the percpu data area. 442 * That can be virtually mapped, so we need to do a 443 * page-walk to get the underlying MFN for the 444 * hypercall. The page can also be in the kernel's 445 * linear range, so we need to RO that mapping too. 446 */ 447 ptep = lookup_address(va, &level); 448 BUG_ON(ptep == NULL); 449 450 pfn = pte_pfn(*ptep); 451 mfn = pfn_to_mfn(pfn); 452 virt = __va(PFN_PHYS(pfn)); 453 454 frames[f] = mfn; 455 456 make_lowmem_page_readonly((void *)va); 457 make_lowmem_page_readonly(virt); 458 } 459 460 if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct))) 461 BUG(); 462 } 463 464 /* 465 * load_gdt for early boot, when the gdt is only mapped once 466 */ 467 static void __init xen_load_gdt_boot(const struct desc_ptr *dtr) 468 { 469 unsigned long va = dtr->address; 470 unsigned int size = dtr->size + 1; 471 unsigned pages = DIV_ROUND_UP(size, PAGE_SIZE); 472 unsigned long frames[pages]; 473 int f; 474 475 /* 476 * A GDT can be up to 64k in size, which corresponds to 8192 477 * 8-byte entries, or 16 4k pages.. 478 */ 479 480 BUG_ON(size > 65536); 481 BUG_ON(va & ~PAGE_MASK); 482 483 for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) { 484 pte_t pte; 485 unsigned long pfn, mfn; 486 487 pfn = virt_to_pfn(va); 488 mfn = pfn_to_mfn(pfn); 489 490 pte = pfn_pte(pfn, PAGE_KERNEL_RO); 491 492 if (HYPERVISOR_update_va_mapping((unsigned long)va, pte, 0)) 493 BUG(); 494 495 frames[f] = mfn; 496 } 497 498 if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct))) 499 BUG(); 500 } 501 502 static inline bool desc_equal(const struct desc_struct *d1, 503 const struct desc_struct *d2) 504 { 505 return !memcmp(d1, d2, sizeof(*d1)); 506 } 507 508 static void load_TLS_descriptor(struct thread_struct *t, 509 unsigned int cpu, unsigned int i) 510 { 511 struct desc_struct *shadow = &per_cpu(shadow_tls_desc, cpu).desc[i]; 512 struct desc_struct *gdt; 513 xmaddr_t maddr; 514 struct multicall_space mc; 515 516 if (desc_equal(shadow, &t->tls_array[i])) 517 return; 518 519 *shadow = t->tls_array[i]; 520 521 gdt = get_cpu_gdt_rw(cpu); 522 maddr = arbitrary_virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]); 523 mc = __xen_mc_entry(0); 524 525 MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]); 526 } 527 528 static void xen_load_tls(struct thread_struct *t, unsigned int cpu) 529 { 530 /* 531 * XXX sleazy hack: If we're being called in a lazy-cpu zone 532 * and lazy gs handling is enabled, it means we're in a 533 * context switch, and %gs has just been saved. This means we 534 * can zero it out to prevent faults on exit from the 535 * hypervisor if the next process has no %gs. Either way, it 536 * has been saved, and the new value will get loaded properly. 537 * This will go away as soon as Xen has been modified to not 538 * save/restore %gs for normal hypercalls. 539 * 540 * On x86_64, this hack is not used for %gs, because gs points 541 * to KERNEL_GS_BASE (and uses it for PDA references), so we 542 * must not zero %gs on x86_64 543 * 544 * For x86_64, we need to zero %fs, otherwise we may get an 545 * exception between the new %fs descriptor being loaded and 546 * %fs being effectively cleared at __switch_to(). 547 */ 548 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU) { 549 #ifdef CONFIG_X86_32 550 lazy_load_gs(0); 551 #else 552 loadsegment(fs, 0); 553 #endif 554 } 555 556 xen_mc_batch(); 557 558 load_TLS_descriptor(t, cpu, 0); 559 load_TLS_descriptor(t, cpu, 1); 560 load_TLS_descriptor(t, cpu, 2); 561 562 xen_mc_issue(PARAVIRT_LAZY_CPU); 563 } 564 565 #ifdef CONFIG_X86_64 566 static void xen_load_gs_index(unsigned int idx) 567 { 568 if (HYPERVISOR_set_segment_base(SEGBASE_GS_USER_SEL, idx)) 569 BUG(); 570 } 571 #endif 572 573 static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum, 574 const void *ptr) 575 { 576 xmaddr_t mach_lp = arbitrary_virt_to_machine(&dt[entrynum]); 577 u64 entry = *(u64 *)ptr; 578 579 trace_xen_cpu_write_ldt_entry(dt, entrynum, entry); 580 581 preempt_disable(); 582 583 xen_mc_flush(); 584 if (HYPERVISOR_update_descriptor(mach_lp.maddr, entry)) 585 BUG(); 586 587 preempt_enable(); 588 } 589 590 #ifdef CONFIG_X86_64 591 struct trap_array_entry { 592 void (*orig)(void); 593 void (*xen)(void); 594 bool ist_okay; 595 }; 596 597 static struct trap_array_entry trap_array[] = { 598 { debug, xen_xendebug, true }, 599 { int3, xen_xenint3, true }, 600 { double_fault, xen_double_fault, true }, 601 #ifdef CONFIG_X86_MCE 602 { machine_check, xen_machine_check, true }, 603 #endif 604 { nmi, xen_xennmi, true }, 605 { overflow, xen_overflow, false }, 606 #ifdef CONFIG_IA32_EMULATION 607 { entry_INT80_compat, xen_entry_INT80_compat, false }, 608 #endif 609 { page_fault, xen_page_fault, false }, 610 { divide_error, xen_divide_error, false }, 611 { bounds, xen_bounds, false }, 612 { invalid_op, xen_invalid_op, false }, 613 { device_not_available, xen_device_not_available, false }, 614 { coprocessor_segment_overrun, xen_coprocessor_segment_overrun, false }, 615 { invalid_TSS, xen_invalid_TSS, false }, 616 { segment_not_present, xen_segment_not_present, false }, 617 { stack_segment, xen_stack_segment, false }, 618 { general_protection, xen_general_protection, false }, 619 { spurious_interrupt_bug, xen_spurious_interrupt_bug, false }, 620 { coprocessor_error, xen_coprocessor_error, false }, 621 { alignment_check, xen_alignment_check, false }, 622 { simd_coprocessor_error, xen_simd_coprocessor_error, false }, 623 }; 624 625 static bool get_trap_addr(void **addr, unsigned int ist) 626 { 627 unsigned int nr; 628 bool ist_okay = false; 629 630 /* 631 * Replace trap handler addresses by Xen specific ones. 632 * Check for known traps using IST and whitelist them. 633 * The debugger ones are the only ones we care about. 634 * Xen will handle faults like double_fault, * so we should never see 635 * them. Warn if there's an unexpected IST-using fault handler. 636 */ 637 for (nr = 0; nr < ARRAY_SIZE(trap_array); nr++) { 638 struct trap_array_entry *entry = trap_array + nr; 639 640 if (*addr == entry->orig) { 641 *addr = entry->xen; 642 ist_okay = entry->ist_okay; 643 break; 644 } 645 } 646 647 if (WARN_ON(ist != 0 && !ist_okay)) 648 return false; 649 650 return true; 651 } 652 #endif 653 654 static int cvt_gate_to_trap(int vector, const gate_desc *val, 655 struct trap_info *info) 656 { 657 unsigned long addr; 658 659 if (val->bits.type != GATE_TRAP && val->bits.type != GATE_INTERRUPT) 660 return 0; 661 662 info->vector = vector; 663 664 addr = gate_offset(val); 665 #ifdef CONFIG_X86_64 666 if (!get_trap_addr((void **)&addr, val->bits.ist)) 667 return 0; 668 #endif /* CONFIG_X86_64 */ 669 info->address = addr; 670 671 info->cs = gate_segment(val); 672 info->flags = val->bits.dpl; 673 /* interrupt gates clear IF */ 674 if (val->bits.type == GATE_INTERRUPT) 675 info->flags |= 1 << 2; 676 677 return 1; 678 } 679 680 /* Locations of each CPU's IDT */ 681 static DEFINE_PER_CPU(struct desc_ptr, idt_desc); 682 683 /* Set an IDT entry. If the entry is part of the current IDT, then 684 also update Xen. */ 685 static void xen_write_idt_entry(gate_desc *dt, int entrynum, const gate_desc *g) 686 { 687 unsigned long p = (unsigned long)&dt[entrynum]; 688 unsigned long start, end; 689 690 trace_xen_cpu_write_idt_entry(dt, entrynum, g); 691 692 preempt_disable(); 693 694 start = __this_cpu_read(idt_desc.address); 695 end = start + __this_cpu_read(idt_desc.size) + 1; 696 697 xen_mc_flush(); 698 699 native_write_idt_entry(dt, entrynum, g); 700 701 if (p >= start && (p + 8) <= end) { 702 struct trap_info info[2]; 703 704 info[1].address = 0; 705 706 if (cvt_gate_to_trap(entrynum, g, &info[0])) 707 if (HYPERVISOR_set_trap_table(info)) 708 BUG(); 709 } 710 711 preempt_enable(); 712 } 713 714 static void xen_convert_trap_info(const struct desc_ptr *desc, 715 struct trap_info *traps) 716 { 717 unsigned in, out, count; 718 719 count = (desc->size+1) / sizeof(gate_desc); 720 BUG_ON(count > 256); 721 722 for (in = out = 0; in < count; in++) { 723 gate_desc *entry = (gate_desc *)(desc->address) + in; 724 725 if (cvt_gate_to_trap(in, entry, &traps[out])) 726 out++; 727 } 728 traps[out].address = 0; 729 } 730 731 void xen_copy_trap_info(struct trap_info *traps) 732 { 733 const struct desc_ptr *desc = this_cpu_ptr(&idt_desc); 734 735 xen_convert_trap_info(desc, traps); 736 } 737 738 /* Load a new IDT into Xen. In principle this can be per-CPU, so we 739 hold a spinlock to protect the static traps[] array (static because 740 it avoids allocation, and saves stack space). */ 741 static void xen_load_idt(const struct desc_ptr *desc) 742 { 743 static DEFINE_SPINLOCK(lock); 744 static struct trap_info traps[257]; 745 746 trace_xen_cpu_load_idt(desc); 747 748 spin_lock(&lock); 749 750 memcpy(this_cpu_ptr(&idt_desc), desc, sizeof(idt_desc)); 751 752 xen_convert_trap_info(desc, traps); 753 754 xen_mc_flush(); 755 if (HYPERVISOR_set_trap_table(traps)) 756 BUG(); 757 758 spin_unlock(&lock); 759 } 760 761 /* Write a GDT descriptor entry. Ignore LDT descriptors, since 762 they're handled differently. */ 763 static void xen_write_gdt_entry(struct desc_struct *dt, int entry, 764 const void *desc, int type) 765 { 766 trace_xen_cpu_write_gdt_entry(dt, entry, desc, type); 767 768 preempt_disable(); 769 770 switch (type) { 771 case DESC_LDT: 772 case DESC_TSS: 773 /* ignore */ 774 break; 775 776 default: { 777 xmaddr_t maddr = arbitrary_virt_to_machine(&dt[entry]); 778 779 xen_mc_flush(); 780 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc)) 781 BUG(); 782 } 783 784 } 785 786 preempt_enable(); 787 } 788 789 /* 790 * Version of write_gdt_entry for use at early boot-time needed to 791 * update an entry as simply as possible. 792 */ 793 static void __init xen_write_gdt_entry_boot(struct desc_struct *dt, int entry, 794 const void *desc, int type) 795 { 796 trace_xen_cpu_write_gdt_entry(dt, entry, desc, type); 797 798 switch (type) { 799 case DESC_LDT: 800 case DESC_TSS: 801 /* ignore */ 802 break; 803 804 default: { 805 xmaddr_t maddr = virt_to_machine(&dt[entry]); 806 807 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc)) 808 dt[entry] = *(struct desc_struct *)desc; 809 } 810 811 } 812 } 813 814 static void xen_load_sp0(unsigned long sp0) 815 { 816 struct multicall_space mcs; 817 818 mcs = xen_mc_entry(0); 819 MULTI_stack_switch(mcs.mc, __KERNEL_DS, sp0); 820 xen_mc_issue(PARAVIRT_LAZY_CPU); 821 this_cpu_write(cpu_tss.x86_tss.sp0, sp0); 822 } 823 824 void xen_set_iopl_mask(unsigned mask) 825 { 826 struct physdev_set_iopl set_iopl; 827 828 /* Force the change at ring 0. */ 829 set_iopl.iopl = (mask == 0) ? 1 : (mask >> 12) & 3; 830 HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl); 831 } 832 833 static void xen_io_delay(void) 834 { 835 } 836 837 static DEFINE_PER_CPU(unsigned long, xen_cr0_value); 838 839 static unsigned long xen_read_cr0(void) 840 { 841 unsigned long cr0 = this_cpu_read(xen_cr0_value); 842 843 if (unlikely(cr0 == 0)) { 844 cr0 = native_read_cr0(); 845 this_cpu_write(xen_cr0_value, cr0); 846 } 847 848 return cr0; 849 } 850 851 static void xen_write_cr0(unsigned long cr0) 852 { 853 struct multicall_space mcs; 854 855 this_cpu_write(xen_cr0_value, cr0); 856 857 /* Only pay attention to cr0.TS; everything else is 858 ignored. */ 859 mcs = xen_mc_entry(0); 860 861 MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0); 862 863 xen_mc_issue(PARAVIRT_LAZY_CPU); 864 } 865 866 static void xen_write_cr4(unsigned long cr4) 867 { 868 cr4 &= ~(X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PCE); 869 870 native_write_cr4(cr4); 871 } 872 #ifdef CONFIG_X86_64 873 static inline unsigned long xen_read_cr8(void) 874 { 875 return 0; 876 } 877 static inline void xen_write_cr8(unsigned long val) 878 { 879 BUG_ON(val); 880 } 881 #endif 882 883 static u64 xen_read_msr_safe(unsigned int msr, int *err) 884 { 885 u64 val; 886 887 if (pmu_msr_read(msr, &val, err)) 888 return val; 889 890 val = native_read_msr_safe(msr, err); 891 switch (msr) { 892 case MSR_IA32_APICBASE: 893 #ifdef CONFIG_X86_X2APIC 894 if (!(cpuid_ecx(1) & (1 << (X86_FEATURE_X2APIC & 31)))) 895 #endif 896 val &= ~X2APIC_ENABLE; 897 break; 898 } 899 return val; 900 } 901 902 static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high) 903 { 904 int ret; 905 906 ret = 0; 907 908 switch (msr) { 909 #ifdef CONFIG_X86_64 910 unsigned which; 911 u64 base; 912 913 case MSR_FS_BASE: which = SEGBASE_FS; goto set; 914 case MSR_KERNEL_GS_BASE: which = SEGBASE_GS_USER; goto set; 915 case MSR_GS_BASE: which = SEGBASE_GS_KERNEL; goto set; 916 917 set: 918 base = ((u64)high << 32) | low; 919 if (HYPERVISOR_set_segment_base(which, base) != 0) 920 ret = -EIO; 921 break; 922 #endif 923 924 case MSR_STAR: 925 case MSR_CSTAR: 926 case MSR_LSTAR: 927 case MSR_SYSCALL_MASK: 928 case MSR_IA32_SYSENTER_CS: 929 case MSR_IA32_SYSENTER_ESP: 930 case MSR_IA32_SYSENTER_EIP: 931 /* Fast syscall setup is all done in hypercalls, so 932 these are all ignored. Stub them out here to stop 933 Xen console noise. */ 934 break; 935 936 default: 937 if (!pmu_msr_write(msr, low, high, &ret)) 938 ret = native_write_msr_safe(msr, low, high); 939 } 940 941 return ret; 942 } 943 944 static u64 xen_read_msr(unsigned int msr) 945 { 946 /* 947 * This will silently swallow a #GP from RDMSR. It may be worth 948 * changing that. 949 */ 950 int err; 951 952 return xen_read_msr_safe(msr, &err); 953 } 954 955 static void xen_write_msr(unsigned int msr, unsigned low, unsigned high) 956 { 957 /* 958 * This will silently swallow a #GP from WRMSR. It may be worth 959 * changing that. 960 */ 961 xen_write_msr_safe(msr, low, high); 962 } 963 964 void xen_setup_shared_info(void) 965 { 966 set_fixmap(FIX_PARAVIRT_BOOTMAP, xen_start_info->shared_info); 967 968 HYPERVISOR_shared_info = 969 (struct shared_info *)fix_to_virt(FIX_PARAVIRT_BOOTMAP); 970 971 xen_setup_mfn_list_list(); 972 973 if (system_state == SYSTEM_BOOTING) { 974 #ifndef CONFIG_SMP 975 /* 976 * In UP this is as good a place as any to set up shared info. 977 * Limit this to boot only, at restore vcpu setup is done via 978 * xen_vcpu_restore(). 979 */ 980 xen_setup_vcpu_info_placement(); 981 #endif 982 /* 983 * Now that shared info is set up we can start using routines 984 * that point to pvclock area. 985 */ 986 xen_init_time_ops(); 987 } 988 } 989 990 /* This is called once we have the cpu_possible_mask */ 991 void __ref xen_setup_vcpu_info_placement(void) 992 { 993 int cpu; 994 995 for_each_possible_cpu(cpu) { 996 /* Set up direct vCPU id mapping for PV guests. */ 997 per_cpu(xen_vcpu_id, cpu) = cpu; 998 999 /* 1000 * xen_vcpu_setup(cpu) can fail -- in which case it 1001 * falls back to the shared_info version for cpus 1002 * where xen_vcpu_nr(cpu) < MAX_VIRT_CPUS. 1003 * 1004 * xen_cpu_up_prepare_pv() handles the rest by failing 1005 * them in hotplug. 1006 */ 1007 (void) xen_vcpu_setup(cpu); 1008 } 1009 1010 /* 1011 * xen_vcpu_setup managed to place the vcpu_info within the 1012 * percpu area for all cpus, so make use of it. 1013 */ 1014 if (xen_have_vcpu_info_placement) { 1015 pv_irq_ops.save_fl = __PV_IS_CALLEE_SAVE(xen_save_fl_direct); 1016 pv_irq_ops.restore_fl = __PV_IS_CALLEE_SAVE(xen_restore_fl_direct); 1017 pv_irq_ops.irq_disable = __PV_IS_CALLEE_SAVE(xen_irq_disable_direct); 1018 pv_irq_ops.irq_enable = __PV_IS_CALLEE_SAVE(xen_irq_enable_direct); 1019 pv_mmu_ops.read_cr2 = xen_read_cr2_direct; 1020 } 1021 } 1022 1023 static const struct pv_info xen_info __initconst = { 1024 .shared_kernel_pmd = 0, 1025 1026 #ifdef CONFIG_X86_64 1027 .extra_user_64bit_cs = FLAT_USER_CS64, 1028 #endif 1029 .name = "Xen", 1030 }; 1031 1032 static const struct pv_cpu_ops xen_cpu_ops __initconst = { 1033 .cpuid = xen_cpuid, 1034 1035 .set_debugreg = xen_set_debugreg, 1036 .get_debugreg = xen_get_debugreg, 1037 1038 .read_cr0 = xen_read_cr0, 1039 .write_cr0 = xen_write_cr0, 1040 1041 .write_cr4 = xen_write_cr4, 1042 1043 #ifdef CONFIG_X86_64 1044 .read_cr8 = xen_read_cr8, 1045 .write_cr8 = xen_write_cr8, 1046 #endif 1047 1048 .wbinvd = native_wbinvd, 1049 1050 .read_msr = xen_read_msr, 1051 .write_msr = xen_write_msr, 1052 1053 .read_msr_safe = xen_read_msr_safe, 1054 .write_msr_safe = xen_write_msr_safe, 1055 1056 .read_pmc = xen_read_pmc, 1057 1058 .iret = xen_iret, 1059 #ifdef CONFIG_X86_64 1060 .usergs_sysret64 = xen_sysret64, 1061 #endif 1062 1063 .load_tr_desc = paravirt_nop, 1064 .set_ldt = xen_set_ldt, 1065 .load_gdt = xen_load_gdt, 1066 .load_idt = xen_load_idt, 1067 .load_tls = xen_load_tls, 1068 #ifdef CONFIG_X86_64 1069 .load_gs_index = xen_load_gs_index, 1070 #endif 1071 1072 .alloc_ldt = xen_alloc_ldt, 1073 .free_ldt = xen_free_ldt, 1074 1075 .store_tr = xen_store_tr, 1076 1077 .write_ldt_entry = xen_write_ldt_entry, 1078 .write_gdt_entry = xen_write_gdt_entry, 1079 .write_idt_entry = xen_write_idt_entry, 1080 .load_sp0 = xen_load_sp0, 1081 1082 .set_iopl_mask = xen_set_iopl_mask, 1083 .io_delay = xen_io_delay, 1084 1085 /* Xen takes care of %gs when switching to usermode for us */ 1086 .swapgs = paravirt_nop, 1087 1088 .start_context_switch = paravirt_start_context_switch, 1089 .end_context_switch = xen_end_context_switch, 1090 }; 1091 1092 static void xen_restart(char *msg) 1093 { 1094 xen_reboot(SHUTDOWN_reboot); 1095 } 1096 1097 static void xen_machine_halt(void) 1098 { 1099 xen_reboot(SHUTDOWN_poweroff); 1100 } 1101 1102 static void xen_machine_power_off(void) 1103 { 1104 if (pm_power_off) 1105 pm_power_off(); 1106 xen_reboot(SHUTDOWN_poweroff); 1107 } 1108 1109 static void xen_crash_shutdown(struct pt_regs *regs) 1110 { 1111 xen_reboot(SHUTDOWN_crash); 1112 } 1113 1114 static const struct machine_ops xen_machine_ops __initconst = { 1115 .restart = xen_restart, 1116 .halt = xen_machine_halt, 1117 .power_off = xen_machine_power_off, 1118 .shutdown = xen_machine_halt, 1119 .crash_shutdown = xen_crash_shutdown, 1120 .emergency_restart = xen_emergency_restart, 1121 }; 1122 1123 static unsigned char xen_get_nmi_reason(void) 1124 { 1125 unsigned char reason = 0; 1126 1127 /* Construct a value which looks like it came from port 0x61. */ 1128 if (test_bit(_XEN_NMIREASON_io_error, 1129 &HYPERVISOR_shared_info->arch.nmi_reason)) 1130 reason |= NMI_REASON_IOCHK; 1131 if (test_bit(_XEN_NMIREASON_pci_serr, 1132 &HYPERVISOR_shared_info->arch.nmi_reason)) 1133 reason |= NMI_REASON_SERR; 1134 1135 return reason; 1136 } 1137 1138 static void __init xen_boot_params_init_edd(void) 1139 { 1140 #if IS_ENABLED(CONFIG_EDD) 1141 struct xen_platform_op op; 1142 struct edd_info *edd_info; 1143 u32 *mbr_signature; 1144 unsigned nr; 1145 int ret; 1146 1147 edd_info = boot_params.eddbuf; 1148 mbr_signature = boot_params.edd_mbr_sig_buffer; 1149 1150 op.cmd = XENPF_firmware_info; 1151 1152 op.u.firmware_info.type = XEN_FW_DISK_INFO; 1153 for (nr = 0; nr < EDDMAXNR; nr++) { 1154 struct edd_info *info = edd_info + nr; 1155 1156 op.u.firmware_info.index = nr; 1157 info->params.length = sizeof(info->params); 1158 set_xen_guest_handle(op.u.firmware_info.u.disk_info.edd_params, 1159 &info->params); 1160 ret = HYPERVISOR_platform_op(&op); 1161 if (ret) 1162 break; 1163 1164 #define C(x) info->x = op.u.firmware_info.u.disk_info.x 1165 C(device); 1166 C(version); 1167 C(interface_support); 1168 C(legacy_max_cylinder); 1169 C(legacy_max_head); 1170 C(legacy_sectors_per_track); 1171 #undef C 1172 } 1173 boot_params.eddbuf_entries = nr; 1174 1175 op.u.firmware_info.type = XEN_FW_DISK_MBR_SIGNATURE; 1176 for (nr = 0; nr < EDD_MBR_SIG_MAX; nr++) { 1177 op.u.firmware_info.index = nr; 1178 ret = HYPERVISOR_platform_op(&op); 1179 if (ret) 1180 break; 1181 mbr_signature[nr] = op.u.firmware_info.u.disk_mbr_signature.mbr_signature; 1182 } 1183 boot_params.edd_mbr_sig_buf_entries = nr; 1184 #endif 1185 } 1186 1187 /* 1188 * Set up the GDT and segment registers for -fstack-protector. Until 1189 * we do this, we have to be careful not to call any stack-protected 1190 * function, which is most of the kernel. 1191 */ 1192 static void xen_setup_gdt(int cpu) 1193 { 1194 pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry_boot; 1195 pv_cpu_ops.load_gdt = xen_load_gdt_boot; 1196 1197 setup_stack_canary_segment(0); 1198 switch_to_new_gdt(0); 1199 1200 pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry; 1201 pv_cpu_ops.load_gdt = xen_load_gdt; 1202 } 1203 1204 static void __init xen_dom0_set_legacy_features(void) 1205 { 1206 x86_platform.legacy.rtc = 1; 1207 } 1208 1209 /* First C function to be called on Xen boot */ 1210 asmlinkage __visible void __init xen_start_kernel(void) 1211 { 1212 struct physdev_set_iopl set_iopl; 1213 unsigned long initrd_start = 0; 1214 int rc; 1215 1216 if (!xen_start_info) 1217 return; 1218 1219 xen_domain_type = XEN_PV_DOMAIN; 1220 1221 xen_setup_features(); 1222 1223 xen_setup_machphys_mapping(); 1224 1225 /* Install Xen paravirt ops */ 1226 pv_info = xen_info; 1227 pv_init_ops.patch = paravirt_patch_default; 1228 pv_cpu_ops = xen_cpu_ops; 1229 1230 x86_platform.get_nmi_reason = xen_get_nmi_reason; 1231 1232 x86_init.resources.memory_setup = xen_memory_setup; 1233 x86_init.irqs.intr_mode_init = x86_init_noop; 1234 x86_init.oem.arch_setup = xen_arch_setup; 1235 x86_init.oem.banner = xen_banner; 1236 1237 /* 1238 * Set up some pagetable state before starting to set any ptes. 1239 */ 1240 1241 xen_init_mmu_ops(); 1242 1243 /* Prevent unwanted bits from being set in PTEs. */ 1244 __supported_pte_mask &= ~_PAGE_GLOBAL; 1245 1246 /* 1247 * Prevent page tables from being allocated in highmem, even 1248 * if CONFIG_HIGHPTE is enabled. 1249 */ 1250 __userpte_alloc_gfp &= ~__GFP_HIGHMEM; 1251 1252 /* Work out if we support NX */ 1253 x86_configure_nx(); 1254 1255 /* Get mfn list */ 1256 xen_build_dynamic_phys_to_machine(); 1257 1258 /* 1259 * Set up kernel GDT and segment registers, mainly so that 1260 * -fstack-protector code can be executed. 1261 */ 1262 xen_setup_gdt(0); 1263 1264 xen_init_irq_ops(); 1265 xen_init_capabilities(); 1266 1267 #ifdef CONFIG_X86_LOCAL_APIC 1268 /* 1269 * set up the basic apic ops. 1270 */ 1271 xen_init_apic(); 1272 #endif 1273 1274 if (xen_feature(XENFEAT_mmu_pt_update_preserve_ad)) { 1275 pv_mmu_ops.ptep_modify_prot_start = xen_ptep_modify_prot_start; 1276 pv_mmu_ops.ptep_modify_prot_commit = xen_ptep_modify_prot_commit; 1277 } 1278 1279 machine_ops = xen_machine_ops; 1280 1281 /* 1282 * The only reliable way to retain the initial address of the 1283 * percpu gdt_page is to remember it here, so we can go and 1284 * mark it RW later, when the initial percpu area is freed. 1285 */ 1286 xen_initial_gdt = &per_cpu(gdt_page, 0); 1287 1288 xen_smp_init(); 1289 1290 #ifdef CONFIG_ACPI_NUMA 1291 /* 1292 * The pages we from Xen are not related to machine pages, so 1293 * any NUMA information the kernel tries to get from ACPI will 1294 * be meaningless. Prevent it from trying. 1295 */ 1296 acpi_numa = -1; 1297 #endif 1298 /* Let's presume PV guests always boot on vCPU with id 0. */ 1299 per_cpu(xen_vcpu_id, 0) = 0; 1300 1301 /* 1302 * Setup xen_vcpu early because start_kernel needs it for 1303 * local_irq_disable(), irqs_disabled(). 1304 * 1305 * Don't do the full vcpu_info placement stuff until we have 1306 * the cpu_possible_mask and a non-dummy shared_info. 1307 */ 1308 xen_vcpu_info_reset(0); 1309 1310 WARN_ON(xen_cpuhp_setup(xen_cpu_up_prepare_pv, xen_cpu_dead_pv)); 1311 1312 local_irq_disable(); 1313 early_boot_irqs_disabled = true; 1314 1315 xen_raw_console_write("mapping kernel into physical memory\n"); 1316 xen_setup_kernel_pagetable((pgd_t *)xen_start_info->pt_base, 1317 xen_start_info->nr_pages); 1318 xen_reserve_special_pages(); 1319 1320 /* keep using Xen gdt for now; no urgent need to change it */ 1321 1322 #ifdef CONFIG_X86_32 1323 pv_info.kernel_rpl = 1; 1324 if (xen_feature(XENFEAT_supervisor_mode_kernel)) 1325 pv_info.kernel_rpl = 0; 1326 #else 1327 pv_info.kernel_rpl = 0; 1328 #endif 1329 /* set the limit of our address space */ 1330 xen_reserve_top(); 1331 1332 /* 1333 * We used to do this in xen_arch_setup, but that is too late 1334 * on AMD were early_cpu_init (run before ->arch_setup()) calls 1335 * early_amd_init which pokes 0xcf8 port. 1336 */ 1337 set_iopl.iopl = 1; 1338 rc = HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl); 1339 if (rc != 0) 1340 xen_raw_printk("physdev_op failed %d\n", rc); 1341 1342 #ifdef CONFIG_X86_32 1343 /* set up basic CPUID stuff */ 1344 cpu_detect(&new_cpu_data); 1345 set_cpu_cap(&new_cpu_data, X86_FEATURE_FPU); 1346 new_cpu_data.x86_capability[CPUID_1_EDX] = cpuid_edx(1); 1347 #endif 1348 1349 if (xen_start_info->mod_start) { 1350 if (xen_start_info->flags & SIF_MOD_START_PFN) 1351 initrd_start = PFN_PHYS(xen_start_info->mod_start); 1352 else 1353 initrd_start = __pa(xen_start_info->mod_start); 1354 } 1355 1356 /* Poke various useful things into boot_params */ 1357 boot_params.hdr.type_of_loader = (9 << 4) | 0; 1358 boot_params.hdr.ramdisk_image = initrd_start; 1359 boot_params.hdr.ramdisk_size = xen_start_info->mod_len; 1360 boot_params.hdr.cmd_line_ptr = __pa(xen_start_info->cmd_line); 1361 boot_params.hdr.hardware_subarch = X86_SUBARCH_XEN; 1362 1363 if (!xen_initial_domain()) { 1364 add_preferred_console("xenboot", 0, NULL); 1365 add_preferred_console("tty", 0, NULL); 1366 add_preferred_console("hvc", 0, NULL); 1367 if (pci_xen) 1368 x86_init.pci.arch_init = pci_xen_init; 1369 } else { 1370 const struct dom0_vga_console_info *info = 1371 (void *)((char *)xen_start_info + 1372 xen_start_info->console.dom0.info_off); 1373 struct xen_platform_op op = { 1374 .cmd = XENPF_firmware_info, 1375 .interface_version = XENPF_INTERFACE_VERSION, 1376 .u.firmware_info.type = XEN_FW_KBD_SHIFT_FLAGS, 1377 }; 1378 1379 x86_platform.set_legacy_features = 1380 xen_dom0_set_legacy_features; 1381 xen_init_vga(info, xen_start_info->console.dom0.info_size); 1382 xen_start_info->console.domU.mfn = 0; 1383 xen_start_info->console.domU.evtchn = 0; 1384 1385 if (HYPERVISOR_platform_op(&op) == 0) 1386 boot_params.kbd_status = op.u.firmware_info.u.kbd_shift_flags; 1387 1388 /* Make sure ACS will be enabled */ 1389 pci_request_acs(); 1390 1391 xen_acpi_sleep_register(); 1392 1393 /* Avoid searching for BIOS MP tables */ 1394 x86_init.mpparse.find_smp_config = x86_init_noop; 1395 x86_init.mpparse.get_smp_config = x86_init_uint_noop; 1396 1397 xen_boot_params_init_edd(); 1398 } 1399 #ifdef CONFIG_PCI 1400 /* PCI BIOS service won't work from a PV guest. */ 1401 pci_probe &= ~PCI_PROBE_BIOS; 1402 #endif 1403 xen_raw_console_write("about to get started...\n"); 1404 1405 /* We need this for printk timestamps */ 1406 xen_setup_runstate_info(0); 1407 1408 xen_efi_init(); 1409 1410 /* Start the world */ 1411 #ifdef CONFIG_X86_32 1412 i386_start_kernel(); 1413 #else 1414 cr4_init_shadow(); /* 32b kernel does this in i386_start_kernel() */ 1415 x86_64_start_reservations((char *)__pa_symbol(&boot_params)); 1416 #endif 1417 } 1418 1419 static int xen_cpu_up_prepare_pv(unsigned int cpu) 1420 { 1421 int rc; 1422 1423 if (per_cpu(xen_vcpu, cpu) == NULL) 1424 return -ENODEV; 1425 1426 xen_setup_timer(cpu); 1427 1428 rc = xen_smp_intr_init(cpu); 1429 if (rc) { 1430 WARN(1, "xen_smp_intr_init() for CPU %d failed: %d\n", 1431 cpu, rc); 1432 return rc; 1433 } 1434 1435 rc = xen_smp_intr_init_pv(cpu); 1436 if (rc) { 1437 WARN(1, "xen_smp_intr_init_pv() for CPU %d failed: %d\n", 1438 cpu, rc); 1439 return rc; 1440 } 1441 1442 return 0; 1443 } 1444 1445 static int xen_cpu_dead_pv(unsigned int cpu) 1446 { 1447 xen_smp_intr_free(cpu); 1448 xen_smp_intr_free_pv(cpu); 1449 1450 xen_teardown_timer(cpu); 1451 1452 return 0; 1453 } 1454 1455 static uint32_t __init xen_platform_pv(void) 1456 { 1457 if (xen_pv_domain()) 1458 return xen_cpuid_base(); 1459 1460 return 0; 1461 } 1462 1463 const __initconst struct hypervisor_x86 x86_hyper_xen_pv = { 1464 .name = "Xen PV", 1465 .detect = xen_platform_pv, 1466 .type = X86_HYPER_XEN_PV, 1467 .runtime.pin_vcpu = xen_pin_vcpu, 1468 }; 1469