1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Core of Xen paravirt_ops implementation. 4 * 5 * This file contains the xen_paravirt_ops structure itself, and the 6 * implementations for: 7 * - privileged instructions 8 * - interrupt flags 9 * - segment operations 10 * - booting and setup 11 * 12 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007 13 */ 14 15 #include <linux/cpu.h> 16 #include <linux/kernel.h> 17 #include <linux/init.h> 18 #include <linux/smp.h> 19 #include <linux/preempt.h> 20 #include <linux/hardirq.h> 21 #include <linux/percpu.h> 22 #include <linux/delay.h> 23 #include <linux/start_kernel.h> 24 #include <linux/sched.h> 25 #include <linux/kprobes.h> 26 #include <linux/memblock.h> 27 #include <linux/export.h> 28 #include <linux/mm.h> 29 #include <linux/page-flags.h> 30 #include <linux/pci.h> 31 #include <linux/gfp.h> 32 #include <linux/edd.h> 33 #include <linux/reboot.h> 34 35 #include <xen/xen.h> 36 #include <xen/events.h> 37 #include <xen/interface/xen.h> 38 #include <xen/interface/version.h> 39 #include <xen/interface/physdev.h> 40 #include <xen/interface/vcpu.h> 41 #include <xen/interface/memory.h> 42 #include <xen/interface/nmi.h> 43 #include <xen/interface/xen-mca.h> 44 #include <xen/features.h> 45 #include <xen/page.h> 46 #include <xen/hvc-console.h> 47 #include <xen/acpi.h> 48 49 #include <asm/paravirt.h> 50 #include <asm/apic.h> 51 #include <asm/page.h> 52 #include <asm/xen/pci.h> 53 #include <asm/xen/hypercall.h> 54 #include <asm/xen/hypervisor.h> 55 #include <asm/xen/cpuid.h> 56 #include <asm/fixmap.h> 57 #include <asm/processor.h> 58 #include <asm/proto.h> 59 #include <asm/msr-index.h> 60 #include <asm/traps.h> 61 #include <asm/setup.h> 62 #include <asm/desc.h> 63 #include <asm/pgalloc.h> 64 #include <asm/tlbflush.h> 65 #include <asm/reboot.h> 66 #include <asm/stackprotector.h> 67 #include <asm/hypervisor.h> 68 #include <asm/mach_traps.h> 69 #include <asm/mwait.h> 70 #include <asm/pci_x86.h> 71 #include <asm/cpu.h> 72 #ifdef CONFIG_X86_IOPL_IOPERM 73 #include <asm/io_bitmap.h> 74 #endif 75 76 #ifdef CONFIG_ACPI 77 #include <linux/acpi.h> 78 #include <asm/acpi.h> 79 #include <acpi/pdc_intel.h> 80 #include <acpi/processor.h> 81 #include <xen/interface/platform.h> 82 #endif 83 84 #include "xen-ops.h" 85 #include "mmu.h" 86 #include "smp.h" 87 #include "multicalls.h" 88 #include "pmu.h" 89 90 #include "../kernel/cpu/cpu.h" /* get_cpu_cap() */ 91 92 void *xen_initial_gdt; 93 94 static int xen_cpu_up_prepare_pv(unsigned int cpu); 95 static int xen_cpu_dead_pv(unsigned int cpu); 96 97 struct tls_descs { 98 struct desc_struct desc[3]; 99 }; 100 101 /* 102 * Updating the 3 TLS descriptors in the GDT on every task switch is 103 * surprisingly expensive so we avoid updating them if they haven't 104 * changed. Since Xen writes different descriptors than the one 105 * passed in the update_descriptor hypercall we keep shadow copies to 106 * compare against. 107 */ 108 static DEFINE_PER_CPU(struct tls_descs, shadow_tls_desc); 109 110 static void __init xen_pv_init_platform(void) 111 { 112 populate_extra_pte(fix_to_virt(FIX_PARAVIRT_BOOTMAP)); 113 114 set_fixmap(FIX_PARAVIRT_BOOTMAP, xen_start_info->shared_info); 115 HYPERVISOR_shared_info = (void *)fix_to_virt(FIX_PARAVIRT_BOOTMAP); 116 117 /* xen clock uses per-cpu vcpu_info, need to init it for boot cpu */ 118 xen_vcpu_info_reset(0); 119 120 /* pvclock is in shared info area */ 121 xen_init_time_ops(); 122 } 123 124 static void __init xen_pv_guest_late_init(void) 125 { 126 #ifndef CONFIG_SMP 127 /* Setup shared vcpu info for non-smp configurations */ 128 xen_setup_vcpu_info_placement(); 129 #endif 130 } 131 132 static __read_mostly unsigned int cpuid_leaf5_ecx_val; 133 static __read_mostly unsigned int cpuid_leaf5_edx_val; 134 135 static void xen_cpuid(unsigned int *ax, unsigned int *bx, 136 unsigned int *cx, unsigned int *dx) 137 { 138 unsigned maskebx = ~0; 139 140 /* 141 * Mask out inconvenient features, to try and disable as many 142 * unsupported kernel subsystems as possible. 143 */ 144 switch (*ax) { 145 case CPUID_MWAIT_LEAF: 146 /* Synthesize the values.. */ 147 *ax = 0; 148 *bx = 0; 149 *cx = cpuid_leaf5_ecx_val; 150 *dx = cpuid_leaf5_edx_val; 151 return; 152 153 case 0xb: 154 /* Suppress extended topology stuff */ 155 maskebx = 0; 156 break; 157 } 158 159 asm(XEN_EMULATE_PREFIX "cpuid" 160 : "=a" (*ax), 161 "=b" (*bx), 162 "=c" (*cx), 163 "=d" (*dx) 164 : "0" (*ax), "2" (*cx)); 165 166 *bx &= maskebx; 167 } 168 169 static bool __init xen_check_mwait(void) 170 { 171 #ifdef CONFIG_ACPI 172 struct xen_platform_op op = { 173 .cmd = XENPF_set_processor_pminfo, 174 .u.set_pminfo.id = -1, 175 .u.set_pminfo.type = XEN_PM_PDC, 176 }; 177 uint32_t buf[3]; 178 unsigned int ax, bx, cx, dx; 179 unsigned int mwait_mask; 180 181 /* We need to determine whether it is OK to expose the MWAIT 182 * capability to the kernel to harvest deeper than C3 states from ACPI 183 * _CST using the processor_harvest_xen.c module. For this to work, we 184 * need to gather the MWAIT_LEAF values (which the cstate.c code 185 * checks against). The hypervisor won't expose the MWAIT flag because 186 * it would break backwards compatibility; so we will find out directly 187 * from the hardware and hypercall. 188 */ 189 if (!xen_initial_domain()) 190 return false; 191 192 /* 193 * When running under platform earlier than Xen4.2, do not expose 194 * mwait, to avoid the risk of loading native acpi pad driver 195 */ 196 if (!xen_running_on_version_or_later(4, 2)) 197 return false; 198 199 ax = 1; 200 cx = 0; 201 202 native_cpuid(&ax, &bx, &cx, &dx); 203 204 mwait_mask = (1 << (X86_FEATURE_EST % 32)) | 205 (1 << (X86_FEATURE_MWAIT % 32)); 206 207 if ((cx & mwait_mask) != mwait_mask) 208 return false; 209 210 /* We need to emulate the MWAIT_LEAF and for that we need both 211 * ecx and edx. The hypercall provides only partial information. 212 */ 213 214 ax = CPUID_MWAIT_LEAF; 215 bx = 0; 216 cx = 0; 217 dx = 0; 218 219 native_cpuid(&ax, &bx, &cx, &dx); 220 221 /* Ask the Hypervisor whether to clear ACPI_PDC_C_C2C3_FFH. If so, 222 * don't expose MWAIT_LEAF and let ACPI pick the IOPORT version of C3. 223 */ 224 buf[0] = ACPI_PDC_REVISION_ID; 225 buf[1] = 1; 226 buf[2] = (ACPI_PDC_C_CAPABILITY_SMP | ACPI_PDC_EST_CAPABILITY_SWSMP); 227 228 set_xen_guest_handle(op.u.set_pminfo.pdc, buf); 229 230 if ((HYPERVISOR_platform_op(&op) == 0) && 231 (buf[2] & (ACPI_PDC_C_C1_FFH | ACPI_PDC_C_C2C3_FFH))) { 232 cpuid_leaf5_ecx_val = cx; 233 cpuid_leaf5_edx_val = dx; 234 } 235 return true; 236 #else 237 return false; 238 #endif 239 } 240 241 static bool __init xen_check_xsave(void) 242 { 243 unsigned int cx, xsave_mask; 244 245 cx = cpuid_ecx(1); 246 247 xsave_mask = (1 << (X86_FEATURE_XSAVE % 32)) | 248 (1 << (X86_FEATURE_OSXSAVE % 32)); 249 250 /* Xen will set CR4.OSXSAVE if supported and not disabled by force */ 251 return (cx & xsave_mask) == xsave_mask; 252 } 253 254 static void __init xen_init_capabilities(void) 255 { 256 setup_force_cpu_cap(X86_FEATURE_XENPV); 257 setup_clear_cpu_cap(X86_FEATURE_DCA); 258 setup_clear_cpu_cap(X86_FEATURE_APERFMPERF); 259 setup_clear_cpu_cap(X86_FEATURE_MTRR); 260 setup_clear_cpu_cap(X86_FEATURE_ACC); 261 setup_clear_cpu_cap(X86_FEATURE_X2APIC); 262 setup_clear_cpu_cap(X86_FEATURE_SME); 263 264 /* 265 * Xen PV would need some work to support PCID: CR3 handling as well 266 * as xen_flush_tlb_others() would need updating. 267 */ 268 setup_clear_cpu_cap(X86_FEATURE_PCID); 269 270 if (!xen_initial_domain()) 271 setup_clear_cpu_cap(X86_FEATURE_ACPI); 272 273 if (xen_check_mwait()) 274 setup_force_cpu_cap(X86_FEATURE_MWAIT); 275 else 276 setup_clear_cpu_cap(X86_FEATURE_MWAIT); 277 278 if (!xen_check_xsave()) { 279 setup_clear_cpu_cap(X86_FEATURE_XSAVE); 280 setup_clear_cpu_cap(X86_FEATURE_OSXSAVE); 281 } 282 } 283 284 static noinstr void xen_set_debugreg(int reg, unsigned long val) 285 { 286 HYPERVISOR_set_debugreg(reg, val); 287 } 288 289 static noinstr unsigned long xen_get_debugreg(int reg) 290 { 291 return HYPERVISOR_get_debugreg(reg); 292 } 293 294 static void xen_end_context_switch(struct task_struct *next) 295 { 296 xen_mc_flush(); 297 paravirt_end_context_switch(next); 298 } 299 300 static unsigned long xen_store_tr(void) 301 { 302 return 0; 303 } 304 305 /* 306 * Set the page permissions for a particular virtual address. If the 307 * address is a vmalloc mapping (or other non-linear mapping), then 308 * find the linear mapping of the page and also set its protections to 309 * match. 310 */ 311 static void set_aliased_prot(void *v, pgprot_t prot) 312 { 313 int level; 314 pte_t *ptep; 315 pte_t pte; 316 unsigned long pfn; 317 unsigned char dummy; 318 void *va; 319 320 ptep = lookup_address((unsigned long)v, &level); 321 BUG_ON(ptep == NULL); 322 323 pfn = pte_pfn(*ptep); 324 pte = pfn_pte(pfn, prot); 325 326 /* 327 * Careful: update_va_mapping() will fail if the virtual address 328 * we're poking isn't populated in the page tables. We don't 329 * need to worry about the direct map (that's always in the page 330 * tables), but we need to be careful about vmap space. In 331 * particular, the top level page table can lazily propagate 332 * entries between processes, so if we've switched mms since we 333 * vmapped the target in the first place, we might not have the 334 * top-level page table entry populated. 335 * 336 * We disable preemption because we want the same mm active when 337 * we probe the target and when we issue the hypercall. We'll 338 * have the same nominal mm, but if we're a kernel thread, lazy 339 * mm dropping could change our pgd. 340 * 341 * Out of an abundance of caution, this uses __get_user() to fault 342 * in the target address just in case there's some obscure case 343 * in which the target address isn't readable. 344 */ 345 346 preempt_disable(); 347 348 copy_from_kernel_nofault(&dummy, v, 1); 349 350 if (HYPERVISOR_update_va_mapping((unsigned long)v, pte, 0)) 351 BUG(); 352 353 va = __va(PFN_PHYS(pfn)); 354 355 if (va != v && HYPERVISOR_update_va_mapping((unsigned long)va, pte, 0)) 356 BUG(); 357 358 preempt_enable(); 359 } 360 361 static void xen_alloc_ldt(struct desc_struct *ldt, unsigned entries) 362 { 363 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE; 364 int i; 365 366 /* 367 * We need to mark the all aliases of the LDT pages RO. We 368 * don't need to call vm_flush_aliases(), though, since that's 369 * only responsible for flushing aliases out the TLBs, not the 370 * page tables, and Xen will flush the TLB for us if needed. 371 * 372 * To avoid confusing future readers: none of this is necessary 373 * to load the LDT. The hypervisor only checks this when the 374 * LDT is faulted in due to subsequent descriptor access. 375 */ 376 377 for (i = 0; i < entries; i += entries_per_page) 378 set_aliased_prot(ldt + i, PAGE_KERNEL_RO); 379 } 380 381 static void xen_free_ldt(struct desc_struct *ldt, unsigned entries) 382 { 383 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE; 384 int i; 385 386 for (i = 0; i < entries; i += entries_per_page) 387 set_aliased_prot(ldt + i, PAGE_KERNEL); 388 } 389 390 static void xen_set_ldt(const void *addr, unsigned entries) 391 { 392 struct mmuext_op *op; 393 struct multicall_space mcs = xen_mc_entry(sizeof(*op)); 394 395 trace_xen_cpu_set_ldt(addr, entries); 396 397 op = mcs.args; 398 op->cmd = MMUEXT_SET_LDT; 399 op->arg1.linear_addr = (unsigned long)addr; 400 op->arg2.nr_ents = entries; 401 402 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); 403 404 xen_mc_issue(PARAVIRT_LAZY_CPU); 405 } 406 407 static void xen_load_gdt(const struct desc_ptr *dtr) 408 { 409 unsigned long va = dtr->address; 410 unsigned int size = dtr->size + 1; 411 unsigned long pfn, mfn; 412 int level; 413 pte_t *ptep; 414 void *virt; 415 416 /* @size should be at most GDT_SIZE which is smaller than PAGE_SIZE. */ 417 BUG_ON(size > PAGE_SIZE); 418 BUG_ON(va & ~PAGE_MASK); 419 420 /* 421 * The GDT is per-cpu and is in the percpu data area. 422 * That can be virtually mapped, so we need to do a 423 * page-walk to get the underlying MFN for the 424 * hypercall. The page can also be in the kernel's 425 * linear range, so we need to RO that mapping too. 426 */ 427 ptep = lookup_address(va, &level); 428 BUG_ON(ptep == NULL); 429 430 pfn = pte_pfn(*ptep); 431 mfn = pfn_to_mfn(pfn); 432 virt = __va(PFN_PHYS(pfn)); 433 434 make_lowmem_page_readonly((void *)va); 435 make_lowmem_page_readonly(virt); 436 437 if (HYPERVISOR_set_gdt(&mfn, size / sizeof(struct desc_struct))) 438 BUG(); 439 } 440 441 /* 442 * load_gdt for early boot, when the gdt is only mapped once 443 */ 444 static void __init xen_load_gdt_boot(const struct desc_ptr *dtr) 445 { 446 unsigned long va = dtr->address; 447 unsigned int size = dtr->size + 1; 448 unsigned long pfn, mfn; 449 pte_t pte; 450 451 /* @size should be at most GDT_SIZE which is smaller than PAGE_SIZE. */ 452 BUG_ON(size > PAGE_SIZE); 453 BUG_ON(va & ~PAGE_MASK); 454 455 pfn = virt_to_pfn(va); 456 mfn = pfn_to_mfn(pfn); 457 458 pte = pfn_pte(pfn, PAGE_KERNEL_RO); 459 460 if (HYPERVISOR_update_va_mapping((unsigned long)va, pte, 0)) 461 BUG(); 462 463 if (HYPERVISOR_set_gdt(&mfn, size / sizeof(struct desc_struct))) 464 BUG(); 465 } 466 467 static inline bool desc_equal(const struct desc_struct *d1, 468 const struct desc_struct *d2) 469 { 470 return !memcmp(d1, d2, sizeof(*d1)); 471 } 472 473 static void load_TLS_descriptor(struct thread_struct *t, 474 unsigned int cpu, unsigned int i) 475 { 476 struct desc_struct *shadow = &per_cpu(shadow_tls_desc, cpu).desc[i]; 477 struct desc_struct *gdt; 478 xmaddr_t maddr; 479 struct multicall_space mc; 480 481 if (desc_equal(shadow, &t->tls_array[i])) 482 return; 483 484 *shadow = t->tls_array[i]; 485 486 gdt = get_cpu_gdt_rw(cpu); 487 maddr = arbitrary_virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]); 488 mc = __xen_mc_entry(0); 489 490 MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]); 491 } 492 493 static void xen_load_tls(struct thread_struct *t, unsigned int cpu) 494 { 495 /* 496 * In lazy mode we need to zero %fs, otherwise we may get an 497 * exception between the new %fs descriptor being loaded and 498 * %fs being effectively cleared at __switch_to(). 499 */ 500 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU) 501 loadsegment(fs, 0); 502 503 xen_mc_batch(); 504 505 load_TLS_descriptor(t, cpu, 0); 506 load_TLS_descriptor(t, cpu, 1); 507 load_TLS_descriptor(t, cpu, 2); 508 509 xen_mc_issue(PARAVIRT_LAZY_CPU); 510 } 511 512 static void xen_load_gs_index(unsigned int idx) 513 { 514 if (HYPERVISOR_set_segment_base(SEGBASE_GS_USER_SEL, idx)) 515 BUG(); 516 } 517 518 static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum, 519 const void *ptr) 520 { 521 xmaddr_t mach_lp = arbitrary_virt_to_machine(&dt[entrynum]); 522 u64 entry = *(u64 *)ptr; 523 524 trace_xen_cpu_write_ldt_entry(dt, entrynum, entry); 525 526 preempt_disable(); 527 528 xen_mc_flush(); 529 if (HYPERVISOR_update_descriptor(mach_lp.maddr, entry)) 530 BUG(); 531 532 preempt_enable(); 533 } 534 535 void noist_exc_debug(struct pt_regs *regs); 536 537 DEFINE_IDTENTRY_RAW(xenpv_exc_nmi) 538 { 539 /* On Xen PV, NMI doesn't use IST. The C part is the same as native. */ 540 exc_nmi(regs); 541 } 542 543 DEFINE_IDTENTRY_RAW_ERRORCODE(xenpv_exc_double_fault) 544 { 545 /* On Xen PV, DF doesn't use IST. The C part is the same as native. */ 546 exc_double_fault(regs, error_code); 547 } 548 549 DEFINE_IDTENTRY_RAW(xenpv_exc_debug) 550 { 551 /* 552 * There's no IST on Xen PV, but we still need to dispatch 553 * to the correct handler. 554 */ 555 if (user_mode(regs)) 556 noist_exc_debug(regs); 557 else 558 exc_debug(regs); 559 } 560 561 DEFINE_IDTENTRY_RAW(exc_xen_unknown_trap) 562 { 563 /* This should never happen and there is no way to handle it. */ 564 instrumentation_begin(); 565 pr_err("Unknown trap in Xen PV mode."); 566 BUG(); 567 instrumentation_end(); 568 } 569 570 #ifdef CONFIG_X86_MCE 571 DEFINE_IDTENTRY_RAW(xenpv_exc_machine_check) 572 { 573 /* 574 * There's no IST on Xen PV, but we still need to dispatch 575 * to the correct handler. 576 */ 577 if (user_mode(regs)) 578 noist_exc_machine_check(regs); 579 else 580 exc_machine_check(regs); 581 } 582 #endif 583 584 struct trap_array_entry { 585 void (*orig)(void); 586 void (*xen)(void); 587 bool ist_okay; 588 }; 589 590 #define TRAP_ENTRY(func, ist_ok) { \ 591 .orig = asm_##func, \ 592 .xen = xen_asm_##func, \ 593 .ist_okay = ist_ok } 594 595 #define TRAP_ENTRY_REDIR(func, ist_ok) { \ 596 .orig = asm_##func, \ 597 .xen = xen_asm_xenpv_##func, \ 598 .ist_okay = ist_ok } 599 600 static struct trap_array_entry trap_array[] = { 601 TRAP_ENTRY_REDIR(exc_debug, true ), 602 TRAP_ENTRY_REDIR(exc_double_fault, true ), 603 #ifdef CONFIG_X86_MCE 604 TRAP_ENTRY_REDIR(exc_machine_check, true ), 605 #endif 606 TRAP_ENTRY_REDIR(exc_nmi, true ), 607 TRAP_ENTRY(exc_int3, false ), 608 TRAP_ENTRY(exc_overflow, false ), 609 #ifdef CONFIG_IA32_EMULATION 610 { entry_INT80_compat, xen_entry_INT80_compat, false }, 611 #endif 612 TRAP_ENTRY(exc_page_fault, false ), 613 TRAP_ENTRY(exc_divide_error, false ), 614 TRAP_ENTRY(exc_bounds, false ), 615 TRAP_ENTRY(exc_invalid_op, false ), 616 TRAP_ENTRY(exc_device_not_available, false ), 617 TRAP_ENTRY(exc_coproc_segment_overrun, false ), 618 TRAP_ENTRY(exc_invalid_tss, false ), 619 TRAP_ENTRY(exc_segment_not_present, false ), 620 TRAP_ENTRY(exc_stack_segment, false ), 621 TRAP_ENTRY(exc_general_protection, false ), 622 TRAP_ENTRY(exc_spurious_interrupt_bug, false ), 623 TRAP_ENTRY(exc_coprocessor_error, false ), 624 TRAP_ENTRY(exc_alignment_check, false ), 625 TRAP_ENTRY(exc_simd_coprocessor_error, false ), 626 #ifdef CONFIG_X86_KERNEL_IBT 627 TRAP_ENTRY(exc_control_protection, false ), 628 #endif 629 }; 630 631 static bool __ref get_trap_addr(void **addr, unsigned int ist) 632 { 633 unsigned int nr; 634 bool ist_okay = false; 635 bool found = false; 636 637 /* 638 * Replace trap handler addresses by Xen specific ones. 639 * Check for known traps using IST and whitelist them. 640 * The debugger ones are the only ones we care about. 641 * Xen will handle faults like double_fault, so we should never see 642 * them. Warn if there's an unexpected IST-using fault handler. 643 */ 644 for (nr = 0; nr < ARRAY_SIZE(trap_array); nr++) { 645 struct trap_array_entry *entry = trap_array + nr; 646 647 if (*addr == entry->orig) { 648 *addr = entry->xen; 649 ist_okay = entry->ist_okay; 650 found = true; 651 break; 652 } 653 } 654 655 if (nr == ARRAY_SIZE(trap_array) && 656 *addr >= (void *)early_idt_handler_array[0] && 657 *addr < (void *)early_idt_handler_array[NUM_EXCEPTION_VECTORS]) { 658 nr = (*addr - (void *)early_idt_handler_array[0]) / 659 EARLY_IDT_HANDLER_SIZE; 660 *addr = (void *)xen_early_idt_handler_array[nr]; 661 found = true; 662 } 663 664 if (!found) 665 *addr = (void *)xen_asm_exc_xen_unknown_trap; 666 667 if (WARN_ON(found && ist != 0 && !ist_okay)) 668 return false; 669 670 return true; 671 } 672 673 static int cvt_gate_to_trap(int vector, const gate_desc *val, 674 struct trap_info *info) 675 { 676 unsigned long addr; 677 678 if (val->bits.type != GATE_TRAP && val->bits.type != GATE_INTERRUPT) 679 return 0; 680 681 info->vector = vector; 682 683 addr = gate_offset(val); 684 if (!get_trap_addr((void **)&addr, val->bits.ist)) 685 return 0; 686 info->address = addr; 687 688 info->cs = gate_segment(val); 689 info->flags = val->bits.dpl; 690 /* interrupt gates clear IF */ 691 if (val->bits.type == GATE_INTERRUPT) 692 info->flags |= 1 << 2; 693 694 return 1; 695 } 696 697 /* Locations of each CPU's IDT */ 698 static DEFINE_PER_CPU(struct desc_ptr, idt_desc); 699 700 /* Set an IDT entry. If the entry is part of the current IDT, then 701 also update Xen. */ 702 static void xen_write_idt_entry(gate_desc *dt, int entrynum, const gate_desc *g) 703 { 704 unsigned long p = (unsigned long)&dt[entrynum]; 705 unsigned long start, end; 706 707 trace_xen_cpu_write_idt_entry(dt, entrynum, g); 708 709 preempt_disable(); 710 711 start = __this_cpu_read(idt_desc.address); 712 end = start + __this_cpu_read(idt_desc.size) + 1; 713 714 xen_mc_flush(); 715 716 native_write_idt_entry(dt, entrynum, g); 717 718 if (p >= start && (p + 8) <= end) { 719 struct trap_info info[2]; 720 721 info[1].address = 0; 722 723 if (cvt_gate_to_trap(entrynum, g, &info[0])) 724 if (HYPERVISOR_set_trap_table(info)) 725 BUG(); 726 } 727 728 preempt_enable(); 729 } 730 731 static unsigned xen_convert_trap_info(const struct desc_ptr *desc, 732 struct trap_info *traps, bool full) 733 { 734 unsigned in, out, count; 735 736 count = (desc->size+1) / sizeof(gate_desc); 737 BUG_ON(count > 256); 738 739 for (in = out = 0; in < count; in++) { 740 gate_desc *entry = (gate_desc *)(desc->address) + in; 741 742 if (cvt_gate_to_trap(in, entry, &traps[out]) || full) 743 out++; 744 } 745 746 return out; 747 } 748 749 void xen_copy_trap_info(struct trap_info *traps) 750 { 751 const struct desc_ptr *desc = this_cpu_ptr(&idt_desc); 752 753 xen_convert_trap_info(desc, traps, true); 754 } 755 756 /* Load a new IDT into Xen. In principle this can be per-CPU, so we 757 hold a spinlock to protect the static traps[] array (static because 758 it avoids allocation, and saves stack space). */ 759 static void xen_load_idt(const struct desc_ptr *desc) 760 { 761 static DEFINE_SPINLOCK(lock); 762 static struct trap_info traps[257]; 763 unsigned out; 764 765 trace_xen_cpu_load_idt(desc); 766 767 spin_lock(&lock); 768 769 memcpy(this_cpu_ptr(&idt_desc), desc, sizeof(idt_desc)); 770 771 out = xen_convert_trap_info(desc, traps, false); 772 memset(&traps[out], 0, sizeof(traps[0])); 773 774 xen_mc_flush(); 775 if (HYPERVISOR_set_trap_table(traps)) 776 BUG(); 777 778 spin_unlock(&lock); 779 } 780 781 /* Write a GDT descriptor entry. Ignore LDT descriptors, since 782 they're handled differently. */ 783 static void xen_write_gdt_entry(struct desc_struct *dt, int entry, 784 const void *desc, int type) 785 { 786 trace_xen_cpu_write_gdt_entry(dt, entry, desc, type); 787 788 preempt_disable(); 789 790 switch (type) { 791 case DESC_LDT: 792 case DESC_TSS: 793 /* ignore */ 794 break; 795 796 default: { 797 xmaddr_t maddr = arbitrary_virt_to_machine(&dt[entry]); 798 799 xen_mc_flush(); 800 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc)) 801 BUG(); 802 } 803 804 } 805 806 preempt_enable(); 807 } 808 809 /* 810 * Version of write_gdt_entry for use at early boot-time needed to 811 * update an entry as simply as possible. 812 */ 813 static void __init xen_write_gdt_entry_boot(struct desc_struct *dt, int entry, 814 const void *desc, int type) 815 { 816 trace_xen_cpu_write_gdt_entry(dt, entry, desc, type); 817 818 switch (type) { 819 case DESC_LDT: 820 case DESC_TSS: 821 /* ignore */ 822 break; 823 824 default: { 825 xmaddr_t maddr = virt_to_machine(&dt[entry]); 826 827 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc)) 828 dt[entry] = *(struct desc_struct *)desc; 829 } 830 831 } 832 } 833 834 static void xen_load_sp0(unsigned long sp0) 835 { 836 struct multicall_space mcs; 837 838 mcs = xen_mc_entry(0); 839 MULTI_stack_switch(mcs.mc, __KERNEL_DS, sp0); 840 xen_mc_issue(PARAVIRT_LAZY_CPU); 841 this_cpu_write(cpu_tss_rw.x86_tss.sp0, sp0); 842 } 843 844 #ifdef CONFIG_X86_IOPL_IOPERM 845 static void xen_invalidate_io_bitmap(void) 846 { 847 struct physdev_set_iobitmap iobitmap = { 848 .bitmap = NULL, 849 .nr_ports = 0, 850 }; 851 852 native_tss_invalidate_io_bitmap(); 853 HYPERVISOR_physdev_op(PHYSDEVOP_set_iobitmap, &iobitmap); 854 } 855 856 static void xen_update_io_bitmap(void) 857 { 858 struct physdev_set_iobitmap iobitmap; 859 struct tss_struct *tss = this_cpu_ptr(&cpu_tss_rw); 860 861 native_tss_update_io_bitmap(); 862 863 iobitmap.bitmap = (uint8_t *)(&tss->x86_tss) + 864 tss->x86_tss.io_bitmap_base; 865 if (tss->x86_tss.io_bitmap_base == IO_BITMAP_OFFSET_INVALID) 866 iobitmap.nr_ports = 0; 867 else 868 iobitmap.nr_ports = IO_BITMAP_BITS; 869 870 HYPERVISOR_physdev_op(PHYSDEVOP_set_iobitmap, &iobitmap); 871 } 872 #endif 873 874 static void xen_io_delay(void) 875 { 876 } 877 878 static DEFINE_PER_CPU(unsigned long, xen_cr0_value); 879 880 static unsigned long xen_read_cr0(void) 881 { 882 unsigned long cr0 = this_cpu_read(xen_cr0_value); 883 884 if (unlikely(cr0 == 0)) { 885 cr0 = native_read_cr0(); 886 this_cpu_write(xen_cr0_value, cr0); 887 } 888 889 return cr0; 890 } 891 892 static void xen_write_cr0(unsigned long cr0) 893 { 894 struct multicall_space mcs; 895 896 this_cpu_write(xen_cr0_value, cr0); 897 898 /* Only pay attention to cr0.TS; everything else is 899 ignored. */ 900 mcs = xen_mc_entry(0); 901 902 MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0); 903 904 xen_mc_issue(PARAVIRT_LAZY_CPU); 905 } 906 907 static void xen_write_cr4(unsigned long cr4) 908 { 909 cr4 &= ~(X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PCE); 910 911 native_write_cr4(cr4); 912 } 913 914 static u64 xen_read_msr_safe(unsigned int msr, int *err) 915 { 916 u64 val; 917 918 if (pmu_msr_read(msr, &val, err)) 919 return val; 920 921 val = native_read_msr_safe(msr, err); 922 switch (msr) { 923 case MSR_IA32_APICBASE: 924 val &= ~X2APIC_ENABLE; 925 break; 926 } 927 return val; 928 } 929 930 static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high) 931 { 932 int ret; 933 unsigned int which; 934 u64 base; 935 936 ret = 0; 937 938 switch (msr) { 939 case MSR_FS_BASE: which = SEGBASE_FS; goto set; 940 case MSR_KERNEL_GS_BASE: which = SEGBASE_GS_USER; goto set; 941 case MSR_GS_BASE: which = SEGBASE_GS_KERNEL; goto set; 942 943 set: 944 base = ((u64)high << 32) | low; 945 if (HYPERVISOR_set_segment_base(which, base) != 0) 946 ret = -EIO; 947 break; 948 949 case MSR_STAR: 950 case MSR_CSTAR: 951 case MSR_LSTAR: 952 case MSR_SYSCALL_MASK: 953 case MSR_IA32_SYSENTER_CS: 954 case MSR_IA32_SYSENTER_ESP: 955 case MSR_IA32_SYSENTER_EIP: 956 /* Fast syscall setup is all done in hypercalls, so 957 these are all ignored. Stub them out here to stop 958 Xen console noise. */ 959 break; 960 961 default: 962 if (!pmu_msr_write(msr, low, high, &ret)) 963 ret = native_write_msr_safe(msr, low, high); 964 } 965 966 return ret; 967 } 968 969 static u64 xen_read_msr(unsigned int msr) 970 { 971 /* 972 * This will silently swallow a #GP from RDMSR. It may be worth 973 * changing that. 974 */ 975 int err; 976 977 return xen_read_msr_safe(msr, &err); 978 } 979 980 static void xen_write_msr(unsigned int msr, unsigned low, unsigned high) 981 { 982 /* 983 * This will silently swallow a #GP from WRMSR. It may be worth 984 * changing that. 985 */ 986 xen_write_msr_safe(msr, low, high); 987 } 988 989 /* This is called once we have the cpu_possible_mask */ 990 void __init xen_setup_vcpu_info_placement(void) 991 { 992 int cpu; 993 994 for_each_possible_cpu(cpu) { 995 /* Set up direct vCPU id mapping for PV guests. */ 996 per_cpu(xen_vcpu_id, cpu) = cpu; 997 xen_vcpu_setup(cpu); 998 } 999 1000 pv_ops.irq.save_fl = __PV_IS_CALLEE_SAVE(xen_save_fl_direct); 1001 pv_ops.irq.irq_disable = __PV_IS_CALLEE_SAVE(xen_irq_disable_direct); 1002 pv_ops.irq.irq_enable = __PV_IS_CALLEE_SAVE(xen_irq_enable_direct); 1003 pv_ops.mmu.read_cr2 = __PV_IS_CALLEE_SAVE(xen_read_cr2_direct); 1004 } 1005 1006 static const struct pv_info xen_info __initconst = { 1007 .extra_user_64bit_cs = FLAT_USER_CS64, 1008 .name = "Xen", 1009 }; 1010 1011 static const typeof(pv_ops) xen_cpu_ops __initconst = { 1012 .cpu = { 1013 .cpuid = xen_cpuid, 1014 1015 .set_debugreg = xen_set_debugreg, 1016 .get_debugreg = xen_get_debugreg, 1017 1018 .read_cr0 = xen_read_cr0, 1019 .write_cr0 = xen_write_cr0, 1020 1021 .write_cr4 = xen_write_cr4, 1022 1023 .wbinvd = native_wbinvd, 1024 1025 .read_msr = xen_read_msr, 1026 .write_msr = xen_write_msr, 1027 1028 .read_msr_safe = xen_read_msr_safe, 1029 .write_msr_safe = xen_write_msr_safe, 1030 1031 .read_pmc = xen_read_pmc, 1032 1033 .load_tr_desc = paravirt_nop, 1034 .set_ldt = xen_set_ldt, 1035 .load_gdt = xen_load_gdt, 1036 .load_idt = xen_load_idt, 1037 .load_tls = xen_load_tls, 1038 .load_gs_index = xen_load_gs_index, 1039 1040 .alloc_ldt = xen_alloc_ldt, 1041 .free_ldt = xen_free_ldt, 1042 1043 .store_tr = xen_store_tr, 1044 1045 .write_ldt_entry = xen_write_ldt_entry, 1046 .write_gdt_entry = xen_write_gdt_entry, 1047 .write_idt_entry = xen_write_idt_entry, 1048 .load_sp0 = xen_load_sp0, 1049 1050 #ifdef CONFIG_X86_IOPL_IOPERM 1051 .invalidate_io_bitmap = xen_invalidate_io_bitmap, 1052 .update_io_bitmap = xen_update_io_bitmap, 1053 #endif 1054 .io_delay = xen_io_delay, 1055 1056 .start_context_switch = paravirt_start_context_switch, 1057 .end_context_switch = xen_end_context_switch, 1058 }, 1059 }; 1060 1061 static void xen_restart(char *msg) 1062 { 1063 xen_reboot(SHUTDOWN_reboot); 1064 } 1065 1066 static void xen_machine_halt(void) 1067 { 1068 xen_reboot(SHUTDOWN_poweroff); 1069 } 1070 1071 static void xen_machine_power_off(void) 1072 { 1073 do_kernel_power_off(); 1074 xen_reboot(SHUTDOWN_poweroff); 1075 } 1076 1077 static void xen_crash_shutdown(struct pt_regs *regs) 1078 { 1079 xen_reboot(SHUTDOWN_crash); 1080 } 1081 1082 static const struct machine_ops xen_machine_ops __initconst = { 1083 .restart = xen_restart, 1084 .halt = xen_machine_halt, 1085 .power_off = xen_machine_power_off, 1086 .shutdown = xen_machine_halt, 1087 .crash_shutdown = xen_crash_shutdown, 1088 .emergency_restart = xen_emergency_restart, 1089 }; 1090 1091 static unsigned char xen_get_nmi_reason(void) 1092 { 1093 unsigned char reason = 0; 1094 1095 /* Construct a value which looks like it came from port 0x61. */ 1096 if (test_bit(_XEN_NMIREASON_io_error, 1097 &HYPERVISOR_shared_info->arch.nmi_reason)) 1098 reason |= NMI_REASON_IOCHK; 1099 if (test_bit(_XEN_NMIREASON_pci_serr, 1100 &HYPERVISOR_shared_info->arch.nmi_reason)) 1101 reason |= NMI_REASON_SERR; 1102 1103 return reason; 1104 } 1105 1106 static void __init xen_boot_params_init_edd(void) 1107 { 1108 #if IS_ENABLED(CONFIG_EDD) 1109 struct xen_platform_op op; 1110 struct edd_info *edd_info; 1111 u32 *mbr_signature; 1112 unsigned nr; 1113 int ret; 1114 1115 edd_info = boot_params.eddbuf; 1116 mbr_signature = boot_params.edd_mbr_sig_buffer; 1117 1118 op.cmd = XENPF_firmware_info; 1119 1120 op.u.firmware_info.type = XEN_FW_DISK_INFO; 1121 for (nr = 0; nr < EDDMAXNR; nr++) { 1122 struct edd_info *info = edd_info + nr; 1123 1124 op.u.firmware_info.index = nr; 1125 info->params.length = sizeof(info->params); 1126 set_xen_guest_handle(op.u.firmware_info.u.disk_info.edd_params, 1127 &info->params); 1128 ret = HYPERVISOR_platform_op(&op); 1129 if (ret) 1130 break; 1131 1132 #define C(x) info->x = op.u.firmware_info.u.disk_info.x 1133 C(device); 1134 C(version); 1135 C(interface_support); 1136 C(legacy_max_cylinder); 1137 C(legacy_max_head); 1138 C(legacy_sectors_per_track); 1139 #undef C 1140 } 1141 boot_params.eddbuf_entries = nr; 1142 1143 op.u.firmware_info.type = XEN_FW_DISK_MBR_SIGNATURE; 1144 for (nr = 0; nr < EDD_MBR_SIG_MAX; nr++) { 1145 op.u.firmware_info.index = nr; 1146 ret = HYPERVISOR_platform_op(&op); 1147 if (ret) 1148 break; 1149 mbr_signature[nr] = op.u.firmware_info.u.disk_mbr_signature.mbr_signature; 1150 } 1151 boot_params.edd_mbr_sig_buf_entries = nr; 1152 #endif 1153 } 1154 1155 /* 1156 * Set up the GDT and segment registers for -fstack-protector. Until 1157 * we do this, we have to be careful not to call any stack-protected 1158 * function, which is most of the kernel. 1159 */ 1160 static void __init xen_setup_gdt(int cpu) 1161 { 1162 pv_ops.cpu.write_gdt_entry = xen_write_gdt_entry_boot; 1163 pv_ops.cpu.load_gdt = xen_load_gdt_boot; 1164 1165 switch_to_new_gdt(cpu); 1166 1167 pv_ops.cpu.write_gdt_entry = xen_write_gdt_entry; 1168 pv_ops.cpu.load_gdt = xen_load_gdt; 1169 } 1170 1171 static void __init xen_dom0_set_legacy_features(void) 1172 { 1173 x86_platform.legacy.rtc = 1; 1174 } 1175 1176 static void __init xen_domu_set_legacy_features(void) 1177 { 1178 x86_platform.legacy.rtc = 0; 1179 } 1180 1181 extern void early_xen_iret_patch(void); 1182 1183 /* First C function to be called on Xen boot */ 1184 asmlinkage __visible void __init xen_start_kernel(void) 1185 { 1186 struct physdev_set_iopl set_iopl; 1187 unsigned long initrd_start = 0; 1188 int rc; 1189 1190 if (!xen_start_info) 1191 return; 1192 1193 __text_gen_insn(&early_xen_iret_patch, 1194 JMP32_INSN_OPCODE, &early_xen_iret_patch, &xen_iret, 1195 JMP32_INSN_SIZE); 1196 1197 xen_domain_type = XEN_PV_DOMAIN; 1198 xen_start_flags = xen_start_info->flags; 1199 1200 xen_setup_features(); 1201 1202 /* Install Xen paravirt ops */ 1203 pv_info = xen_info; 1204 pv_ops.cpu = xen_cpu_ops.cpu; 1205 xen_init_irq_ops(); 1206 1207 /* 1208 * Setup xen_vcpu early because it is needed for 1209 * local_irq_disable(), irqs_disabled(), e.g. in printk(). 1210 * 1211 * Don't do the full vcpu_info placement stuff until we have 1212 * the cpu_possible_mask and a non-dummy shared_info. 1213 */ 1214 xen_vcpu_info_reset(0); 1215 1216 x86_platform.get_nmi_reason = xen_get_nmi_reason; 1217 1218 x86_init.resources.memory_setup = xen_memory_setup; 1219 x86_init.irqs.intr_mode_select = x86_init_noop; 1220 x86_init.irqs.intr_mode_init = x86_init_noop; 1221 x86_init.oem.arch_setup = xen_arch_setup; 1222 x86_init.oem.banner = xen_banner; 1223 x86_init.hyper.init_platform = xen_pv_init_platform; 1224 x86_init.hyper.guest_late_init = xen_pv_guest_late_init; 1225 1226 /* 1227 * Set up some pagetable state before starting to set any ptes. 1228 */ 1229 1230 xen_setup_machphys_mapping(); 1231 xen_init_mmu_ops(); 1232 1233 /* Prevent unwanted bits from being set in PTEs. */ 1234 __supported_pte_mask &= ~_PAGE_GLOBAL; 1235 __default_kernel_pte_mask &= ~_PAGE_GLOBAL; 1236 1237 /* Get mfn list */ 1238 xen_build_dynamic_phys_to_machine(); 1239 1240 /* Work out if we support NX */ 1241 get_cpu_cap(&boot_cpu_data); 1242 x86_configure_nx(); 1243 1244 /* 1245 * Set up kernel GDT and segment registers, mainly so that 1246 * -fstack-protector code can be executed. 1247 */ 1248 xen_setup_gdt(0); 1249 1250 /* Determine virtual and physical address sizes */ 1251 get_cpu_address_sizes(&boot_cpu_data); 1252 1253 /* Let's presume PV guests always boot on vCPU with id 0. */ 1254 per_cpu(xen_vcpu_id, 0) = 0; 1255 1256 idt_setup_early_handler(); 1257 1258 xen_init_capabilities(); 1259 1260 #ifdef CONFIG_X86_LOCAL_APIC 1261 /* 1262 * set up the basic apic ops. 1263 */ 1264 xen_init_apic(); 1265 #endif 1266 1267 machine_ops = xen_machine_ops; 1268 1269 /* 1270 * The only reliable way to retain the initial address of the 1271 * percpu gdt_page is to remember it here, so we can go and 1272 * mark it RW later, when the initial percpu area is freed. 1273 */ 1274 xen_initial_gdt = &per_cpu(gdt_page, 0); 1275 1276 xen_smp_init(); 1277 1278 #ifdef CONFIG_ACPI_NUMA 1279 /* 1280 * The pages we from Xen are not related to machine pages, so 1281 * any NUMA information the kernel tries to get from ACPI will 1282 * be meaningless. Prevent it from trying. 1283 */ 1284 disable_srat(); 1285 #endif 1286 WARN_ON(xen_cpuhp_setup(xen_cpu_up_prepare_pv, xen_cpu_dead_pv)); 1287 1288 local_irq_disable(); 1289 early_boot_irqs_disabled = true; 1290 1291 xen_raw_console_write("mapping kernel into physical memory\n"); 1292 xen_setup_kernel_pagetable((pgd_t *)xen_start_info->pt_base, 1293 xen_start_info->nr_pages); 1294 xen_reserve_special_pages(); 1295 1296 /* 1297 * We used to do this in xen_arch_setup, but that is too late 1298 * on AMD were early_cpu_init (run before ->arch_setup()) calls 1299 * early_amd_init which pokes 0xcf8 port. 1300 */ 1301 set_iopl.iopl = 1; 1302 rc = HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl); 1303 if (rc != 0) 1304 xen_raw_printk("physdev_op failed %d\n", rc); 1305 1306 1307 if (xen_start_info->mod_start) { 1308 if (xen_start_info->flags & SIF_MOD_START_PFN) 1309 initrd_start = PFN_PHYS(xen_start_info->mod_start); 1310 else 1311 initrd_start = __pa(xen_start_info->mod_start); 1312 } 1313 1314 /* Poke various useful things into boot_params */ 1315 boot_params.hdr.type_of_loader = (9 << 4) | 0; 1316 boot_params.hdr.ramdisk_image = initrd_start; 1317 boot_params.hdr.ramdisk_size = xen_start_info->mod_len; 1318 boot_params.hdr.cmd_line_ptr = __pa(xen_start_info->cmd_line); 1319 boot_params.hdr.hardware_subarch = X86_SUBARCH_XEN; 1320 1321 if (!xen_initial_domain()) { 1322 if (pci_xen) 1323 x86_init.pci.arch_init = pci_xen_init; 1324 x86_platform.set_legacy_features = 1325 xen_domu_set_legacy_features; 1326 } else { 1327 const struct dom0_vga_console_info *info = 1328 (void *)((char *)xen_start_info + 1329 xen_start_info->console.dom0.info_off); 1330 struct xen_platform_op op = { 1331 .cmd = XENPF_firmware_info, 1332 .interface_version = XENPF_INTERFACE_VERSION, 1333 .u.firmware_info.type = XEN_FW_KBD_SHIFT_FLAGS, 1334 }; 1335 1336 x86_platform.set_legacy_features = 1337 xen_dom0_set_legacy_features; 1338 xen_init_vga(info, xen_start_info->console.dom0.info_size); 1339 xen_start_info->console.domU.mfn = 0; 1340 xen_start_info->console.domU.evtchn = 0; 1341 1342 if (HYPERVISOR_platform_op(&op) == 0) 1343 boot_params.kbd_status = op.u.firmware_info.u.kbd_shift_flags; 1344 1345 /* Make sure ACS will be enabled */ 1346 pci_request_acs(); 1347 1348 xen_acpi_sleep_register(); 1349 1350 xen_boot_params_init_edd(); 1351 1352 #ifdef CONFIG_ACPI 1353 /* 1354 * Disable selecting "Firmware First mode" for correctable 1355 * memory errors, as this is the duty of the hypervisor to 1356 * decide. 1357 */ 1358 acpi_disable_cmcff = 1; 1359 #endif 1360 } 1361 1362 xen_add_preferred_consoles(); 1363 1364 #ifdef CONFIG_PCI 1365 /* PCI BIOS service won't work from a PV guest. */ 1366 pci_probe &= ~PCI_PROBE_BIOS; 1367 #endif 1368 xen_raw_console_write("about to get started...\n"); 1369 1370 /* We need this for printk timestamps */ 1371 xen_setup_runstate_info(0); 1372 1373 xen_efi_init(&boot_params); 1374 1375 /* Start the world */ 1376 cr4_init_shadow(); /* 32b kernel does this in i386_start_kernel() */ 1377 x86_64_start_reservations((char *)__pa_symbol(&boot_params)); 1378 } 1379 1380 static int xen_cpu_up_prepare_pv(unsigned int cpu) 1381 { 1382 int rc; 1383 1384 if (per_cpu(xen_vcpu, cpu) == NULL) 1385 return -ENODEV; 1386 1387 xen_setup_timer(cpu); 1388 1389 rc = xen_smp_intr_init(cpu); 1390 if (rc) { 1391 WARN(1, "xen_smp_intr_init() for CPU %d failed: %d\n", 1392 cpu, rc); 1393 return rc; 1394 } 1395 1396 rc = xen_smp_intr_init_pv(cpu); 1397 if (rc) { 1398 WARN(1, "xen_smp_intr_init_pv() for CPU %d failed: %d\n", 1399 cpu, rc); 1400 return rc; 1401 } 1402 1403 return 0; 1404 } 1405 1406 static int xen_cpu_dead_pv(unsigned int cpu) 1407 { 1408 xen_smp_intr_free(cpu); 1409 xen_smp_intr_free_pv(cpu); 1410 1411 xen_teardown_timer(cpu); 1412 1413 return 0; 1414 } 1415 1416 static uint32_t __init xen_platform_pv(void) 1417 { 1418 if (xen_pv_domain()) 1419 return xen_cpuid_base(); 1420 1421 return 0; 1422 } 1423 1424 const __initconst struct hypervisor_x86 x86_hyper_xen_pv = { 1425 .name = "Xen PV", 1426 .detect = xen_platform_pv, 1427 .type = X86_HYPER_XEN_PV, 1428 .runtime.pin_vcpu = xen_pin_vcpu, 1429 .ignore_nopv = true, 1430 }; 1431