1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Core of Xen paravirt_ops implementation. 4 * 5 * This file contains the xen_paravirt_ops structure itself, and the 6 * implementations for: 7 * - privileged instructions 8 * - interrupt flags 9 * - segment operations 10 * - booting and setup 11 * 12 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007 13 */ 14 15 #include <linux/cpu.h> 16 #include <linux/kernel.h> 17 #include <linux/init.h> 18 #include <linux/smp.h> 19 #include <linux/preempt.h> 20 #include <linux/hardirq.h> 21 #include <linux/percpu.h> 22 #include <linux/delay.h> 23 #include <linux/start_kernel.h> 24 #include <linux/sched.h> 25 #include <linux/kprobes.h> 26 #include <linux/memblock.h> 27 #include <linux/export.h> 28 #include <linux/mm.h> 29 #include <linux/page-flags.h> 30 #include <linux/pci.h> 31 #include <linux/gfp.h> 32 #include <linux/edd.h> 33 #include <linux/objtool.h> 34 35 #include <xen/xen.h> 36 #include <xen/events.h> 37 #include <xen/interface/xen.h> 38 #include <xen/interface/version.h> 39 #include <xen/interface/physdev.h> 40 #include <xen/interface/vcpu.h> 41 #include <xen/interface/memory.h> 42 #include <xen/interface/nmi.h> 43 #include <xen/interface/xen-mca.h> 44 #include <xen/features.h> 45 #include <xen/page.h> 46 #include <xen/hvc-console.h> 47 #include <xen/acpi.h> 48 49 #include <asm/paravirt.h> 50 #include <asm/apic.h> 51 #include <asm/page.h> 52 #include <asm/xen/pci.h> 53 #include <asm/xen/hypercall.h> 54 #include <asm/xen/hypervisor.h> 55 #include <asm/xen/cpuid.h> 56 #include <asm/fixmap.h> 57 #include <asm/processor.h> 58 #include <asm/proto.h> 59 #include <asm/msr-index.h> 60 #include <asm/traps.h> 61 #include <asm/setup.h> 62 #include <asm/desc.h> 63 #include <asm/pgalloc.h> 64 #include <asm/tlbflush.h> 65 #include <asm/reboot.h> 66 #include <asm/stackprotector.h> 67 #include <asm/hypervisor.h> 68 #include <asm/mach_traps.h> 69 #include <asm/mwait.h> 70 #include <asm/pci_x86.h> 71 #include <asm/cpu.h> 72 #ifdef CONFIG_X86_IOPL_IOPERM 73 #include <asm/io_bitmap.h> 74 #endif 75 76 #ifdef CONFIG_ACPI 77 #include <linux/acpi.h> 78 #include <asm/acpi.h> 79 #include <acpi/pdc_intel.h> 80 #include <acpi/processor.h> 81 #include <xen/interface/platform.h> 82 #endif 83 84 #include "xen-ops.h" 85 #include "mmu.h" 86 #include "smp.h" 87 #include "multicalls.h" 88 #include "pmu.h" 89 90 #include "../kernel/cpu/cpu.h" /* get_cpu_cap() */ 91 92 void *xen_initial_gdt; 93 94 static int xen_cpu_up_prepare_pv(unsigned int cpu); 95 static int xen_cpu_dead_pv(unsigned int cpu); 96 97 struct tls_descs { 98 struct desc_struct desc[3]; 99 }; 100 101 /* 102 * Updating the 3 TLS descriptors in the GDT on every task switch is 103 * surprisingly expensive so we avoid updating them if they haven't 104 * changed. Since Xen writes different descriptors than the one 105 * passed in the update_descriptor hypercall we keep shadow copies to 106 * compare against. 107 */ 108 static DEFINE_PER_CPU(struct tls_descs, shadow_tls_desc); 109 110 static void __init xen_pv_init_platform(void) 111 { 112 populate_extra_pte(fix_to_virt(FIX_PARAVIRT_BOOTMAP)); 113 114 set_fixmap(FIX_PARAVIRT_BOOTMAP, xen_start_info->shared_info); 115 HYPERVISOR_shared_info = (void *)fix_to_virt(FIX_PARAVIRT_BOOTMAP); 116 117 /* xen clock uses per-cpu vcpu_info, need to init it for boot cpu */ 118 xen_vcpu_info_reset(0); 119 120 /* pvclock is in shared info area */ 121 xen_init_time_ops(); 122 } 123 124 static void __init xen_pv_guest_late_init(void) 125 { 126 #ifndef CONFIG_SMP 127 /* Setup shared vcpu info for non-smp configurations */ 128 xen_setup_vcpu_info_placement(); 129 #endif 130 } 131 132 static __read_mostly unsigned int cpuid_leaf5_ecx_val; 133 static __read_mostly unsigned int cpuid_leaf5_edx_val; 134 135 static void xen_cpuid(unsigned int *ax, unsigned int *bx, 136 unsigned int *cx, unsigned int *dx) 137 { 138 unsigned maskebx = ~0; 139 140 /* 141 * Mask out inconvenient features, to try and disable as many 142 * unsupported kernel subsystems as possible. 143 */ 144 switch (*ax) { 145 case CPUID_MWAIT_LEAF: 146 /* Synthesize the values.. */ 147 *ax = 0; 148 *bx = 0; 149 *cx = cpuid_leaf5_ecx_val; 150 *dx = cpuid_leaf5_edx_val; 151 return; 152 153 case 0xb: 154 /* Suppress extended topology stuff */ 155 maskebx = 0; 156 break; 157 } 158 159 asm(XEN_EMULATE_PREFIX "cpuid" 160 : "=a" (*ax), 161 "=b" (*bx), 162 "=c" (*cx), 163 "=d" (*dx) 164 : "0" (*ax), "2" (*cx)); 165 166 *bx &= maskebx; 167 } 168 STACK_FRAME_NON_STANDARD(xen_cpuid); /* XEN_EMULATE_PREFIX */ 169 170 static bool __init xen_check_mwait(void) 171 { 172 #ifdef CONFIG_ACPI 173 struct xen_platform_op op = { 174 .cmd = XENPF_set_processor_pminfo, 175 .u.set_pminfo.id = -1, 176 .u.set_pminfo.type = XEN_PM_PDC, 177 }; 178 uint32_t buf[3]; 179 unsigned int ax, bx, cx, dx; 180 unsigned int mwait_mask; 181 182 /* We need to determine whether it is OK to expose the MWAIT 183 * capability to the kernel to harvest deeper than C3 states from ACPI 184 * _CST using the processor_harvest_xen.c module. For this to work, we 185 * need to gather the MWAIT_LEAF values (which the cstate.c code 186 * checks against). The hypervisor won't expose the MWAIT flag because 187 * it would break backwards compatibility; so we will find out directly 188 * from the hardware and hypercall. 189 */ 190 if (!xen_initial_domain()) 191 return false; 192 193 /* 194 * When running under platform earlier than Xen4.2, do not expose 195 * mwait, to avoid the risk of loading native acpi pad driver 196 */ 197 if (!xen_running_on_version_or_later(4, 2)) 198 return false; 199 200 ax = 1; 201 cx = 0; 202 203 native_cpuid(&ax, &bx, &cx, &dx); 204 205 mwait_mask = (1 << (X86_FEATURE_EST % 32)) | 206 (1 << (X86_FEATURE_MWAIT % 32)); 207 208 if ((cx & mwait_mask) != mwait_mask) 209 return false; 210 211 /* We need to emulate the MWAIT_LEAF and for that we need both 212 * ecx and edx. The hypercall provides only partial information. 213 */ 214 215 ax = CPUID_MWAIT_LEAF; 216 bx = 0; 217 cx = 0; 218 dx = 0; 219 220 native_cpuid(&ax, &bx, &cx, &dx); 221 222 /* Ask the Hypervisor whether to clear ACPI_PDC_C_C2C3_FFH. If so, 223 * don't expose MWAIT_LEAF and let ACPI pick the IOPORT version of C3. 224 */ 225 buf[0] = ACPI_PDC_REVISION_ID; 226 buf[1] = 1; 227 buf[2] = (ACPI_PDC_C_CAPABILITY_SMP | ACPI_PDC_EST_CAPABILITY_SWSMP); 228 229 set_xen_guest_handle(op.u.set_pminfo.pdc, buf); 230 231 if ((HYPERVISOR_platform_op(&op) == 0) && 232 (buf[2] & (ACPI_PDC_C_C1_FFH | ACPI_PDC_C_C2C3_FFH))) { 233 cpuid_leaf5_ecx_val = cx; 234 cpuid_leaf5_edx_val = dx; 235 } 236 return true; 237 #else 238 return false; 239 #endif 240 } 241 242 static bool __init xen_check_xsave(void) 243 { 244 unsigned int cx, xsave_mask; 245 246 cx = cpuid_ecx(1); 247 248 xsave_mask = (1 << (X86_FEATURE_XSAVE % 32)) | 249 (1 << (X86_FEATURE_OSXSAVE % 32)); 250 251 /* Xen will set CR4.OSXSAVE if supported and not disabled by force */ 252 return (cx & xsave_mask) == xsave_mask; 253 } 254 255 static void __init xen_init_capabilities(void) 256 { 257 setup_force_cpu_cap(X86_FEATURE_XENPV); 258 setup_clear_cpu_cap(X86_FEATURE_DCA); 259 setup_clear_cpu_cap(X86_FEATURE_APERFMPERF); 260 setup_clear_cpu_cap(X86_FEATURE_MTRR); 261 setup_clear_cpu_cap(X86_FEATURE_ACC); 262 setup_clear_cpu_cap(X86_FEATURE_X2APIC); 263 setup_clear_cpu_cap(X86_FEATURE_SME); 264 265 /* 266 * Xen PV would need some work to support PCID: CR3 handling as well 267 * as xen_flush_tlb_others() would need updating. 268 */ 269 setup_clear_cpu_cap(X86_FEATURE_PCID); 270 271 if (!xen_initial_domain()) 272 setup_clear_cpu_cap(X86_FEATURE_ACPI); 273 274 if (xen_check_mwait()) 275 setup_force_cpu_cap(X86_FEATURE_MWAIT); 276 else 277 setup_clear_cpu_cap(X86_FEATURE_MWAIT); 278 279 if (!xen_check_xsave()) { 280 setup_clear_cpu_cap(X86_FEATURE_XSAVE); 281 setup_clear_cpu_cap(X86_FEATURE_OSXSAVE); 282 } 283 } 284 285 static noinstr void xen_set_debugreg(int reg, unsigned long val) 286 { 287 HYPERVISOR_set_debugreg(reg, val); 288 } 289 290 static noinstr unsigned long xen_get_debugreg(int reg) 291 { 292 return HYPERVISOR_get_debugreg(reg); 293 } 294 295 static void xen_end_context_switch(struct task_struct *next) 296 { 297 xen_mc_flush(); 298 paravirt_end_context_switch(next); 299 } 300 301 static unsigned long xen_store_tr(void) 302 { 303 return 0; 304 } 305 306 /* 307 * Set the page permissions for a particular virtual address. If the 308 * address is a vmalloc mapping (or other non-linear mapping), then 309 * find the linear mapping of the page and also set its protections to 310 * match. 311 */ 312 static void set_aliased_prot(void *v, pgprot_t prot) 313 { 314 int level; 315 pte_t *ptep; 316 pte_t pte; 317 unsigned long pfn; 318 unsigned char dummy; 319 void *va; 320 321 ptep = lookup_address((unsigned long)v, &level); 322 BUG_ON(ptep == NULL); 323 324 pfn = pte_pfn(*ptep); 325 pte = pfn_pte(pfn, prot); 326 327 /* 328 * Careful: update_va_mapping() will fail if the virtual address 329 * we're poking isn't populated in the page tables. We don't 330 * need to worry about the direct map (that's always in the page 331 * tables), but we need to be careful about vmap space. In 332 * particular, the top level page table can lazily propagate 333 * entries between processes, so if we've switched mms since we 334 * vmapped the target in the first place, we might not have the 335 * top-level page table entry populated. 336 * 337 * We disable preemption because we want the same mm active when 338 * we probe the target and when we issue the hypercall. We'll 339 * have the same nominal mm, but if we're a kernel thread, lazy 340 * mm dropping could change our pgd. 341 * 342 * Out of an abundance of caution, this uses __get_user() to fault 343 * in the target address just in case there's some obscure case 344 * in which the target address isn't readable. 345 */ 346 347 preempt_disable(); 348 349 copy_from_kernel_nofault(&dummy, v, 1); 350 351 if (HYPERVISOR_update_va_mapping((unsigned long)v, pte, 0)) 352 BUG(); 353 354 va = __va(PFN_PHYS(pfn)); 355 356 if (va != v && HYPERVISOR_update_va_mapping((unsigned long)va, pte, 0)) 357 BUG(); 358 359 preempt_enable(); 360 } 361 362 static void xen_alloc_ldt(struct desc_struct *ldt, unsigned entries) 363 { 364 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE; 365 int i; 366 367 /* 368 * We need to mark the all aliases of the LDT pages RO. We 369 * don't need to call vm_flush_aliases(), though, since that's 370 * only responsible for flushing aliases out the TLBs, not the 371 * page tables, and Xen will flush the TLB for us if needed. 372 * 373 * To avoid confusing future readers: none of this is necessary 374 * to load the LDT. The hypervisor only checks this when the 375 * LDT is faulted in due to subsequent descriptor access. 376 */ 377 378 for (i = 0; i < entries; i += entries_per_page) 379 set_aliased_prot(ldt + i, PAGE_KERNEL_RO); 380 } 381 382 static void xen_free_ldt(struct desc_struct *ldt, unsigned entries) 383 { 384 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE; 385 int i; 386 387 for (i = 0; i < entries; i += entries_per_page) 388 set_aliased_prot(ldt + i, PAGE_KERNEL); 389 } 390 391 static void xen_set_ldt(const void *addr, unsigned entries) 392 { 393 struct mmuext_op *op; 394 struct multicall_space mcs = xen_mc_entry(sizeof(*op)); 395 396 trace_xen_cpu_set_ldt(addr, entries); 397 398 op = mcs.args; 399 op->cmd = MMUEXT_SET_LDT; 400 op->arg1.linear_addr = (unsigned long)addr; 401 op->arg2.nr_ents = entries; 402 403 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); 404 405 xen_mc_issue(PARAVIRT_LAZY_CPU); 406 } 407 408 static void xen_load_gdt(const struct desc_ptr *dtr) 409 { 410 unsigned long va = dtr->address; 411 unsigned int size = dtr->size + 1; 412 unsigned long pfn, mfn; 413 int level; 414 pte_t *ptep; 415 void *virt; 416 417 /* @size should be at most GDT_SIZE which is smaller than PAGE_SIZE. */ 418 BUG_ON(size > PAGE_SIZE); 419 BUG_ON(va & ~PAGE_MASK); 420 421 /* 422 * The GDT is per-cpu and is in the percpu data area. 423 * That can be virtually mapped, so we need to do a 424 * page-walk to get the underlying MFN for the 425 * hypercall. The page can also be in the kernel's 426 * linear range, so we need to RO that mapping too. 427 */ 428 ptep = lookup_address(va, &level); 429 BUG_ON(ptep == NULL); 430 431 pfn = pte_pfn(*ptep); 432 mfn = pfn_to_mfn(pfn); 433 virt = __va(PFN_PHYS(pfn)); 434 435 make_lowmem_page_readonly((void *)va); 436 make_lowmem_page_readonly(virt); 437 438 if (HYPERVISOR_set_gdt(&mfn, size / sizeof(struct desc_struct))) 439 BUG(); 440 } 441 442 /* 443 * load_gdt for early boot, when the gdt is only mapped once 444 */ 445 static void __init xen_load_gdt_boot(const struct desc_ptr *dtr) 446 { 447 unsigned long va = dtr->address; 448 unsigned int size = dtr->size + 1; 449 unsigned long pfn, mfn; 450 pte_t pte; 451 452 /* @size should be at most GDT_SIZE which is smaller than PAGE_SIZE. */ 453 BUG_ON(size > PAGE_SIZE); 454 BUG_ON(va & ~PAGE_MASK); 455 456 pfn = virt_to_pfn(va); 457 mfn = pfn_to_mfn(pfn); 458 459 pte = pfn_pte(pfn, PAGE_KERNEL_RO); 460 461 if (HYPERVISOR_update_va_mapping((unsigned long)va, pte, 0)) 462 BUG(); 463 464 if (HYPERVISOR_set_gdt(&mfn, size / sizeof(struct desc_struct))) 465 BUG(); 466 } 467 468 static inline bool desc_equal(const struct desc_struct *d1, 469 const struct desc_struct *d2) 470 { 471 return !memcmp(d1, d2, sizeof(*d1)); 472 } 473 474 static void load_TLS_descriptor(struct thread_struct *t, 475 unsigned int cpu, unsigned int i) 476 { 477 struct desc_struct *shadow = &per_cpu(shadow_tls_desc, cpu).desc[i]; 478 struct desc_struct *gdt; 479 xmaddr_t maddr; 480 struct multicall_space mc; 481 482 if (desc_equal(shadow, &t->tls_array[i])) 483 return; 484 485 *shadow = t->tls_array[i]; 486 487 gdt = get_cpu_gdt_rw(cpu); 488 maddr = arbitrary_virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]); 489 mc = __xen_mc_entry(0); 490 491 MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]); 492 } 493 494 static void xen_load_tls(struct thread_struct *t, unsigned int cpu) 495 { 496 /* 497 * In lazy mode we need to zero %fs, otherwise we may get an 498 * exception between the new %fs descriptor being loaded and 499 * %fs being effectively cleared at __switch_to(). 500 */ 501 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU) 502 loadsegment(fs, 0); 503 504 xen_mc_batch(); 505 506 load_TLS_descriptor(t, cpu, 0); 507 load_TLS_descriptor(t, cpu, 1); 508 load_TLS_descriptor(t, cpu, 2); 509 510 xen_mc_issue(PARAVIRT_LAZY_CPU); 511 } 512 513 static void xen_load_gs_index(unsigned int idx) 514 { 515 if (HYPERVISOR_set_segment_base(SEGBASE_GS_USER_SEL, idx)) 516 BUG(); 517 } 518 519 static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum, 520 const void *ptr) 521 { 522 xmaddr_t mach_lp = arbitrary_virt_to_machine(&dt[entrynum]); 523 u64 entry = *(u64 *)ptr; 524 525 trace_xen_cpu_write_ldt_entry(dt, entrynum, entry); 526 527 preempt_disable(); 528 529 xen_mc_flush(); 530 if (HYPERVISOR_update_descriptor(mach_lp.maddr, entry)) 531 BUG(); 532 533 preempt_enable(); 534 } 535 536 void noist_exc_debug(struct pt_regs *regs); 537 538 DEFINE_IDTENTRY_RAW(xenpv_exc_nmi) 539 { 540 /* On Xen PV, NMI doesn't use IST. The C part is the same as native. */ 541 exc_nmi(regs); 542 } 543 544 DEFINE_IDTENTRY_RAW_ERRORCODE(xenpv_exc_double_fault) 545 { 546 /* On Xen PV, DF doesn't use IST. The C part is the same as native. */ 547 exc_double_fault(regs, error_code); 548 } 549 550 DEFINE_IDTENTRY_RAW(xenpv_exc_debug) 551 { 552 /* 553 * There's no IST on Xen PV, but we still need to dispatch 554 * to the correct handler. 555 */ 556 if (user_mode(regs)) 557 noist_exc_debug(regs); 558 else 559 exc_debug(regs); 560 } 561 562 DEFINE_IDTENTRY_RAW(exc_xen_unknown_trap) 563 { 564 /* This should never happen and there is no way to handle it. */ 565 instrumentation_begin(); 566 pr_err("Unknown trap in Xen PV mode."); 567 BUG(); 568 instrumentation_end(); 569 } 570 571 #ifdef CONFIG_X86_MCE 572 DEFINE_IDTENTRY_RAW(xenpv_exc_machine_check) 573 { 574 /* 575 * There's no IST on Xen PV, but we still need to dispatch 576 * to the correct handler. 577 */ 578 if (user_mode(regs)) 579 noist_exc_machine_check(regs); 580 else 581 exc_machine_check(regs); 582 } 583 #endif 584 585 struct trap_array_entry { 586 void (*orig)(void); 587 void (*xen)(void); 588 bool ist_okay; 589 }; 590 591 #define TRAP_ENTRY(func, ist_ok) { \ 592 .orig = asm_##func, \ 593 .xen = xen_asm_##func, \ 594 .ist_okay = ist_ok } 595 596 #define TRAP_ENTRY_REDIR(func, ist_ok) { \ 597 .orig = asm_##func, \ 598 .xen = xen_asm_xenpv_##func, \ 599 .ist_okay = ist_ok } 600 601 static struct trap_array_entry trap_array[] = { 602 TRAP_ENTRY_REDIR(exc_debug, true ), 603 TRAP_ENTRY_REDIR(exc_double_fault, true ), 604 #ifdef CONFIG_X86_MCE 605 TRAP_ENTRY_REDIR(exc_machine_check, true ), 606 #endif 607 TRAP_ENTRY_REDIR(exc_nmi, true ), 608 TRAP_ENTRY(exc_int3, false ), 609 TRAP_ENTRY(exc_overflow, false ), 610 #ifdef CONFIG_IA32_EMULATION 611 { entry_INT80_compat, xen_entry_INT80_compat, false }, 612 #endif 613 TRAP_ENTRY(exc_page_fault, false ), 614 TRAP_ENTRY(exc_divide_error, false ), 615 TRAP_ENTRY(exc_bounds, false ), 616 TRAP_ENTRY(exc_invalid_op, false ), 617 TRAP_ENTRY(exc_device_not_available, false ), 618 TRAP_ENTRY(exc_coproc_segment_overrun, false ), 619 TRAP_ENTRY(exc_invalid_tss, false ), 620 TRAP_ENTRY(exc_segment_not_present, false ), 621 TRAP_ENTRY(exc_stack_segment, false ), 622 TRAP_ENTRY(exc_general_protection, false ), 623 TRAP_ENTRY(exc_spurious_interrupt_bug, false ), 624 TRAP_ENTRY(exc_coprocessor_error, false ), 625 TRAP_ENTRY(exc_alignment_check, false ), 626 TRAP_ENTRY(exc_simd_coprocessor_error, false ), 627 #ifdef CONFIG_X86_KERNEL_IBT 628 TRAP_ENTRY(exc_control_protection, false ), 629 #endif 630 }; 631 632 static bool __ref get_trap_addr(void **addr, unsigned int ist) 633 { 634 unsigned int nr; 635 bool ist_okay = false; 636 bool found = false; 637 638 /* 639 * Replace trap handler addresses by Xen specific ones. 640 * Check for known traps using IST and whitelist them. 641 * The debugger ones are the only ones we care about. 642 * Xen will handle faults like double_fault, so we should never see 643 * them. Warn if there's an unexpected IST-using fault handler. 644 */ 645 for (nr = 0; nr < ARRAY_SIZE(trap_array); nr++) { 646 struct trap_array_entry *entry = trap_array + nr; 647 648 if (*addr == entry->orig) { 649 *addr = entry->xen; 650 ist_okay = entry->ist_okay; 651 found = true; 652 break; 653 } 654 } 655 656 if (nr == ARRAY_SIZE(trap_array) && 657 *addr >= (void *)early_idt_handler_array[0] && 658 *addr < (void *)early_idt_handler_array[NUM_EXCEPTION_VECTORS]) { 659 nr = (*addr - (void *)early_idt_handler_array[0]) / 660 EARLY_IDT_HANDLER_SIZE; 661 *addr = (void *)xen_early_idt_handler_array[nr]; 662 found = true; 663 } 664 665 if (!found) 666 *addr = (void *)xen_asm_exc_xen_unknown_trap; 667 668 if (WARN_ON(found && ist != 0 && !ist_okay)) 669 return false; 670 671 return true; 672 } 673 674 static int cvt_gate_to_trap(int vector, const gate_desc *val, 675 struct trap_info *info) 676 { 677 unsigned long addr; 678 679 if (val->bits.type != GATE_TRAP && val->bits.type != GATE_INTERRUPT) 680 return 0; 681 682 info->vector = vector; 683 684 addr = gate_offset(val); 685 if (!get_trap_addr((void **)&addr, val->bits.ist)) 686 return 0; 687 info->address = addr; 688 689 info->cs = gate_segment(val); 690 info->flags = val->bits.dpl; 691 /* interrupt gates clear IF */ 692 if (val->bits.type == GATE_INTERRUPT) 693 info->flags |= 1 << 2; 694 695 return 1; 696 } 697 698 /* Locations of each CPU's IDT */ 699 static DEFINE_PER_CPU(struct desc_ptr, idt_desc); 700 701 /* Set an IDT entry. If the entry is part of the current IDT, then 702 also update Xen. */ 703 static void xen_write_idt_entry(gate_desc *dt, int entrynum, const gate_desc *g) 704 { 705 unsigned long p = (unsigned long)&dt[entrynum]; 706 unsigned long start, end; 707 708 trace_xen_cpu_write_idt_entry(dt, entrynum, g); 709 710 preempt_disable(); 711 712 start = __this_cpu_read(idt_desc.address); 713 end = start + __this_cpu_read(idt_desc.size) + 1; 714 715 xen_mc_flush(); 716 717 native_write_idt_entry(dt, entrynum, g); 718 719 if (p >= start && (p + 8) <= end) { 720 struct trap_info info[2]; 721 722 info[1].address = 0; 723 724 if (cvt_gate_to_trap(entrynum, g, &info[0])) 725 if (HYPERVISOR_set_trap_table(info)) 726 BUG(); 727 } 728 729 preempt_enable(); 730 } 731 732 static unsigned xen_convert_trap_info(const struct desc_ptr *desc, 733 struct trap_info *traps, bool full) 734 { 735 unsigned in, out, count; 736 737 count = (desc->size+1) / sizeof(gate_desc); 738 BUG_ON(count > 256); 739 740 for (in = out = 0; in < count; in++) { 741 gate_desc *entry = (gate_desc *)(desc->address) + in; 742 743 if (cvt_gate_to_trap(in, entry, &traps[out]) || full) 744 out++; 745 } 746 747 return out; 748 } 749 750 void xen_copy_trap_info(struct trap_info *traps) 751 { 752 const struct desc_ptr *desc = this_cpu_ptr(&idt_desc); 753 754 xen_convert_trap_info(desc, traps, true); 755 } 756 757 /* Load a new IDT into Xen. In principle this can be per-CPU, so we 758 hold a spinlock to protect the static traps[] array (static because 759 it avoids allocation, and saves stack space). */ 760 static void xen_load_idt(const struct desc_ptr *desc) 761 { 762 static DEFINE_SPINLOCK(lock); 763 static struct trap_info traps[257]; 764 unsigned out; 765 766 trace_xen_cpu_load_idt(desc); 767 768 spin_lock(&lock); 769 770 memcpy(this_cpu_ptr(&idt_desc), desc, sizeof(idt_desc)); 771 772 out = xen_convert_trap_info(desc, traps, false); 773 memset(&traps[out], 0, sizeof(traps[0])); 774 775 xen_mc_flush(); 776 if (HYPERVISOR_set_trap_table(traps)) 777 BUG(); 778 779 spin_unlock(&lock); 780 } 781 782 /* Write a GDT descriptor entry. Ignore LDT descriptors, since 783 they're handled differently. */ 784 static void xen_write_gdt_entry(struct desc_struct *dt, int entry, 785 const void *desc, int type) 786 { 787 trace_xen_cpu_write_gdt_entry(dt, entry, desc, type); 788 789 preempt_disable(); 790 791 switch (type) { 792 case DESC_LDT: 793 case DESC_TSS: 794 /* ignore */ 795 break; 796 797 default: { 798 xmaddr_t maddr = arbitrary_virt_to_machine(&dt[entry]); 799 800 xen_mc_flush(); 801 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc)) 802 BUG(); 803 } 804 805 } 806 807 preempt_enable(); 808 } 809 810 /* 811 * Version of write_gdt_entry for use at early boot-time needed to 812 * update an entry as simply as possible. 813 */ 814 static void __init xen_write_gdt_entry_boot(struct desc_struct *dt, int entry, 815 const void *desc, int type) 816 { 817 trace_xen_cpu_write_gdt_entry(dt, entry, desc, type); 818 819 switch (type) { 820 case DESC_LDT: 821 case DESC_TSS: 822 /* ignore */ 823 break; 824 825 default: { 826 xmaddr_t maddr = virt_to_machine(&dt[entry]); 827 828 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc)) 829 dt[entry] = *(struct desc_struct *)desc; 830 } 831 832 } 833 } 834 835 static void xen_load_sp0(unsigned long sp0) 836 { 837 struct multicall_space mcs; 838 839 mcs = xen_mc_entry(0); 840 MULTI_stack_switch(mcs.mc, __KERNEL_DS, sp0); 841 xen_mc_issue(PARAVIRT_LAZY_CPU); 842 this_cpu_write(cpu_tss_rw.x86_tss.sp0, sp0); 843 } 844 845 #ifdef CONFIG_X86_IOPL_IOPERM 846 static void xen_invalidate_io_bitmap(void) 847 { 848 struct physdev_set_iobitmap iobitmap = { 849 .bitmap = NULL, 850 .nr_ports = 0, 851 }; 852 853 native_tss_invalidate_io_bitmap(); 854 HYPERVISOR_physdev_op(PHYSDEVOP_set_iobitmap, &iobitmap); 855 } 856 857 static void xen_update_io_bitmap(void) 858 { 859 struct physdev_set_iobitmap iobitmap; 860 struct tss_struct *tss = this_cpu_ptr(&cpu_tss_rw); 861 862 native_tss_update_io_bitmap(); 863 864 iobitmap.bitmap = (uint8_t *)(&tss->x86_tss) + 865 tss->x86_tss.io_bitmap_base; 866 if (tss->x86_tss.io_bitmap_base == IO_BITMAP_OFFSET_INVALID) 867 iobitmap.nr_ports = 0; 868 else 869 iobitmap.nr_ports = IO_BITMAP_BITS; 870 871 HYPERVISOR_physdev_op(PHYSDEVOP_set_iobitmap, &iobitmap); 872 } 873 #endif 874 875 static void xen_io_delay(void) 876 { 877 } 878 879 static DEFINE_PER_CPU(unsigned long, xen_cr0_value); 880 881 static unsigned long xen_read_cr0(void) 882 { 883 unsigned long cr0 = this_cpu_read(xen_cr0_value); 884 885 if (unlikely(cr0 == 0)) { 886 cr0 = native_read_cr0(); 887 this_cpu_write(xen_cr0_value, cr0); 888 } 889 890 return cr0; 891 } 892 893 static void xen_write_cr0(unsigned long cr0) 894 { 895 struct multicall_space mcs; 896 897 this_cpu_write(xen_cr0_value, cr0); 898 899 /* Only pay attention to cr0.TS; everything else is 900 ignored. */ 901 mcs = xen_mc_entry(0); 902 903 MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0); 904 905 xen_mc_issue(PARAVIRT_LAZY_CPU); 906 } 907 908 static void xen_write_cr4(unsigned long cr4) 909 { 910 cr4 &= ~(X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PCE); 911 912 native_write_cr4(cr4); 913 } 914 915 static u64 xen_read_msr_safe(unsigned int msr, int *err) 916 { 917 u64 val; 918 919 if (pmu_msr_read(msr, &val, err)) 920 return val; 921 922 val = native_read_msr_safe(msr, err); 923 switch (msr) { 924 case MSR_IA32_APICBASE: 925 val &= ~X2APIC_ENABLE; 926 break; 927 } 928 return val; 929 } 930 931 static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high) 932 { 933 int ret; 934 unsigned int which; 935 u64 base; 936 937 ret = 0; 938 939 switch (msr) { 940 case MSR_FS_BASE: which = SEGBASE_FS; goto set; 941 case MSR_KERNEL_GS_BASE: which = SEGBASE_GS_USER; goto set; 942 case MSR_GS_BASE: which = SEGBASE_GS_KERNEL; goto set; 943 944 set: 945 base = ((u64)high << 32) | low; 946 if (HYPERVISOR_set_segment_base(which, base) != 0) 947 ret = -EIO; 948 break; 949 950 case MSR_STAR: 951 case MSR_CSTAR: 952 case MSR_LSTAR: 953 case MSR_SYSCALL_MASK: 954 case MSR_IA32_SYSENTER_CS: 955 case MSR_IA32_SYSENTER_ESP: 956 case MSR_IA32_SYSENTER_EIP: 957 /* Fast syscall setup is all done in hypercalls, so 958 these are all ignored. Stub them out here to stop 959 Xen console noise. */ 960 break; 961 962 default: 963 if (!pmu_msr_write(msr, low, high, &ret)) 964 ret = native_write_msr_safe(msr, low, high); 965 } 966 967 return ret; 968 } 969 970 static u64 xen_read_msr(unsigned int msr) 971 { 972 /* 973 * This will silently swallow a #GP from RDMSR. It may be worth 974 * changing that. 975 */ 976 int err; 977 978 return xen_read_msr_safe(msr, &err); 979 } 980 981 static void xen_write_msr(unsigned int msr, unsigned low, unsigned high) 982 { 983 /* 984 * This will silently swallow a #GP from WRMSR. It may be worth 985 * changing that. 986 */ 987 xen_write_msr_safe(msr, low, high); 988 } 989 990 /* This is called once we have the cpu_possible_mask */ 991 void __init xen_setup_vcpu_info_placement(void) 992 { 993 int cpu; 994 995 for_each_possible_cpu(cpu) { 996 /* Set up direct vCPU id mapping for PV guests. */ 997 per_cpu(xen_vcpu_id, cpu) = cpu; 998 xen_vcpu_setup(cpu); 999 } 1000 1001 pv_ops.irq.save_fl = __PV_IS_CALLEE_SAVE(xen_save_fl_direct); 1002 pv_ops.irq.irq_disable = __PV_IS_CALLEE_SAVE(xen_irq_disable_direct); 1003 pv_ops.irq.irq_enable = __PV_IS_CALLEE_SAVE(xen_irq_enable_direct); 1004 pv_ops.mmu.read_cr2 = __PV_IS_CALLEE_SAVE(xen_read_cr2_direct); 1005 } 1006 1007 static const struct pv_info xen_info __initconst = { 1008 .extra_user_64bit_cs = FLAT_USER_CS64, 1009 .name = "Xen", 1010 }; 1011 1012 static const typeof(pv_ops) xen_cpu_ops __initconst = { 1013 .cpu = { 1014 .cpuid = xen_cpuid, 1015 1016 .set_debugreg = xen_set_debugreg, 1017 .get_debugreg = xen_get_debugreg, 1018 1019 .read_cr0 = xen_read_cr0, 1020 .write_cr0 = xen_write_cr0, 1021 1022 .write_cr4 = xen_write_cr4, 1023 1024 .wbinvd = native_wbinvd, 1025 1026 .read_msr = xen_read_msr, 1027 .write_msr = xen_write_msr, 1028 1029 .read_msr_safe = xen_read_msr_safe, 1030 .write_msr_safe = xen_write_msr_safe, 1031 1032 .read_pmc = xen_read_pmc, 1033 1034 .load_tr_desc = paravirt_nop, 1035 .set_ldt = xen_set_ldt, 1036 .load_gdt = xen_load_gdt, 1037 .load_idt = xen_load_idt, 1038 .load_tls = xen_load_tls, 1039 .load_gs_index = xen_load_gs_index, 1040 1041 .alloc_ldt = xen_alloc_ldt, 1042 .free_ldt = xen_free_ldt, 1043 1044 .store_tr = xen_store_tr, 1045 1046 .write_ldt_entry = xen_write_ldt_entry, 1047 .write_gdt_entry = xen_write_gdt_entry, 1048 .write_idt_entry = xen_write_idt_entry, 1049 .load_sp0 = xen_load_sp0, 1050 1051 #ifdef CONFIG_X86_IOPL_IOPERM 1052 .invalidate_io_bitmap = xen_invalidate_io_bitmap, 1053 .update_io_bitmap = xen_update_io_bitmap, 1054 #endif 1055 .io_delay = xen_io_delay, 1056 1057 .start_context_switch = paravirt_start_context_switch, 1058 .end_context_switch = xen_end_context_switch, 1059 }, 1060 }; 1061 1062 static void xen_restart(char *msg) 1063 { 1064 xen_reboot(SHUTDOWN_reboot); 1065 } 1066 1067 static void xen_machine_halt(void) 1068 { 1069 xen_reboot(SHUTDOWN_poweroff); 1070 } 1071 1072 static void xen_machine_power_off(void) 1073 { 1074 if (pm_power_off) 1075 pm_power_off(); 1076 xen_reboot(SHUTDOWN_poweroff); 1077 } 1078 1079 static void xen_crash_shutdown(struct pt_regs *regs) 1080 { 1081 xen_reboot(SHUTDOWN_crash); 1082 } 1083 1084 static const struct machine_ops xen_machine_ops __initconst = { 1085 .restart = xen_restart, 1086 .halt = xen_machine_halt, 1087 .power_off = xen_machine_power_off, 1088 .shutdown = xen_machine_halt, 1089 .crash_shutdown = xen_crash_shutdown, 1090 .emergency_restart = xen_emergency_restart, 1091 }; 1092 1093 static unsigned char xen_get_nmi_reason(void) 1094 { 1095 unsigned char reason = 0; 1096 1097 /* Construct a value which looks like it came from port 0x61. */ 1098 if (test_bit(_XEN_NMIREASON_io_error, 1099 &HYPERVISOR_shared_info->arch.nmi_reason)) 1100 reason |= NMI_REASON_IOCHK; 1101 if (test_bit(_XEN_NMIREASON_pci_serr, 1102 &HYPERVISOR_shared_info->arch.nmi_reason)) 1103 reason |= NMI_REASON_SERR; 1104 1105 return reason; 1106 } 1107 1108 static void __init xen_boot_params_init_edd(void) 1109 { 1110 #if IS_ENABLED(CONFIG_EDD) 1111 struct xen_platform_op op; 1112 struct edd_info *edd_info; 1113 u32 *mbr_signature; 1114 unsigned nr; 1115 int ret; 1116 1117 edd_info = boot_params.eddbuf; 1118 mbr_signature = boot_params.edd_mbr_sig_buffer; 1119 1120 op.cmd = XENPF_firmware_info; 1121 1122 op.u.firmware_info.type = XEN_FW_DISK_INFO; 1123 for (nr = 0; nr < EDDMAXNR; nr++) { 1124 struct edd_info *info = edd_info + nr; 1125 1126 op.u.firmware_info.index = nr; 1127 info->params.length = sizeof(info->params); 1128 set_xen_guest_handle(op.u.firmware_info.u.disk_info.edd_params, 1129 &info->params); 1130 ret = HYPERVISOR_platform_op(&op); 1131 if (ret) 1132 break; 1133 1134 #define C(x) info->x = op.u.firmware_info.u.disk_info.x 1135 C(device); 1136 C(version); 1137 C(interface_support); 1138 C(legacy_max_cylinder); 1139 C(legacy_max_head); 1140 C(legacy_sectors_per_track); 1141 #undef C 1142 } 1143 boot_params.eddbuf_entries = nr; 1144 1145 op.u.firmware_info.type = XEN_FW_DISK_MBR_SIGNATURE; 1146 for (nr = 0; nr < EDD_MBR_SIG_MAX; nr++) { 1147 op.u.firmware_info.index = nr; 1148 ret = HYPERVISOR_platform_op(&op); 1149 if (ret) 1150 break; 1151 mbr_signature[nr] = op.u.firmware_info.u.disk_mbr_signature.mbr_signature; 1152 } 1153 boot_params.edd_mbr_sig_buf_entries = nr; 1154 #endif 1155 } 1156 1157 /* 1158 * Set up the GDT and segment registers for -fstack-protector. Until 1159 * we do this, we have to be careful not to call any stack-protected 1160 * function, which is most of the kernel. 1161 */ 1162 static void __init xen_setup_gdt(int cpu) 1163 { 1164 pv_ops.cpu.write_gdt_entry = xen_write_gdt_entry_boot; 1165 pv_ops.cpu.load_gdt = xen_load_gdt_boot; 1166 1167 switch_to_new_gdt(cpu); 1168 1169 pv_ops.cpu.write_gdt_entry = xen_write_gdt_entry; 1170 pv_ops.cpu.load_gdt = xen_load_gdt; 1171 } 1172 1173 static void __init xen_dom0_set_legacy_features(void) 1174 { 1175 x86_platform.legacy.rtc = 1; 1176 } 1177 1178 static void __init xen_domu_set_legacy_features(void) 1179 { 1180 x86_platform.legacy.rtc = 0; 1181 } 1182 1183 extern void early_xen_iret_patch(void); 1184 1185 /* First C function to be called on Xen boot */ 1186 asmlinkage __visible void __init xen_start_kernel(void) 1187 { 1188 struct physdev_set_iopl set_iopl; 1189 unsigned long initrd_start = 0; 1190 int rc; 1191 1192 if (!xen_start_info) 1193 return; 1194 1195 __text_gen_insn(&early_xen_iret_patch, 1196 JMP32_INSN_OPCODE, &early_xen_iret_patch, &xen_iret, 1197 JMP32_INSN_SIZE); 1198 1199 xen_domain_type = XEN_PV_DOMAIN; 1200 xen_start_flags = xen_start_info->flags; 1201 1202 xen_setup_features(); 1203 1204 /* Install Xen paravirt ops */ 1205 pv_info = xen_info; 1206 pv_ops.cpu = xen_cpu_ops.cpu; 1207 xen_init_irq_ops(); 1208 1209 /* 1210 * Setup xen_vcpu early because it is needed for 1211 * local_irq_disable(), irqs_disabled(), e.g. in printk(). 1212 * 1213 * Don't do the full vcpu_info placement stuff until we have 1214 * the cpu_possible_mask and a non-dummy shared_info. 1215 */ 1216 xen_vcpu_info_reset(0); 1217 1218 x86_platform.get_nmi_reason = xen_get_nmi_reason; 1219 1220 x86_init.resources.memory_setup = xen_memory_setup; 1221 x86_init.irqs.intr_mode_select = x86_init_noop; 1222 x86_init.irqs.intr_mode_init = x86_init_noop; 1223 x86_init.oem.arch_setup = xen_arch_setup; 1224 x86_init.oem.banner = xen_banner; 1225 x86_init.hyper.init_platform = xen_pv_init_platform; 1226 x86_init.hyper.guest_late_init = xen_pv_guest_late_init; 1227 1228 /* 1229 * Set up some pagetable state before starting to set any ptes. 1230 */ 1231 1232 xen_setup_machphys_mapping(); 1233 xen_init_mmu_ops(); 1234 1235 /* Prevent unwanted bits from being set in PTEs. */ 1236 __supported_pte_mask &= ~_PAGE_GLOBAL; 1237 __default_kernel_pte_mask &= ~_PAGE_GLOBAL; 1238 1239 /* Get mfn list */ 1240 xen_build_dynamic_phys_to_machine(); 1241 1242 /* Work out if we support NX */ 1243 get_cpu_cap(&boot_cpu_data); 1244 x86_configure_nx(); 1245 1246 /* 1247 * Set up kernel GDT and segment registers, mainly so that 1248 * -fstack-protector code can be executed. 1249 */ 1250 xen_setup_gdt(0); 1251 1252 /* Determine virtual and physical address sizes */ 1253 get_cpu_address_sizes(&boot_cpu_data); 1254 1255 /* Let's presume PV guests always boot on vCPU with id 0. */ 1256 per_cpu(xen_vcpu_id, 0) = 0; 1257 1258 idt_setup_early_handler(); 1259 1260 xen_init_capabilities(); 1261 1262 #ifdef CONFIG_X86_LOCAL_APIC 1263 /* 1264 * set up the basic apic ops. 1265 */ 1266 xen_init_apic(); 1267 #endif 1268 1269 machine_ops = xen_machine_ops; 1270 1271 /* 1272 * The only reliable way to retain the initial address of the 1273 * percpu gdt_page is to remember it here, so we can go and 1274 * mark it RW later, when the initial percpu area is freed. 1275 */ 1276 xen_initial_gdt = &per_cpu(gdt_page, 0); 1277 1278 xen_smp_init(); 1279 1280 #ifdef CONFIG_ACPI_NUMA 1281 /* 1282 * The pages we from Xen are not related to machine pages, so 1283 * any NUMA information the kernel tries to get from ACPI will 1284 * be meaningless. Prevent it from trying. 1285 */ 1286 disable_srat(); 1287 #endif 1288 WARN_ON(xen_cpuhp_setup(xen_cpu_up_prepare_pv, xen_cpu_dead_pv)); 1289 1290 local_irq_disable(); 1291 early_boot_irqs_disabled = true; 1292 1293 xen_raw_console_write("mapping kernel into physical memory\n"); 1294 xen_setup_kernel_pagetable((pgd_t *)xen_start_info->pt_base, 1295 xen_start_info->nr_pages); 1296 xen_reserve_special_pages(); 1297 1298 /* 1299 * We used to do this in xen_arch_setup, but that is too late 1300 * on AMD were early_cpu_init (run before ->arch_setup()) calls 1301 * early_amd_init which pokes 0xcf8 port. 1302 */ 1303 set_iopl.iopl = 1; 1304 rc = HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl); 1305 if (rc != 0) 1306 xen_raw_printk("physdev_op failed %d\n", rc); 1307 1308 1309 if (xen_start_info->mod_start) { 1310 if (xen_start_info->flags & SIF_MOD_START_PFN) 1311 initrd_start = PFN_PHYS(xen_start_info->mod_start); 1312 else 1313 initrd_start = __pa(xen_start_info->mod_start); 1314 } 1315 1316 /* Poke various useful things into boot_params */ 1317 boot_params.hdr.type_of_loader = (9 << 4) | 0; 1318 boot_params.hdr.ramdisk_image = initrd_start; 1319 boot_params.hdr.ramdisk_size = xen_start_info->mod_len; 1320 boot_params.hdr.cmd_line_ptr = __pa(xen_start_info->cmd_line); 1321 boot_params.hdr.hardware_subarch = X86_SUBARCH_XEN; 1322 1323 if (!xen_initial_domain()) { 1324 if (pci_xen) 1325 x86_init.pci.arch_init = pci_xen_init; 1326 x86_platform.set_legacy_features = 1327 xen_domu_set_legacy_features; 1328 } else { 1329 const struct dom0_vga_console_info *info = 1330 (void *)((char *)xen_start_info + 1331 xen_start_info->console.dom0.info_off); 1332 struct xen_platform_op op = { 1333 .cmd = XENPF_firmware_info, 1334 .interface_version = XENPF_INTERFACE_VERSION, 1335 .u.firmware_info.type = XEN_FW_KBD_SHIFT_FLAGS, 1336 }; 1337 1338 x86_platform.set_legacy_features = 1339 xen_dom0_set_legacy_features; 1340 xen_init_vga(info, xen_start_info->console.dom0.info_size); 1341 xen_start_info->console.domU.mfn = 0; 1342 xen_start_info->console.domU.evtchn = 0; 1343 1344 if (HYPERVISOR_platform_op(&op) == 0) 1345 boot_params.kbd_status = op.u.firmware_info.u.kbd_shift_flags; 1346 1347 /* Make sure ACS will be enabled */ 1348 pci_request_acs(); 1349 1350 xen_acpi_sleep_register(); 1351 1352 xen_boot_params_init_edd(); 1353 1354 #ifdef CONFIG_ACPI 1355 /* 1356 * Disable selecting "Firmware First mode" for correctable 1357 * memory errors, as this is the duty of the hypervisor to 1358 * decide. 1359 */ 1360 acpi_disable_cmcff = 1; 1361 #endif 1362 } 1363 1364 xen_add_preferred_consoles(); 1365 1366 #ifdef CONFIG_PCI 1367 /* PCI BIOS service won't work from a PV guest. */ 1368 pci_probe &= ~PCI_PROBE_BIOS; 1369 #endif 1370 xen_raw_console_write("about to get started...\n"); 1371 1372 /* We need this for printk timestamps */ 1373 xen_setup_runstate_info(0); 1374 1375 xen_efi_init(&boot_params); 1376 1377 /* Start the world */ 1378 cr4_init_shadow(); /* 32b kernel does this in i386_start_kernel() */ 1379 x86_64_start_reservations((char *)__pa_symbol(&boot_params)); 1380 } 1381 1382 static int xen_cpu_up_prepare_pv(unsigned int cpu) 1383 { 1384 int rc; 1385 1386 if (per_cpu(xen_vcpu, cpu) == NULL) 1387 return -ENODEV; 1388 1389 xen_setup_timer(cpu); 1390 1391 rc = xen_smp_intr_init(cpu); 1392 if (rc) { 1393 WARN(1, "xen_smp_intr_init() for CPU %d failed: %d\n", 1394 cpu, rc); 1395 return rc; 1396 } 1397 1398 rc = xen_smp_intr_init_pv(cpu); 1399 if (rc) { 1400 WARN(1, "xen_smp_intr_init_pv() for CPU %d failed: %d\n", 1401 cpu, rc); 1402 return rc; 1403 } 1404 1405 return 0; 1406 } 1407 1408 static int xen_cpu_dead_pv(unsigned int cpu) 1409 { 1410 xen_smp_intr_free(cpu); 1411 xen_smp_intr_free_pv(cpu); 1412 1413 xen_teardown_timer(cpu); 1414 1415 return 0; 1416 } 1417 1418 static uint32_t __init xen_platform_pv(void) 1419 { 1420 if (xen_pv_domain()) 1421 return xen_cpuid_base(); 1422 1423 return 0; 1424 } 1425 1426 const __initconst struct hypervisor_x86 x86_hyper_xen_pv = { 1427 .name = "Xen PV", 1428 .detect = xen_platform_pv, 1429 .type = X86_HYPER_XEN_PV, 1430 .runtime.pin_vcpu = xen_pin_vcpu, 1431 .ignore_nopv = true, 1432 }; 1433