1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Core of Xen paravirt_ops implementation. 4 * 5 * This file contains the xen_paravirt_ops structure itself, and the 6 * implementations for: 7 * - privileged instructions 8 * - interrupt flags 9 * - segment operations 10 * - booting and setup 11 * 12 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007 13 */ 14 15 #include <linux/cpu.h> 16 #include <linux/kernel.h> 17 #include <linux/init.h> 18 #include <linux/smp.h> 19 #include <linux/preempt.h> 20 #include <linux/hardirq.h> 21 #include <linux/percpu.h> 22 #include <linux/delay.h> 23 #include <linux/start_kernel.h> 24 #include <linux/sched.h> 25 #include <linux/kprobes.h> 26 #include <linux/memblock.h> 27 #include <linux/export.h> 28 #include <linux/mm.h> 29 #include <linux/page-flags.h> 30 #include <linux/pci.h> 31 #include <linux/gfp.h> 32 #include <linux/edd.h> 33 34 #include <xen/xen.h> 35 #include <xen/events.h> 36 #include <xen/interface/xen.h> 37 #include <xen/interface/version.h> 38 #include <xen/interface/physdev.h> 39 #include <xen/interface/vcpu.h> 40 #include <xen/interface/memory.h> 41 #include <xen/interface/nmi.h> 42 #include <xen/interface/xen-mca.h> 43 #include <xen/features.h> 44 #include <xen/page.h> 45 #include <xen/hvc-console.h> 46 #include <xen/acpi.h> 47 48 #include <asm/paravirt.h> 49 #include <asm/apic.h> 50 #include <asm/page.h> 51 #include <asm/xen/pci.h> 52 #include <asm/xen/hypercall.h> 53 #include <asm/xen/hypervisor.h> 54 #include <asm/xen/cpuid.h> 55 #include <asm/fixmap.h> 56 #include <asm/processor.h> 57 #include <asm/proto.h> 58 #include <asm/msr-index.h> 59 #include <asm/traps.h> 60 #include <asm/setup.h> 61 #include <asm/desc.h> 62 #include <asm/pgalloc.h> 63 #include <asm/tlbflush.h> 64 #include <asm/reboot.h> 65 #include <asm/stackprotector.h> 66 #include <asm/hypervisor.h> 67 #include <asm/mach_traps.h> 68 #include <asm/mwait.h> 69 #include <asm/pci_x86.h> 70 #include <asm/cpu.h> 71 #ifdef CONFIG_X86_IOPL_IOPERM 72 #include <asm/io_bitmap.h> 73 #endif 74 75 #ifdef CONFIG_ACPI 76 #include <linux/acpi.h> 77 #include <asm/acpi.h> 78 #include <acpi/pdc_intel.h> 79 #include <acpi/processor.h> 80 #include <xen/interface/platform.h> 81 #endif 82 83 #include "xen-ops.h" 84 #include "mmu.h" 85 #include "smp.h" 86 #include "multicalls.h" 87 #include "pmu.h" 88 89 #include "../kernel/cpu/cpu.h" /* get_cpu_cap() */ 90 91 void *xen_initial_gdt; 92 93 static int xen_cpu_up_prepare_pv(unsigned int cpu); 94 static int xen_cpu_dead_pv(unsigned int cpu); 95 96 struct tls_descs { 97 struct desc_struct desc[3]; 98 }; 99 100 /* 101 * Updating the 3 TLS descriptors in the GDT on every task switch is 102 * surprisingly expensive so we avoid updating them if they haven't 103 * changed. Since Xen writes different descriptors than the one 104 * passed in the update_descriptor hypercall we keep shadow copies to 105 * compare against. 106 */ 107 static DEFINE_PER_CPU(struct tls_descs, shadow_tls_desc); 108 109 static void __init xen_pv_init_platform(void) 110 { 111 populate_extra_pte(fix_to_virt(FIX_PARAVIRT_BOOTMAP)); 112 113 set_fixmap(FIX_PARAVIRT_BOOTMAP, xen_start_info->shared_info); 114 HYPERVISOR_shared_info = (void *)fix_to_virt(FIX_PARAVIRT_BOOTMAP); 115 116 /* xen clock uses per-cpu vcpu_info, need to init it for boot cpu */ 117 xen_vcpu_info_reset(0); 118 119 /* pvclock is in shared info area */ 120 xen_init_time_ops(); 121 } 122 123 static void __init xen_pv_guest_late_init(void) 124 { 125 #ifndef CONFIG_SMP 126 /* Setup shared vcpu info for non-smp configurations */ 127 xen_setup_vcpu_info_placement(); 128 #endif 129 } 130 131 static __read_mostly unsigned int cpuid_leaf5_ecx_val; 132 static __read_mostly unsigned int cpuid_leaf5_edx_val; 133 134 static void xen_cpuid(unsigned int *ax, unsigned int *bx, 135 unsigned int *cx, unsigned int *dx) 136 { 137 unsigned maskebx = ~0; 138 139 /* 140 * Mask out inconvenient features, to try and disable as many 141 * unsupported kernel subsystems as possible. 142 */ 143 switch (*ax) { 144 case CPUID_MWAIT_LEAF: 145 /* Synthesize the values.. */ 146 *ax = 0; 147 *bx = 0; 148 *cx = cpuid_leaf5_ecx_val; 149 *dx = cpuid_leaf5_edx_val; 150 return; 151 152 case 0xb: 153 /* Suppress extended topology stuff */ 154 maskebx = 0; 155 break; 156 } 157 158 asm(XEN_EMULATE_PREFIX "cpuid" 159 : "=a" (*ax), 160 "=b" (*bx), 161 "=c" (*cx), 162 "=d" (*dx) 163 : "0" (*ax), "2" (*cx)); 164 165 *bx &= maskebx; 166 } 167 168 static bool __init xen_check_mwait(void) 169 { 170 #ifdef CONFIG_ACPI 171 struct xen_platform_op op = { 172 .cmd = XENPF_set_processor_pminfo, 173 .u.set_pminfo.id = -1, 174 .u.set_pminfo.type = XEN_PM_PDC, 175 }; 176 uint32_t buf[3]; 177 unsigned int ax, bx, cx, dx; 178 unsigned int mwait_mask; 179 180 /* We need to determine whether it is OK to expose the MWAIT 181 * capability to the kernel to harvest deeper than C3 states from ACPI 182 * _CST using the processor_harvest_xen.c module. For this to work, we 183 * need to gather the MWAIT_LEAF values (which the cstate.c code 184 * checks against). The hypervisor won't expose the MWAIT flag because 185 * it would break backwards compatibility; so we will find out directly 186 * from the hardware and hypercall. 187 */ 188 if (!xen_initial_domain()) 189 return false; 190 191 /* 192 * When running under platform earlier than Xen4.2, do not expose 193 * mwait, to avoid the risk of loading native acpi pad driver 194 */ 195 if (!xen_running_on_version_or_later(4, 2)) 196 return false; 197 198 ax = 1; 199 cx = 0; 200 201 native_cpuid(&ax, &bx, &cx, &dx); 202 203 mwait_mask = (1 << (X86_FEATURE_EST % 32)) | 204 (1 << (X86_FEATURE_MWAIT % 32)); 205 206 if ((cx & mwait_mask) != mwait_mask) 207 return false; 208 209 /* We need to emulate the MWAIT_LEAF and for that we need both 210 * ecx and edx. The hypercall provides only partial information. 211 */ 212 213 ax = CPUID_MWAIT_LEAF; 214 bx = 0; 215 cx = 0; 216 dx = 0; 217 218 native_cpuid(&ax, &bx, &cx, &dx); 219 220 /* Ask the Hypervisor whether to clear ACPI_PDC_C_C2C3_FFH. If so, 221 * don't expose MWAIT_LEAF and let ACPI pick the IOPORT version of C3. 222 */ 223 buf[0] = ACPI_PDC_REVISION_ID; 224 buf[1] = 1; 225 buf[2] = (ACPI_PDC_C_CAPABILITY_SMP | ACPI_PDC_EST_CAPABILITY_SWSMP); 226 227 set_xen_guest_handle(op.u.set_pminfo.pdc, buf); 228 229 if ((HYPERVISOR_platform_op(&op) == 0) && 230 (buf[2] & (ACPI_PDC_C_C1_FFH | ACPI_PDC_C_C2C3_FFH))) { 231 cpuid_leaf5_ecx_val = cx; 232 cpuid_leaf5_edx_val = dx; 233 } 234 return true; 235 #else 236 return false; 237 #endif 238 } 239 240 static bool __init xen_check_xsave(void) 241 { 242 unsigned int cx, xsave_mask; 243 244 cx = cpuid_ecx(1); 245 246 xsave_mask = (1 << (X86_FEATURE_XSAVE % 32)) | 247 (1 << (X86_FEATURE_OSXSAVE % 32)); 248 249 /* Xen will set CR4.OSXSAVE if supported and not disabled by force */ 250 return (cx & xsave_mask) == xsave_mask; 251 } 252 253 static void __init xen_init_capabilities(void) 254 { 255 setup_force_cpu_cap(X86_FEATURE_XENPV); 256 setup_clear_cpu_cap(X86_FEATURE_DCA); 257 setup_clear_cpu_cap(X86_FEATURE_APERFMPERF); 258 setup_clear_cpu_cap(X86_FEATURE_MTRR); 259 setup_clear_cpu_cap(X86_FEATURE_ACC); 260 setup_clear_cpu_cap(X86_FEATURE_X2APIC); 261 setup_clear_cpu_cap(X86_FEATURE_SME); 262 263 /* 264 * Xen PV would need some work to support PCID: CR3 handling as well 265 * as xen_flush_tlb_others() would need updating. 266 */ 267 setup_clear_cpu_cap(X86_FEATURE_PCID); 268 269 if (!xen_initial_domain()) 270 setup_clear_cpu_cap(X86_FEATURE_ACPI); 271 272 if (xen_check_mwait()) 273 setup_force_cpu_cap(X86_FEATURE_MWAIT); 274 else 275 setup_clear_cpu_cap(X86_FEATURE_MWAIT); 276 277 if (!xen_check_xsave()) { 278 setup_clear_cpu_cap(X86_FEATURE_XSAVE); 279 setup_clear_cpu_cap(X86_FEATURE_OSXSAVE); 280 } 281 } 282 283 static noinstr void xen_set_debugreg(int reg, unsigned long val) 284 { 285 HYPERVISOR_set_debugreg(reg, val); 286 } 287 288 static noinstr unsigned long xen_get_debugreg(int reg) 289 { 290 return HYPERVISOR_get_debugreg(reg); 291 } 292 293 static void xen_end_context_switch(struct task_struct *next) 294 { 295 xen_mc_flush(); 296 paravirt_end_context_switch(next); 297 } 298 299 static unsigned long xen_store_tr(void) 300 { 301 return 0; 302 } 303 304 /* 305 * Set the page permissions for a particular virtual address. If the 306 * address is a vmalloc mapping (or other non-linear mapping), then 307 * find the linear mapping of the page and also set its protections to 308 * match. 309 */ 310 static void set_aliased_prot(void *v, pgprot_t prot) 311 { 312 int level; 313 pte_t *ptep; 314 pte_t pte; 315 unsigned long pfn; 316 unsigned char dummy; 317 void *va; 318 319 ptep = lookup_address((unsigned long)v, &level); 320 BUG_ON(ptep == NULL); 321 322 pfn = pte_pfn(*ptep); 323 pte = pfn_pte(pfn, prot); 324 325 /* 326 * Careful: update_va_mapping() will fail if the virtual address 327 * we're poking isn't populated in the page tables. We don't 328 * need to worry about the direct map (that's always in the page 329 * tables), but we need to be careful about vmap space. In 330 * particular, the top level page table can lazily propagate 331 * entries between processes, so if we've switched mms since we 332 * vmapped the target in the first place, we might not have the 333 * top-level page table entry populated. 334 * 335 * We disable preemption because we want the same mm active when 336 * we probe the target and when we issue the hypercall. We'll 337 * have the same nominal mm, but if we're a kernel thread, lazy 338 * mm dropping could change our pgd. 339 * 340 * Out of an abundance of caution, this uses __get_user() to fault 341 * in the target address just in case there's some obscure case 342 * in which the target address isn't readable. 343 */ 344 345 preempt_disable(); 346 347 copy_from_kernel_nofault(&dummy, v, 1); 348 349 if (HYPERVISOR_update_va_mapping((unsigned long)v, pte, 0)) 350 BUG(); 351 352 va = __va(PFN_PHYS(pfn)); 353 354 if (va != v && HYPERVISOR_update_va_mapping((unsigned long)va, pte, 0)) 355 BUG(); 356 357 preempt_enable(); 358 } 359 360 static void xen_alloc_ldt(struct desc_struct *ldt, unsigned entries) 361 { 362 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE; 363 int i; 364 365 /* 366 * We need to mark the all aliases of the LDT pages RO. We 367 * don't need to call vm_flush_aliases(), though, since that's 368 * only responsible for flushing aliases out the TLBs, not the 369 * page tables, and Xen will flush the TLB for us if needed. 370 * 371 * To avoid confusing future readers: none of this is necessary 372 * to load the LDT. The hypervisor only checks this when the 373 * LDT is faulted in due to subsequent descriptor access. 374 */ 375 376 for (i = 0; i < entries; i += entries_per_page) 377 set_aliased_prot(ldt + i, PAGE_KERNEL_RO); 378 } 379 380 static void xen_free_ldt(struct desc_struct *ldt, unsigned entries) 381 { 382 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE; 383 int i; 384 385 for (i = 0; i < entries; i += entries_per_page) 386 set_aliased_prot(ldt + i, PAGE_KERNEL); 387 } 388 389 static void xen_set_ldt(const void *addr, unsigned entries) 390 { 391 struct mmuext_op *op; 392 struct multicall_space mcs = xen_mc_entry(sizeof(*op)); 393 394 trace_xen_cpu_set_ldt(addr, entries); 395 396 op = mcs.args; 397 op->cmd = MMUEXT_SET_LDT; 398 op->arg1.linear_addr = (unsigned long)addr; 399 op->arg2.nr_ents = entries; 400 401 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); 402 403 xen_mc_issue(PARAVIRT_LAZY_CPU); 404 } 405 406 static void xen_load_gdt(const struct desc_ptr *dtr) 407 { 408 unsigned long va = dtr->address; 409 unsigned int size = dtr->size + 1; 410 unsigned long pfn, mfn; 411 int level; 412 pte_t *ptep; 413 void *virt; 414 415 /* @size should be at most GDT_SIZE which is smaller than PAGE_SIZE. */ 416 BUG_ON(size > PAGE_SIZE); 417 BUG_ON(va & ~PAGE_MASK); 418 419 /* 420 * The GDT is per-cpu and is in the percpu data area. 421 * That can be virtually mapped, so we need to do a 422 * page-walk to get the underlying MFN for the 423 * hypercall. The page can also be in the kernel's 424 * linear range, so we need to RO that mapping too. 425 */ 426 ptep = lookup_address(va, &level); 427 BUG_ON(ptep == NULL); 428 429 pfn = pte_pfn(*ptep); 430 mfn = pfn_to_mfn(pfn); 431 virt = __va(PFN_PHYS(pfn)); 432 433 make_lowmem_page_readonly((void *)va); 434 make_lowmem_page_readonly(virt); 435 436 if (HYPERVISOR_set_gdt(&mfn, size / sizeof(struct desc_struct))) 437 BUG(); 438 } 439 440 /* 441 * load_gdt for early boot, when the gdt is only mapped once 442 */ 443 static void __init xen_load_gdt_boot(const struct desc_ptr *dtr) 444 { 445 unsigned long va = dtr->address; 446 unsigned int size = dtr->size + 1; 447 unsigned long pfn, mfn; 448 pte_t pte; 449 450 /* @size should be at most GDT_SIZE which is smaller than PAGE_SIZE. */ 451 BUG_ON(size > PAGE_SIZE); 452 BUG_ON(va & ~PAGE_MASK); 453 454 pfn = virt_to_pfn(va); 455 mfn = pfn_to_mfn(pfn); 456 457 pte = pfn_pte(pfn, PAGE_KERNEL_RO); 458 459 if (HYPERVISOR_update_va_mapping((unsigned long)va, pte, 0)) 460 BUG(); 461 462 if (HYPERVISOR_set_gdt(&mfn, size / sizeof(struct desc_struct))) 463 BUG(); 464 } 465 466 static inline bool desc_equal(const struct desc_struct *d1, 467 const struct desc_struct *d2) 468 { 469 return !memcmp(d1, d2, sizeof(*d1)); 470 } 471 472 static void load_TLS_descriptor(struct thread_struct *t, 473 unsigned int cpu, unsigned int i) 474 { 475 struct desc_struct *shadow = &per_cpu(shadow_tls_desc, cpu).desc[i]; 476 struct desc_struct *gdt; 477 xmaddr_t maddr; 478 struct multicall_space mc; 479 480 if (desc_equal(shadow, &t->tls_array[i])) 481 return; 482 483 *shadow = t->tls_array[i]; 484 485 gdt = get_cpu_gdt_rw(cpu); 486 maddr = arbitrary_virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]); 487 mc = __xen_mc_entry(0); 488 489 MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]); 490 } 491 492 static void xen_load_tls(struct thread_struct *t, unsigned int cpu) 493 { 494 /* 495 * In lazy mode we need to zero %fs, otherwise we may get an 496 * exception between the new %fs descriptor being loaded and 497 * %fs being effectively cleared at __switch_to(). 498 */ 499 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU) 500 loadsegment(fs, 0); 501 502 xen_mc_batch(); 503 504 load_TLS_descriptor(t, cpu, 0); 505 load_TLS_descriptor(t, cpu, 1); 506 load_TLS_descriptor(t, cpu, 2); 507 508 xen_mc_issue(PARAVIRT_LAZY_CPU); 509 } 510 511 static void xen_load_gs_index(unsigned int idx) 512 { 513 if (HYPERVISOR_set_segment_base(SEGBASE_GS_USER_SEL, idx)) 514 BUG(); 515 } 516 517 static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum, 518 const void *ptr) 519 { 520 xmaddr_t mach_lp = arbitrary_virt_to_machine(&dt[entrynum]); 521 u64 entry = *(u64 *)ptr; 522 523 trace_xen_cpu_write_ldt_entry(dt, entrynum, entry); 524 525 preempt_disable(); 526 527 xen_mc_flush(); 528 if (HYPERVISOR_update_descriptor(mach_lp.maddr, entry)) 529 BUG(); 530 531 preempt_enable(); 532 } 533 534 void noist_exc_debug(struct pt_regs *regs); 535 536 DEFINE_IDTENTRY_RAW(xenpv_exc_nmi) 537 { 538 /* On Xen PV, NMI doesn't use IST. The C part is the same as native. */ 539 exc_nmi(regs); 540 } 541 542 DEFINE_IDTENTRY_RAW_ERRORCODE(xenpv_exc_double_fault) 543 { 544 /* On Xen PV, DF doesn't use IST. The C part is the same as native. */ 545 exc_double_fault(regs, error_code); 546 } 547 548 DEFINE_IDTENTRY_RAW(xenpv_exc_debug) 549 { 550 /* 551 * There's no IST on Xen PV, but we still need to dispatch 552 * to the correct handler. 553 */ 554 if (user_mode(regs)) 555 noist_exc_debug(regs); 556 else 557 exc_debug(regs); 558 } 559 560 DEFINE_IDTENTRY_RAW(exc_xen_unknown_trap) 561 { 562 /* This should never happen and there is no way to handle it. */ 563 instrumentation_begin(); 564 pr_err("Unknown trap in Xen PV mode."); 565 BUG(); 566 instrumentation_end(); 567 } 568 569 #ifdef CONFIG_X86_MCE 570 DEFINE_IDTENTRY_RAW(xenpv_exc_machine_check) 571 { 572 /* 573 * There's no IST on Xen PV, but we still need to dispatch 574 * to the correct handler. 575 */ 576 if (user_mode(regs)) 577 noist_exc_machine_check(regs); 578 else 579 exc_machine_check(regs); 580 } 581 #endif 582 583 struct trap_array_entry { 584 void (*orig)(void); 585 void (*xen)(void); 586 bool ist_okay; 587 }; 588 589 #define TRAP_ENTRY(func, ist_ok) { \ 590 .orig = asm_##func, \ 591 .xen = xen_asm_##func, \ 592 .ist_okay = ist_ok } 593 594 #define TRAP_ENTRY_REDIR(func, ist_ok) { \ 595 .orig = asm_##func, \ 596 .xen = xen_asm_xenpv_##func, \ 597 .ist_okay = ist_ok } 598 599 static struct trap_array_entry trap_array[] = { 600 TRAP_ENTRY_REDIR(exc_debug, true ), 601 TRAP_ENTRY_REDIR(exc_double_fault, true ), 602 #ifdef CONFIG_X86_MCE 603 TRAP_ENTRY_REDIR(exc_machine_check, true ), 604 #endif 605 TRAP_ENTRY_REDIR(exc_nmi, true ), 606 TRAP_ENTRY(exc_int3, false ), 607 TRAP_ENTRY(exc_overflow, false ), 608 #ifdef CONFIG_IA32_EMULATION 609 { entry_INT80_compat, xen_entry_INT80_compat, false }, 610 #endif 611 TRAP_ENTRY(exc_page_fault, false ), 612 TRAP_ENTRY(exc_divide_error, false ), 613 TRAP_ENTRY(exc_bounds, false ), 614 TRAP_ENTRY(exc_invalid_op, false ), 615 TRAP_ENTRY(exc_device_not_available, false ), 616 TRAP_ENTRY(exc_coproc_segment_overrun, false ), 617 TRAP_ENTRY(exc_invalid_tss, false ), 618 TRAP_ENTRY(exc_segment_not_present, false ), 619 TRAP_ENTRY(exc_stack_segment, false ), 620 TRAP_ENTRY(exc_general_protection, false ), 621 TRAP_ENTRY(exc_spurious_interrupt_bug, false ), 622 TRAP_ENTRY(exc_coprocessor_error, false ), 623 TRAP_ENTRY(exc_alignment_check, false ), 624 TRAP_ENTRY(exc_simd_coprocessor_error, false ), 625 #ifdef CONFIG_X86_KERNEL_IBT 626 TRAP_ENTRY(exc_control_protection, false ), 627 #endif 628 }; 629 630 static bool __ref get_trap_addr(void **addr, unsigned int ist) 631 { 632 unsigned int nr; 633 bool ist_okay = false; 634 bool found = false; 635 636 /* 637 * Replace trap handler addresses by Xen specific ones. 638 * Check for known traps using IST and whitelist them. 639 * The debugger ones are the only ones we care about. 640 * Xen will handle faults like double_fault, so we should never see 641 * them. Warn if there's an unexpected IST-using fault handler. 642 */ 643 for (nr = 0; nr < ARRAY_SIZE(trap_array); nr++) { 644 struct trap_array_entry *entry = trap_array + nr; 645 646 if (*addr == entry->orig) { 647 *addr = entry->xen; 648 ist_okay = entry->ist_okay; 649 found = true; 650 break; 651 } 652 } 653 654 if (nr == ARRAY_SIZE(trap_array) && 655 *addr >= (void *)early_idt_handler_array[0] && 656 *addr < (void *)early_idt_handler_array[NUM_EXCEPTION_VECTORS]) { 657 nr = (*addr - (void *)early_idt_handler_array[0]) / 658 EARLY_IDT_HANDLER_SIZE; 659 *addr = (void *)xen_early_idt_handler_array[nr]; 660 found = true; 661 } 662 663 if (!found) 664 *addr = (void *)xen_asm_exc_xen_unknown_trap; 665 666 if (WARN_ON(found && ist != 0 && !ist_okay)) 667 return false; 668 669 return true; 670 } 671 672 static int cvt_gate_to_trap(int vector, const gate_desc *val, 673 struct trap_info *info) 674 { 675 unsigned long addr; 676 677 if (val->bits.type != GATE_TRAP && val->bits.type != GATE_INTERRUPT) 678 return 0; 679 680 info->vector = vector; 681 682 addr = gate_offset(val); 683 if (!get_trap_addr((void **)&addr, val->bits.ist)) 684 return 0; 685 info->address = addr; 686 687 info->cs = gate_segment(val); 688 info->flags = val->bits.dpl; 689 /* interrupt gates clear IF */ 690 if (val->bits.type == GATE_INTERRUPT) 691 info->flags |= 1 << 2; 692 693 return 1; 694 } 695 696 /* Locations of each CPU's IDT */ 697 static DEFINE_PER_CPU(struct desc_ptr, idt_desc); 698 699 /* Set an IDT entry. If the entry is part of the current IDT, then 700 also update Xen. */ 701 static void xen_write_idt_entry(gate_desc *dt, int entrynum, const gate_desc *g) 702 { 703 unsigned long p = (unsigned long)&dt[entrynum]; 704 unsigned long start, end; 705 706 trace_xen_cpu_write_idt_entry(dt, entrynum, g); 707 708 preempt_disable(); 709 710 start = __this_cpu_read(idt_desc.address); 711 end = start + __this_cpu_read(idt_desc.size) + 1; 712 713 xen_mc_flush(); 714 715 native_write_idt_entry(dt, entrynum, g); 716 717 if (p >= start && (p + 8) <= end) { 718 struct trap_info info[2]; 719 720 info[1].address = 0; 721 722 if (cvt_gate_to_trap(entrynum, g, &info[0])) 723 if (HYPERVISOR_set_trap_table(info)) 724 BUG(); 725 } 726 727 preempt_enable(); 728 } 729 730 static unsigned xen_convert_trap_info(const struct desc_ptr *desc, 731 struct trap_info *traps, bool full) 732 { 733 unsigned in, out, count; 734 735 count = (desc->size+1) / sizeof(gate_desc); 736 BUG_ON(count > 256); 737 738 for (in = out = 0; in < count; in++) { 739 gate_desc *entry = (gate_desc *)(desc->address) + in; 740 741 if (cvt_gate_to_trap(in, entry, &traps[out]) || full) 742 out++; 743 } 744 745 return out; 746 } 747 748 void xen_copy_trap_info(struct trap_info *traps) 749 { 750 const struct desc_ptr *desc = this_cpu_ptr(&idt_desc); 751 752 xen_convert_trap_info(desc, traps, true); 753 } 754 755 /* Load a new IDT into Xen. In principle this can be per-CPU, so we 756 hold a spinlock to protect the static traps[] array (static because 757 it avoids allocation, and saves stack space). */ 758 static void xen_load_idt(const struct desc_ptr *desc) 759 { 760 static DEFINE_SPINLOCK(lock); 761 static struct trap_info traps[257]; 762 unsigned out; 763 764 trace_xen_cpu_load_idt(desc); 765 766 spin_lock(&lock); 767 768 memcpy(this_cpu_ptr(&idt_desc), desc, sizeof(idt_desc)); 769 770 out = xen_convert_trap_info(desc, traps, false); 771 memset(&traps[out], 0, sizeof(traps[0])); 772 773 xen_mc_flush(); 774 if (HYPERVISOR_set_trap_table(traps)) 775 BUG(); 776 777 spin_unlock(&lock); 778 } 779 780 /* Write a GDT descriptor entry. Ignore LDT descriptors, since 781 they're handled differently. */ 782 static void xen_write_gdt_entry(struct desc_struct *dt, int entry, 783 const void *desc, int type) 784 { 785 trace_xen_cpu_write_gdt_entry(dt, entry, desc, type); 786 787 preempt_disable(); 788 789 switch (type) { 790 case DESC_LDT: 791 case DESC_TSS: 792 /* ignore */ 793 break; 794 795 default: { 796 xmaddr_t maddr = arbitrary_virt_to_machine(&dt[entry]); 797 798 xen_mc_flush(); 799 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc)) 800 BUG(); 801 } 802 803 } 804 805 preempt_enable(); 806 } 807 808 /* 809 * Version of write_gdt_entry for use at early boot-time needed to 810 * update an entry as simply as possible. 811 */ 812 static void __init xen_write_gdt_entry_boot(struct desc_struct *dt, int entry, 813 const void *desc, int type) 814 { 815 trace_xen_cpu_write_gdt_entry(dt, entry, desc, type); 816 817 switch (type) { 818 case DESC_LDT: 819 case DESC_TSS: 820 /* ignore */ 821 break; 822 823 default: { 824 xmaddr_t maddr = virt_to_machine(&dt[entry]); 825 826 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc)) 827 dt[entry] = *(struct desc_struct *)desc; 828 } 829 830 } 831 } 832 833 static void xen_load_sp0(unsigned long sp0) 834 { 835 struct multicall_space mcs; 836 837 mcs = xen_mc_entry(0); 838 MULTI_stack_switch(mcs.mc, __KERNEL_DS, sp0); 839 xen_mc_issue(PARAVIRT_LAZY_CPU); 840 this_cpu_write(cpu_tss_rw.x86_tss.sp0, sp0); 841 } 842 843 #ifdef CONFIG_X86_IOPL_IOPERM 844 static void xen_invalidate_io_bitmap(void) 845 { 846 struct physdev_set_iobitmap iobitmap = { 847 .bitmap = NULL, 848 .nr_ports = 0, 849 }; 850 851 native_tss_invalidate_io_bitmap(); 852 HYPERVISOR_physdev_op(PHYSDEVOP_set_iobitmap, &iobitmap); 853 } 854 855 static void xen_update_io_bitmap(void) 856 { 857 struct physdev_set_iobitmap iobitmap; 858 struct tss_struct *tss = this_cpu_ptr(&cpu_tss_rw); 859 860 native_tss_update_io_bitmap(); 861 862 iobitmap.bitmap = (uint8_t *)(&tss->x86_tss) + 863 tss->x86_tss.io_bitmap_base; 864 if (tss->x86_tss.io_bitmap_base == IO_BITMAP_OFFSET_INVALID) 865 iobitmap.nr_ports = 0; 866 else 867 iobitmap.nr_ports = IO_BITMAP_BITS; 868 869 HYPERVISOR_physdev_op(PHYSDEVOP_set_iobitmap, &iobitmap); 870 } 871 #endif 872 873 static void xen_io_delay(void) 874 { 875 } 876 877 static DEFINE_PER_CPU(unsigned long, xen_cr0_value); 878 879 static unsigned long xen_read_cr0(void) 880 { 881 unsigned long cr0 = this_cpu_read(xen_cr0_value); 882 883 if (unlikely(cr0 == 0)) { 884 cr0 = native_read_cr0(); 885 this_cpu_write(xen_cr0_value, cr0); 886 } 887 888 return cr0; 889 } 890 891 static void xen_write_cr0(unsigned long cr0) 892 { 893 struct multicall_space mcs; 894 895 this_cpu_write(xen_cr0_value, cr0); 896 897 /* Only pay attention to cr0.TS; everything else is 898 ignored. */ 899 mcs = xen_mc_entry(0); 900 901 MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0); 902 903 xen_mc_issue(PARAVIRT_LAZY_CPU); 904 } 905 906 static void xen_write_cr4(unsigned long cr4) 907 { 908 cr4 &= ~(X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PCE); 909 910 native_write_cr4(cr4); 911 } 912 913 static u64 xen_read_msr_safe(unsigned int msr, int *err) 914 { 915 u64 val; 916 917 if (pmu_msr_read(msr, &val, err)) 918 return val; 919 920 val = native_read_msr_safe(msr, err); 921 switch (msr) { 922 case MSR_IA32_APICBASE: 923 val &= ~X2APIC_ENABLE; 924 break; 925 } 926 return val; 927 } 928 929 static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high) 930 { 931 int ret; 932 unsigned int which; 933 u64 base; 934 935 ret = 0; 936 937 switch (msr) { 938 case MSR_FS_BASE: which = SEGBASE_FS; goto set; 939 case MSR_KERNEL_GS_BASE: which = SEGBASE_GS_USER; goto set; 940 case MSR_GS_BASE: which = SEGBASE_GS_KERNEL; goto set; 941 942 set: 943 base = ((u64)high << 32) | low; 944 if (HYPERVISOR_set_segment_base(which, base) != 0) 945 ret = -EIO; 946 break; 947 948 case MSR_STAR: 949 case MSR_CSTAR: 950 case MSR_LSTAR: 951 case MSR_SYSCALL_MASK: 952 case MSR_IA32_SYSENTER_CS: 953 case MSR_IA32_SYSENTER_ESP: 954 case MSR_IA32_SYSENTER_EIP: 955 /* Fast syscall setup is all done in hypercalls, so 956 these are all ignored. Stub them out here to stop 957 Xen console noise. */ 958 break; 959 960 default: 961 if (!pmu_msr_write(msr, low, high, &ret)) 962 ret = native_write_msr_safe(msr, low, high); 963 } 964 965 return ret; 966 } 967 968 static u64 xen_read_msr(unsigned int msr) 969 { 970 /* 971 * This will silently swallow a #GP from RDMSR. It may be worth 972 * changing that. 973 */ 974 int err; 975 976 return xen_read_msr_safe(msr, &err); 977 } 978 979 static void xen_write_msr(unsigned int msr, unsigned low, unsigned high) 980 { 981 /* 982 * This will silently swallow a #GP from WRMSR. It may be worth 983 * changing that. 984 */ 985 xen_write_msr_safe(msr, low, high); 986 } 987 988 /* This is called once we have the cpu_possible_mask */ 989 void __init xen_setup_vcpu_info_placement(void) 990 { 991 int cpu; 992 993 for_each_possible_cpu(cpu) { 994 /* Set up direct vCPU id mapping for PV guests. */ 995 per_cpu(xen_vcpu_id, cpu) = cpu; 996 xen_vcpu_setup(cpu); 997 } 998 999 pv_ops.irq.save_fl = __PV_IS_CALLEE_SAVE(xen_save_fl_direct); 1000 pv_ops.irq.irq_disable = __PV_IS_CALLEE_SAVE(xen_irq_disable_direct); 1001 pv_ops.irq.irq_enable = __PV_IS_CALLEE_SAVE(xen_irq_enable_direct); 1002 pv_ops.mmu.read_cr2 = __PV_IS_CALLEE_SAVE(xen_read_cr2_direct); 1003 } 1004 1005 static const struct pv_info xen_info __initconst = { 1006 .extra_user_64bit_cs = FLAT_USER_CS64, 1007 .name = "Xen", 1008 }; 1009 1010 static const typeof(pv_ops) xen_cpu_ops __initconst = { 1011 .cpu = { 1012 .cpuid = xen_cpuid, 1013 1014 .set_debugreg = xen_set_debugreg, 1015 .get_debugreg = xen_get_debugreg, 1016 1017 .read_cr0 = xen_read_cr0, 1018 .write_cr0 = xen_write_cr0, 1019 1020 .write_cr4 = xen_write_cr4, 1021 1022 .wbinvd = native_wbinvd, 1023 1024 .read_msr = xen_read_msr, 1025 .write_msr = xen_write_msr, 1026 1027 .read_msr_safe = xen_read_msr_safe, 1028 .write_msr_safe = xen_write_msr_safe, 1029 1030 .read_pmc = xen_read_pmc, 1031 1032 .load_tr_desc = paravirt_nop, 1033 .set_ldt = xen_set_ldt, 1034 .load_gdt = xen_load_gdt, 1035 .load_idt = xen_load_idt, 1036 .load_tls = xen_load_tls, 1037 .load_gs_index = xen_load_gs_index, 1038 1039 .alloc_ldt = xen_alloc_ldt, 1040 .free_ldt = xen_free_ldt, 1041 1042 .store_tr = xen_store_tr, 1043 1044 .write_ldt_entry = xen_write_ldt_entry, 1045 .write_gdt_entry = xen_write_gdt_entry, 1046 .write_idt_entry = xen_write_idt_entry, 1047 .load_sp0 = xen_load_sp0, 1048 1049 #ifdef CONFIG_X86_IOPL_IOPERM 1050 .invalidate_io_bitmap = xen_invalidate_io_bitmap, 1051 .update_io_bitmap = xen_update_io_bitmap, 1052 #endif 1053 .io_delay = xen_io_delay, 1054 1055 .start_context_switch = paravirt_start_context_switch, 1056 .end_context_switch = xen_end_context_switch, 1057 }, 1058 }; 1059 1060 static void xen_restart(char *msg) 1061 { 1062 xen_reboot(SHUTDOWN_reboot); 1063 } 1064 1065 static void xen_machine_halt(void) 1066 { 1067 xen_reboot(SHUTDOWN_poweroff); 1068 } 1069 1070 static void xen_machine_power_off(void) 1071 { 1072 if (pm_power_off) 1073 pm_power_off(); 1074 xen_reboot(SHUTDOWN_poweroff); 1075 } 1076 1077 static void xen_crash_shutdown(struct pt_regs *regs) 1078 { 1079 xen_reboot(SHUTDOWN_crash); 1080 } 1081 1082 static const struct machine_ops xen_machine_ops __initconst = { 1083 .restart = xen_restart, 1084 .halt = xen_machine_halt, 1085 .power_off = xen_machine_power_off, 1086 .shutdown = xen_machine_halt, 1087 .crash_shutdown = xen_crash_shutdown, 1088 .emergency_restart = xen_emergency_restart, 1089 }; 1090 1091 static unsigned char xen_get_nmi_reason(void) 1092 { 1093 unsigned char reason = 0; 1094 1095 /* Construct a value which looks like it came from port 0x61. */ 1096 if (test_bit(_XEN_NMIREASON_io_error, 1097 &HYPERVISOR_shared_info->arch.nmi_reason)) 1098 reason |= NMI_REASON_IOCHK; 1099 if (test_bit(_XEN_NMIREASON_pci_serr, 1100 &HYPERVISOR_shared_info->arch.nmi_reason)) 1101 reason |= NMI_REASON_SERR; 1102 1103 return reason; 1104 } 1105 1106 static void __init xen_boot_params_init_edd(void) 1107 { 1108 #if IS_ENABLED(CONFIG_EDD) 1109 struct xen_platform_op op; 1110 struct edd_info *edd_info; 1111 u32 *mbr_signature; 1112 unsigned nr; 1113 int ret; 1114 1115 edd_info = boot_params.eddbuf; 1116 mbr_signature = boot_params.edd_mbr_sig_buffer; 1117 1118 op.cmd = XENPF_firmware_info; 1119 1120 op.u.firmware_info.type = XEN_FW_DISK_INFO; 1121 for (nr = 0; nr < EDDMAXNR; nr++) { 1122 struct edd_info *info = edd_info + nr; 1123 1124 op.u.firmware_info.index = nr; 1125 info->params.length = sizeof(info->params); 1126 set_xen_guest_handle(op.u.firmware_info.u.disk_info.edd_params, 1127 &info->params); 1128 ret = HYPERVISOR_platform_op(&op); 1129 if (ret) 1130 break; 1131 1132 #define C(x) info->x = op.u.firmware_info.u.disk_info.x 1133 C(device); 1134 C(version); 1135 C(interface_support); 1136 C(legacy_max_cylinder); 1137 C(legacy_max_head); 1138 C(legacy_sectors_per_track); 1139 #undef C 1140 } 1141 boot_params.eddbuf_entries = nr; 1142 1143 op.u.firmware_info.type = XEN_FW_DISK_MBR_SIGNATURE; 1144 for (nr = 0; nr < EDD_MBR_SIG_MAX; nr++) { 1145 op.u.firmware_info.index = nr; 1146 ret = HYPERVISOR_platform_op(&op); 1147 if (ret) 1148 break; 1149 mbr_signature[nr] = op.u.firmware_info.u.disk_mbr_signature.mbr_signature; 1150 } 1151 boot_params.edd_mbr_sig_buf_entries = nr; 1152 #endif 1153 } 1154 1155 /* 1156 * Set up the GDT and segment registers for -fstack-protector. Until 1157 * we do this, we have to be careful not to call any stack-protected 1158 * function, which is most of the kernel. 1159 */ 1160 static void __init xen_setup_gdt(int cpu) 1161 { 1162 pv_ops.cpu.write_gdt_entry = xen_write_gdt_entry_boot; 1163 pv_ops.cpu.load_gdt = xen_load_gdt_boot; 1164 1165 switch_to_new_gdt(cpu); 1166 1167 pv_ops.cpu.write_gdt_entry = xen_write_gdt_entry; 1168 pv_ops.cpu.load_gdt = xen_load_gdt; 1169 } 1170 1171 static void __init xen_dom0_set_legacy_features(void) 1172 { 1173 x86_platform.legacy.rtc = 1; 1174 } 1175 1176 static void __init xen_domu_set_legacy_features(void) 1177 { 1178 x86_platform.legacy.rtc = 0; 1179 } 1180 1181 extern void early_xen_iret_patch(void); 1182 1183 /* First C function to be called on Xen boot */ 1184 asmlinkage __visible void __init xen_start_kernel(void) 1185 { 1186 struct physdev_set_iopl set_iopl; 1187 unsigned long initrd_start = 0; 1188 int rc; 1189 1190 if (!xen_start_info) 1191 return; 1192 1193 __text_gen_insn(&early_xen_iret_patch, 1194 JMP32_INSN_OPCODE, &early_xen_iret_patch, &xen_iret, 1195 JMP32_INSN_SIZE); 1196 1197 xen_domain_type = XEN_PV_DOMAIN; 1198 xen_start_flags = xen_start_info->flags; 1199 1200 xen_setup_features(); 1201 1202 /* Install Xen paravirt ops */ 1203 pv_info = xen_info; 1204 pv_ops.cpu = xen_cpu_ops.cpu; 1205 xen_init_irq_ops(); 1206 1207 /* 1208 * Setup xen_vcpu early because it is needed for 1209 * local_irq_disable(), irqs_disabled(), e.g. in printk(). 1210 * 1211 * Don't do the full vcpu_info placement stuff until we have 1212 * the cpu_possible_mask and a non-dummy shared_info. 1213 */ 1214 xen_vcpu_info_reset(0); 1215 1216 x86_platform.get_nmi_reason = xen_get_nmi_reason; 1217 1218 x86_init.resources.memory_setup = xen_memory_setup; 1219 x86_init.irqs.intr_mode_select = x86_init_noop; 1220 x86_init.irqs.intr_mode_init = x86_init_noop; 1221 x86_init.oem.arch_setup = xen_arch_setup; 1222 x86_init.oem.banner = xen_banner; 1223 x86_init.hyper.init_platform = xen_pv_init_platform; 1224 x86_init.hyper.guest_late_init = xen_pv_guest_late_init; 1225 1226 /* 1227 * Set up some pagetable state before starting to set any ptes. 1228 */ 1229 1230 xen_setup_machphys_mapping(); 1231 xen_init_mmu_ops(); 1232 1233 /* Prevent unwanted bits from being set in PTEs. */ 1234 __supported_pte_mask &= ~_PAGE_GLOBAL; 1235 __default_kernel_pte_mask &= ~_PAGE_GLOBAL; 1236 1237 /* Get mfn list */ 1238 xen_build_dynamic_phys_to_machine(); 1239 1240 /* Work out if we support NX */ 1241 get_cpu_cap(&boot_cpu_data); 1242 x86_configure_nx(); 1243 1244 /* 1245 * Set up kernel GDT and segment registers, mainly so that 1246 * -fstack-protector code can be executed. 1247 */ 1248 xen_setup_gdt(0); 1249 1250 /* Determine virtual and physical address sizes */ 1251 get_cpu_address_sizes(&boot_cpu_data); 1252 1253 /* Let's presume PV guests always boot on vCPU with id 0. */ 1254 per_cpu(xen_vcpu_id, 0) = 0; 1255 1256 idt_setup_early_handler(); 1257 1258 xen_init_capabilities(); 1259 1260 #ifdef CONFIG_X86_LOCAL_APIC 1261 /* 1262 * set up the basic apic ops. 1263 */ 1264 xen_init_apic(); 1265 #endif 1266 1267 machine_ops = xen_machine_ops; 1268 1269 /* 1270 * The only reliable way to retain the initial address of the 1271 * percpu gdt_page is to remember it here, so we can go and 1272 * mark it RW later, when the initial percpu area is freed. 1273 */ 1274 xen_initial_gdt = &per_cpu(gdt_page, 0); 1275 1276 xen_smp_init(); 1277 1278 #ifdef CONFIG_ACPI_NUMA 1279 /* 1280 * The pages we from Xen are not related to machine pages, so 1281 * any NUMA information the kernel tries to get from ACPI will 1282 * be meaningless. Prevent it from trying. 1283 */ 1284 disable_srat(); 1285 #endif 1286 WARN_ON(xen_cpuhp_setup(xen_cpu_up_prepare_pv, xen_cpu_dead_pv)); 1287 1288 local_irq_disable(); 1289 early_boot_irqs_disabled = true; 1290 1291 xen_raw_console_write("mapping kernel into physical memory\n"); 1292 xen_setup_kernel_pagetable((pgd_t *)xen_start_info->pt_base, 1293 xen_start_info->nr_pages); 1294 xen_reserve_special_pages(); 1295 1296 /* 1297 * We used to do this in xen_arch_setup, but that is too late 1298 * on AMD were early_cpu_init (run before ->arch_setup()) calls 1299 * early_amd_init which pokes 0xcf8 port. 1300 */ 1301 set_iopl.iopl = 1; 1302 rc = HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl); 1303 if (rc != 0) 1304 xen_raw_printk("physdev_op failed %d\n", rc); 1305 1306 1307 if (xen_start_info->mod_start) { 1308 if (xen_start_info->flags & SIF_MOD_START_PFN) 1309 initrd_start = PFN_PHYS(xen_start_info->mod_start); 1310 else 1311 initrd_start = __pa(xen_start_info->mod_start); 1312 } 1313 1314 /* Poke various useful things into boot_params */ 1315 boot_params.hdr.type_of_loader = (9 << 4) | 0; 1316 boot_params.hdr.ramdisk_image = initrd_start; 1317 boot_params.hdr.ramdisk_size = xen_start_info->mod_len; 1318 boot_params.hdr.cmd_line_ptr = __pa(xen_start_info->cmd_line); 1319 boot_params.hdr.hardware_subarch = X86_SUBARCH_XEN; 1320 1321 if (!xen_initial_domain()) { 1322 if (pci_xen) 1323 x86_init.pci.arch_init = pci_xen_init; 1324 x86_platform.set_legacy_features = 1325 xen_domu_set_legacy_features; 1326 } else { 1327 const struct dom0_vga_console_info *info = 1328 (void *)((char *)xen_start_info + 1329 xen_start_info->console.dom0.info_off); 1330 struct xen_platform_op op = { 1331 .cmd = XENPF_firmware_info, 1332 .interface_version = XENPF_INTERFACE_VERSION, 1333 .u.firmware_info.type = XEN_FW_KBD_SHIFT_FLAGS, 1334 }; 1335 1336 x86_platform.set_legacy_features = 1337 xen_dom0_set_legacy_features; 1338 xen_init_vga(info, xen_start_info->console.dom0.info_size); 1339 xen_start_info->console.domU.mfn = 0; 1340 xen_start_info->console.domU.evtchn = 0; 1341 1342 if (HYPERVISOR_platform_op(&op) == 0) 1343 boot_params.kbd_status = op.u.firmware_info.u.kbd_shift_flags; 1344 1345 /* Make sure ACS will be enabled */ 1346 pci_request_acs(); 1347 1348 xen_acpi_sleep_register(); 1349 1350 xen_boot_params_init_edd(); 1351 1352 #ifdef CONFIG_ACPI 1353 /* 1354 * Disable selecting "Firmware First mode" for correctable 1355 * memory errors, as this is the duty of the hypervisor to 1356 * decide. 1357 */ 1358 acpi_disable_cmcff = 1; 1359 #endif 1360 } 1361 1362 xen_add_preferred_consoles(); 1363 1364 #ifdef CONFIG_PCI 1365 /* PCI BIOS service won't work from a PV guest. */ 1366 pci_probe &= ~PCI_PROBE_BIOS; 1367 #endif 1368 xen_raw_console_write("about to get started...\n"); 1369 1370 /* We need this for printk timestamps */ 1371 xen_setup_runstate_info(0); 1372 1373 xen_efi_init(&boot_params); 1374 1375 /* Start the world */ 1376 cr4_init_shadow(); /* 32b kernel does this in i386_start_kernel() */ 1377 x86_64_start_reservations((char *)__pa_symbol(&boot_params)); 1378 } 1379 1380 static int xen_cpu_up_prepare_pv(unsigned int cpu) 1381 { 1382 int rc; 1383 1384 if (per_cpu(xen_vcpu, cpu) == NULL) 1385 return -ENODEV; 1386 1387 xen_setup_timer(cpu); 1388 1389 rc = xen_smp_intr_init(cpu); 1390 if (rc) { 1391 WARN(1, "xen_smp_intr_init() for CPU %d failed: %d\n", 1392 cpu, rc); 1393 return rc; 1394 } 1395 1396 rc = xen_smp_intr_init_pv(cpu); 1397 if (rc) { 1398 WARN(1, "xen_smp_intr_init_pv() for CPU %d failed: %d\n", 1399 cpu, rc); 1400 return rc; 1401 } 1402 1403 return 0; 1404 } 1405 1406 static int xen_cpu_dead_pv(unsigned int cpu) 1407 { 1408 xen_smp_intr_free(cpu); 1409 xen_smp_intr_free_pv(cpu); 1410 1411 xen_teardown_timer(cpu); 1412 1413 return 0; 1414 } 1415 1416 static uint32_t __init xen_platform_pv(void) 1417 { 1418 if (xen_pv_domain()) 1419 return xen_cpuid_base(); 1420 1421 return 0; 1422 } 1423 1424 const __initconst struct hypervisor_x86 x86_hyper_xen_pv = { 1425 .name = "Xen PV", 1426 .detect = xen_platform_pv, 1427 .type = X86_HYPER_XEN_PV, 1428 .runtime.pin_vcpu = xen_pin_vcpu, 1429 .ignore_nopv = true, 1430 }; 1431