1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Core of Xen paravirt_ops implementation. 4 * 5 * This file contains the xen_paravirt_ops structure itself, and the 6 * implementations for: 7 * - privileged instructions 8 * - interrupt flags 9 * - segment operations 10 * - booting and setup 11 * 12 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007 13 */ 14 15 #include <linux/cpu.h> 16 #include <linux/kernel.h> 17 #include <linux/init.h> 18 #include <linux/smp.h> 19 #include <linux/preempt.h> 20 #include <linux/hardirq.h> 21 #include <linux/percpu.h> 22 #include <linux/delay.h> 23 #include <linux/start_kernel.h> 24 #include <linux/sched.h> 25 #include <linux/kprobes.h> 26 #include <linux/bootmem.h> 27 #include <linux/export.h> 28 #include <linux/mm.h> 29 #include <linux/page-flags.h> 30 #include <linux/highmem.h> 31 #include <linux/console.h> 32 #include <linux/pci.h> 33 #include <linux/gfp.h> 34 #include <linux/memblock.h> 35 #include <linux/edd.h> 36 #include <linux/frame.h> 37 38 #include <xen/xen.h> 39 #include <xen/events.h> 40 #include <xen/interface/xen.h> 41 #include <xen/interface/version.h> 42 #include <xen/interface/physdev.h> 43 #include <xen/interface/vcpu.h> 44 #include <xen/interface/memory.h> 45 #include <xen/interface/nmi.h> 46 #include <xen/interface/xen-mca.h> 47 #include <xen/features.h> 48 #include <xen/page.h> 49 #include <xen/hvc-console.h> 50 #include <xen/acpi.h> 51 52 #include <asm/paravirt.h> 53 #include <asm/apic.h> 54 #include <asm/page.h> 55 #include <asm/xen/pci.h> 56 #include <asm/xen/hypercall.h> 57 #include <asm/xen/hypervisor.h> 58 #include <asm/xen/cpuid.h> 59 #include <asm/fixmap.h> 60 #include <asm/processor.h> 61 #include <asm/proto.h> 62 #include <asm/msr-index.h> 63 #include <asm/traps.h> 64 #include <asm/setup.h> 65 #include <asm/desc.h> 66 #include <asm/pgalloc.h> 67 #include <asm/pgtable.h> 68 #include <asm/tlbflush.h> 69 #include <asm/reboot.h> 70 #include <asm/stackprotector.h> 71 #include <asm/hypervisor.h> 72 #include <asm/mach_traps.h> 73 #include <asm/mwait.h> 74 #include <asm/pci_x86.h> 75 #include <asm/cpu.h> 76 77 #ifdef CONFIG_ACPI 78 #include <linux/acpi.h> 79 #include <asm/acpi.h> 80 #include <acpi/pdc_intel.h> 81 #include <acpi/processor.h> 82 #include <xen/interface/platform.h> 83 #endif 84 85 #include "xen-ops.h" 86 #include "mmu.h" 87 #include "smp.h" 88 #include "multicalls.h" 89 #include "pmu.h" 90 91 #include "../kernel/cpu/cpu.h" /* get_cpu_cap() */ 92 93 void *xen_initial_gdt; 94 95 static int xen_cpu_up_prepare_pv(unsigned int cpu); 96 static int xen_cpu_dead_pv(unsigned int cpu); 97 98 struct tls_descs { 99 struct desc_struct desc[3]; 100 }; 101 102 /* 103 * Updating the 3 TLS descriptors in the GDT on every task switch is 104 * surprisingly expensive so we avoid updating them if they haven't 105 * changed. Since Xen writes different descriptors than the one 106 * passed in the update_descriptor hypercall we keep shadow copies to 107 * compare against. 108 */ 109 static DEFINE_PER_CPU(struct tls_descs, shadow_tls_desc); 110 111 static void __init xen_banner(void) 112 { 113 unsigned version = HYPERVISOR_xen_version(XENVER_version, NULL); 114 struct xen_extraversion extra; 115 HYPERVISOR_xen_version(XENVER_extraversion, &extra); 116 117 pr_info("Booting paravirtualized kernel on %s\n", pv_info.name); 118 printk(KERN_INFO "Xen version: %d.%d%s%s\n", 119 version >> 16, version & 0xffff, extra.extraversion, 120 xen_feature(XENFEAT_mmu_pt_update_preserve_ad) ? " (preserve-AD)" : ""); 121 } 122 /* Check if running on Xen version (major, minor) or later */ 123 bool 124 xen_running_on_version_or_later(unsigned int major, unsigned int minor) 125 { 126 unsigned int version; 127 128 if (!xen_domain()) 129 return false; 130 131 version = HYPERVISOR_xen_version(XENVER_version, NULL); 132 if ((((version >> 16) == major) && ((version & 0xffff) >= minor)) || 133 ((version >> 16) > major)) 134 return true; 135 return false; 136 } 137 138 static __read_mostly unsigned int cpuid_leaf5_ecx_val; 139 static __read_mostly unsigned int cpuid_leaf5_edx_val; 140 141 static void xen_cpuid(unsigned int *ax, unsigned int *bx, 142 unsigned int *cx, unsigned int *dx) 143 { 144 unsigned maskebx = ~0; 145 146 /* 147 * Mask out inconvenient features, to try and disable as many 148 * unsupported kernel subsystems as possible. 149 */ 150 switch (*ax) { 151 case CPUID_MWAIT_LEAF: 152 /* Synthesize the values.. */ 153 *ax = 0; 154 *bx = 0; 155 *cx = cpuid_leaf5_ecx_val; 156 *dx = cpuid_leaf5_edx_val; 157 return; 158 159 case 0xb: 160 /* Suppress extended topology stuff */ 161 maskebx = 0; 162 break; 163 } 164 165 asm(XEN_EMULATE_PREFIX "cpuid" 166 : "=a" (*ax), 167 "=b" (*bx), 168 "=c" (*cx), 169 "=d" (*dx) 170 : "0" (*ax), "2" (*cx)); 171 172 *bx &= maskebx; 173 } 174 STACK_FRAME_NON_STANDARD(xen_cpuid); /* XEN_EMULATE_PREFIX */ 175 176 static bool __init xen_check_mwait(void) 177 { 178 #ifdef CONFIG_ACPI 179 struct xen_platform_op op = { 180 .cmd = XENPF_set_processor_pminfo, 181 .u.set_pminfo.id = -1, 182 .u.set_pminfo.type = XEN_PM_PDC, 183 }; 184 uint32_t buf[3]; 185 unsigned int ax, bx, cx, dx; 186 unsigned int mwait_mask; 187 188 /* We need to determine whether it is OK to expose the MWAIT 189 * capability to the kernel to harvest deeper than C3 states from ACPI 190 * _CST using the processor_harvest_xen.c module. For this to work, we 191 * need to gather the MWAIT_LEAF values (which the cstate.c code 192 * checks against). The hypervisor won't expose the MWAIT flag because 193 * it would break backwards compatibility; so we will find out directly 194 * from the hardware and hypercall. 195 */ 196 if (!xen_initial_domain()) 197 return false; 198 199 /* 200 * When running under platform earlier than Xen4.2, do not expose 201 * mwait, to avoid the risk of loading native acpi pad driver 202 */ 203 if (!xen_running_on_version_or_later(4, 2)) 204 return false; 205 206 ax = 1; 207 cx = 0; 208 209 native_cpuid(&ax, &bx, &cx, &dx); 210 211 mwait_mask = (1 << (X86_FEATURE_EST % 32)) | 212 (1 << (X86_FEATURE_MWAIT % 32)); 213 214 if ((cx & mwait_mask) != mwait_mask) 215 return false; 216 217 /* We need to emulate the MWAIT_LEAF and for that we need both 218 * ecx and edx. The hypercall provides only partial information. 219 */ 220 221 ax = CPUID_MWAIT_LEAF; 222 bx = 0; 223 cx = 0; 224 dx = 0; 225 226 native_cpuid(&ax, &bx, &cx, &dx); 227 228 /* Ask the Hypervisor whether to clear ACPI_PDC_C_C2C3_FFH. If so, 229 * don't expose MWAIT_LEAF and let ACPI pick the IOPORT version of C3. 230 */ 231 buf[0] = ACPI_PDC_REVISION_ID; 232 buf[1] = 1; 233 buf[2] = (ACPI_PDC_C_CAPABILITY_SMP | ACPI_PDC_EST_CAPABILITY_SWSMP); 234 235 set_xen_guest_handle(op.u.set_pminfo.pdc, buf); 236 237 if ((HYPERVISOR_platform_op(&op) == 0) && 238 (buf[2] & (ACPI_PDC_C_C1_FFH | ACPI_PDC_C_C2C3_FFH))) { 239 cpuid_leaf5_ecx_val = cx; 240 cpuid_leaf5_edx_val = dx; 241 } 242 return true; 243 #else 244 return false; 245 #endif 246 } 247 248 static bool __init xen_check_xsave(void) 249 { 250 unsigned int cx, xsave_mask; 251 252 cx = cpuid_ecx(1); 253 254 xsave_mask = (1 << (X86_FEATURE_XSAVE % 32)) | 255 (1 << (X86_FEATURE_OSXSAVE % 32)); 256 257 /* Xen will set CR4.OSXSAVE if supported and not disabled by force */ 258 return (cx & xsave_mask) == xsave_mask; 259 } 260 261 static void __init xen_init_capabilities(void) 262 { 263 setup_force_cpu_cap(X86_FEATURE_XENPV); 264 setup_clear_cpu_cap(X86_FEATURE_DCA); 265 setup_clear_cpu_cap(X86_FEATURE_APERFMPERF); 266 setup_clear_cpu_cap(X86_FEATURE_MTRR); 267 setup_clear_cpu_cap(X86_FEATURE_ACC); 268 setup_clear_cpu_cap(X86_FEATURE_X2APIC); 269 setup_clear_cpu_cap(X86_FEATURE_SME); 270 271 /* 272 * Xen PV would need some work to support PCID: CR3 handling as well 273 * as xen_flush_tlb_others() would need updating. 274 */ 275 setup_clear_cpu_cap(X86_FEATURE_PCID); 276 277 if (!xen_initial_domain()) 278 setup_clear_cpu_cap(X86_FEATURE_ACPI); 279 280 if (xen_check_mwait()) 281 setup_force_cpu_cap(X86_FEATURE_MWAIT); 282 else 283 setup_clear_cpu_cap(X86_FEATURE_MWAIT); 284 285 if (!xen_check_xsave()) { 286 setup_clear_cpu_cap(X86_FEATURE_XSAVE); 287 setup_clear_cpu_cap(X86_FEATURE_OSXSAVE); 288 } 289 } 290 291 static void xen_set_debugreg(int reg, unsigned long val) 292 { 293 HYPERVISOR_set_debugreg(reg, val); 294 } 295 296 static unsigned long xen_get_debugreg(int reg) 297 { 298 return HYPERVISOR_get_debugreg(reg); 299 } 300 301 static void xen_end_context_switch(struct task_struct *next) 302 { 303 xen_mc_flush(); 304 paravirt_end_context_switch(next); 305 } 306 307 static unsigned long xen_store_tr(void) 308 { 309 return 0; 310 } 311 312 /* 313 * Set the page permissions for a particular virtual address. If the 314 * address is a vmalloc mapping (or other non-linear mapping), then 315 * find the linear mapping of the page and also set its protections to 316 * match. 317 */ 318 static void set_aliased_prot(void *v, pgprot_t prot) 319 { 320 int level; 321 pte_t *ptep; 322 pte_t pte; 323 unsigned long pfn; 324 struct page *page; 325 unsigned char dummy; 326 327 ptep = lookup_address((unsigned long)v, &level); 328 BUG_ON(ptep == NULL); 329 330 pfn = pte_pfn(*ptep); 331 page = pfn_to_page(pfn); 332 333 pte = pfn_pte(pfn, prot); 334 335 /* 336 * Careful: update_va_mapping() will fail if the virtual address 337 * we're poking isn't populated in the page tables. We don't 338 * need to worry about the direct map (that's always in the page 339 * tables), but we need to be careful about vmap space. In 340 * particular, the top level page table can lazily propagate 341 * entries between processes, so if we've switched mms since we 342 * vmapped the target in the first place, we might not have the 343 * top-level page table entry populated. 344 * 345 * We disable preemption because we want the same mm active when 346 * we probe the target and when we issue the hypercall. We'll 347 * have the same nominal mm, but if we're a kernel thread, lazy 348 * mm dropping could change our pgd. 349 * 350 * Out of an abundance of caution, this uses __get_user() to fault 351 * in the target address just in case there's some obscure case 352 * in which the target address isn't readable. 353 */ 354 355 preempt_disable(); 356 357 probe_kernel_read(&dummy, v, 1); 358 359 if (HYPERVISOR_update_va_mapping((unsigned long)v, pte, 0)) 360 BUG(); 361 362 if (!PageHighMem(page)) { 363 void *av = __va(PFN_PHYS(pfn)); 364 365 if (av != v) 366 if (HYPERVISOR_update_va_mapping((unsigned long)av, pte, 0)) 367 BUG(); 368 } else 369 kmap_flush_unused(); 370 371 preempt_enable(); 372 } 373 374 static void xen_alloc_ldt(struct desc_struct *ldt, unsigned entries) 375 { 376 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE; 377 int i; 378 379 /* 380 * We need to mark the all aliases of the LDT pages RO. We 381 * don't need to call vm_flush_aliases(), though, since that's 382 * only responsible for flushing aliases out the TLBs, not the 383 * page tables, and Xen will flush the TLB for us if needed. 384 * 385 * To avoid confusing future readers: none of this is necessary 386 * to load the LDT. The hypervisor only checks this when the 387 * LDT is faulted in due to subsequent descriptor access. 388 */ 389 390 for (i = 0; i < entries; i += entries_per_page) 391 set_aliased_prot(ldt + i, PAGE_KERNEL_RO); 392 } 393 394 static void xen_free_ldt(struct desc_struct *ldt, unsigned entries) 395 { 396 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE; 397 int i; 398 399 for (i = 0; i < entries; i += entries_per_page) 400 set_aliased_prot(ldt + i, PAGE_KERNEL); 401 } 402 403 static void xen_set_ldt(const void *addr, unsigned entries) 404 { 405 struct mmuext_op *op; 406 struct multicall_space mcs = xen_mc_entry(sizeof(*op)); 407 408 trace_xen_cpu_set_ldt(addr, entries); 409 410 op = mcs.args; 411 op->cmd = MMUEXT_SET_LDT; 412 op->arg1.linear_addr = (unsigned long)addr; 413 op->arg2.nr_ents = entries; 414 415 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); 416 417 xen_mc_issue(PARAVIRT_LAZY_CPU); 418 } 419 420 static void xen_load_gdt(const struct desc_ptr *dtr) 421 { 422 unsigned long va = dtr->address; 423 unsigned int size = dtr->size + 1; 424 unsigned pages = DIV_ROUND_UP(size, PAGE_SIZE); 425 unsigned long frames[pages]; 426 int f; 427 428 /* 429 * A GDT can be up to 64k in size, which corresponds to 8192 430 * 8-byte entries, or 16 4k pages.. 431 */ 432 433 BUG_ON(size > 65536); 434 BUG_ON(va & ~PAGE_MASK); 435 436 for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) { 437 int level; 438 pte_t *ptep; 439 unsigned long pfn, mfn; 440 void *virt; 441 442 /* 443 * The GDT is per-cpu and is in the percpu data area. 444 * That can be virtually mapped, so we need to do a 445 * page-walk to get the underlying MFN for the 446 * hypercall. The page can also be in the kernel's 447 * linear range, so we need to RO that mapping too. 448 */ 449 ptep = lookup_address(va, &level); 450 BUG_ON(ptep == NULL); 451 452 pfn = pte_pfn(*ptep); 453 mfn = pfn_to_mfn(pfn); 454 virt = __va(PFN_PHYS(pfn)); 455 456 frames[f] = mfn; 457 458 make_lowmem_page_readonly((void *)va); 459 make_lowmem_page_readonly(virt); 460 } 461 462 if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct))) 463 BUG(); 464 } 465 466 /* 467 * load_gdt for early boot, when the gdt is only mapped once 468 */ 469 static void __init xen_load_gdt_boot(const struct desc_ptr *dtr) 470 { 471 unsigned long va = dtr->address; 472 unsigned int size = dtr->size + 1; 473 unsigned pages = DIV_ROUND_UP(size, PAGE_SIZE); 474 unsigned long frames[pages]; 475 int f; 476 477 /* 478 * A GDT can be up to 64k in size, which corresponds to 8192 479 * 8-byte entries, or 16 4k pages.. 480 */ 481 482 BUG_ON(size > 65536); 483 BUG_ON(va & ~PAGE_MASK); 484 485 for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) { 486 pte_t pte; 487 unsigned long pfn, mfn; 488 489 pfn = virt_to_pfn(va); 490 mfn = pfn_to_mfn(pfn); 491 492 pte = pfn_pte(pfn, PAGE_KERNEL_RO); 493 494 if (HYPERVISOR_update_va_mapping((unsigned long)va, pte, 0)) 495 BUG(); 496 497 frames[f] = mfn; 498 } 499 500 if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct))) 501 BUG(); 502 } 503 504 static inline bool desc_equal(const struct desc_struct *d1, 505 const struct desc_struct *d2) 506 { 507 return !memcmp(d1, d2, sizeof(*d1)); 508 } 509 510 static void load_TLS_descriptor(struct thread_struct *t, 511 unsigned int cpu, unsigned int i) 512 { 513 struct desc_struct *shadow = &per_cpu(shadow_tls_desc, cpu).desc[i]; 514 struct desc_struct *gdt; 515 xmaddr_t maddr; 516 struct multicall_space mc; 517 518 if (desc_equal(shadow, &t->tls_array[i])) 519 return; 520 521 *shadow = t->tls_array[i]; 522 523 gdt = get_cpu_gdt_rw(cpu); 524 maddr = arbitrary_virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]); 525 mc = __xen_mc_entry(0); 526 527 MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]); 528 } 529 530 static void xen_load_tls(struct thread_struct *t, unsigned int cpu) 531 { 532 /* 533 * XXX sleazy hack: If we're being called in a lazy-cpu zone 534 * and lazy gs handling is enabled, it means we're in a 535 * context switch, and %gs has just been saved. This means we 536 * can zero it out to prevent faults on exit from the 537 * hypervisor if the next process has no %gs. Either way, it 538 * has been saved, and the new value will get loaded properly. 539 * This will go away as soon as Xen has been modified to not 540 * save/restore %gs for normal hypercalls. 541 * 542 * On x86_64, this hack is not used for %gs, because gs points 543 * to KERNEL_GS_BASE (and uses it for PDA references), so we 544 * must not zero %gs on x86_64 545 * 546 * For x86_64, we need to zero %fs, otherwise we may get an 547 * exception between the new %fs descriptor being loaded and 548 * %fs being effectively cleared at __switch_to(). 549 */ 550 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU) { 551 #ifdef CONFIG_X86_32 552 lazy_load_gs(0); 553 #else 554 loadsegment(fs, 0); 555 #endif 556 } 557 558 xen_mc_batch(); 559 560 load_TLS_descriptor(t, cpu, 0); 561 load_TLS_descriptor(t, cpu, 1); 562 load_TLS_descriptor(t, cpu, 2); 563 564 xen_mc_issue(PARAVIRT_LAZY_CPU); 565 } 566 567 #ifdef CONFIG_X86_64 568 static void xen_load_gs_index(unsigned int idx) 569 { 570 if (HYPERVISOR_set_segment_base(SEGBASE_GS_USER_SEL, idx)) 571 BUG(); 572 } 573 #endif 574 575 static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum, 576 const void *ptr) 577 { 578 xmaddr_t mach_lp = arbitrary_virt_to_machine(&dt[entrynum]); 579 u64 entry = *(u64 *)ptr; 580 581 trace_xen_cpu_write_ldt_entry(dt, entrynum, entry); 582 583 preempt_disable(); 584 585 xen_mc_flush(); 586 if (HYPERVISOR_update_descriptor(mach_lp.maddr, entry)) 587 BUG(); 588 589 preempt_enable(); 590 } 591 592 #ifdef CONFIG_X86_64 593 struct trap_array_entry { 594 void (*orig)(void); 595 void (*xen)(void); 596 bool ist_okay; 597 }; 598 599 static struct trap_array_entry trap_array[] = { 600 { debug, xen_xendebug, true }, 601 { int3, xen_xenint3, true }, 602 { double_fault, xen_double_fault, true }, 603 #ifdef CONFIG_X86_MCE 604 { machine_check, xen_machine_check, true }, 605 #endif 606 { nmi, xen_xennmi, true }, 607 { overflow, xen_overflow, false }, 608 #ifdef CONFIG_IA32_EMULATION 609 { entry_INT80_compat, xen_entry_INT80_compat, false }, 610 #endif 611 { page_fault, xen_page_fault, false }, 612 { divide_error, xen_divide_error, false }, 613 { bounds, xen_bounds, false }, 614 { invalid_op, xen_invalid_op, false }, 615 { device_not_available, xen_device_not_available, false }, 616 { coprocessor_segment_overrun, xen_coprocessor_segment_overrun, false }, 617 { invalid_TSS, xen_invalid_TSS, false }, 618 { segment_not_present, xen_segment_not_present, false }, 619 { stack_segment, xen_stack_segment, false }, 620 { general_protection, xen_general_protection, false }, 621 { spurious_interrupt_bug, xen_spurious_interrupt_bug, false }, 622 { coprocessor_error, xen_coprocessor_error, false }, 623 { alignment_check, xen_alignment_check, false }, 624 { simd_coprocessor_error, xen_simd_coprocessor_error, false }, 625 }; 626 627 static bool __ref get_trap_addr(void **addr, unsigned int ist) 628 { 629 unsigned int nr; 630 bool ist_okay = false; 631 632 /* 633 * Replace trap handler addresses by Xen specific ones. 634 * Check for known traps using IST and whitelist them. 635 * The debugger ones are the only ones we care about. 636 * Xen will handle faults like double_fault, * so we should never see 637 * them. Warn if there's an unexpected IST-using fault handler. 638 */ 639 for (nr = 0; nr < ARRAY_SIZE(trap_array); nr++) { 640 struct trap_array_entry *entry = trap_array + nr; 641 642 if (*addr == entry->orig) { 643 *addr = entry->xen; 644 ist_okay = entry->ist_okay; 645 break; 646 } 647 } 648 649 if (nr == ARRAY_SIZE(trap_array) && 650 *addr >= (void *)early_idt_handler_array[0] && 651 *addr < (void *)early_idt_handler_array[NUM_EXCEPTION_VECTORS]) { 652 nr = (*addr - (void *)early_idt_handler_array[0]) / 653 EARLY_IDT_HANDLER_SIZE; 654 *addr = (void *)xen_early_idt_handler_array[nr]; 655 } 656 657 if (WARN_ON(ist != 0 && !ist_okay)) 658 return false; 659 660 return true; 661 } 662 #endif 663 664 static int cvt_gate_to_trap(int vector, const gate_desc *val, 665 struct trap_info *info) 666 { 667 unsigned long addr; 668 669 if (val->bits.type != GATE_TRAP && val->bits.type != GATE_INTERRUPT) 670 return 0; 671 672 info->vector = vector; 673 674 addr = gate_offset(val); 675 #ifdef CONFIG_X86_64 676 if (!get_trap_addr((void **)&addr, val->bits.ist)) 677 return 0; 678 #endif /* CONFIG_X86_64 */ 679 info->address = addr; 680 681 info->cs = gate_segment(val); 682 info->flags = val->bits.dpl; 683 /* interrupt gates clear IF */ 684 if (val->bits.type == GATE_INTERRUPT) 685 info->flags |= 1 << 2; 686 687 return 1; 688 } 689 690 /* Locations of each CPU's IDT */ 691 static DEFINE_PER_CPU(struct desc_ptr, idt_desc); 692 693 /* Set an IDT entry. If the entry is part of the current IDT, then 694 also update Xen. */ 695 static void xen_write_idt_entry(gate_desc *dt, int entrynum, const gate_desc *g) 696 { 697 unsigned long p = (unsigned long)&dt[entrynum]; 698 unsigned long start, end; 699 700 trace_xen_cpu_write_idt_entry(dt, entrynum, g); 701 702 preempt_disable(); 703 704 start = __this_cpu_read(idt_desc.address); 705 end = start + __this_cpu_read(idt_desc.size) + 1; 706 707 xen_mc_flush(); 708 709 native_write_idt_entry(dt, entrynum, g); 710 711 if (p >= start && (p + 8) <= end) { 712 struct trap_info info[2]; 713 714 info[1].address = 0; 715 716 if (cvt_gate_to_trap(entrynum, g, &info[0])) 717 if (HYPERVISOR_set_trap_table(info)) 718 BUG(); 719 } 720 721 preempt_enable(); 722 } 723 724 static void xen_convert_trap_info(const struct desc_ptr *desc, 725 struct trap_info *traps) 726 { 727 unsigned in, out, count; 728 729 count = (desc->size+1) / sizeof(gate_desc); 730 BUG_ON(count > 256); 731 732 for (in = out = 0; in < count; in++) { 733 gate_desc *entry = (gate_desc *)(desc->address) + in; 734 735 if (cvt_gate_to_trap(in, entry, &traps[out])) 736 out++; 737 } 738 traps[out].address = 0; 739 } 740 741 void xen_copy_trap_info(struct trap_info *traps) 742 { 743 const struct desc_ptr *desc = this_cpu_ptr(&idt_desc); 744 745 xen_convert_trap_info(desc, traps); 746 } 747 748 /* Load a new IDT into Xen. In principle this can be per-CPU, so we 749 hold a spinlock to protect the static traps[] array (static because 750 it avoids allocation, and saves stack space). */ 751 static void xen_load_idt(const struct desc_ptr *desc) 752 { 753 static DEFINE_SPINLOCK(lock); 754 static struct trap_info traps[257]; 755 756 trace_xen_cpu_load_idt(desc); 757 758 spin_lock(&lock); 759 760 memcpy(this_cpu_ptr(&idt_desc), desc, sizeof(idt_desc)); 761 762 xen_convert_trap_info(desc, traps); 763 764 xen_mc_flush(); 765 if (HYPERVISOR_set_trap_table(traps)) 766 BUG(); 767 768 spin_unlock(&lock); 769 } 770 771 /* Write a GDT descriptor entry. Ignore LDT descriptors, since 772 they're handled differently. */ 773 static void xen_write_gdt_entry(struct desc_struct *dt, int entry, 774 const void *desc, int type) 775 { 776 trace_xen_cpu_write_gdt_entry(dt, entry, desc, type); 777 778 preempt_disable(); 779 780 switch (type) { 781 case DESC_LDT: 782 case DESC_TSS: 783 /* ignore */ 784 break; 785 786 default: { 787 xmaddr_t maddr = arbitrary_virt_to_machine(&dt[entry]); 788 789 xen_mc_flush(); 790 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc)) 791 BUG(); 792 } 793 794 } 795 796 preempt_enable(); 797 } 798 799 /* 800 * Version of write_gdt_entry for use at early boot-time needed to 801 * update an entry as simply as possible. 802 */ 803 static void __init xen_write_gdt_entry_boot(struct desc_struct *dt, int entry, 804 const void *desc, int type) 805 { 806 trace_xen_cpu_write_gdt_entry(dt, entry, desc, type); 807 808 switch (type) { 809 case DESC_LDT: 810 case DESC_TSS: 811 /* ignore */ 812 break; 813 814 default: { 815 xmaddr_t maddr = virt_to_machine(&dt[entry]); 816 817 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc)) 818 dt[entry] = *(struct desc_struct *)desc; 819 } 820 821 } 822 } 823 824 static void xen_load_sp0(unsigned long sp0) 825 { 826 struct multicall_space mcs; 827 828 mcs = xen_mc_entry(0); 829 MULTI_stack_switch(mcs.mc, __KERNEL_DS, sp0); 830 xen_mc_issue(PARAVIRT_LAZY_CPU); 831 this_cpu_write(cpu_tss_rw.x86_tss.sp0, sp0); 832 } 833 834 void xen_set_iopl_mask(unsigned mask) 835 { 836 struct physdev_set_iopl set_iopl; 837 838 /* Force the change at ring 0. */ 839 set_iopl.iopl = (mask == 0) ? 1 : (mask >> 12) & 3; 840 HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl); 841 } 842 843 static void xen_io_delay(void) 844 { 845 } 846 847 static DEFINE_PER_CPU(unsigned long, xen_cr0_value); 848 849 static unsigned long xen_read_cr0(void) 850 { 851 unsigned long cr0 = this_cpu_read(xen_cr0_value); 852 853 if (unlikely(cr0 == 0)) { 854 cr0 = native_read_cr0(); 855 this_cpu_write(xen_cr0_value, cr0); 856 } 857 858 return cr0; 859 } 860 861 static void xen_write_cr0(unsigned long cr0) 862 { 863 struct multicall_space mcs; 864 865 this_cpu_write(xen_cr0_value, cr0); 866 867 /* Only pay attention to cr0.TS; everything else is 868 ignored. */ 869 mcs = xen_mc_entry(0); 870 871 MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0); 872 873 xen_mc_issue(PARAVIRT_LAZY_CPU); 874 } 875 876 static void xen_write_cr4(unsigned long cr4) 877 { 878 cr4 &= ~(X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PCE); 879 880 native_write_cr4(cr4); 881 } 882 #ifdef CONFIG_X86_64 883 static inline unsigned long xen_read_cr8(void) 884 { 885 return 0; 886 } 887 static inline void xen_write_cr8(unsigned long val) 888 { 889 BUG_ON(val); 890 } 891 #endif 892 893 static u64 xen_read_msr_safe(unsigned int msr, int *err) 894 { 895 u64 val; 896 897 if (pmu_msr_read(msr, &val, err)) 898 return val; 899 900 val = native_read_msr_safe(msr, err); 901 switch (msr) { 902 case MSR_IA32_APICBASE: 903 #ifdef CONFIG_X86_X2APIC 904 if (!(cpuid_ecx(1) & (1 << (X86_FEATURE_X2APIC & 31)))) 905 #endif 906 val &= ~X2APIC_ENABLE; 907 break; 908 } 909 return val; 910 } 911 912 static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high) 913 { 914 int ret; 915 916 ret = 0; 917 918 switch (msr) { 919 #ifdef CONFIG_X86_64 920 unsigned which; 921 u64 base; 922 923 case MSR_FS_BASE: which = SEGBASE_FS; goto set; 924 case MSR_KERNEL_GS_BASE: which = SEGBASE_GS_USER; goto set; 925 case MSR_GS_BASE: which = SEGBASE_GS_KERNEL; goto set; 926 927 set: 928 base = ((u64)high << 32) | low; 929 if (HYPERVISOR_set_segment_base(which, base) != 0) 930 ret = -EIO; 931 break; 932 #endif 933 934 case MSR_STAR: 935 case MSR_CSTAR: 936 case MSR_LSTAR: 937 case MSR_SYSCALL_MASK: 938 case MSR_IA32_SYSENTER_CS: 939 case MSR_IA32_SYSENTER_ESP: 940 case MSR_IA32_SYSENTER_EIP: 941 /* Fast syscall setup is all done in hypercalls, so 942 these are all ignored. Stub them out here to stop 943 Xen console noise. */ 944 break; 945 946 default: 947 if (!pmu_msr_write(msr, low, high, &ret)) 948 ret = native_write_msr_safe(msr, low, high); 949 } 950 951 return ret; 952 } 953 954 static u64 xen_read_msr(unsigned int msr) 955 { 956 /* 957 * This will silently swallow a #GP from RDMSR. It may be worth 958 * changing that. 959 */ 960 int err; 961 962 return xen_read_msr_safe(msr, &err); 963 } 964 965 static void xen_write_msr(unsigned int msr, unsigned low, unsigned high) 966 { 967 /* 968 * This will silently swallow a #GP from WRMSR. It may be worth 969 * changing that. 970 */ 971 xen_write_msr_safe(msr, low, high); 972 } 973 974 void xen_setup_shared_info(void) 975 { 976 set_fixmap(FIX_PARAVIRT_BOOTMAP, xen_start_info->shared_info); 977 978 HYPERVISOR_shared_info = 979 (struct shared_info *)fix_to_virt(FIX_PARAVIRT_BOOTMAP); 980 981 xen_setup_mfn_list_list(); 982 983 if (system_state == SYSTEM_BOOTING) { 984 #ifndef CONFIG_SMP 985 /* 986 * In UP this is as good a place as any to set up shared info. 987 * Limit this to boot only, at restore vcpu setup is done via 988 * xen_vcpu_restore(). 989 */ 990 xen_setup_vcpu_info_placement(); 991 #endif 992 /* 993 * Now that shared info is set up we can start using routines 994 * that point to pvclock area. 995 */ 996 xen_init_time_ops(); 997 } 998 } 999 1000 /* This is called once we have the cpu_possible_mask */ 1001 void __ref xen_setup_vcpu_info_placement(void) 1002 { 1003 int cpu; 1004 1005 for_each_possible_cpu(cpu) { 1006 /* Set up direct vCPU id mapping for PV guests. */ 1007 per_cpu(xen_vcpu_id, cpu) = cpu; 1008 1009 /* 1010 * xen_vcpu_setup(cpu) can fail -- in which case it 1011 * falls back to the shared_info version for cpus 1012 * where xen_vcpu_nr(cpu) < MAX_VIRT_CPUS. 1013 * 1014 * xen_cpu_up_prepare_pv() handles the rest by failing 1015 * them in hotplug. 1016 */ 1017 (void) xen_vcpu_setup(cpu); 1018 } 1019 1020 /* 1021 * xen_vcpu_setup managed to place the vcpu_info within the 1022 * percpu area for all cpus, so make use of it. 1023 */ 1024 if (xen_have_vcpu_info_placement) { 1025 pv_irq_ops.save_fl = __PV_IS_CALLEE_SAVE(xen_save_fl_direct); 1026 pv_irq_ops.restore_fl = __PV_IS_CALLEE_SAVE(xen_restore_fl_direct); 1027 pv_irq_ops.irq_disable = __PV_IS_CALLEE_SAVE(xen_irq_disable_direct); 1028 pv_irq_ops.irq_enable = __PV_IS_CALLEE_SAVE(xen_irq_enable_direct); 1029 pv_mmu_ops.read_cr2 = xen_read_cr2_direct; 1030 } 1031 } 1032 1033 static const struct pv_info xen_info __initconst = { 1034 .shared_kernel_pmd = 0, 1035 1036 #ifdef CONFIG_X86_64 1037 .extra_user_64bit_cs = FLAT_USER_CS64, 1038 #endif 1039 .name = "Xen", 1040 }; 1041 1042 static const struct pv_cpu_ops xen_cpu_ops __initconst = { 1043 .cpuid = xen_cpuid, 1044 1045 .set_debugreg = xen_set_debugreg, 1046 .get_debugreg = xen_get_debugreg, 1047 1048 .read_cr0 = xen_read_cr0, 1049 .write_cr0 = xen_write_cr0, 1050 1051 .write_cr4 = xen_write_cr4, 1052 1053 #ifdef CONFIG_X86_64 1054 .read_cr8 = xen_read_cr8, 1055 .write_cr8 = xen_write_cr8, 1056 #endif 1057 1058 .wbinvd = native_wbinvd, 1059 1060 .read_msr = xen_read_msr, 1061 .write_msr = xen_write_msr, 1062 1063 .read_msr_safe = xen_read_msr_safe, 1064 .write_msr_safe = xen_write_msr_safe, 1065 1066 .read_pmc = xen_read_pmc, 1067 1068 .iret = xen_iret, 1069 #ifdef CONFIG_X86_64 1070 .usergs_sysret64 = xen_sysret64, 1071 #endif 1072 1073 .load_tr_desc = paravirt_nop, 1074 .set_ldt = xen_set_ldt, 1075 .load_gdt = xen_load_gdt, 1076 .load_idt = xen_load_idt, 1077 .load_tls = xen_load_tls, 1078 #ifdef CONFIG_X86_64 1079 .load_gs_index = xen_load_gs_index, 1080 #endif 1081 1082 .alloc_ldt = xen_alloc_ldt, 1083 .free_ldt = xen_free_ldt, 1084 1085 .store_tr = xen_store_tr, 1086 1087 .write_ldt_entry = xen_write_ldt_entry, 1088 .write_gdt_entry = xen_write_gdt_entry, 1089 .write_idt_entry = xen_write_idt_entry, 1090 .load_sp0 = xen_load_sp0, 1091 1092 .set_iopl_mask = xen_set_iopl_mask, 1093 .io_delay = xen_io_delay, 1094 1095 /* Xen takes care of %gs when switching to usermode for us */ 1096 .swapgs = paravirt_nop, 1097 1098 .start_context_switch = paravirt_start_context_switch, 1099 .end_context_switch = xen_end_context_switch, 1100 }; 1101 1102 static void xen_restart(char *msg) 1103 { 1104 xen_reboot(SHUTDOWN_reboot); 1105 } 1106 1107 static void xen_machine_halt(void) 1108 { 1109 xen_reboot(SHUTDOWN_poweroff); 1110 } 1111 1112 static void xen_machine_power_off(void) 1113 { 1114 if (pm_power_off) 1115 pm_power_off(); 1116 xen_reboot(SHUTDOWN_poweroff); 1117 } 1118 1119 static void xen_crash_shutdown(struct pt_regs *regs) 1120 { 1121 xen_reboot(SHUTDOWN_crash); 1122 } 1123 1124 static const struct machine_ops xen_machine_ops __initconst = { 1125 .restart = xen_restart, 1126 .halt = xen_machine_halt, 1127 .power_off = xen_machine_power_off, 1128 .shutdown = xen_machine_halt, 1129 .crash_shutdown = xen_crash_shutdown, 1130 .emergency_restart = xen_emergency_restart, 1131 }; 1132 1133 static unsigned char xen_get_nmi_reason(void) 1134 { 1135 unsigned char reason = 0; 1136 1137 /* Construct a value which looks like it came from port 0x61. */ 1138 if (test_bit(_XEN_NMIREASON_io_error, 1139 &HYPERVISOR_shared_info->arch.nmi_reason)) 1140 reason |= NMI_REASON_IOCHK; 1141 if (test_bit(_XEN_NMIREASON_pci_serr, 1142 &HYPERVISOR_shared_info->arch.nmi_reason)) 1143 reason |= NMI_REASON_SERR; 1144 1145 return reason; 1146 } 1147 1148 static void __init xen_boot_params_init_edd(void) 1149 { 1150 #if IS_ENABLED(CONFIG_EDD) 1151 struct xen_platform_op op; 1152 struct edd_info *edd_info; 1153 u32 *mbr_signature; 1154 unsigned nr; 1155 int ret; 1156 1157 edd_info = boot_params.eddbuf; 1158 mbr_signature = boot_params.edd_mbr_sig_buffer; 1159 1160 op.cmd = XENPF_firmware_info; 1161 1162 op.u.firmware_info.type = XEN_FW_DISK_INFO; 1163 for (nr = 0; nr < EDDMAXNR; nr++) { 1164 struct edd_info *info = edd_info + nr; 1165 1166 op.u.firmware_info.index = nr; 1167 info->params.length = sizeof(info->params); 1168 set_xen_guest_handle(op.u.firmware_info.u.disk_info.edd_params, 1169 &info->params); 1170 ret = HYPERVISOR_platform_op(&op); 1171 if (ret) 1172 break; 1173 1174 #define C(x) info->x = op.u.firmware_info.u.disk_info.x 1175 C(device); 1176 C(version); 1177 C(interface_support); 1178 C(legacy_max_cylinder); 1179 C(legacy_max_head); 1180 C(legacy_sectors_per_track); 1181 #undef C 1182 } 1183 boot_params.eddbuf_entries = nr; 1184 1185 op.u.firmware_info.type = XEN_FW_DISK_MBR_SIGNATURE; 1186 for (nr = 0; nr < EDD_MBR_SIG_MAX; nr++) { 1187 op.u.firmware_info.index = nr; 1188 ret = HYPERVISOR_platform_op(&op); 1189 if (ret) 1190 break; 1191 mbr_signature[nr] = op.u.firmware_info.u.disk_mbr_signature.mbr_signature; 1192 } 1193 boot_params.edd_mbr_sig_buf_entries = nr; 1194 #endif 1195 } 1196 1197 /* 1198 * Set up the GDT and segment registers for -fstack-protector. Until 1199 * we do this, we have to be careful not to call any stack-protected 1200 * function, which is most of the kernel. 1201 */ 1202 static void xen_setup_gdt(int cpu) 1203 { 1204 pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry_boot; 1205 pv_cpu_ops.load_gdt = xen_load_gdt_boot; 1206 1207 setup_stack_canary_segment(0); 1208 switch_to_new_gdt(0); 1209 1210 pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry; 1211 pv_cpu_ops.load_gdt = xen_load_gdt; 1212 } 1213 1214 static void __init xen_dom0_set_legacy_features(void) 1215 { 1216 x86_platform.legacy.rtc = 1; 1217 } 1218 1219 /* First C function to be called on Xen boot */ 1220 asmlinkage __visible void __init xen_start_kernel(void) 1221 { 1222 struct physdev_set_iopl set_iopl; 1223 unsigned long initrd_start = 0; 1224 int rc; 1225 1226 if (!xen_start_info) 1227 return; 1228 1229 xen_domain_type = XEN_PV_DOMAIN; 1230 1231 xen_setup_features(); 1232 1233 xen_setup_machphys_mapping(); 1234 1235 /* Install Xen paravirt ops */ 1236 pv_info = xen_info; 1237 pv_init_ops.patch = paravirt_patch_default; 1238 pv_cpu_ops = xen_cpu_ops; 1239 1240 x86_platform.get_nmi_reason = xen_get_nmi_reason; 1241 1242 x86_init.resources.memory_setup = xen_memory_setup; 1243 x86_init.irqs.intr_mode_init = x86_init_noop; 1244 x86_init.oem.arch_setup = xen_arch_setup; 1245 x86_init.oem.banner = xen_banner; 1246 1247 /* 1248 * Set up some pagetable state before starting to set any ptes. 1249 */ 1250 1251 xen_init_mmu_ops(); 1252 1253 /* Prevent unwanted bits from being set in PTEs. */ 1254 __supported_pte_mask &= ~_PAGE_GLOBAL; 1255 1256 /* 1257 * Prevent page tables from being allocated in highmem, even 1258 * if CONFIG_HIGHPTE is enabled. 1259 */ 1260 __userpte_alloc_gfp &= ~__GFP_HIGHMEM; 1261 1262 /* Work out if we support NX */ 1263 get_cpu_cap(&boot_cpu_data); 1264 x86_configure_nx(); 1265 1266 /* Get mfn list */ 1267 xen_build_dynamic_phys_to_machine(); 1268 1269 /* 1270 * Set up kernel GDT and segment registers, mainly so that 1271 * -fstack-protector code can be executed. 1272 */ 1273 xen_setup_gdt(0); 1274 1275 xen_init_irq_ops(); 1276 1277 /* Let's presume PV guests always boot on vCPU with id 0. */ 1278 per_cpu(xen_vcpu_id, 0) = 0; 1279 1280 /* 1281 * Setup xen_vcpu early because idt_setup_early_handler needs it for 1282 * local_irq_disable(), irqs_disabled(). 1283 * 1284 * Don't do the full vcpu_info placement stuff until we have 1285 * the cpu_possible_mask and a non-dummy shared_info. 1286 */ 1287 xen_vcpu_info_reset(0); 1288 1289 idt_setup_early_handler(); 1290 1291 xen_init_capabilities(); 1292 1293 #ifdef CONFIG_X86_LOCAL_APIC 1294 /* 1295 * set up the basic apic ops. 1296 */ 1297 xen_init_apic(); 1298 #endif 1299 1300 if (xen_feature(XENFEAT_mmu_pt_update_preserve_ad)) { 1301 pv_mmu_ops.ptep_modify_prot_start = xen_ptep_modify_prot_start; 1302 pv_mmu_ops.ptep_modify_prot_commit = xen_ptep_modify_prot_commit; 1303 } 1304 1305 machine_ops = xen_machine_ops; 1306 1307 /* 1308 * The only reliable way to retain the initial address of the 1309 * percpu gdt_page is to remember it here, so we can go and 1310 * mark it RW later, when the initial percpu area is freed. 1311 */ 1312 xen_initial_gdt = &per_cpu(gdt_page, 0); 1313 1314 xen_smp_init(); 1315 1316 #ifdef CONFIG_ACPI_NUMA 1317 /* 1318 * The pages we from Xen are not related to machine pages, so 1319 * any NUMA information the kernel tries to get from ACPI will 1320 * be meaningless. Prevent it from trying. 1321 */ 1322 acpi_numa = -1; 1323 #endif 1324 WARN_ON(xen_cpuhp_setup(xen_cpu_up_prepare_pv, xen_cpu_dead_pv)); 1325 1326 local_irq_disable(); 1327 early_boot_irqs_disabled = true; 1328 1329 xen_raw_console_write("mapping kernel into physical memory\n"); 1330 xen_setup_kernel_pagetable((pgd_t *)xen_start_info->pt_base, 1331 xen_start_info->nr_pages); 1332 xen_reserve_special_pages(); 1333 1334 /* keep using Xen gdt for now; no urgent need to change it */ 1335 1336 #ifdef CONFIG_X86_32 1337 pv_info.kernel_rpl = 1; 1338 if (xen_feature(XENFEAT_supervisor_mode_kernel)) 1339 pv_info.kernel_rpl = 0; 1340 #else 1341 pv_info.kernel_rpl = 0; 1342 #endif 1343 /* set the limit of our address space */ 1344 xen_reserve_top(); 1345 1346 /* 1347 * We used to do this in xen_arch_setup, but that is too late 1348 * on AMD were early_cpu_init (run before ->arch_setup()) calls 1349 * early_amd_init which pokes 0xcf8 port. 1350 */ 1351 set_iopl.iopl = 1; 1352 rc = HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl); 1353 if (rc != 0) 1354 xen_raw_printk("physdev_op failed %d\n", rc); 1355 1356 #ifdef CONFIG_X86_32 1357 /* set up basic CPUID stuff */ 1358 cpu_detect(&new_cpu_data); 1359 set_cpu_cap(&new_cpu_data, X86_FEATURE_FPU); 1360 new_cpu_data.x86_capability[CPUID_1_EDX] = cpuid_edx(1); 1361 #endif 1362 1363 if (xen_start_info->mod_start) { 1364 if (xen_start_info->flags & SIF_MOD_START_PFN) 1365 initrd_start = PFN_PHYS(xen_start_info->mod_start); 1366 else 1367 initrd_start = __pa(xen_start_info->mod_start); 1368 } 1369 1370 /* Poke various useful things into boot_params */ 1371 boot_params.hdr.type_of_loader = (9 << 4) | 0; 1372 boot_params.hdr.ramdisk_image = initrd_start; 1373 boot_params.hdr.ramdisk_size = xen_start_info->mod_len; 1374 boot_params.hdr.cmd_line_ptr = __pa(xen_start_info->cmd_line); 1375 boot_params.hdr.hardware_subarch = X86_SUBARCH_XEN; 1376 1377 if (!xen_initial_domain()) { 1378 add_preferred_console("xenboot", 0, NULL); 1379 add_preferred_console("tty", 0, NULL); 1380 add_preferred_console("hvc", 0, NULL); 1381 if (pci_xen) 1382 x86_init.pci.arch_init = pci_xen_init; 1383 } else { 1384 const struct dom0_vga_console_info *info = 1385 (void *)((char *)xen_start_info + 1386 xen_start_info->console.dom0.info_off); 1387 struct xen_platform_op op = { 1388 .cmd = XENPF_firmware_info, 1389 .interface_version = XENPF_INTERFACE_VERSION, 1390 .u.firmware_info.type = XEN_FW_KBD_SHIFT_FLAGS, 1391 }; 1392 1393 x86_platform.set_legacy_features = 1394 xen_dom0_set_legacy_features; 1395 xen_init_vga(info, xen_start_info->console.dom0.info_size); 1396 xen_start_info->console.domU.mfn = 0; 1397 xen_start_info->console.domU.evtchn = 0; 1398 1399 if (HYPERVISOR_platform_op(&op) == 0) 1400 boot_params.kbd_status = op.u.firmware_info.u.kbd_shift_flags; 1401 1402 /* Make sure ACS will be enabled */ 1403 pci_request_acs(); 1404 1405 xen_acpi_sleep_register(); 1406 1407 /* Avoid searching for BIOS MP tables */ 1408 x86_init.mpparse.find_smp_config = x86_init_noop; 1409 x86_init.mpparse.get_smp_config = x86_init_uint_noop; 1410 1411 xen_boot_params_init_edd(); 1412 } 1413 #ifdef CONFIG_PCI 1414 /* PCI BIOS service won't work from a PV guest. */ 1415 pci_probe &= ~PCI_PROBE_BIOS; 1416 #endif 1417 xen_raw_console_write("about to get started...\n"); 1418 1419 /* We need this for printk timestamps */ 1420 xen_setup_runstate_info(0); 1421 1422 xen_efi_init(); 1423 1424 /* Start the world */ 1425 #ifdef CONFIG_X86_32 1426 i386_start_kernel(); 1427 #else 1428 cr4_init_shadow(); /* 32b kernel does this in i386_start_kernel() */ 1429 x86_64_start_reservations((char *)__pa_symbol(&boot_params)); 1430 #endif 1431 } 1432 1433 static int xen_cpu_up_prepare_pv(unsigned int cpu) 1434 { 1435 int rc; 1436 1437 if (per_cpu(xen_vcpu, cpu) == NULL) 1438 return -ENODEV; 1439 1440 xen_setup_timer(cpu); 1441 1442 rc = xen_smp_intr_init(cpu); 1443 if (rc) { 1444 WARN(1, "xen_smp_intr_init() for CPU %d failed: %d\n", 1445 cpu, rc); 1446 return rc; 1447 } 1448 1449 rc = xen_smp_intr_init_pv(cpu); 1450 if (rc) { 1451 WARN(1, "xen_smp_intr_init_pv() for CPU %d failed: %d\n", 1452 cpu, rc); 1453 return rc; 1454 } 1455 1456 return 0; 1457 } 1458 1459 static int xen_cpu_dead_pv(unsigned int cpu) 1460 { 1461 xen_smp_intr_free(cpu); 1462 xen_smp_intr_free_pv(cpu); 1463 1464 xen_teardown_timer(cpu); 1465 1466 return 0; 1467 } 1468 1469 static uint32_t __init xen_platform_pv(void) 1470 { 1471 if (xen_pv_domain()) 1472 return xen_cpuid_base(); 1473 1474 return 0; 1475 } 1476 1477 const __initconst struct hypervisor_x86 x86_hyper_xen_pv = { 1478 .name = "Xen PV", 1479 .detect = xen_platform_pv, 1480 .type = X86_HYPER_XEN_PV, 1481 .runtime.pin_vcpu = xen_pin_vcpu, 1482 }; 1483