1 /* 2 * Core of Xen paravirt_ops implementation. 3 * 4 * This file contains the xen_paravirt_ops structure itself, and the 5 * implementations for: 6 * - privileged instructions 7 * - interrupt flags 8 * - segment operations 9 * - booting and setup 10 * 11 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007 12 */ 13 14 #include <linux/cpu.h> 15 #include <linux/kernel.h> 16 #include <linux/init.h> 17 #include <linux/smp.h> 18 #include <linux/preempt.h> 19 #include <linux/hardirq.h> 20 #include <linux/percpu.h> 21 #include <linux/delay.h> 22 #include <linux/start_kernel.h> 23 #include <linux/sched.h> 24 #include <linux/kprobes.h> 25 #include <linux/bootmem.h> 26 #include <linux/export.h> 27 #include <linux/mm.h> 28 #include <linux/page-flags.h> 29 #include <linux/highmem.h> 30 #include <linux/console.h> 31 #include <linux/pci.h> 32 #include <linux/gfp.h> 33 #include <linux/memblock.h> 34 #include <linux/edd.h> 35 #include <linux/frame.h> 36 37 #include <xen/xen.h> 38 #include <xen/events.h> 39 #include <xen/interface/xen.h> 40 #include <xen/interface/version.h> 41 #include <xen/interface/physdev.h> 42 #include <xen/interface/vcpu.h> 43 #include <xen/interface/memory.h> 44 #include <xen/interface/nmi.h> 45 #include <xen/interface/xen-mca.h> 46 #include <xen/features.h> 47 #include <xen/page.h> 48 #include <xen/hvc-console.h> 49 #include <xen/acpi.h> 50 51 #include <asm/paravirt.h> 52 #include <asm/apic.h> 53 #include <asm/page.h> 54 #include <asm/xen/pci.h> 55 #include <asm/xen/hypercall.h> 56 #include <asm/xen/hypervisor.h> 57 #include <asm/xen/cpuid.h> 58 #include <asm/fixmap.h> 59 #include <asm/processor.h> 60 #include <asm/proto.h> 61 #include <asm/msr-index.h> 62 #include <asm/traps.h> 63 #include <asm/setup.h> 64 #include <asm/desc.h> 65 #include <asm/pgalloc.h> 66 #include <asm/pgtable.h> 67 #include <asm/tlbflush.h> 68 #include <asm/reboot.h> 69 #include <asm/stackprotector.h> 70 #include <asm/hypervisor.h> 71 #include <asm/mach_traps.h> 72 #include <asm/mwait.h> 73 #include <asm/pci_x86.h> 74 #include <asm/cpu.h> 75 76 #ifdef CONFIG_ACPI 77 #include <linux/acpi.h> 78 #include <asm/acpi.h> 79 #include <acpi/pdc_intel.h> 80 #include <acpi/processor.h> 81 #include <xen/interface/platform.h> 82 #endif 83 84 #include "xen-ops.h" 85 #include "mmu.h" 86 #include "smp.h" 87 #include "multicalls.h" 88 #include "pmu.h" 89 90 void *xen_initial_gdt; 91 92 static int xen_cpu_up_prepare_pv(unsigned int cpu); 93 static int xen_cpu_dead_pv(unsigned int cpu); 94 95 struct tls_descs { 96 struct desc_struct desc[3]; 97 }; 98 99 /* 100 * Updating the 3 TLS descriptors in the GDT on every task switch is 101 * surprisingly expensive so we avoid updating them if they haven't 102 * changed. Since Xen writes different descriptors than the one 103 * passed in the update_descriptor hypercall we keep shadow copies to 104 * compare against. 105 */ 106 static DEFINE_PER_CPU(struct tls_descs, shadow_tls_desc); 107 108 static void __init xen_banner(void) 109 { 110 unsigned version = HYPERVISOR_xen_version(XENVER_version, NULL); 111 struct xen_extraversion extra; 112 HYPERVISOR_xen_version(XENVER_extraversion, &extra); 113 114 pr_info("Booting paravirtualized kernel on %s\n", pv_info.name); 115 printk(KERN_INFO "Xen version: %d.%d%s%s\n", 116 version >> 16, version & 0xffff, extra.extraversion, 117 xen_feature(XENFEAT_mmu_pt_update_preserve_ad) ? " (preserve-AD)" : ""); 118 } 119 /* Check if running on Xen version (major, minor) or later */ 120 bool 121 xen_running_on_version_or_later(unsigned int major, unsigned int minor) 122 { 123 unsigned int version; 124 125 if (!xen_domain()) 126 return false; 127 128 version = HYPERVISOR_xen_version(XENVER_version, NULL); 129 if ((((version >> 16) == major) && ((version & 0xffff) >= minor)) || 130 ((version >> 16) > major)) 131 return true; 132 return false; 133 } 134 135 static __read_mostly unsigned int cpuid_leaf5_ecx_val; 136 static __read_mostly unsigned int cpuid_leaf5_edx_val; 137 138 static void xen_cpuid(unsigned int *ax, unsigned int *bx, 139 unsigned int *cx, unsigned int *dx) 140 { 141 unsigned maskebx = ~0; 142 143 /* 144 * Mask out inconvenient features, to try and disable as many 145 * unsupported kernel subsystems as possible. 146 */ 147 switch (*ax) { 148 case CPUID_MWAIT_LEAF: 149 /* Synthesize the values.. */ 150 *ax = 0; 151 *bx = 0; 152 *cx = cpuid_leaf5_ecx_val; 153 *dx = cpuid_leaf5_edx_val; 154 return; 155 156 case 0xb: 157 /* Suppress extended topology stuff */ 158 maskebx = 0; 159 break; 160 } 161 162 asm(XEN_EMULATE_PREFIX "cpuid" 163 : "=a" (*ax), 164 "=b" (*bx), 165 "=c" (*cx), 166 "=d" (*dx) 167 : "0" (*ax), "2" (*cx)); 168 169 *bx &= maskebx; 170 } 171 STACK_FRAME_NON_STANDARD(xen_cpuid); /* XEN_EMULATE_PREFIX */ 172 173 static bool __init xen_check_mwait(void) 174 { 175 #ifdef CONFIG_ACPI 176 struct xen_platform_op op = { 177 .cmd = XENPF_set_processor_pminfo, 178 .u.set_pminfo.id = -1, 179 .u.set_pminfo.type = XEN_PM_PDC, 180 }; 181 uint32_t buf[3]; 182 unsigned int ax, bx, cx, dx; 183 unsigned int mwait_mask; 184 185 /* We need to determine whether it is OK to expose the MWAIT 186 * capability to the kernel to harvest deeper than C3 states from ACPI 187 * _CST using the processor_harvest_xen.c module. For this to work, we 188 * need to gather the MWAIT_LEAF values (which the cstate.c code 189 * checks against). The hypervisor won't expose the MWAIT flag because 190 * it would break backwards compatibility; so we will find out directly 191 * from the hardware and hypercall. 192 */ 193 if (!xen_initial_domain()) 194 return false; 195 196 /* 197 * When running under platform earlier than Xen4.2, do not expose 198 * mwait, to avoid the risk of loading native acpi pad driver 199 */ 200 if (!xen_running_on_version_or_later(4, 2)) 201 return false; 202 203 ax = 1; 204 cx = 0; 205 206 native_cpuid(&ax, &bx, &cx, &dx); 207 208 mwait_mask = (1 << (X86_FEATURE_EST % 32)) | 209 (1 << (X86_FEATURE_MWAIT % 32)); 210 211 if ((cx & mwait_mask) != mwait_mask) 212 return false; 213 214 /* We need to emulate the MWAIT_LEAF and for that we need both 215 * ecx and edx. The hypercall provides only partial information. 216 */ 217 218 ax = CPUID_MWAIT_LEAF; 219 bx = 0; 220 cx = 0; 221 dx = 0; 222 223 native_cpuid(&ax, &bx, &cx, &dx); 224 225 /* Ask the Hypervisor whether to clear ACPI_PDC_C_C2C3_FFH. If so, 226 * don't expose MWAIT_LEAF and let ACPI pick the IOPORT version of C3. 227 */ 228 buf[0] = ACPI_PDC_REVISION_ID; 229 buf[1] = 1; 230 buf[2] = (ACPI_PDC_C_CAPABILITY_SMP | ACPI_PDC_EST_CAPABILITY_SWSMP); 231 232 set_xen_guest_handle(op.u.set_pminfo.pdc, buf); 233 234 if ((HYPERVISOR_platform_op(&op) == 0) && 235 (buf[2] & (ACPI_PDC_C_C1_FFH | ACPI_PDC_C_C2C3_FFH))) { 236 cpuid_leaf5_ecx_val = cx; 237 cpuid_leaf5_edx_val = dx; 238 } 239 return true; 240 #else 241 return false; 242 #endif 243 } 244 245 static bool __init xen_check_xsave(void) 246 { 247 unsigned int cx, xsave_mask; 248 249 cx = cpuid_ecx(1); 250 251 xsave_mask = (1 << (X86_FEATURE_XSAVE % 32)) | 252 (1 << (X86_FEATURE_OSXSAVE % 32)); 253 254 /* Xen will set CR4.OSXSAVE if supported and not disabled by force */ 255 return (cx & xsave_mask) == xsave_mask; 256 } 257 258 static void __init xen_init_capabilities(void) 259 { 260 setup_force_cpu_cap(X86_FEATURE_XENPV); 261 setup_clear_cpu_cap(X86_FEATURE_DCA); 262 setup_clear_cpu_cap(X86_FEATURE_APERFMPERF); 263 setup_clear_cpu_cap(X86_FEATURE_MTRR); 264 setup_clear_cpu_cap(X86_FEATURE_ACC); 265 setup_clear_cpu_cap(X86_FEATURE_X2APIC); 266 267 if (!xen_initial_domain()) 268 setup_clear_cpu_cap(X86_FEATURE_ACPI); 269 270 if (xen_check_mwait()) 271 setup_force_cpu_cap(X86_FEATURE_MWAIT); 272 else 273 setup_clear_cpu_cap(X86_FEATURE_MWAIT); 274 275 if (!xen_check_xsave()) { 276 setup_clear_cpu_cap(X86_FEATURE_XSAVE); 277 setup_clear_cpu_cap(X86_FEATURE_OSXSAVE); 278 } 279 } 280 281 static void xen_set_debugreg(int reg, unsigned long val) 282 { 283 HYPERVISOR_set_debugreg(reg, val); 284 } 285 286 static unsigned long xen_get_debugreg(int reg) 287 { 288 return HYPERVISOR_get_debugreg(reg); 289 } 290 291 static void xen_end_context_switch(struct task_struct *next) 292 { 293 xen_mc_flush(); 294 paravirt_end_context_switch(next); 295 } 296 297 static unsigned long xen_store_tr(void) 298 { 299 return 0; 300 } 301 302 /* 303 * Set the page permissions for a particular virtual address. If the 304 * address is a vmalloc mapping (or other non-linear mapping), then 305 * find the linear mapping of the page and also set its protections to 306 * match. 307 */ 308 static void set_aliased_prot(void *v, pgprot_t prot) 309 { 310 int level; 311 pte_t *ptep; 312 pte_t pte; 313 unsigned long pfn; 314 struct page *page; 315 unsigned char dummy; 316 317 ptep = lookup_address((unsigned long)v, &level); 318 BUG_ON(ptep == NULL); 319 320 pfn = pte_pfn(*ptep); 321 page = pfn_to_page(pfn); 322 323 pte = pfn_pte(pfn, prot); 324 325 /* 326 * Careful: update_va_mapping() will fail if the virtual address 327 * we're poking isn't populated in the page tables. We don't 328 * need to worry about the direct map (that's always in the page 329 * tables), but we need to be careful about vmap space. In 330 * particular, the top level page table can lazily propagate 331 * entries between processes, so if we've switched mms since we 332 * vmapped the target in the first place, we might not have the 333 * top-level page table entry populated. 334 * 335 * We disable preemption because we want the same mm active when 336 * we probe the target and when we issue the hypercall. We'll 337 * have the same nominal mm, but if we're a kernel thread, lazy 338 * mm dropping could change our pgd. 339 * 340 * Out of an abundance of caution, this uses __get_user() to fault 341 * in the target address just in case there's some obscure case 342 * in which the target address isn't readable. 343 */ 344 345 preempt_disable(); 346 347 probe_kernel_read(&dummy, v, 1); 348 349 if (HYPERVISOR_update_va_mapping((unsigned long)v, pte, 0)) 350 BUG(); 351 352 if (!PageHighMem(page)) { 353 void *av = __va(PFN_PHYS(pfn)); 354 355 if (av != v) 356 if (HYPERVISOR_update_va_mapping((unsigned long)av, pte, 0)) 357 BUG(); 358 } else 359 kmap_flush_unused(); 360 361 preempt_enable(); 362 } 363 364 static void xen_alloc_ldt(struct desc_struct *ldt, unsigned entries) 365 { 366 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE; 367 int i; 368 369 /* 370 * We need to mark the all aliases of the LDT pages RO. We 371 * don't need to call vm_flush_aliases(), though, since that's 372 * only responsible for flushing aliases out the TLBs, not the 373 * page tables, and Xen will flush the TLB for us if needed. 374 * 375 * To avoid confusing future readers: none of this is necessary 376 * to load the LDT. The hypervisor only checks this when the 377 * LDT is faulted in due to subsequent descriptor access. 378 */ 379 380 for (i = 0; i < entries; i += entries_per_page) 381 set_aliased_prot(ldt + i, PAGE_KERNEL_RO); 382 } 383 384 static void xen_free_ldt(struct desc_struct *ldt, unsigned entries) 385 { 386 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE; 387 int i; 388 389 for (i = 0; i < entries; i += entries_per_page) 390 set_aliased_prot(ldt + i, PAGE_KERNEL); 391 } 392 393 static void xen_set_ldt(const void *addr, unsigned entries) 394 { 395 struct mmuext_op *op; 396 struct multicall_space mcs = xen_mc_entry(sizeof(*op)); 397 398 trace_xen_cpu_set_ldt(addr, entries); 399 400 op = mcs.args; 401 op->cmd = MMUEXT_SET_LDT; 402 op->arg1.linear_addr = (unsigned long)addr; 403 op->arg2.nr_ents = entries; 404 405 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); 406 407 xen_mc_issue(PARAVIRT_LAZY_CPU); 408 } 409 410 static void xen_load_gdt(const struct desc_ptr *dtr) 411 { 412 unsigned long va = dtr->address; 413 unsigned int size = dtr->size + 1; 414 unsigned pages = DIV_ROUND_UP(size, PAGE_SIZE); 415 unsigned long frames[pages]; 416 int f; 417 418 /* 419 * A GDT can be up to 64k in size, which corresponds to 8192 420 * 8-byte entries, or 16 4k pages.. 421 */ 422 423 BUG_ON(size > 65536); 424 BUG_ON(va & ~PAGE_MASK); 425 426 for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) { 427 int level; 428 pte_t *ptep; 429 unsigned long pfn, mfn; 430 void *virt; 431 432 /* 433 * The GDT is per-cpu and is in the percpu data area. 434 * That can be virtually mapped, so we need to do a 435 * page-walk to get the underlying MFN for the 436 * hypercall. The page can also be in the kernel's 437 * linear range, so we need to RO that mapping too. 438 */ 439 ptep = lookup_address(va, &level); 440 BUG_ON(ptep == NULL); 441 442 pfn = pte_pfn(*ptep); 443 mfn = pfn_to_mfn(pfn); 444 virt = __va(PFN_PHYS(pfn)); 445 446 frames[f] = mfn; 447 448 make_lowmem_page_readonly((void *)va); 449 make_lowmem_page_readonly(virt); 450 } 451 452 if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct))) 453 BUG(); 454 } 455 456 /* 457 * load_gdt for early boot, when the gdt is only mapped once 458 */ 459 static void __init xen_load_gdt_boot(const struct desc_ptr *dtr) 460 { 461 unsigned long va = dtr->address; 462 unsigned int size = dtr->size + 1; 463 unsigned pages = DIV_ROUND_UP(size, PAGE_SIZE); 464 unsigned long frames[pages]; 465 int f; 466 467 /* 468 * A GDT can be up to 64k in size, which corresponds to 8192 469 * 8-byte entries, or 16 4k pages.. 470 */ 471 472 BUG_ON(size > 65536); 473 BUG_ON(va & ~PAGE_MASK); 474 475 for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) { 476 pte_t pte; 477 unsigned long pfn, mfn; 478 479 pfn = virt_to_pfn(va); 480 mfn = pfn_to_mfn(pfn); 481 482 pte = pfn_pte(pfn, PAGE_KERNEL_RO); 483 484 if (HYPERVISOR_update_va_mapping((unsigned long)va, pte, 0)) 485 BUG(); 486 487 frames[f] = mfn; 488 } 489 490 if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct))) 491 BUG(); 492 } 493 494 static inline bool desc_equal(const struct desc_struct *d1, 495 const struct desc_struct *d2) 496 { 497 return d1->a == d2->a && d1->b == d2->b; 498 } 499 500 static void load_TLS_descriptor(struct thread_struct *t, 501 unsigned int cpu, unsigned int i) 502 { 503 struct desc_struct *shadow = &per_cpu(shadow_tls_desc, cpu).desc[i]; 504 struct desc_struct *gdt; 505 xmaddr_t maddr; 506 struct multicall_space mc; 507 508 if (desc_equal(shadow, &t->tls_array[i])) 509 return; 510 511 *shadow = t->tls_array[i]; 512 513 gdt = get_cpu_gdt_rw(cpu); 514 maddr = arbitrary_virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]); 515 mc = __xen_mc_entry(0); 516 517 MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]); 518 } 519 520 static void xen_load_tls(struct thread_struct *t, unsigned int cpu) 521 { 522 /* 523 * XXX sleazy hack: If we're being called in a lazy-cpu zone 524 * and lazy gs handling is enabled, it means we're in a 525 * context switch, and %gs has just been saved. This means we 526 * can zero it out to prevent faults on exit from the 527 * hypervisor if the next process has no %gs. Either way, it 528 * has been saved, and the new value will get loaded properly. 529 * This will go away as soon as Xen has been modified to not 530 * save/restore %gs for normal hypercalls. 531 * 532 * On x86_64, this hack is not used for %gs, because gs points 533 * to KERNEL_GS_BASE (and uses it for PDA references), so we 534 * must not zero %gs on x86_64 535 * 536 * For x86_64, we need to zero %fs, otherwise we may get an 537 * exception between the new %fs descriptor being loaded and 538 * %fs being effectively cleared at __switch_to(). 539 */ 540 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU) { 541 #ifdef CONFIG_X86_32 542 lazy_load_gs(0); 543 #else 544 loadsegment(fs, 0); 545 #endif 546 } 547 548 xen_mc_batch(); 549 550 load_TLS_descriptor(t, cpu, 0); 551 load_TLS_descriptor(t, cpu, 1); 552 load_TLS_descriptor(t, cpu, 2); 553 554 xen_mc_issue(PARAVIRT_LAZY_CPU); 555 } 556 557 #ifdef CONFIG_X86_64 558 static void xen_load_gs_index(unsigned int idx) 559 { 560 if (HYPERVISOR_set_segment_base(SEGBASE_GS_USER_SEL, idx)) 561 BUG(); 562 } 563 #endif 564 565 static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum, 566 const void *ptr) 567 { 568 xmaddr_t mach_lp = arbitrary_virt_to_machine(&dt[entrynum]); 569 u64 entry = *(u64 *)ptr; 570 571 trace_xen_cpu_write_ldt_entry(dt, entrynum, entry); 572 573 preempt_disable(); 574 575 xen_mc_flush(); 576 if (HYPERVISOR_update_descriptor(mach_lp.maddr, entry)) 577 BUG(); 578 579 preempt_enable(); 580 } 581 582 static int cvt_gate_to_trap(int vector, const gate_desc *val, 583 struct trap_info *info) 584 { 585 unsigned long addr; 586 587 if (val->type != GATE_TRAP && val->type != GATE_INTERRUPT) 588 return 0; 589 590 info->vector = vector; 591 592 addr = gate_offset(*val); 593 #ifdef CONFIG_X86_64 594 /* 595 * Look for known traps using IST, and substitute them 596 * appropriately. The debugger ones are the only ones we care 597 * about. Xen will handle faults like double_fault, 598 * so we should never see them. Warn if 599 * there's an unexpected IST-using fault handler. 600 */ 601 if (addr == (unsigned long)debug) 602 addr = (unsigned long)xen_debug; 603 else if (addr == (unsigned long)int3) 604 addr = (unsigned long)xen_int3; 605 else if (addr == (unsigned long)stack_segment) 606 addr = (unsigned long)xen_stack_segment; 607 else if (addr == (unsigned long)double_fault) { 608 /* Don't need to handle these */ 609 return 0; 610 #ifdef CONFIG_X86_MCE 611 } else if (addr == (unsigned long)machine_check) { 612 /* 613 * when xen hypervisor inject vMCE to guest, 614 * use native mce handler to handle it 615 */ 616 ; 617 #endif 618 } else if (addr == (unsigned long)nmi) 619 /* 620 * Use the native version as well. 621 */ 622 ; 623 else { 624 /* Some other trap using IST? */ 625 if (WARN_ON(val->ist != 0)) 626 return 0; 627 } 628 #endif /* CONFIG_X86_64 */ 629 info->address = addr; 630 631 info->cs = gate_segment(*val); 632 info->flags = val->dpl; 633 /* interrupt gates clear IF */ 634 if (val->type == GATE_INTERRUPT) 635 info->flags |= 1 << 2; 636 637 return 1; 638 } 639 640 /* Locations of each CPU's IDT */ 641 static DEFINE_PER_CPU(struct desc_ptr, idt_desc); 642 643 /* Set an IDT entry. If the entry is part of the current IDT, then 644 also update Xen. */ 645 static void xen_write_idt_entry(gate_desc *dt, int entrynum, const gate_desc *g) 646 { 647 unsigned long p = (unsigned long)&dt[entrynum]; 648 unsigned long start, end; 649 650 trace_xen_cpu_write_idt_entry(dt, entrynum, g); 651 652 preempt_disable(); 653 654 start = __this_cpu_read(idt_desc.address); 655 end = start + __this_cpu_read(idt_desc.size) + 1; 656 657 xen_mc_flush(); 658 659 native_write_idt_entry(dt, entrynum, g); 660 661 if (p >= start && (p + 8) <= end) { 662 struct trap_info info[2]; 663 664 info[1].address = 0; 665 666 if (cvt_gate_to_trap(entrynum, g, &info[0])) 667 if (HYPERVISOR_set_trap_table(info)) 668 BUG(); 669 } 670 671 preempt_enable(); 672 } 673 674 static void xen_convert_trap_info(const struct desc_ptr *desc, 675 struct trap_info *traps) 676 { 677 unsigned in, out, count; 678 679 count = (desc->size+1) / sizeof(gate_desc); 680 BUG_ON(count > 256); 681 682 for (in = out = 0; in < count; in++) { 683 gate_desc *entry = (gate_desc *)(desc->address) + in; 684 685 if (cvt_gate_to_trap(in, entry, &traps[out])) 686 out++; 687 } 688 traps[out].address = 0; 689 } 690 691 void xen_copy_trap_info(struct trap_info *traps) 692 { 693 const struct desc_ptr *desc = this_cpu_ptr(&idt_desc); 694 695 xen_convert_trap_info(desc, traps); 696 } 697 698 /* Load a new IDT into Xen. In principle this can be per-CPU, so we 699 hold a spinlock to protect the static traps[] array (static because 700 it avoids allocation, and saves stack space). */ 701 static void xen_load_idt(const struct desc_ptr *desc) 702 { 703 static DEFINE_SPINLOCK(lock); 704 static struct trap_info traps[257]; 705 706 trace_xen_cpu_load_idt(desc); 707 708 spin_lock(&lock); 709 710 memcpy(this_cpu_ptr(&idt_desc), desc, sizeof(idt_desc)); 711 712 xen_convert_trap_info(desc, traps); 713 714 xen_mc_flush(); 715 if (HYPERVISOR_set_trap_table(traps)) 716 BUG(); 717 718 spin_unlock(&lock); 719 } 720 721 /* Write a GDT descriptor entry. Ignore LDT descriptors, since 722 they're handled differently. */ 723 static void xen_write_gdt_entry(struct desc_struct *dt, int entry, 724 const void *desc, int type) 725 { 726 trace_xen_cpu_write_gdt_entry(dt, entry, desc, type); 727 728 preempt_disable(); 729 730 switch (type) { 731 case DESC_LDT: 732 case DESC_TSS: 733 /* ignore */ 734 break; 735 736 default: { 737 xmaddr_t maddr = arbitrary_virt_to_machine(&dt[entry]); 738 739 xen_mc_flush(); 740 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc)) 741 BUG(); 742 } 743 744 } 745 746 preempt_enable(); 747 } 748 749 /* 750 * Version of write_gdt_entry for use at early boot-time needed to 751 * update an entry as simply as possible. 752 */ 753 static void __init xen_write_gdt_entry_boot(struct desc_struct *dt, int entry, 754 const void *desc, int type) 755 { 756 trace_xen_cpu_write_gdt_entry(dt, entry, desc, type); 757 758 switch (type) { 759 case DESC_LDT: 760 case DESC_TSS: 761 /* ignore */ 762 break; 763 764 default: { 765 xmaddr_t maddr = virt_to_machine(&dt[entry]); 766 767 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc)) 768 dt[entry] = *(struct desc_struct *)desc; 769 } 770 771 } 772 } 773 774 static void xen_load_sp0(struct tss_struct *tss, 775 struct thread_struct *thread) 776 { 777 struct multicall_space mcs; 778 779 mcs = xen_mc_entry(0); 780 MULTI_stack_switch(mcs.mc, __KERNEL_DS, thread->sp0); 781 xen_mc_issue(PARAVIRT_LAZY_CPU); 782 tss->x86_tss.sp0 = thread->sp0; 783 } 784 785 void xen_set_iopl_mask(unsigned mask) 786 { 787 struct physdev_set_iopl set_iopl; 788 789 /* Force the change at ring 0. */ 790 set_iopl.iopl = (mask == 0) ? 1 : (mask >> 12) & 3; 791 HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl); 792 } 793 794 static void xen_io_delay(void) 795 { 796 } 797 798 static DEFINE_PER_CPU(unsigned long, xen_cr0_value); 799 800 static unsigned long xen_read_cr0(void) 801 { 802 unsigned long cr0 = this_cpu_read(xen_cr0_value); 803 804 if (unlikely(cr0 == 0)) { 805 cr0 = native_read_cr0(); 806 this_cpu_write(xen_cr0_value, cr0); 807 } 808 809 return cr0; 810 } 811 812 static void xen_write_cr0(unsigned long cr0) 813 { 814 struct multicall_space mcs; 815 816 this_cpu_write(xen_cr0_value, cr0); 817 818 /* Only pay attention to cr0.TS; everything else is 819 ignored. */ 820 mcs = xen_mc_entry(0); 821 822 MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0); 823 824 xen_mc_issue(PARAVIRT_LAZY_CPU); 825 } 826 827 static void xen_write_cr4(unsigned long cr4) 828 { 829 cr4 &= ~(X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PCE); 830 831 native_write_cr4(cr4); 832 } 833 #ifdef CONFIG_X86_64 834 static inline unsigned long xen_read_cr8(void) 835 { 836 return 0; 837 } 838 static inline void xen_write_cr8(unsigned long val) 839 { 840 BUG_ON(val); 841 } 842 #endif 843 844 static u64 xen_read_msr_safe(unsigned int msr, int *err) 845 { 846 u64 val; 847 848 if (pmu_msr_read(msr, &val, err)) 849 return val; 850 851 val = native_read_msr_safe(msr, err); 852 switch (msr) { 853 case MSR_IA32_APICBASE: 854 #ifdef CONFIG_X86_X2APIC 855 if (!(cpuid_ecx(1) & (1 << (X86_FEATURE_X2APIC & 31)))) 856 #endif 857 val &= ~X2APIC_ENABLE; 858 break; 859 } 860 return val; 861 } 862 863 static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high) 864 { 865 int ret; 866 867 ret = 0; 868 869 switch (msr) { 870 #ifdef CONFIG_X86_64 871 unsigned which; 872 u64 base; 873 874 case MSR_FS_BASE: which = SEGBASE_FS; goto set; 875 case MSR_KERNEL_GS_BASE: which = SEGBASE_GS_USER; goto set; 876 case MSR_GS_BASE: which = SEGBASE_GS_KERNEL; goto set; 877 878 set: 879 base = ((u64)high << 32) | low; 880 if (HYPERVISOR_set_segment_base(which, base) != 0) 881 ret = -EIO; 882 break; 883 #endif 884 885 case MSR_STAR: 886 case MSR_CSTAR: 887 case MSR_LSTAR: 888 case MSR_SYSCALL_MASK: 889 case MSR_IA32_SYSENTER_CS: 890 case MSR_IA32_SYSENTER_ESP: 891 case MSR_IA32_SYSENTER_EIP: 892 /* Fast syscall setup is all done in hypercalls, so 893 these are all ignored. Stub them out here to stop 894 Xen console noise. */ 895 break; 896 897 default: 898 if (!pmu_msr_write(msr, low, high, &ret)) 899 ret = native_write_msr_safe(msr, low, high); 900 } 901 902 return ret; 903 } 904 905 static u64 xen_read_msr(unsigned int msr) 906 { 907 /* 908 * This will silently swallow a #GP from RDMSR. It may be worth 909 * changing that. 910 */ 911 int err; 912 913 return xen_read_msr_safe(msr, &err); 914 } 915 916 static void xen_write_msr(unsigned int msr, unsigned low, unsigned high) 917 { 918 /* 919 * This will silently swallow a #GP from WRMSR. It may be worth 920 * changing that. 921 */ 922 xen_write_msr_safe(msr, low, high); 923 } 924 925 void xen_setup_shared_info(void) 926 { 927 set_fixmap(FIX_PARAVIRT_BOOTMAP, xen_start_info->shared_info); 928 929 HYPERVISOR_shared_info = 930 (struct shared_info *)fix_to_virt(FIX_PARAVIRT_BOOTMAP); 931 932 xen_setup_mfn_list_list(); 933 934 if (system_state == SYSTEM_BOOTING) { 935 #ifndef CONFIG_SMP 936 /* 937 * In UP this is as good a place as any to set up shared info. 938 * Limit this to boot only, at restore vcpu setup is done via 939 * xen_vcpu_restore(). 940 */ 941 xen_setup_vcpu_info_placement(); 942 #endif 943 /* 944 * Now that shared info is set up we can start using routines 945 * that point to pvclock area. 946 */ 947 xen_init_time_ops(); 948 } 949 } 950 951 /* This is called once we have the cpu_possible_mask */ 952 void __ref xen_setup_vcpu_info_placement(void) 953 { 954 int cpu; 955 956 for_each_possible_cpu(cpu) { 957 /* Set up direct vCPU id mapping for PV guests. */ 958 per_cpu(xen_vcpu_id, cpu) = cpu; 959 960 /* 961 * xen_vcpu_setup(cpu) can fail -- in which case it 962 * falls back to the shared_info version for cpus 963 * where xen_vcpu_nr(cpu) < MAX_VIRT_CPUS. 964 * 965 * xen_cpu_up_prepare_pv() handles the rest by failing 966 * them in hotplug. 967 */ 968 (void) xen_vcpu_setup(cpu); 969 } 970 971 /* 972 * xen_vcpu_setup managed to place the vcpu_info within the 973 * percpu area for all cpus, so make use of it. 974 */ 975 if (xen_have_vcpu_info_placement) { 976 pv_irq_ops.save_fl = __PV_IS_CALLEE_SAVE(xen_save_fl_direct); 977 pv_irq_ops.restore_fl = __PV_IS_CALLEE_SAVE(xen_restore_fl_direct); 978 pv_irq_ops.irq_disable = __PV_IS_CALLEE_SAVE(xen_irq_disable_direct); 979 pv_irq_ops.irq_enable = __PV_IS_CALLEE_SAVE(xen_irq_enable_direct); 980 pv_mmu_ops.read_cr2 = xen_read_cr2_direct; 981 } 982 } 983 984 static unsigned xen_patch(u8 type, u16 clobbers, void *insnbuf, 985 unsigned long addr, unsigned len) 986 { 987 char *start, *end, *reloc; 988 unsigned ret; 989 990 start = end = reloc = NULL; 991 992 #define SITE(op, x) \ 993 case PARAVIRT_PATCH(op.x): \ 994 if (xen_have_vcpu_info_placement) { \ 995 start = (char *)xen_##x##_direct; \ 996 end = xen_##x##_direct_end; \ 997 reloc = xen_##x##_direct_reloc; \ 998 } \ 999 goto patch_site 1000 1001 switch (type) { 1002 SITE(pv_irq_ops, irq_enable); 1003 SITE(pv_irq_ops, irq_disable); 1004 SITE(pv_irq_ops, save_fl); 1005 SITE(pv_irq_ops, restore_fl); 1006 #undef SITE 1007 1008 patch_site: 1009 if (start == NULL || (end-start) > len) 1010 goto default_patch; 1011 1012 ret = paravirt_patch_insns(insnbuf, len, start, end); 1013 1014 /* Note: because reloc is assigned from something that 1015 appears to be an array, gcc assumes it's non-null, 1016 but doesn't know its relationship with start and 1017 end. */ 1018 if (reloc > start && reloc < end) { 1019 int reloc_off = reloc - start; 1020 long *relocp = (long *)(insnbuf + reloc_off); 1021 long delta = start - (char *)addr; 1022 1023 *relocp += delta; 1024 } 1025 break; 1026 1027 default_patch: 1028 default: 1029 ret = paravirt_patch_default(type, clobbers, insnbuf, 1030 addr, len); 1031 break; 1032 } 1033 1034 return ret; 1035 } 1036 1037 static const struct pv_info xen_info __initconst = { 1038 .shared_kernel_pmd = 0, 1039 1040 #ifdef CONFIG_X86_64 1041 .extra_user_64bit_cs = FLAT_USER_CS64, 1042 #endif 1043 .name = "Xen", 1044 }; 1045 1046 static const struct pv_init_ops xen_init_ops __initconst = { 1047 .patch = xen_patch, 1048 }; 1049 1050 static const struct pv_cpu_ops xen_cpu_ops __initconst = { 1051 .cpuid = xen_cpuid, 1052 1053 .set_debugreg = xen_set_debugreg, 1054 .get_debugreg = xen_get_debugreg, 1055 1056 .read_cr0 = xen_read_cr0, 1057 .write_cr0 = xen_write_cr0, 1058 1059 .read_cr4 = native_read_cr4, 1060 .write_cr4 = xen_write_cr4, 1061 1062 #ifdef CONFIG_X86_64 1063 .read_cr8 = xen_read_cr8, 1064 .write_cr8 = xen_write_cr8, 1065 #endif 1066 1067 .wbinvd = native_wbinvd, 1068 1069 .read_msr = xen_read_msr, 1070 .write_msr = xen_write_msr, 1071 1072 .read_msr_safe = xen_read_msr_safe, 1073 .write_msr_safe = xen_write_msr_safe, 1074 1075 .read_pmc = xen_read_pmc, 1076 1077 .iret = xen_iret, 1078 #ifdef CONFIG_X86_64 1079 .usergs_sysret64 = xen_sysret64, 1080 #endif 1081 1082 .load_tr_desc = paravirt_nop, 1083 .set_ldt = xen_set_ldt, 1084 .load_gdt = xen_load_gdt, 1085 .load_idt = xen_load_idt, 1086 .load_tls = xen_load_tls, 1087 #ifdef CONFIG_X86_64 1088 .load_gs_index = xen_load_gs_index, 1089 #endif 1090 1091 .alloc_ldt = xen_alloc_ldt, 1092 .free_ldt = xen_free_ldt, 1093 1094 .store_idt = native_store_idt, 1095 .store_tr = xen_store_tr, 1096 1097 .write_ldt_entry = xen_write_ldt_entry, 1098 .write_gdt_entry = xen_write_gdt_entry, 1099 .write_idt_entry = xen_write_idt_entry, 1100 .load_sp0 = xen_load_sp0, 1101 1102 .set_iopl_mask = xen_set_iopl_mask, 1103 .io_delay = xen_io_delay, 1104 1105 /* Xen takes care of %gs when switching to usermode for us */ 1106 .swapgs = paravirt_nop, 1107 1108 .start_context_switch = paravirt_start_context_switch, 1109 .end_context_switch = xen_end_context_switch, 1110 }; 1111 1112 static void xen_restart(char *msg) 1113 { 1114 xen_reboot(SHUTDOWN_reboot); 1115 } 1116 1117 static void xen_machine_halt(void) 1118 { 1119 xen_reboot(SHUTDOWN_poweroff); 1120 } 1121 1122 static void xen_machine_power_off(void) 1123 { 1124 if (pm_power_off) 1125 pm_power_off(); 1126 xen_reboot(SHUTDOWN_poweroff); 1127 } 1128 1129 static void xen_crash_shutdown(struct pt_regs *regs) 1130 { 1131 xen_reboot(SHUTDOWN_crash); 1132 } 1133 1134 static const struct machine_ops xen_machine_ops __initconst = { 1135 .restart = xen_restart, 1136 .halt = xen_machine_halt, 1137 .power_off = xen_machine_power_off, 1138 .shutdown = xen_machine_halt, 1139 .crash_shutdown = xen_crash_shutdown, 1140 .emergency_restart = xen_emergency_restart, 1141 }; 1142 1143 static unsigned char xen_get_nmi_reason(void) 1144 { 1145 unsigned char reason = 0; 1146 1147 /* Construct a value which looks like it came from port 0x61. */ 1148 if (test_bit(_XEN_NMIREASON_io_error, 1149 &HYPERVISOR_shared_info->arch.nmi_reason)) 1150 reason |= NMI_REASON_IOCHK; 1151 if (test_bit(_XEN_NMIREASON_pci_serr, 1152 &HYPERVISOR_shared_info->arch.nmi_reason)) 1153 reason |= NMI_REASON_SERR; 1154 1155 return reason; 1156 } 1157 1158 static void __init xen_boot_params_init_edd(void) 1159 { 1160 #if IS_ENABLED(CONFIG_EDD) 1161 struct xen_platform_op op; 1162 struct edd_info *edd_info; 1163 u32 *mbr_signature; 1164 unsigned nr; 1165 int ret; 1166 1167 edd_info = boot_params.eddbuf; 1168 mbr_signature = boot_params.edd_mbr_sig_buffer; 1169 1170 op.cmd = XENPF_firmware_info; 1171 1172 op.u.firmware_info.type = XEN_FW_DISK_INFO; 1173 for (nr = 0; nr < EDDMAXNR; nr++) { 1174 struct edd_info *info = edd_info + nr; 1175 1176 op.u.firmware_info.index = nr; 1177 info->params.length = sizeof(info->params); 1178 set_xen_guest_handle(op.u.firmware_info.u.disk_info.edd_params, 1179 &info->params); 1180 ret = HYPERVISOR_platform_op(&op); 1181 if (ret) 1182 break; 1183 1184 #define C(x) info->x = op.u.firmware_info.u.disk_info.x 1185 C(device); 1186 C(version); 1187 C(interface_support); 1188 C(legacy_max_cylinder); 1189 C(legacy_max_head); 1190 C(legacy_sectors_per_track); 1191 #undef C 1192 } 1193 boot_params.eddbuf_entries = nr; 1194 1195 op.u.firmware_info.type = XEN_FW_DISK_MBR_SIGNATURE; 1196 for (nr = 0; nr < EDD_MBR_SIG_MAX; nr++) { 1197 op.u.firmware_info.index = nr; 1198 ret = HYPERVISOR_platform_op(&op); 1199 if (ret) 1200 break; 1201 mbr_signature[nr] = op.u.firmware_info.u.disk_mbr_signature.mbr_signature; 1202 } 1203 boot_params.edd_mbr_sig_buf_entries = nr; 1204 #endif 1205 } 1206 1207 /* 1208 * Set up the GDT and segment registers for -fstack-protector. Until 1209 * we do this, we have to be careful not to call any stack-protected 1210 * function, which is most of the kernel. 1211 */ 1212 static void xen_setup_gdt(int cpu) 1213 { 1214 pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry_boot; 1215 pv_cpu_ops.load_gdt = xen_load_gdt_boot; 1216 1217 setup_stack_canary_segment(0); 1218 switch_to_new_gdt(0); 1219 1220 pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry; 1221 pv_cpu_ops.load_gdt = xen_load_gdt; 1222 } 1223 1224 static void __init xen_dom0_set_legacy_features(void) 1225 { 1226 x86_platform.legacy.rtc = 1; 1227 } 1228 1229 /* First C function to be called on Xen boot */ 1230 asmlinkage __visible void __init xen_start_kernel(void) 1231 { 1232 struct physdev_set_iopl set_iopl; 1233 unsigned long initrd_start = 0; 1234 int rc; 1235 1236 if (!xen_start_info) 1237 return; 1238 1239 xen_domain_type = XEN_PV_DOMAIN; 1240 1241 xen_setup_features(); 1242 1243 xen_setup_machphys_mapping(); 1244 1245 /* Install Xen paravirt ops */ 1246 pv_info = xen_info; 1247 pv_init_ops = xen_init_ops; 1248 pv_cpu_ops = xen_cpu_ops; 1249 1250 x86_platform.get_nmi_reason = xen_get_nmi_reason; 1251 1252 x86_init.resources.memory_setup = xen_memory_setup; 1253 x86_init.oem.arch_setup = xen_arch_setup; 1254 x86_init.oem.banner = xen_banner; 1255 1256 /* 1257 * Set up some pagetable state before starting to set any ptes. 1258 */ 1259 1260 xen_init_mmu_ops(); 1261 1262 /* Prevent unwanted bits from being set in PTEs. */ 1263 __supported_pte_mask &= ~_PAGE_GLOBAL; 1264 1265 /* 1266 * Prevent page tables from being allocated in highmem, even 1267 * if CONFIG_HIGHPTE is enabled. 1268 */ 1269 __userpte_alloc_gfp &= ~__GFP_HIGHMEM; 1270 1271 /* Work out if we support NX */ 1272 x86_configure_nx(); 1273 1274 /* Get mfn list */ 1275 xen_build_dynamic_phys_to_machine(); 1276 1277 /* 1278 * Set up kernel GDT and segment registers, mainly so that 1279 * -fstack-protector code can be executed. 1280 */ 1281 xen_setup_gdt(0); 1282 1283 xen_init_irq_ops(); 1284 xen_init_capabilities(); 1285 1286 #ifdef CONFIG_X86_LOCAL_APIC 1287 /* 1288 * set up the basic apic ops. 1289 */ 1290 xen_init_apic(); 1291 #endif 1292 1293 if (xen_feature(XENFEAT_mmu_pt_update_preserve_ad)) { 1294 pv_mmu_ops.ptep_modify_prot_start = xen_ptep_modify_prot_start; 1295 pv_mmu_ops.ptep_modify_prot_commit = xen_ptep_modify_prot_commit; 1296 } 1297 1298 machine_ops = xen_machine_ops; 1299 1300 /* 1301 * The only reliable way to retain the initial address of the 1302 * percpu gdt_page is to remember it here, so we can go and 1303 * mark it RW later, when the initial percpu area is freed. 1304 */ 1305 xen_initial_gdt = &per_cpu(gdt_page, 0); 1306 1307 xen_smp_init(); 1308 1309 #ifdef CONFIG_ACPI_NUMA 1310 /* 1311 * The pages we from Xen are not related to machine pages, so 1312 * any NUMA information the kernel tries to get from ACPI will 1313 * be meaningless. Prevent it from trying. 1314 */ 1315 acpi_numa = -1; 1316 #endif 1317 /* Let's presume PV guests always boot on vCPU with id 0. */ 1318 per_cpu(xen_vcpu_id, 0) = 0; 1319 1320 /* 1321 * Setup xen_vcpu early because start_kernel needs it for 1322 * local_irq_disable(), irqs_disabled(). 1323 * 1324 * Don't do the full vcpu_info placement stuff until we have 1325 * the cpu_possible_mask and a non-dummy shared_info. 1326 */ 1327 xen_vcpu_info_reset(0); 1328 1329 WARN_ON(xen_cpuhp_setup(xen_cpu_up_prepare_pv, xen_cpu_dead_pv)); 1330 1331 local_irq_disable(); 1332 early_boot_irqs_disabled = true; 1333 1334 xen_raw_console_write("mapping kernel into physical memory\n"); 1335 xen_setup_kernel_pagetable((pgd_t *)xen_start_info->pt_base, 1336 xen_start_info->nr_pages); 1337 xen_reserve_special_pages(); 1338 1339 /* keep using Xen gdt for now; no urgent need to change it */ 1340 1341 #ifdef CONFIG_X86_32 1342 pv_info.kernel_rpl = 1; 1343 if (xen_feature(XENFEAT_supervisor_mode_kernel)) 1344 pv_info.kernel_rpl = 0; 1345 #else 1346 pv_info.kernel_rpl = 0; 1347 #endif 1348 /* set the limit of our address space */ 1349 xen_reserve_top(); 1350 1351 /* 1352 * We used to do this in xen_arch_setup, but that is too late 1353 * on AMD were early_cpu_init (run before ->arch_setup()) calls 1354 * early_amd_init which pokes 0xcf8 port. 1355 */ 1356 set_iopl.iopl = 1; 1357 rc = HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl); 1358 if (rc != 0) 1359 xen_raw_printk("physdev_op failed %d\n", rc); 1360 1361 #ifdef CONFIG_X86_32 1362 /* set up basic CPUID stuff */ 1363 cpu_detect(&new_cpu_data); 1364 set_cpu_cap(&new_cpu_data, X86_FEATURE_FPU); 1365 new_cpu_data.x86_capability[CPUID_1_EDX] = cpuid_edx(1); 1366 #endif 1367 1368 if (xen_start_info->mod_start) { 1369 if (xen_start_info->flags & SIF_MOD_START_PFN) 1370 initrd_start = PFN_PHYS(xen_start_info->mod_start); 1371 else 1372 initrd_start = __pa(xen_start_info->mod_start); 1373 } 1374 1375 /* Poke various useful things into boot_params */ 1376 boot_params.hdr.type_of_loader = (9 << 4) | 0; 1377 boot_params.hdr.ramdisk_image = initrd_start; 1378 boot_params.hdr.ramdisk_size = xen_start_info->mod_len; 1379 boot_params.hdr.cmd_line_ptr = __pa(xen_start_info->cmd_line); 1380 boot_params.hdr.hardware_subarch = X86_SUBARCH_XEN; 1381 1382 if (!xen_initial_domain()) { 1383 add_preferred_console("xenboot", 0, NULL); 1384 add_preferred_console("tty", 0, NULL); 1385 add_preferred_console("hvc", 0, NULL); 1386 if (pci_xen) 1387 x86_init.pci.arch_init = pci_xen_init; 1388 } else { 1389 const struct dom0_vga_console_info *info = 1390 (void *)((char *)xen_start_info + 1391 xen_start_info->console.dom0.info_off); 1392 struct xen_platform_op op = { 1393 .cmd = XENPF_firmware_info, 1394 .interface_version = XENPF_INTERFACE_VERSION, 1395 .u.firmware_info.type = XEN_FW_KBD_SHIFT_FLAGS, 1396 }; 1397 1398 x86_platform.set_legacy_features = 1399 xen_dom0_set_legacy_features; 1400 xen_init_vga(info, xen_start_info->console.dom0.info_size); 1401 xen_start_info->console.domU.mfn = 0; 1402 xen_start_info->console.domU.evtchn = 0; 1403 1404 if (HYPERVISOR_platform_op(&op) == 0) 1405 boot_params.kbd_status = op.u.firmware_info.u.kbd_shift_flags; 1406 1407 /* Make sure ACS will be enabled */ 1408 pci_request_acs(); 1409 1410 xen_acpi_sleep_register(); 1411 1412 /* Avoid searching for BIOS MP tables */ 1413 x86_init.mpparse.find_smp_config = x86_init_noop; 1414 x86_init.mpparse.get_smp_config = x86_init_uint_noop; 1415 1416 xen_boot_params_init_edd(); 1417 } 1418 #ifdef CONFIG_PCI 1419 /* PCI BIOS service won't work from a PV guest. */ 1420 pci_probe &= ~PCI_PROBE_BIOS; 1421 #endif 1422 xen_raw_console_write("about to get started...\n"); 1423 1424 /* We need this for printk timestamps */ 1425 xen_setup_runstate_info(0); 1426 1427 xen_efi_init(); 1428 1429 /* Start the world */ 1430 #ifdef CONFIG_X86_32 1431 i386_start_kernel(); 1432 #else 1433 cr4_init_shadow(); /* 32b kernel does this in i386_start_kernel() */ 1434 x86_64_start_reservations((char *)__pa_symbol(&boot_params)); 1435 #endif 1436 } 1437 1438 static int xen_cpu_up_prepare_pv(unsigned int cpu) 1439 { 1440 int rc; 1441 1442 if (per_cpu(xen_vcpu, cpu) == NULL) 1443 return -ENODEV; 1444 1445 xen_setup_timer(cpu); 1446 1447 rc = xen_smp_intr_init(cpu); 1448 if (rc) { 1449 WARN(1, "xen_smp_intr_init() for CPU %d failed: %d\n", 1450 cpu, rc); 1451 return rc; 1452 } 1453 1454 rc = xen_smp_intr_init_pv(cpu); 1455 if (rc) { 1456 WARN(1, "xen_smp_intr_init_pv() for CPU %d failed: %d\n", 1457 cpu, rc); 1458 return rc; 1459 } 1460 1461 return 0; 1462 } 1463 1464 static int xen_cpu_dead_pv(unsigned int cpu) 1465 { 1466 xen_smp_intr_free(cpu); 1467 xen_smp_intr_free_pv(cpu); 1468 1469 xen_teardown_timer(cpu); 1470 1471 return 0; 1472 } 1473 1474 static uint32_t __init xen_platform_pv(void) 1475 { 1476 if (xen_pv_domain()) 1477 return xen_cpuid_base(); 1478 1479 return 0; 1480 } 1481 1482 const struct hypervisor_x86 x86_hyper_xen_pv = { 1483 .name = "Xen PV", 1484 .detect = xen_platform_pv, 1485 .pin_vcpu = xen_pin_vcpu, 1486 }; 1487 EXPORT_SYMBOL(x86_hyper_xen_pv); 1488