1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Core of Xen paravirt_ops implementation. 4 * 5 * This file contains the xen_paravirt_ops structure itself, and the 6 * implementations for: 7 * - privileged instructions 8 * - interrupt flags 9 * - segment operations 10 * - booting and setup 11 * 12 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007 13 */ 14 15 #include <linux/cpu.h> 16 #include <linux/kernel.h> 17 #include <linux/init.h> 18 #include <linux/smp.h> 19 #include <linux/preempt.h> 20 #include <linux/hardirq.h> 21 #include <linux/percpu.h> 22 #include <linux/delay.h> 23 #include <linux/start_kernel.h> 24 #include <linux/sched.h> 25 #include <linux/kprobes.h> 26 #include <linux/memblock.h> 27 #include <linux/export.h> 28 #include <linux/mm.h> 29 #include <linux/page-flags.h> 30 #include <linux/highmem.h> 31 #include <linux/console.h> 32 #include <linux/pci.h> 33 #include <linux/gfp.h> 34 #include <linux/edd.h> 35 #include <linux/objtool.h> 36 37 #include <xen/xen.h> 38 #include <xen/events.h> 39 #include <xen/interface/xen.h> 40 #include <xen/interface/version.h> 41 #include <xen/interface/physdev.h> 42 #include <xen/interface/vcpu.h> 43 #include <xen/interface/memory.h> 44 #include <xen/interface/nmi.h> 45 #include <xen/interface/xen-mca.h> 46 #include <xen/features.h> 47 #include <xen/page.h> 48 #include <xen/hvc-console.h> 49 #include <xen/acpi.h> 50 51 #include <asm/paravirt.h> 52 #include <asm/apic.h> 53 #include <asm/page.h> 54 #include <asm/xen/pci.h> 55 #include <asm/xen/hypercall.h> 56 #include <asm/xen/hypervisor.h> 57 #include <asm/xen/cpuid.h> 58 #include <asm/fixmap.h> 59 #include <asm/processor.h> 60 #include <asm/proto.h> 61 #include <asm/msr-index.h> 62 #include <asm/traps.h> 63 #include <asm/setup.h> 64 #include <asm/desc.h> 65 #include <asm/pgalloc.h> 66 #include <asm/tlbflush.h> 67 #include <asm/reboot.h> 68 #include <asm/stackprotector.h> 69 #include <asm/hypervisor.h> 70 #include <asm/mach_traps.h> 71 #include <asm/mwait.h> 72 #include <asm/pci_x86.h> 73 #include <asm/cpu.h> 74 #ifdef CONFIG_X86_IOPL_IOPERM 75 #include <asm/io_bitmap.h> 76 #endif 77 78 #ifdef CONFIG_ACPI 79 #include <linux/acpi.h> 80 #include <asm/acpi.h> 81 #include <acpi/pdc_intel.h> 82 #include <acpi/processor.h> 83 #include <xen/interface/platform.h> 84 #endif 85 86 #include "xen-ops.h" 87 #include "mmu.h" 88 #include "smp.h" 89 #include "multicalls.h" 90 #include "pmu.h" 91 92 #include "../kernel/cpu/cpu.h" /* get_cpu_cap() */ 93 94 void *xen_initial_gdt; 95 96 static int xen_cpu_up_prepare_pv(unsigned int cpu); 97 static int xen_cpu_dead_pv(unsigned int cpu); 98 99 struct tls_descs { 100 struct desc_struct desc[3]; 101 }; 102 103 /* 104 * Updating the 3 TLS descriptors in the GDT on every task switch is 105 * surprisingly expensive so we avoid updating them if they haven't 106 * changed. Since Xen writes different descriptors than the one 107 * passed in the update_descriptor hypercall we keep shadow copies to 108 * compare against. 109 */ 110 static DEFINE_PER_CPU(struct tls_descs, shadow_tls_desc); 111 112 static void __init xen_banner(void) 113 { 114 unsigned version = HYPERVISOR_xen_version(XENVER_version, NULL); 115 struct xen_extraversion extra; 116 HYPERVISOR_xen_version(XENVER_extraversion, &extra); 117 118 pr_info("Booting paravirtualized kernel on %s\n", pv_info.name); 119 pr_info("Xen version: %d.%d%s (preserve-AD)\n", 120 version >> 16, version & 0xffff, extra.extraversion); 121 } 122 123 static void __init xen_pv_init_platform(void) 124 { 125 populate_extra_pte(fix_to_virt(FIX_PARAVIRT_BOOTMAP)); 126 127 set_fixmap(FIX_PARAVIRT_BOOTMAP, xen_start_info->shared_info); 128 HYPERVISOR_shared_info = (void *)fix_to_virt(FIX_PARAVIRT_BOOTMAP); 129 130 /* xen clock uses per-cpu vcpu_info, need to init it for boot cpu */ 131 xen_vcpu_info_reset(0); 132 133 /* pvclock is in shared info area */ 134 xen_init_time_ops(); 135 } 136 137 static void __init xen_pv_guest_late_init(void) 138 { 139 #ifndef CONFIG_SMP 140 /* Setup shared vcpu info for non-smp configurations */ 141 xen_setup_vcpu_info_placement(); 142 #endif 143 } 144 145 /* Check if running on Xen version (major, minor) or later */ 146 bool 147 xen_running_on_version_or_later(unsigned int major, unsigned int minor) 148 { 149 unsigned int version; 150 151 if (!xen_domain()) 152 return false; 153 154 version = HYPERVISOR_xen_version(XENVER_version, NULL); 155 if ((((version >> 16) == major) && ((version & 0xffff) >= minor)) || 156 ((version >> 16) > major)) 157 return true; 158 return false; 159 } 160 161 static __read_mostly unsigned int cpuid_leaf5_ecx_val; 162 static __read_mostly unsigned int cpuid_leaf5_edx_val; 163 164 static void xen_cpuid(unsigned int *ax, unsigned int *bx, 165 unsigned int *cx, unsigned int *dx) 166 { 167 unsigned maskebx = ~0; 168 169 /* 170 * Mask out inconvenient features, to try and disable as many 171 * unsupported kernel subsystems as possible. 172 */ 173 switch (*ax) { 174 case CPUID_MWAIT_LEAF: 175 /* Synthesize the values.. */ 176 *ax = 0; 177 *bx = 0; 178 *cx = cpuid_leaf5_ecx_val; 179 *dx = cpuid_leaf5_edx_val; 180 return; 181 182 case 0xb: 183 /* Suppress extended topology stuff */ 184 maskebx = 0; 185 break; 186 } 187 188 asm(XEN_EMULATE_PREFIX "cpuid" 189 : "=a" (*ax), 190 "=b" (*bx), 191 "=c" (*cx), 192 "=d" (*dx) 193 : "0" (*ax), "2" (*cx)); 194 195 *bx &= maskebx; 196 } 197 STACK_FRAME_NON_STANDARD(xen_cpuid); /* XEN_EMULATE_PREFIX */ 198 199 static bool __init xen_check_mwait(void) 200 { 201 #ifdef CONFIG_ACPI 202 struct xen_platform_op op = { 203 .cmd = XENPF_set_processor_pminfo, 204 .u.set_pminfo.id = -1, 205 .u.set_pminfo.type = XEN_PM_PDC, 206 }; 207 uint32_t buf[3]; 208 unsigned int ax, bx, cx, dx; 209 unsigned int mwait_mask; 210 211 /* We need to determine whether it is OK to expose the MWAIT 212 * capability to the kernel to harvest deeper than C3 states from ACPI 213 * _CST using the processor_harvest_xen.c module. For this to work, we 214 * need to gather the MWAIT_LEAF values (which the cstate.c code 215 * checks against). The hypervisor won't expose the MWAIT flag because 216 * it would break backwards compatibility; so we will find out directly 217 * from the hardware and hypercall. 218 */ 219 if (!xen_initial_domain()) 220 return false; 221 222 /* 223 * When running under platform earlier than Xen4.2, do not expose 224 * mwait, to avoid the risk of loading native acpi pad driver 225 */ 226 if (!xen_running_on_version_or_later(4, 2)) 227 return false; 228 229 ax = 1; 230 cx = 0; 231 232 native_cpuid(&ax, &bx, &cx, &dx); 233 234 mwait_mask = (1 << (X86_FEATURE_EST % 32)) | 235 (1 << (X86_FEATURE_MWAIT % 32)); 236 237 if ((cx & mwait_mask) != mwait_mask) 238 return false; 239 240 /* We need to emulate the MWAIT_LEAF and for that we need both 241 * ecx and edx. The hypercall provides only partial information. 242 */ 243 244 ax = CPUID_MWAIT_LEAF; 245 bx = 0; 246 cx = 0; 247 dx = 0; 248 249 native_cpuid(&ax, &bx, &cx, &dx); 250 251 /* Ask the Hypervisor whether to clear ACPI_PDC_C_C2C3_FFH. If so, 252 * don't expose MWAIT_LEAF and let ACPI pick the IOPORT version of C3. 253 */ 254 buf[0] = ACPI_PDC_REVISION_ID; 255 buf[1] = 1; 256 buf[2] = (ACPI_PDC_C_CAPABILITY_SMP | ACPI_PDC_EST_CAPABILITY_SWSMP); 257 258 set_xen_guest_handle(op.u.set_pminfo.pdc, buf); 259 260 if ((HYPERVISOR_platform_op(&op) == 0) && 261 (buf[2] & (ACPI_PDC_C_C1_FFH | ACPI_PDC_C_C2C3_FFH))) { 262 cpuid_leaf5_ecx_val = cx; 263 cpuid_leaf5_edx_val = dx; 264 } 265 return true; 266 #else 267 return false; 268 #endif 269 } 270 271 static bool __init xen_check_xsave(void) 272 { 273 unsigned int cx, xsave_mask; 274 275 cx = cpuid_ecx(1); 276 277 xsave_mask = (1 << (X86_FEATURE_XSAVE % 32)) | 278 (1 << (X86_FEATURE_OSXSAVE % 32)); 279 280 /* Xen will set CR4.OSXSAVE if supported and not disabled by force */ 281 return (cx & xsave_mask) == xsave_mask; 282 } 283 284 static void __init xen_init_capabilities(void) 285 { 286 setup_force_cpu_cap(X86_FEATURE_XENPV); 287 setup_clear_cpu_cap(X86_FEATURE_DCA); 288 setup_clear_cpu_cap(X86_FEATURE_APERFMPERF); 289 setup_clear_cpu_cap(X86_FEATURE_MTRR); 290 setup_clear_cpu_cap(X86_FEATURE_ACC); 291 setup_clear_cpu_cap(X86_FEATURE_X2APIC); 292 setup_clear_cpu_cap(X86_FEATURE_SME); 293 294 /* 295 * Xen PV would need some work to support PCID: CR3 handling as well 296 * as xen_flush_tlb_others() would need updating. 297 */ 298 setup_clear_cpu_cap(X86_FEATURE_PCID); 299 300 if (!xen_initial_domain()) 301 setup_clear_cpu_cap(X86_FEATURE_ACPI); 302 303 if (xen_check_mwait()) 304 setup_force_cpu_cap(X86_FEATURE_MWAIT); 305 else 306 setup_clear_cpu_cap(X86_FEATURE_MWAIT); 307 308 if (!xen_check_xsave()) { 309 setup_clear_cpu_cap(X86_FEATURE_XSAVE); 310 setup_clear_cpu_cap(X86_FEATURE_OSXSAVE); 311 } 312 } 313 314 static void xen_set_debugreg(int reg, unsigned long val) 315 { 316 HYPERVISOR_set_debugreg(reg, val); 317 } 318 319 static unsigned long xen_get_debugreg(int reg) 320 { 321 return HYPERVISOR_get_debugreg(reg); 322 } 323 324 static void xen_end_context_switch(struct task_struct *next) 325 { 326 xen_mc_flush(); 327 paravirt_end_context_switch(next); 328 } 329 330 static unsigned long xen_store_tr(void) 331 { 332 return 0; 333 } 334 335 /* 336 * Set the page permissions for a particular virtual address. If the 337 * address is a vmalloc mapping (or other non-linear mapping), then 338 * find the linear mapping of the page and also set its protections to 339 * match. 340 */ 341 static void set_aliased_prot(void *v, pgprot_t prot) 342 { 343 int level; 344 pte_t *ptep; 345 pte_t pte; 346 unsigned long pfn; 347 unsigned char dummy; 348 void *va; 349 350 ptep = lookup_address((unsigned long)v, &level); 351 BUG_ON(ptep == NULL); 352 353 pfn = pte_pfn(*ptep); 354 pte = pfn_pte(pfn, prot); 355 356 /* 357 * Careful: update_va_mapping() will fail if the virtual address 358 * we're poking isn't populated in the page tables. We don't 359 * need to worry about the direct map (that's always in the page 360 * tables), but we need to be careful about vmap space. In 361 * particular, the top level page table can lazily propagate 362 * entries between processes, so if we've switched mms since we 363 * vmapped the target in the first place, we might not have the 364 * top-level page table entry populated. 365 * 366 * We disable preemption because we want the same mm active when 367 * we probe the target and when we issue the hypercall. We'll 368 * have the same nominal mm, but if we're a kernel thread, lazy 369 * mm dropping could change our pgd. 370 * 371 * Out of an abundance of caution, this uses __get_user() to fault 372 * in the target address just in case there's some obscure case 373 * in which the target address isn't readable. 374 */ 375 376 preempt_disable(); 377 378 copy_from_kernel_nofault(&dummy, v, 1); 379 380 if (HYPERVISOR_update_va_mapping((unsigned long)v, pte, 0)) 381 BUG(); 382 383 va = __va(PFN_PHYS(pfn)); 384 385 if (va != v && HYPERVISOR_update_va_mapping((unsigned long)va, pte, 0)) 386 BUG(); 387 388 preempt_enable(); 389 } 390 391 static void xen_alloc_ldt(struct desc_struct *ldt, unsigned entries) 392 { 393 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE; 394 int i; 395 396 /* 397 * We need to mark the all aliases of the LDT pages RO. We 398 * don't need to call vm_flush_aliases(), though, since that's 399 * only responsible for flushing aliases out the TLBs, not the 400 * page tables, and Xen will flush the TLB for us if needed. 401 * 402 * To avoid confusing future readers: none of this is necessary 403 * to load the LDT. The hypervisor only checks this when the 404 * LDT is faulted in due to subsequent descriptor access. 405 */ 406 407 for (i = 0; i < entries; i += entries_per_page) 408 set_aliased_prot(ldt + i, PAGE_KERNEL_RO); 409 } 410 411 static void xen_free_ldt(struct desc_struct *ldt, unsigned entries) 412 { 413 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE; 414 int i; 415 416 for (i = 0; i < entries; i += entries_per_page) 417 set_aliased_prot(ldt + i, PAGE_KERNEL); 418 } 419 420 static void xen_set_ldt(const void *addr, unsigned entries) 421 { 422 struct mmuext_op *op; 423 struct multicall_space mcs = xen_mc_entry(sizeof(*op)); 424 425 trace_xen_cpu_set_ldt(addr, entries); 426 427 op = mcs.args; 428 op->cmd = MMUEXT_SET_LDT; 429 op->arg1.linear_addr = (unsigned long)addr; 430 op->arg2.nr_ents = entries; 431 432 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); 433 434 xen_mc_issue(PARAVIRT_LAZY_CPU); 435 } 436 437 static void xen_load_gdt(const struct desc_ptr *dtr) 438 { 439 unsigned long va = dtr->address; 440 unsigned int size = dtr->size + 1; 441 unsigned long pfn, mfn; 442 int level; 443 pte_t *ptep; 444 void *virt; 445 446 /* @size should be at most GDT_SIZE which is smaller than PAGE_SIZE. */ 447 BUG_ON(size > PAGE_SIZE); 448 BUG_ON(va & ~PAGE_MASK); 449 450 /* 451 * The GDT is per-cpu and is in the percpu data area. 452 * That can be virtually mapped, so we need to do a 453 * page-walk to get the underlying MFN for the 454 * hypercall. The page can also be in the kernel's 455 * linear range, so we need to RO that mapping too. 456 */ 457 ptep = lookup_address(va, &level); 458 BUG_ON(ptep == NULL); 459 460 pfn = pte_pfn(*ptep); 461 mfn = pfn_to_mfn(pfn); 462 virt = __va(PFN_PHYS(pfn)); 463 464 make_lowmem_page_readonly((void *)va); 465 make_lowmem_page_readonly(virt); 466 467 if (HYPERVISOR_set_gdt(&mfn, size / sizeof(struct desc_struct))) 468 BUG(); 469 } 470 471 /* 472 * load_gdt for early boot, when the gdt is only mapped once 473 */ 474 static void __init xen_load_gdt_boot(const struct desc_ptr *dtr) 475 { 476 unsigned long va = dtr->address; 477 unsigned int size = dtr->size + 1; 478 unsigned long pfn, mfn; 479 pte_t pte; 480 481 /* @size should be at most GDT_SIZE which is smaller than PAGE_SIZE. */ 482 BUG_ON(size > PAGE_SIZE); 483 BUG_ON(va & ~PAGE_MASK); 484 485 pfn = virt_to_pfn(va); 486 mfn = pfn_to_mfn(pfn); 487 488 pte = pfn_pte(pfn, PAGE_KERNEL_RO); 489 490 if (HYPERVISOR_update_va_mapping((unsigned long)va, pte, 0)) 491 BUG(); 492 493 if (HYPERVISOR_set_gdt(&mfn, size / sizeof(struct desc_struct))) 494 BUG(); 495 } 496 497 static inline bool desc_equal(const struct desc_struct *d1, 498 const struct desc_struct *d2) 499 { 500 return !memcmp(d1, d2, sizeof(*d1)); 501 } 502 503 static void load_TLS_descriptor(struct thread_struct *t, 504 unsigned int cpu, unsigned int i) 505 { 506 struct desc_struct *shadow = &per_cpu(shadow_tls_desc, cpu).desc[i]; 507 struct desc_struct *gdt; 508 xmaddr_t maddr; 509 struct multicall_space mc; 510 511 if (desc_equal(shadow, &t->tls_array[i])) 512 return; 513 514 *shadow = t->tls_array[i]; 515 516 gdt = get_cpu_gdt_rw(cpu); 517 maddr = arbitrary_virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]); 518 mc = __xen_mc_entry(0); 519 520 MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]); 521 } 522 523 static void xen_load_tls(struct thread_struct *t, unsigned int cpu) 524 { 525 /* 526 * In lazy mode we need to zero %fs, otherwise we may get an 527 * exception between the new %fs descriptor being loaded and 528 * %fs being effectively cleared at __switch_to(). 529 */ 530 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU) 531 loadsegment(fs, 0); 532 533 xen_mc_batch(); 534 535 load_TLS_descriptor(t, cpu, 0); 536 load_TLS_descriptor(t, cpu, 1); 537 load_TLS_descriptor(t, cpu, 2); 538 539 xen_mc_issue(PARAVIRT_LAZY_CPU); 540 } 541 542 static void xen_load_gs_index(unsigned int idx) 543 { 544 if (HYPERVISOR_set_segment_base(SEGBASE_GS_USER_SEL, idx)) 545 BUG(); 546 } 547 548 static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum, 549 const void *ptr) 550 { 551 xmaddr_t mach_lp = arbitrary_virt_to_machine(&dt[entrynum]); 552 u64 entry = *(u64 *)ptr; 553 554 trace_xen_cpu_write_ldt_entry(dt, entrynum, entry); 555 556 preempt_disable(); 557 558 xen_mc_flush(); 559 if (HYPERVISOR_update_descriptor(mach_lp.maddr, entry)) 560 BUG(); 561 562 preempt_enable(); 563 } 564 565 void noist_exc_debug(struct pt_regs *regs); 566 567 DEFINE_IDTENTRY_RAW(xenpv_exc_nmi) 568 { 569 /* On Xen PV, NMI doesn't use IST. The C part is the same as native. */ 570 exc_nmi(regs); 571 } 572 573 DEFINE_IDTENTRY_RAW_ERRORCODE(xenpv_exc_double_fault) 574 { 575 /* On Xen PV, DF doesn't use IST. The C part is the same as native. */ 576 exc_double_fault(regs, error_code); 577 } 578 579 DEFINE_IDTENTRY_RAW(xenpv_exc_debug) 580 { 581 /* 582 * There's no IST on Xen PV, but we still need to dispatch 583 * to the correct handler. 584 */ 585 if (user_mode(regs)) 586 noist_exc_debug(regs); 587 else 588 exc_debug(regs); 589 } 590 591 DEFINE_IDTENTRY_RAW(exc_xen_unknown_trap) 592 { 593 /* This should never happen and there is no way to handle it. */ 594 instrumentation_begin(); 595 pr_err("Unknown trap in Xen PV mode."); 596 BUG(); 597 instrumentation_end(); 598 } 599 600 #ifdef CONFIG_X86_MCE 601 DEFINE_IDTENTRY_RAW(xenpv_exc_machine_check) 602 { 603 /* 604 * There's no IST on Xen PV, but we still need to dispatch 605 * to the correct handler. 606 */ 607 if (user_mode(regs)) 608 noist_exc_machine_check(regs); 609 else 610 exc_machine_check(regs); 611 } 612 #endif 613 614 struct trap_array_entry { 615 void (*orig)(void); 616 void (*xen)(void); 617 bool ist_okay; 618 }; 619 620 #define TRAP_ENTRY(func, ist_ok) { \ 621 .orig = asm_##func, \ 622 .xen = xen_asm_##func, \ 623 .ist_okay = ist_ok } 624 625 #define TRAP_ENTRY_REDIR(func, ist_ok) { \ 626 .orig = asm_##func, \ 627 .xen = xen_asm_xenpv_##func, \ 628 .ist_okay = ist_ok } 629 630 static struct trap_array_entry trap_array[] = { 631 TRAP_ENTRY_REDIR(exc_debug, true ), 632 TRAP_ENTRY_REDIR(exc_double_fault, true ), 633 #ifdef CONFIG_X86_MCE 634 TRAP_ENTRY_REDIR(exc_machine_check, true ), 635 #endif 636 TRAP_ENTRY_REDIR(exc_nmi, true ), 637 TRAP_ENTRY(exc_int3, false ), 638 TRAP_ENTRY(exc_overflow, false ), 639 #ifdef CONFIG_IA32_EMULATION 640 { entry_INT80_compat, xen_entry_INT80_compat, false }, 641 #endif 642 TRAP_ENTRY(exc_page_fault, false ), 643 TRAP_ENTRY(exc_divide_error, false ), 644 TRAP_ENTRY(exc_bounds, false ), 645 TRAP_ENTRY(exc_invalid_op, false ), 646 TRAP_ENTRY(exc_device_not_available, false ), 647 TRAP_ENTRY(exc_coproc_segment_overrun, false ), 648 TRAP_ENTRY(exc_invalid_tss, false ), 649 TRAP_ENTRY(exc_segment_not_present, false ), 650 TRAP_ENTRY(exc_stack_segment, false ), 651 TRAP_ENTRY(exc_general_protection, false ), 652 TRAP_ENTRY(exc_spurious_interrupt_bug, false ), 653 TRAP_ENTRY(exc_coprocessor_error, false ), 654 TRAP_ENTRY(exc_alignment_check, false ), 655 TRAP_ENTRY(exc_simd_coprocessor_error, false ), 656 }; 657 658 static bool __ref get_trap_addr(void **addr, unsigned int ist) 659 { 660 unsigned int nr; 661 bool ist_okay = false; 662 bool found = false; 663 664 /* 665 * Replace trap handler addresses by Xen specific ones. 666 * Check for known traps using IST and whitelist them. 667 * The debugger ones are the only ones we care about. 668 * Xen will handle faults like double_fault, so we should never see 669 * them. Warn if there's an unexpected IST-using fault handler. 670 */ 671 for (nr = 0; nr < ARRAY_SIZE(trap_array); nr++) { 672 struct trap_array_entry *entry = trap_array + nr; 673 674 if (*addr == entry->orig) { 675 *addr = entry->xen; 676 ist_okay = entry->ist_okay; 677 found = true; 678 break; 679 } 680 } 681 682 if (nr == ARRAY_SIZE(trap_array) && 683 *addr >= (void *)early_idt_handler_array[0] && 684 *addr < (void *)early_idt_handler_array[NUM_EXCEPTION_VECTORS]) { 685 nr = (*addr - (void *)early_idt_handler_array[0]) / 686 EARLY_IDT_HANDLER_SIZE; 687 *addr = (void *)xen_early_idt_handler_array[nr]; 688 found = true; 689 } 690 691 if (!found) 692 *addr = (void *)xen_asm_exc_xen_unknown_trap; 693 694 if (WARN_ON(found && ist != 0 && !ist_okay)) 695 return false; 696 697 return true; 698 } 699 700 static int cvt_gate_to_trap(int vector, const gate_desc *val, 701 struct trap_info *info) 702 { 703 unsigned long addr; 704 705 if (val->bits.type != GATE_TRAP && val->bits.type != GATE_INTERRUPT) 706 return 0; 707 708 info->vector = vector; 709 710 addr = gate_offset(val); 711 if (!get_trap_addr((void **)&addr, val->bits.ist)) 712 return 0; 713 info->address = addr; 714 715 info->cs = gate_segment(val); 716 info->flags = val->bits.dpl; 717 /* interrupt gates clear IF */ 718 if (val->bits.type == GATE_INTERRUPT) 719 info->flags |= 1 << 2; 720 721 return 1; 722 } 723 724 /* Locations of each CPU's IDT */ 725 static DEFINE_PER_CPU(struct desc_ptr, idt_desc); 726 727 /* Set an IDT entry. If the entry is part of the current IDT, then 728 also update Xen. */ 729 static void xen_write_idt_entry(gate_desc *dt, int entrynum, const gate_desc *g) 730 { 731 unsigned long p = (unsigned long)&dt[entrynum]; 732 unsigned long start, end; 733 734 trace_xen_cpu_write_idt_entry(dt, entrynum, g); 735 736 preempt_disable(); 737 738 start = __this_cpu_read(idt_desc.address); 739 end = start + __this_cpu_read(idt_desc.size) + 1; 740 741 xen_mc_flush(); 742 743 native_write_idt_entry(dt, entrynum, g); 744 745 if (p >= start && (p + 8) <= end) { 746 struct trap_info info[2]; 747 748 info[1].address = 0; 749 750 if (cvt_gate_to_trap(entrynum, g, &info[0])) 751 if (HYPERVISOR_set_trap_table(info)) 752 BUG(); 753 } 754 755 preempt_enable(); 756 } 757 758 static unsigned xen_convert_trap_info(const struct desc_ptr *desc, 759 struct trap_info *traps, bool full) 760 { 761 unsigned in, out, count; 762 763 count = (desc->size+1) / sizeof(gate_desc); 764 BUG_ON(count > 256); 765 766 for (in = out = 0; in < count; in++) { 767 gate_desc *entry = (gate_desc *)(desc->address) + in; 768 769 if (cvt_gate_to_trap(in, entry, &traps[out]) || full) 770 out++; 771 } 772 773 return out; 774 } 775 776 void xen_copy_trap_info(struct trap_info *traps) 777 { 778 const struct desc_ptr *desc = this_cpu_ptr(&idt_desc); 779 780 xen_convert_trap_info(desc, traps, true); 781 } 782 783 /* Load a new IDT into Xen. In principle this can be per-CPU, so we 784 hold a spinlock to protect the static traps[] array (static because 785 it avoids allocation, and saves stack space). */ 786 static void xen_load_idt(const struct desc_ptr *desc) 787 { 788 static DEFINE_SPINLOCK(lock); 789 static struct trap_info traps[257]; 790 unsigned out; 791 792 trace_xen_cpu_load_idt(desc); 793 794 spin_lock(&lock); 795 796 memcpy(this_cpu_ptr(&idt_desc), desc, sizeof(idt_desc)); 797 798 out = xen_convert_trap_info(desc, traps, false); 799 memset(&traps[out], 0, sizeof(traps[0])); 800 801 xen_mc_flush(); 802 if (HYPERVISOR_set_trap_table(traps)) 803 BUG(); 804 805 spin_unlock(&lock); 806 } 807 808 /* Write a GDT descriptor entry. Ignore LDT descriptors, since 809 they're handled differently. */ 810 static void xen_write_gdt_entry(struct desc_struct *dt, int entry, 811 const void *desc, int type) 812 { 813 trace_xen_cpu_write_gdt_entry(dt, entry, desc, type); 814 815 preempt_disable(); 816 817 switch (type) { 818 case DESC_LDT: 819 case DESC_TSS: 820 /* ignore */ 821 break; 822 823 default: { 824 xmaddr_t maddr = arbitrary_virt_to_machine(&dt[entry]); 825 826 xen_mc_flush(); 827 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc)) 828 BUG(); 829 } 830 831 } 832 833 preempt_enable(); 834 } 835 836 /* 837 * Version of write_gdt_entry for use at early boot-time needed to 838 * update an entry as simply as possible. 839 */ 840 static void __init xen_write_gdt_entry_boot(struct desc_struct *dt, int entry, 841 const void *desc, int type) 842 { 843 trace_xen_cpu_write_gdt_entry(dt, entry, desc, type); 844 845 switch (type) { 846 case DESC_LDT: 847 case DESC_TSS: 848 /* ignore */ 849 break; 850 851 default: { 852 xmaddr_t maddr = virt_to_machine(&dt[entry]); 853 854 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc)) 855 dt[entry] = *(struct desc_struct *)desc; 856 } 857 858 } 859 } 860 861 static void xen_load_sp0(unsigned long sp0) 862 { 863 struct multicall_space mcs; 864 865 mcs = xen_mc_entry(0); 866 MULTI_stack_switch(mcs.mc, __KERNEL_DS, sp0); 867 xen_mc_issue(PARAVIRT_LAZY_CPU); 868 this_cpu_write(cpu_tss_rw.x86_tss.sp0, sp0); 869 } 870 871 #ifdef CONFIG_X86_IOPL_IOPERM 872 static void xen_invalidate_io_bitmap(void) 873 { 874 struct physdev_set_iobitmap iobitmap = { 875 .bitmap = NULL, 876 .nr_ports = 0, 877 }; 878 879 native_tss_invalidate_io_bitmap(); 880 HYPERVISOR_physdev_op(PHYSDEVOP_set_iobitmap, &iobitmap); 881 } 882 883 static void xen_update_io_bitmap(void) 884 { 885 struct physdev_set_iobitmap iobitmap; 886 struct tss_struct *tss = this_cpu_ptr(&cpu_tss_rw); 887 888 native_tss_update_io_bitmap(); 889 890 iobitmap.bitmap = (uint8_t *)(&tss->x86_tss) + 891 tss->x86_tss.io_bitmap_base; 892 if (tss->x86_tss.io_bitmap_base == IO_BITMAP_OFFSET_INVALID) 893 iobitmap.nr_ports = 0; 894 else 895 iobitmap.nr_ports = IO_BITMAP_BITS; 896 897 HYPERVISOR_physdev_op(PHYSDEVOP_set_iobitmap, &iobitmap); 898 } 899 #endif 900 901 static void xen_io_delay(void) 902 { 903 } 904 905 static DEFINE_PER_CPU(unsigned long, xen_cr0_value); 906 907 static unsigned long xen_read_cr0(void) 908 { 909 unsigned long cr0 = this_cpu_read(xen_cr0_value); 910 911 if (unlikely(cr0 == 0)) { 912 cr0 = native_read_cr0(); 913 this_cpu_write(xen_cr0_value, cr0); 914 } 915 916 return cr0; 917 } 918 919 static void xen_write_cr0(unsigned long cr0) 920 { 921 struct multicall_space mcs; 922 923 this_cpu_write(xen_cr0_value, cr0); 924 925 /* Only pay attention to cr0.TS; everything else is 926 ignored. */ 927 mcs = xen_mc_entry(0); 928 929 MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0); 930 931 xen_mc_issue(PARAVIRT_LAZY_CPU); 932 } 933 934 static void xen_write_cr4(unsigned long cr4) 935 { 936 cr4 &= ~(X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PCE); 937 938 native_write_cr4(cr4); 939 } 940 941 static u64 xen_read_msr_safe(unsigned int msr, int *err) 942 { 943 u64 val; 944 945 if (pmu_msr_read(msr, &val, err)) 946 return val; 947 948 val = native_read_msr_safe(msr, err); 949 switch (msr) { 950 case MSR_IA32_APICBASE: 951 val &= ~X2APIC_ENABLE; 952 break; 953 } 954 return val; 955 } 956 957 static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high) 958 { 959 int ret; 960 unsigned int which; 961 u64 base; 962 963 ret = 0; 964 965 switch (msr) { 966 case MSR_FS_BASE: which = SEGBASE_FS; goto set; 967 case MSR_KERNEL_GS_BASE: which = SEGBASE_GS_USER; goto set; 968 case MSR_GS_BASE: which = SEGBASE_GS_KERNEL; goto set; 969 970 set: 971 base = ((u64)high << 32) | low; 972 if (HYPERVISOR_set_segment_base(which, base) != 0) 973 ret = -EIO; 974 break; 975 976 case MSR_STAR: 977 case MSR_CSTAR: 978 case MSR_LSTAR: 979 case MSR_SYSCALL_MASK: 980 case MSR_IA32_SYSENTER_CS: 981 case MSR_IA32_SYSENTER_ESP: 982 case MSR_IA32_SYSENTER_EIP: 983 /* Fast syscall setup is all done in hypercalls, so 984 these are all ignored. Stub them out here to stop 985 Xen console noise. */ 986 break; 987 988 default: 989 if (!pmu_msr_write(msr, low, high, &ret)) 990 ret = native_write_msr_safe(msr, low, high); 991 } 992 993 return ret; 994 } 995 996 static u64 xen_read_msr(unsigned int msr) 997 { 998 /* 999 * This will silently swallow a #GP from RDMSR. It may be worth 1000 * changing that. 1001 */ 1002 int err; 1003 1004 return xen_read_msr_safe(msr, &err); 1005 } 1006 1007 static void xen_write_msr(unsigned int msr, unsigned low, unsigned high) 1008 { 1009 /* 1010 * This will silently swallow a #GP from WRMSR. It may be worth 1011 * changing that. 1012 */ 1013 xen_write_msr_safe(msr, low, high); 1014 } 1015 1016 /* This is called once we have the cpu_possible_mask */ 1017 void __init xen_setup_vcpu_info_placement(void) 1018 { 1019 int cpu; 1020 1021 for_each_possible_cpu(cpu) { 1022 /* Set up direct vCPU id mapping for PV guests. */ 1023 per_cpu(xen_vcpu_id, cpu) = cpu; 1024 1025 /* 1026 * xen_vcpu_setup(cpu) can fail -- in which case it 1027 * falls back to the shared_info version for cpus 1028 * where xen_vcpu_nr(cpu) < MAX_VIRT_CPUS. 1029 * 1030 * xen_cpu_up_prepare_pv() handles the rest by failing 1031 * them in hotplug. 1032 */ 1033 (void) xen_vcpu_setup(cpu); 1034 } 1035 1036 /* 1037 * xen_vcpu_setup managed to place the vcpu_info within the 1038 * percpu area for all cpus, so make use of it. 1039 */ 1040 if (xen_have_vcpu_info_placement) { 1041 pv_ops.irq.save_fl = __PV_IS_CALLEE_SAVE(xen_save_fl_direct); 1042 pv_ops.irq.irq_disable = 1043 __PV_IS_CALLEE_SAVE(xen_irq_disable_direct); 1044 pv_ops.irq.irq_enable = 1045 __PV_IS_CALLEE_SAVE(xen_irq_enable_direct); 1046 pv_ops.mmu.read_cr2 = 1047 __PV_IS_CALLEE_SAVE(xen_read_cr2_direct); 1048 } 1049 } 1050 1051 static const struct pv_info xen_info __initconst = { 1052 .extra_user_64bit_cs = FLAT_USER_CS64, 1053 .name = "Xen", 1054 }; 1055 1056 static const struct pv_cpu_ops xen_cpu_ops __initconst = { 1057 .cpuid = xen_cpuid, 1058 1059 .set_debugreg = xen_set_debugreg, 1060 .get_debugreg = xen_get_debugreg, 1061 1062 .read_cr0 = xen_read_cr0, 1063 .write_cr0 = xen_write_cr0, 1064 1065 .write_cr4 = xen_write_cr4, 1066 1067 .wbinvd = native_wbinvd, 1068 1069 .read_msr = xen_read_msr, 1070 .write_msr = xen_write_msr, 1071 1072 .read_msr_safe = xen_read_msr_safe, 1073 .write_msr_safe = xen_write_msr_safe, 1074 1075 .read_pmc = xen_read_pmc, 1076 1077 .load_tr_desc = paravirt_nop, 1078 .set_ldt = xen_set_ldt, 1079 .load_gdt = xen_load_gdt, 1080 .load_idt = xen_load_idt, 1081 .load_tls = xen_load_tls, 1082 .load_gs_index = xen_load_gs_index, 1083 1084 .alloc_ldt = xen_alloc_ldt, 1085 .free_ldt = xen_free_ldt, 1086 1087 .store_tr = xen_store_tr, 1088 1089 .write_ldt_entry = xen_write_ldt_entry, 1090 .write_gdt_entry = xen_write_gdt_entry, 1091 .write_idt_entry = xen_write_idt_entry, 1092 .load_sp0 = xen_load_sp0, 1093 1094 #ifdef CONFIG_X86_IOPL_IOPERM 1095 .invalidate_io_bitmap = xen_invalidate_io_bitmap, 1096 .update_io_bitmap = xen_update_io_bitmap, 1097 #endif 1098 .io_delay = xen_io_delay, 1099 1100 .start_context_switch = paravirt_start_context_switch, 1101 .end_context_switch = xen_end_context_switch, 1102 }; 1103 1104 static void xen_restart(char *msg) 1105 { 1106 xen_reboot(SHUTDOWN_reboot); 1107 } 1108 1109 static void xen_machine_halt(void) 1110 { 1111 xen_reboot(SHUTDOWN_poweroff); 1112 } 1113 1114 static void xen_machine_power_off(void) 1115 { 1116 if (pm_power_off) 1117 pm_power_off(); 1118 xen_reboot(SHUTDOWN_poweroff); 1119 } 1120 1121 static void xen_crash_shutdown(struct pt_regs *regs) 1122 { 1123 xen_reboot(SHUTDOWN_crash); 1124 } 1125 1126 static const struct machine_ops xen_machine_ops __initconst = { 1127 .restart = xen_restart, 1128 .halt = xen_machine_halt, 1129 .power_off = xen_machine_power_off, 1130 .shutdown = xen_machine_halt, 1131 .crash_shutdown = xen_crash_shutdown, 1132 .emergency_restart = xen_emergency_restart, 1133 }; 1134 1135 static unsigned char xen_get_nmi_reason(void) 1136 { 1137 unsigned char reason = 0; 1138 1139 /* Construct a value which looks like it came from port 0x61. */ 1140 if (test_bit(_XEN_NMIREASON_io_error, 1141 &HYPERVISOR_shared_info->arch.nmi_reason)) 1142 reason |= NMI_REASON_IOCHK; 1143 if (test_bit(_XEN_NMIREASON_pci_serr, 1144 &HYPERVISOR_shared_info->arch.nmi_reason)) 1145 reason |= NMI_REASON_SERR; 1146 1147 return reason; 1148 } 1149 1150 static void __init xen_boot_params_init_edd(void) 1151 { 1152 #if IS_ENABLED(CONFIG_EDD) 1153 struct xen_platform_op op; 1154 struct edd_info *edd_info; 1155 u32 *mbr_signature; 1156 unsigned nr; 1157 int ret; 1158 1159 edd_info = boot_params.eddbuf; 1160 mbr_signature = boot_params.edd_mbr_sig_buffer; 1161 1162 op.cmd = XENPF_firmware_info; 1163 1164 op.u.firmware_info.type = XEN_FW_DISK_INFO; 1165 for (nr = 0; nr < EDDMAXNR; nr++) { 1166 struct edd_info *info = edd_info + nr; 1167 1168 op.u.firmware_info.index = nr; 1169 info->params.length = sizeof(info->params); 1170 set_xen_guest_handle(op.u.firmware_info.u.disk_info.edd_params, 1171 &info->params); 1172 ret = HYPERVISOR_platform_op(&op); 1173 if (ret) 1174 break; 1175 1176 #define C(x) info->x = op.u.firmware_info.u.disk_info.x 1177 C(device); 1178 C(version); 1179 C(interface_support); 1180 C(legacy_max_cylinder); 1181 C(legacy_max_head); 1182 C(legacy_sectors_per_track); 1183 #undef C 1184 } 1185 boot_params.eddbuf_entries = nr; 1186 1187 op.u.firmware_info.type = XEN_FW_DISK_MBR_SIGNATURE; 1188 for (nr = 0; nr < EDD_MBR_SIG_MAX; nr++) { 1189 op.u.firmware_info.index = nr; 1190 ret = HYPERVISOR_platform_op(&op); 1191 if (ret) 1192 break; 1193 mbr_signature[nr] = op.u.firmware_info.u.disk_mbr_signature.mbr_signature; 1194 } 1195 boot_params.edd_mbr_sig_buf_entries = nr; 1196 #endif 1197 } 1198 1199 /* 1200 * Set up the GDT and segment registers for -fstack-protector. Until 1201 * we do this, we have to be careful not to call any stack-protected 1202 * function, which is most of the kernel. 1203 */ 1204 static void __init xen_setup_gdt(int cpu) 1205 { 1206 pv_ops.cpu.write_gdt_entry = xen_write_gdt_entry_boot; 1207 pv_ops.cpu.load_gdt = xen_load_gdt_boot; 1208 1209 switch_to_new_gdt(cpu); 1210 1211 pv_ops.cpu.write_gdt_entry = xen_write_gdt_entry; 1212 pv_ops.cpu.load_gdt = xen_load_gdt; 1213 } 1214 1215 static void __init xen_dom0_set_legacy_features(void) 1216 { 1217 x86_platform.legacy.rtc = 1; 1218 } 1219 1220 static void __init xen_domu_set_legacy_features(void) 1221 { 1222 x86_platform.legacy.rtc = 0; 1223 } 1224 1225 /* First C function to be called on Xen boot */ 1226 asmlinkage __visible void __init xen_start_kernel(void) 1227 { 1228 struct physdev_set_iopl set_iopl; 1229 unsigned long initrd_start = 0; 1230 int rc; 1231 1232 if (!xen_start_info) 1233 return; 1234 1235 xen_domain_type = XEN_PV_DOMAIN; 1236 xen_start_flags = xen_start_info->flags; 1237 1238 xen_setup_features(); 1239 1240 /* Install Xen paravirt ops */ 1241 pv_info = xen_info; 1242 pv_ops.cpu = xen_cpu_ops; 1243 paravirt_iret = xen_iret; 1244 xen_init_irq_ops(); 1245 1246 /* 1247 * Setup xen_vcpu early because it is needed for 1248 * local_irq_disable(), irqs_disabled(), e.g. in printk(). 1249 * 1250 * Don't do the full vcpu_info placement stuff until we have 1251 * the cpu_possible_mask and a non-dummy shared_info. 1252 */ 1253 xen_vcpu_info_reset(0); 1254 1255 x86_platform.get_nmi_reason = xen_get_nmi_reason; 1256 1257 x86_init.resources.memory_setup = xen_memory_setup; 1258 x86_init.irqs.intr_mode_select = x86_init_noop; 1259 x86_init.irqs.intr_mode_init = x86_init_noop; 1260 x86_init.oem.arch_setup = xen_arch_setup; 1261 x86_init.oem.banner = xen_banner; 1262 x86_init.hyper.init_platform = xen_pv_init_platform; 1263 x86_init.hyper.guest_late_init = xen_pv_guest_late_init; 1264 1265 /* 1266 * Set up some pagetable state before starting to set any ptes. 1267 */ 1268 1269 xen_setup_machphys_mapping(); 1270 xen_init_mmu_ops(); 1271 1272 /* Prevent unwanted bits from being set in PTEs. */ 1273 __supported_pte_mask &= ~_PAGE_GLOBAL; 1274 __default_kernel_pte_mask &= ~_PAGE_GLOBAL; 1275 1276 /* 1277 * Prevent page tables from being allocated in highmem, even 1278 * if CONFIG_HIGHPTE is enabled. 1279 */ 1280 __userpte_alloc_gfp &= ~__GFP_HIGHMEM; 1281 1282 /* Get mfn list */ 1283 xen_build_dynamic_phys_to_machine(); 1284 1285 /* Work out if we support NX */ 1286 get_cpu_cap(&boot_cpu_data); 1287 x86_configure_nx(); 1288 1289 /* 1290 * Set up kernel GDT and segment registers, mainly so that 1291 * -fstack-protector code can be executed. 1292 */ 1293 xen_setup_gdt(0); 1294 1295 /* Determine virtual and physical address sizes */ 1296 get_cpu_address_sizes(&boot_cpu_data); 1297 1298 /* Let's presume PV guests always boot on vCPU with id 0. */ 1299 per_cpu(xen_vcpu_id, 0) = 0; 1300 1301 idt_setup_early_handler(); 1302 1303 xen_init_capabilities(); 1304 1305 #ifdef CONFIG_X86_LOCAL_APIC 1306 /* 1307 * set up the basic apic ops. 1308 */ 1309 xen_init_apic(); 1310 #endif 1311 1312 machine_ops = xen_machine_ops; 1313 1314 /* 1315 * The only reliable way to retain the initial address of the 1316 * percpu gdt_page is to remember it here, so we can go and 1317 * mark it RW later, when the initial percpu area is freed. 1318 */ 1319 xen_initial_gdt = &per_cpu(gdt_page, 0); 1320 1321 xen_smp_init(); 1322 1323 #ifdef CONFIG_ACPI_NUMA 1324 /* 1325 * The pages we from Xen are not related to machine pages, so 1326 * any NUMA information the kernel tries to get from ACPI will 1327 * be meaningless. Prevent it from trying. 1328 */ 1329 disable_srat(); 1330 #endif 1331 WARN_ON(xen_cpuhp_setup(xen_cpu_up_prepare_pv, xen_cpu_dead_pv)); 1332 1333 local_irq_disable(); 1334 early_boot_irqs_disabled = true; 1335 1336 xen_raw_console_write("mapping kernel into physical memory\n"); 1337 xen_setup_kernel_pagetable((pgd_t *)xen_start_info->pt_base, 1338 xen_start_info->nr_pages); 1339 xen_reserve_special_pages(); 1340 1341 /* 1342 * We used to do this in xen_arch_setup, but that is too late 1343 * on AMD were early_cpu_init (run before ->arch_setup()) calls 1344 * early_amd_init which pokes 0xcf8 port. 1345 */ 1346 set_iopl.iopl = 1; 1347 rc = HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl); 1348 if (rc != 0) 1349 xen_raw_printk("physdev_op failed %d\n", rc); 1350 1351 1352 if (xen_start_info->mod_start) { 1353 if (xen_start_info->flags & SIF_MOD_START_PFN) 1354 initrd_start = PFN_PHYS(xen_start_info->mod_start); 1355 else 1356 initrd_start = __pa(xen_start_info->mod_start); 1357 } 1358 1359 /* Poke various useful things into boot_params */ 1360 boot_params.hdr.type_of_loader = (9 << 4) | 0; 1361 boot_params.hdr.ramdisk_image = initrd_start; 1362 boot_params.hdr.ramdisk_size = xen_start_info->mod_len; 1363 boot_params.hdr.cmd_line_ptr = __pa(xen_start_info->cmd_line); 1364 boot_params.hdr.hardware_subarch = X86_SUBARCH_XEN; 1365 1366 if (!xen_initial_domain()) { 1367 add_preferred_console("xenboot", 0, NULL); 1368 if (pci_xen) 1369 x86_init.pci.arch_init = pci_xen_init; 1370 x86_platform.set_legacy_features = 1371 xen_domu_set_legacy_features; 1372 } else { 1373 const struct dom0_vga_console_info *info = 1374 (void *)((char *)xen_start_info + 1375 xen_start_info->console.dom0.info_off); 1376 struct xen_platform_op op = { 1377 .cmd = XENPF_firmware_info, 1378 .interface_version = XENPF_INTERFACE_VERSION, 1379 .u.firmware_info.type = XEN_FW_KBD_SHIFT_FLAGS, 1380 }; 1381 1382 x86_platform.set_legacy_features = 1383 xen_dom0_set_legacy_features; 1384 xen_init_vga(info, xen_start_info->console.dom0.info_size); 1385 xen_start_info->console.domU.mfn = 0; 1386 xen_start_info->console.domU.evtchn = 0; 1387 1388 if (HYPERVISOR_platform_op(&op) == 0) 1389 boot_params.kbd_status = op.u.firmware_info.u.kbd_shift_flags; 1390 1391 /* Make sure ACS will be enabled */ 1392 pci_request_acs(); 1393 1394 xen_acpi_sleep_register(); 1395 1396 /* Avoid searching for BIOS MP tables */ 1397 x86_init.mpparse.find_smp_config = x86_init_noop; 1398 x86_init.mpparse.get_smp_config = x86_init_uint_noop; 1399 1400 xen_boot_params_init_edd(); 1401 1402 #ifdef CONFIG_ACPI 1403 /* 1404 * Disable selecting "Firmware First mode" for correctable 1405 * memory errors, as this is the duty of the hypervisor to 1406 * decide. 1407 */ 1408 acpi_disable_cmcff = 1; 1409 #endif 1410 } 1411 1412 if (!boot_params.screen_info.orig_video_isVGA) 1413 add_preferred_console("tty", 0, NULL); 1414 add_preferred_console("hvc", 0, NULL); 1415 if (boot_params.screen_info.orig_video_isVGA) 1416 add_preferred_console("tty", 0, NULL); 1417 1418 #ifdef CONFIG_PCI 1419 /* PCI BIOS service won't work from a PV guest. */ 1420 pci_probe &= ~PCI_PROBE_BIOS; 1421 #endif 1422 xen_raw_console_write("about to get started...\n"); 1423 1424 /* We need this for printk timestamps */ 1425 xen_setup_runstate_info(0); 1426 1427 xen_efi_init(&boot_params); 1428 1429 /* Start the world */ 1430 cr4_init_shadow(); /* 32b kernel does this in i386_start_kernel() */ 1431 x86_64_start_reservations((char *)__pa_symbol(&boot_params)); 1432 } 1433 1434 static int xen_cpu_up_prepare_pv(unsigned int cpu) 1435 { 1436 int rc; 1437 1438 if (per_cpu(xen_vcpu, cpu) == NULL) 1439 return -ENODEV; 1440 1441 xen_setup_timer(cpu); 1442 1443 rc = xen_smp_intr_init(cpu); 1444 if (rc) { 1445 WARN(1, "xen_smp_intr_init() for CPU %d failed: %d\n", 1446 cpu, rc); 1447 return rc; 1448 } 1449 1450 rc = xen_smp_intr_init_pv(cpu); 1451 if (rc) { 1452 WARN(1, "xen_smp_intr_init_pv() for CPU %d failed: %d\n", 1453 cpu, rc); 1454 return rc; 1455 } 1456 1457 return 0; 1458 } 1459 1460 static int xen_cpu_dead_pv(unsigned int cpu) 1461 { 1462 xen_smp_intr_free(cpu); 1463 xen_smp_intr_free_pv(cpu); 1464 1465 xen_teardown_timer(cpu); 1466 1467 return 0; 1468 } 1469 1470 static uint32_t __init xen_platform_pv(void) 1471 { 1472 if (xen_pv_domain()) 1473 return xen_cpuid_base(); 1474 1475 return 0; 1476 } 1477 1478 const __initconst struct hypervisor_x86 x86_hyper_xen_pv = { 1479 .name = "Xen PV", 1480 .detect = xen_platform_pv, 1481 .type = X86_HYPER_XEN_PV, 1482 .runtime.pin_vcpu = xen_pin_vcpu, 1483 .ignore_nopv = true, 1484 }; 1485