1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Core of Xen paravirt_ops implementation. 4 * 5 * This file contains the xen_paravirt_ops structure itself, and the 6 * implementations for: 7 * - privileged instructions 8 * - interrupt flags 9 * - segment operations 10 * - booting and setup 11 * 12 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007 13 */ 14 15 #include <linux/cpu.h> 16 #include <linux/kernel.h> 17 #include <linux/init.h> 18 #include <linux/smp.h> 19 #include <linux/preempt.h> 20 #include <linux/hardirq.h> 21 #include <linux/percpu.h> 22 #include <linux/delay.h> 23 #include <linux/start_kernel.h> 24 #include <linux/sched.h> 25 #include <linux/kprobes.h> 26 #include <linux/bootmem.h> 27 #include <linux/export.h> 28 #include <linux/mm.h> 29 #include <linux/page-flags.h> 30 #include <linux/highmem.h> 31 #include <linux/console.h> 32 #include <linux/pci.h> 33 #include <linux/gfp.h> 34 #include <linux/memblock.h> 35 #include <linux/edd.h> 36 #include <linux/frame.h> 37 38 #include <xen/xen.h> 39 #include <xen/events.h> 40 #include <xen/interface/xen.h> 41 #include <xen/interface/version.h> 42 #include <xen/interface/physdev.h> 43 #include <xen/interface/vcpu.h> 44 #include <xen/interface/memory.h> 45 #include <xen/interface/nmi.h> 46 #include <xen/interface/xen-mca.h> 47 #include <xen/features.h> 48 #include <xen/page.h> 49 #include <xen/hvc-console.h> 50 #include <xen/acpi.h> 51 52 #include <asm/paravirt.h> 53 #include <asm/apic.h> 54 #include <asm/page.h> 55 #include <asm/xen/pci.h> 56 #include <asm/xen/hypercall.h> 57 #include <asm/xen/hypervisor.h> 58 #include <asm/xen/cpuid.h> 59 #include <asm/fixmap.h> 60 #include <asm/processor.h> 61 #include <asm/proto.h> 62 #include <asm/msr-index.h> 63 #include <asm/traps.h> 64 #include <asm/setup.h> 65 #include <asm/desc.h> 66 #include <asm/pgalloc.h> 67 #include <asm/pgtable.h> 68 #include <asm/tlbflush.h> 69 #include <asm/reboot.h> 70 #include <asm/stackprotector.h> 71 #include <asm/hypervisor.h> 72 #include <asm/mach_traps.h> 73 #include <asm/mwait.h> 74 #include <asm/pci_x86.h> 75 #include <asm/cpu.h> 76 77 #ifdef CONFIG_ACPI 78 #include <linux/acpi.h> 79 #include <asm/acpi.h> 80 #include <acpi/pdc_intel.h> 81 #include <acpi/processor.h> 82 #include <xen/interface/platform.h> 83 #endif 84 85 #include "xen-ops.h" 86 #include "mmu.h" 87 #include "smp.h" 88 #include "multicalls.h" 89 #include "pmu.h" 90 91 #include "../kernel/cpu/cpu.h" /* get_cpu_cap() */ 92 93 void *xen_initial_gdt; 94 95 static int xen_cpu_up_prepare_pv(unsigned int cpu); 96 static int xen_cpu_dead_pv(unsigned int cpu); 97 98 struct tls_descs { 99 struct desc_struct desc[3]; 100 }; 101 102 /* 103 * Updating the 3 TLS descriptors in the GDT on every task switch is 104 * surprisingly expensive so we avoid updating them if they haven't 105 * changed. Since Xen writes different descriptors than the one 106 * passed in the update_descriptor hypercall we keep shadow copies to 107 * compare against. 108 */ 109 static DEFINE_PER_CPU(struct tls_descs, shadow_tls_desc); 110 111 static void __init xen_banner(void) 112 { 113 unsigned version = HYPERVISOR_xen_version(XENVER_version, NULL); 114 struct xen_extraversion extra; 115 HYPERVISOR_xen_version(XENVER_extraversion, &extra); 116 117 pr_info("Booting paravirtualized kernel on %s\n", pv_info.name); 118 printk(KERN_INFO "Xen version: %d.%d%s%s\n", 119 version >> 16, version & 0xffff, extra.extraversion, 120 xen_feature(XENFEAT_mmu_pt_update_preserve_ad) ? " (preserve-AD)" : ""); 121 } 122 /* Check if running on Xen version (major, minor) or later */ 123 bool 124 xen_running_on_version_or_later(unsigned int major, unsigned int minor) 125 { 126 unsigned int version; 127 128 if (!xen_domain()) 129 return false; 130 131 version = HYPERVISOR_xen_version(XENVER_version, NULL); 132 if ((((version >> 16) == major) && ((version & 0xffff) >= minor)) || 133 ((version >> 16) > major)) 134 return true; 135 return false; 136 } 137 138 static __read_mostly unsigned int cpuid_leaf5_ecx_val; 139 static __read_mostly unsigned int cpuid_leaf5_edx_val; 140 141 static void xen_cpuid(unsigned int *ax, unsigned int *bx, 142 unsigned int *cx, unsigned int *dx) 143 { 144 unsigned maskebx = ~0; 145 146 /* 147 * Mask out inconvenient features, to try and disable as many 148 * unsupported kernel subsystems as possible. 149 */ 150 switch (*ax) { 151 case CPUID_MWAIT_LEAF: 152 /* Synthesize the values.. */ 153 *ax = 0; 154 *bx = 0; 155 *cx = cpuid_leaf5_ecx_val; 156 *dx = cpuid_leaf5_edx_val; 157 return; 158 159 case 0xb: 160 /* Suppress extended topology stuff */ 161 maskebx = 0; 162 break; 163 } 164 165 asm(XEN_EMULATE_PREFIX "cpuid" 166 : "=a" (*ax), 167 "=b" (*bx), 168 "=c" (*cx), 169 "=d" (*dx) 170 : "0" (*ax), "2" (*cx)); 171 172 *bx &= maskebx; 173 } 174 STACK_FRAME_NON_STANDARD(xen_cpuid); /* XEN_EMULATE_PREFIX */ 175 176 static bool __init xen_check_mwait(void) 177 { 178 #ifdef CONFIG_ACPI 179 struct xen_platform_op op = { 180 .cmd = XENPF_set_processor_pminfo, 181 .u.set_pminfo.id = -1, 182 .u.set_pminfo.type = XEN_PM_PDC, 183 }; 184 uint32_t buf[3]; 185 unsigned int ax, bx, cx, dx; 186 unsigned int mwait_mask; 187 188 /* We need to determine whether it is OK to expose the MWAIT 189 * capability to the kernel to harvest deeper than C3 states from ACPI 190 * _CST using the processor_harvest_xen.c module. For this to work, we 191 * need to gather the MWAIT_LEAF values (which the cstate.c code 192 * checks against). The hypervisor won't expose the MWAIT flag because 193 * it would break backwards compatibility; so we will find out directly 194 * from the hardware and hypercall. 195 */ 196 if (!xen_initial_domain()) 197 return false; 198 199 /* 200 * When running under platform earlier than Xen4.2, do not expose 201 * mwait, to avoid the risk of loading native acpi pad driver 202 */ 203 if (!xen_running_on_version_or_later(4, 2)) 204 return false; 205 206 ax = 1; 207 cx = 0; 208 209 native_cpuid(&ax, &bx, &cx, &dx); 210 211 mwait_mask = (1 << (X86_FEATURE_EST % 32)) | 212 (1 << (X86_FEATURE_MWAIT % 32)); 213 214 if ((cx & mwait_mask) != mwait_mask) 215 return false; 216 217 /* We need to emulate the MWAIT_LEAF and for that we need both 218 * ecx and edx. The hypercall provides only partial information. 219 */ 220 221 ax = CPUID_MWAIT_LEAF; 222 bx = 0; 223 cx = 0; 224 dx = 0; 225 226 native_cpuid(&ax, &bx, &cx, &dx); 227 228 /* Ask the Hypervisor whether to clear ACPI_PDC_C_C2C3_FFH. If so, 229 * don't expose MWAIT_LEAF and let ACPI pick the IOPORT version of C3. 230 */ 231 buf[0] = ACPI_PDC_REVISION_ID; 232 buf[1] = 1; 233 buf[2] = (ACPI_PDC_C_CAPABILITY_SMP | ACPI_PDC_EST_CAPABILITY_SWSMP); 234 235 set_xen_guest_handle(op.u.set_pminfo.pdc, buf); 236 237 if ((HYPERVISOR_platform_op(&op) == 0) && 238 (buf[2] & (ACPI_PDC_C_C1_FFH | ACPI_PDC_C_C2C3_FFH))) { 239 cpuid_leaf5_ecx_val = cx; 240 cpuid_leaf5_edx_val = dx; 241 } 242 return true; 243 #else 244 return false; 245 #endif 246 } 247 248 static bool __init xen_check_xsave(void) 249 { 250 unsigned int cx, xsave_mask; 251 252 cx = cpuid_ecx(1); 253 254 xsave_mask = (1 << (X86_FEATURE_XSAVE % 32)) | 255 (1 << (X86_FEATURE_OSXSAVE % 32)); 256 257 /* Xen will set CR4.OSXSAVE if supported and not disabled by force */ 258 return (cx & xsave_mask) == xsave_mask; 259 } 260 261 static void __init xen_init_capabilities(void) 262 { 263 setup_force_cpu_cap(X86_FEATURE_XENPV); 264 setup_clear_cpu_cap(X86_FEATURE_DCA); 265 setup_clear_cpu_cap(X86_FEATURE_APERFMPERF); 266 setup_clear_cpu_cap(X86_FEATURE_MTRR); 267 setup_clear_cpu_cap(X86_FEATURE_ACC); 268 setup_clear_cpu_cap(X86_FEATURE_X2APIC); 269 setup_clear_cpu_cap(X86_FEATURE_SME); 270 271 /* 272 * Xen PV would need some work to support PCID: CR3 handling as well 273 * as xen_flush_tlb_others() would need updating. 274 */ 275 setup_clear_cpu_cap(X86_FEATURE_PCID); 276 277 if (!xen_initial_domain()) 278 setup_clear_cpu_cap(X86_FEATURE_ACPI); 279 280 if (xen_check_mwait()) 281 setup_force_cpu_cap(X86_FEATURE_MWAIT); 282 else 283 setup_clear_cpu_cap(X86_FEATURE_MWAIT); 284 285 if (!xen_check_xsave()) { 286 setup_clear_cpu_cap(X86_FEATURE_XSAVE); 287 setup_clear_cpu_cap(X86_FEATURE_OSXSAVE); 288 } 289 } 290 291 static void xen_set_debugreg(int reg, unsigned long val) 292 { 293 HYPERVISOR_set_debugreg(reg, val); 294 } 295 296 static unsigned long xen_get_debugreg(int reg) 297 { 298 return HYPERVISOR_get_debugreg(reg); 299 } 300 301 static void xen_end_context_switch(struct task_struct *next) 302 { 303 xen_mc_flush(); 304 paravirt_end_context_switch(next); 305 } 306 307 static unsigned long xen_store_tr(void) 308 { 309 return 0; 310 } 311 312 /* 313 * Set the page permissions for a particular virtual address. If the 314 * address is a vmalloc mapping (or other non-linear mapping), then 315 * find the linear mapping of the page and also set its protections to 316 * match. 317 */ 318 static void set_aliased_prot(void *v, pgprot_t prot) 319 { 320 int level; 321 pte_t *ptep; 322 pte_t pte; 323 unsigned long pfn; 324 struct page *page; 325 unsigned char dummy; 326 327 ptep = lookup_address((unsigned long)v, &level); 328 BUG_ON(ptep == NULL); 329 330 pfn = pte_pfn(*ptep); 331 page = pfn_to_page(pfn); 332 333 pte = pfn_pte(pfn, prot); 334 335 /* 336 * Careful: update_va_mapping() will fail if the virtual address 337 * we're poking isn't populated in the page tables. We don't 338 * need to worry about the direct map (that's always in the page 339 * tables), but we need to be careful about vmap space. In 340 * particular, the top level page table can lazily propagate 341 * entries between processes, so if we've switched mms since we 342 * vmapped the target in the first place, we might not have the 343 * top-level page table entry populated. 344 * 345 * We disable preemption because we want the same mm active when 346 * we probe the target and when we issue the hypercall. We'll 347 * have the same nominal mm, but if we're a kernel thread, lazy 348 * mm dropping could change our pgd. 349 * 350 * Out of an abundance of caution, this uses __get_user() to fault 351 * in the target address just in case there's some obscure case 352 * in which the target address isn't readable. 353 */ 354 355 preempt_disable(); 356 357 probe_kernel_read(&dummy, v, 1); 358 359 if (HYPERVISOR_update_va_mapping((unsigned long)v, pte, 0)) 360 BUG(); 361 362 if (!PageHighMem(page)) { 363 void *av = __va(PFN_PHYS(pfn)); 364 365 if (av != v) 366 if (HYPERVISOR_update_va_mapping((unsigned long)av, pte, 0)) 367 BUG(); 368 } else 369 kmap_flush_unused(); 370 371 preempt_enable(); 372 } 373 374 static void xen_alloc_ldt(struct desc_struct *ldt, unsigned entries) 375 { 376 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE; 377 int i; 378 379 /* 380 * We need to mark the all aliases of the LDT pages RO. We 381 * don't need to call vm_flush_aliases(), though, since that's 382 * only responsible for flushing aliases out the TLBs, not the 383 * page tables, and Xen will flush the TLB for us if needed. 384 * 385 * To avoid confusing future readers: none of this is necessary 386 * to load the LDT. The hypervisor only checks this when the 387 * LDT is faulted in due to subsequent descriptor access. 388 */ 389 390 for (i = 0; i < entries; i += entries_per_page) 391 set_aliased_prot(ldt + i, PAGE_KERNEL_RO); 392 } 393 394 static void xen_free_ldt(struct desc_struct *ldt, unsigned entries) 395 { 396 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE; 397 int i; 398 399 for (i = 0; i < entries; i += entries_per_page) 400 set_aliased_prot(ldt + i, PAGE_KERNEL); 401 } 402 403 static void xen_set_ldt(const void *addr, unsigned entries) 404 { 405 struct mmuext_op *op; 406 struct multicall_space mcs = xen_mc_entry(sizeof(*op)); 407 408 trace_xen_cpu_set_ldt(addr, entries); 409 410 op = mcs.args; 411 op->cmd = MMUEXT_SET_LDT; 412 op->arg1.linear_addr = (unsigned long)addr; 413 op->arg2.nr_ents = entries; 414 415 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); 416 417 xen_mc_issue(PARAVIRT_LAZY_CPU); 418 } 419 420 static void xen_load_gdt(const struct desc_ptr *dtr) 421 { 422 unsigned long va = dtr->address; 423 unsigned int size = dtr->size + 1; 424 unsigned long pfn, mfn; 425 int level; 426 pte_t *ptep; 427 void *virt; 428 429 /* @size should be at most GDT_SIZE which is smaller than PAGE_SIZE. */ 430 BUG_ON(size > PAGE_SIZE); 431 BUG_ON(va & ~PAGE_MASK); 432 433 /* 434 * The GDT is per-cpu and is in the percpu data area. 435 * That can be virtually mapped, so we need to do a 436 * page-walk to get the underlying MFN for the 437 * hypercall. The page can also be in the kernel's 438 * linear range, so we need to RO that mapping too. 439 */ 440 ptep = lookup_address(va, &level); 441 BUG_ON(ptep == NULL); 442 443 pfn = pte_pfn(*ptep); 444 mfn = pfn_to_mfn(pfn); 445 virt = __va(PFN_PHYS(pfn)); 446 447 make_lowmem_page_readonly((void *)va); 448 make_lowmem_page_readonly(virt); 449 450 if (HYPERVISOR_set_gdt(&mfn, size / sizeof(struct desc_struct))) 451 BUG(); 452 } 453 454 /* 455 * load_gdt for early boot, when the gdt is only mapped once 456 */ 457 static void __init xen_load_gdt_boot(const struct desc_ptr *dtr) 458 { 459 unsigned long va = dtr->address; 460 unsigned int size = dtr->size + 1; 461 unsigned long pfn, mfn; 462 pte_t pte; 463 464 /* @size should be at most GDT_SIZE which is smaller than PAGE_SIZE. */ 465 BUG_ON(size > PAGE_SIZE); 466 BUG_ON(va & ~PAGE_MASK); 467 468 pfn = virt_to_pfn(va); 469 mfn = pfn_to_mfn(pfn); 470 471 pte = pfn_pte(pfn, PAGE_KERNEL_RO); 472 473 if (HYPERVISOR_update_va_mapping((unsigned long)va, pte, 0)) 474 BUG(); 475 476 if (HYPERVISOR_set_gdt(&mfn, size / sizeof(struct desc_struct))) 477 BUG(); 478 } 479 480 static inline bool desc_equal(const struct desc_struct *d1, 481 const struct desc_struct *d2) 482 { 483 return !memcmp(d1, d2, sizeof(*d1)); 484 } 485 486 static void load_TLS_descriptor(struct thread_struct *t, 487 unsigned int cpu, unsigned int i) 488 { 489 struct desc_struct *shadow = &per_cpu(shadow_tls_desc, cpu).desc[i]; 490 struct desc_struct *gdt; 491 xmaddr_t maddr; 492 struct multicall_space mc; 493 494 if (desc_equal(shadow, &t->tls_array[i])) 495 return; 496 497 *shadow = t->tls_array[i]; 498 499 gdt = get_cpu_gdt_rw(cpu); 500 maddr = arbitrary_virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]); 501 mc = __xen_mc_entry(0); 502 503 MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]); 504 } 505 506 static void xen_load_tls(struct thread_struct *t, unsigned int cpu) 507 { 508 /* 509 * XXX sleazy hack: If we're being called in a lazy-cpu zone 510 * and lazy gs handling is enabled, it means we're in a 511 * context switch, and %gs has just been saved. This means we 512 * can zero it out to prevent faults on exit from the 513 * hypervisor if the next process has no %gs. Either way, it 514 * has been saved, and the new value will get loaded properly. 515 * This will go away as soon as Xen has been modified to not 516 * save/restore %gs for normal hypercalls. 517 * 518 * On x86_64, this hack is not used for %gs, because gs points 519 * to KERNEL_GS_BASE (and uses it for PDA references), so we 520 * must not zero %gs on x86_64 521 * 522 * For x86_64, we need to zero %fs, otherwise we may get an 523 * exception between the new %fs descriptor being loaded and 524 * %fs being effectively cleared at __switch_to(). 525 */ 526 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU) { 527 #ifdef CONFIG_X86_32 528 lazy_load_gs(0); 529 #else 530 loadsegment(fs, 0); 531 #endif 532 } 533 534 xen_mc_batch(); 535 536 load_TLS_descriptor(t, cpu, 0); 537 load_TLS_descriptor(t, cpu, 1); 538 load_TLS_descriptor(t, cpu, 2); 539 540 xen_mc_issue(PARAVIRT_LAZY_CPU); 541 } 542 543 #ifdef CONFIG_X86_64 544 static void xen_load_gs_index(unsigned int idx) 545 { 546 if (HYPERVISOR_set_segment_base(SEGBASE_GS_USER_SEL, idx)) 547 BUG(); 548 } 549 #endif 550 551 static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum, 552 const void *ptr) 553 { 554 xmaddr_t mach_lp = arbitrary_virt_to_machine(&dt[entrynum]); 555 u64 entry = *(u64 *)ptr; 556 557 trace_xen_cpu_write_ldt_entry(dt, entrynum, entry); 558 559 preempt_disable(); 560 561 xen_mc_flush(); 562 if (HYPERVISOR_update_descriptor(mach_lp.maddr, entry)) 563 BUG(); 564 565 preempt_enable(); 566 } 567 568 #ifdef CONFIG_X86_64 569 struct trap_array_entry { 570 void (*orig)(void); 571 void (*xen)(void); 572 bool ist_okay; 573 }; 574 575 static struct trap_array_entry trap_array[] = { 576 { debug, xen_xendebug, true }, 577 { int3, xen_xenint3, true }, 578 { double_fault, xen_double_fault, true }, 579 #ifdef CONFIG_X86_MCE 580 { machine_check, xen_machine_check, true }, 581 #endif 582 { nmi, xen_xennmi, true }, 583 { overflow, xen_overflow, false }, 584 #ifdef CONFIG_IA32_EMULATION 585 { entry_INT80_compat, xen_entry_INT80_compat, false }, 586 #endif 587 { page_fault, xen_page_fault, false }, 588 { divide_error, xen_divide_error, false }, 589 { bounds, xen_bounds, false }, 590 { invalid_op, xen_invalid_op, false }, 591 { device_not_available, xen_device_not_available, false }, 592 { coprocessor_segment_overrun, xen_coprocessor_segment_overrun, false }, 593 { invalid_TSS, xen_invalid_TSS, false }, 594 { segment_not_present, xen_segment_not_present, false }, 595 { stack_segment, xen_stack_segment, false }, 596 { general_protection, xen_general_protection, false }, 597 { spurious_interrupt_bug, xen_spurious_interrupt_bug, false }, 598 { coprocessor_error, xen_coprocessor_error, false }, 599 { alignment_check, xen_alignment_check, false }, 600 { simd_coprocessor_error, xen_simd_coprocessor_error, false }, 601 }; 602 603 static bool __ref get_trap_addr(void **addr, unsigned int ist) 604 { 605 unsigned int nr; 606 bool ist_okay = false; 607 608 /* 609 * Replace trap handler addresses by Xen specific ones. 610 * Check for known traps using IST and whitelist them. 611 * The debugger ones are the only ones we care about. 612 * Xen will handle faults like double_fault, * so we should never see 613 * them. Warn if there's an unexpected IST-using fault handler. 614 */ 615 for (nr = 0; nr < ARRAY_SIZE(trap_array); nr++) { 616 struct trap_array_entry *entry = trap_array + nr; 617 618 if (*addr == entry->orig) { 619 *addr = entry->xen; 620 ist_okay = entry->ist_okay; 621 break; 622 } 623 } 624 625 if (nr == ARRAY_SIZE(trap_array) && 626 *addr >= (void *)early_idt_handler_array[0] && 627 *addr < (void *)early_idt_handler_array[NUM_EXCEPTION_VECTORS]) { 628 nr = (*addr - (void *)early_idt_handler_array[0]) / 629 EARLY_IDT_HANDLER_SIZE; 630 *addr = (void *)xen_early_idt_handler_array[nr]; 631 } 632 633 if (WARN_ON(ist != 0 && !ist_okay)) 634 return false; 635 636 return true; 637 } 638 #endif 639 640 static int cvt_gate_to_trap(int vector, const gate_desc *val, 641 struct trap_info *info) 642 { 643 unsigned long addr; 644 645 if (val->bits.type != GATE_TRAP && val->bits.type != GATE_INTERRUPT) 646 return 0; 647 648 info->vector = vector; 649 650 addr = gate_offset(val); 651 #ifdef CONFIG_X86_64 652 if (!get_trap_addr((void **)&addr, val->bits.ist)) 653 return 0; 654 #endif /* CONFIG_X86_64 */ 655 info->address = addr; 656 657 info->cs = gate_segment(val); 658 info->flags = val->bits.dpl; 659 /* interrupt gates clear IF */ 660 if (val->bits.type == GATE_INTERRUPT) 661 info->flags |= 1 << 2; 662 663 return 1; 664 } 665 666 /* Locations of each CPU's IDT */ 667 static DEFINE_PER_CPU(struct desc_ptr, idt_desc); 668 669 /* Set an IDT entry. If the entry is part of the current IDT, then 670 also update Xen. */ 671 static void xen_write_idt_entry(gate_desc *dt, int entrynum, const gate_desc *g) 672 { 673 unsigned long p = (unsigned long)&dt[entrynum]; 674 unsigned long start, end; 675 676 trace_xen_cpu_write_idt_entry(dt, entrynum, g); 677 678 preempt_disable(); 679 680 start = __this_cpu_read(idt_desc.address); 681 end = start + __this_cpu_read(idt_desc.size) + 1; 682 683 xen_mc_flush(); 684 685 native_write_idt_entry(dt, entrynum, g); 686 687 if (p >= start && (p + 8) <= end) { 688 struct trap_info info[2]; 689 690 info[1].address = 0; 691 692 if (cvt_gate_to_trap(entrynum, g, &info[0])) 693 if (HYPERVISOR_set_trap_table(info)) 694 BUG(); 695 } 696 697 preempt_enable(); 698 } 699 700 static void xen_convert_trap_info(const struct desc_ptr *desc, 701 struct trap_info *traps) 702 { 703 unsigned in, out, count; 704 705 count = (desc->size+1) / sizeof(gate_desc); 706 BUG_ON(count > 256); 707 708 for (in = out = 0; in < count; in++) { 709 gate_desc *entry = (gate_desc *)(desc->address) + in; 710 711 if (cvt_gate_to_trap(in, entry, &traps[out])) 712 out++; 713 } 714 traps[out].address = 0; 715 } 716 717 void xen_copy_trap_info(struct trap_info *traps) 718 { 719 const struct desc_ptr *desc = this_cpu_ptr(&idt_desc); 720 721 xen_convert_trap_info(desc, traps); 722 } 723 724 /* Load a new IDT into Xen. In principle this can be per-CPU, so we 725 hold a spinlock to protect the static traps[] array (static because 726 it avoids allocation, and saves stack space). */ 727 static void xen_load_idt(const struct desc_ptr *desc) 728 { 729 static DEFINE_SPINLOCK(lock); 730 static struct trap_info traps[257]; 731 732 trace_xen_cpu_load_idt(desc); 733 734 spin_lock(&lock); 735 736 memcpy(this_cpu_ptr(&idt_desc), desc, sizeof(idt_desc)); 737 738 xen_convert_trap_info(desc, traps); 739 740 xen_mc_flush(); 741 if (HYPERVISOR_set_trap_table(traps)) 742 BUG(); 743 744 spin_unlock(&lock); 745 } 746 747 /* Write a GDT descriptor entry. Ignore LDT descriptors, since 748 they're handled differently. */ 749 static void xen_write_gdt_entry(struct desc_struct *dt, int entry, 750 const void *desc, int type) 751 { 752 trace_xen_cpu_write_gdt_entry(dt, entry, desc, type); 753 754 preempt_disable(); 755 756 switch (type) { 757 case DESC_LDT: 758 case DESC_TSS: 759 /* ignore */ 760 break; 761 762 default: { 763 xmaddr_t maddr = arbitrary_virt_to_machine(&dt[entry]); 764 765 xen_mc_flush(); 766 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc)) 767 BUG(); 768 } 769 770 } 771 772 preempt_enable(); 773 } 774 775 /* 776 * Version of write_gdt_entry for use at early boot-time needed to 777 * update an entry as simply as possible. 778 */ 779 static void __init xen_write_gdt_entry_boot(struct desc_struct *dt, int entry, 780 const void *desc, int type) 781 { 782 trace_xen_cpu_write_gdt_entry(dt, entry, desc, type); 783 784 switch (type) { 785 case DESC_LDT: 786 case DESC_TSS: 787 /* ignore */ 788 break; 789 790 default: { 791 xmaddr_t maddr = virt_to_machine(&dt[entry]); 792 793 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc)) 794 dt[entry] = *(struct desc_struct *)desc; 795 } 796 797 } 798 } 799 800 static void xen_load_sp0(unsigned long sp0) 801 { 802 struct multicall_space mcs; 803 804 mcs = xen_mc_entry(0); 805 MULTI_stack_switch(mcs.mc, __KERNEL_DS, sp0); 806 xen_mc_issue(PARAVIRT_LAZY_CPU); 807 this_cpu_write(cpu_tss_rw.x86_tss.sp0, sp0); 808 } 809 810 void xen_set_iopl_mask(unsigned mask) 811 { 812 struct physdev_set_iopl set_iopl; 813 814 /* Force the change at ring 0. */ 815 set_iopl.iopl = (mask == 0) ? 1 : (mask >> 12) & 3; 816 HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl); 817 } 818 819 static void xen_io_delay(void) 820 { 821 } 822 823 static DEFINE_PER_CPU(unsigned long, xen_cr0_value); 824 825 static unsigned long xen_read_cr0(void) 826 { 827 unsigned long cr0 = this_cpu_read(xen_cr0_value); 828 829 if (unlikely(cr0 == 0)) { 830 cr0 = native_read_cr0(); 831 this_cpu_write(xen_cr0_value, cr0); 832 } 833 834 return cr0; 835 } 836 837 static void xen_write_cr0(unsigned long cr0) 838 { 839 struct multicall_space mcs; 840 841 this_cpu_write(xen_cr0_value, cr0); 842 843 /* Only pay attention to cr0.TS; everything else is 844 ignored. */ 845 mcs = xen_mc_entry(0); 846 847 MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0); 848 849 xen_mc_issue(PARAVIRT_LAZY_CPU); 850 } 851 852 static void xen_write_cr4(unsigned long cr4) 853 { 854 cr4 &= ~(X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PCE); 855 856 native_write_cr4(cr4); 857 } 858 #ifdef CONFIG_X86_64 859 static inline unsigned long xen_read_cr8(void) 860 { 861 return 0; 862 } 863 static inline void xen_write_cr8(unsigned long val) 864 { 865 BUG_ON(val); 866 } 867 #endif 868 869 static u64 xen_read_msr_safe(unsigned int msr, int *err) 870 { 871 u64 val; 872 873 if (pmu_msr_read(msr, &val, err)) 874 return val; 875 876 val = native_read_msr_safe(msr, err); 877 switch (msr) { 878 case MSR_IA32_APICBASE: 879 #ifdef CONFIG_X86_X2APIC 880 if (!(cpuid_ecx(1) & (1 << (X86_FEATURE_X2APIC & 31)))) 881 #endif 882 val &= ~X2APIC_ENABLE; 883 break; 884 } 885 return val; 886 } 887 888 static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high) 889 { 890 int ret; 891 892 ret = 0; 893 894 switch (msr) { 895 #ifdef CONFIG_X86_64 896 unsigned which; 897 u64 base; 898 899 case MSR_FS_BASE: which = SEGBASE_FS; goto set; 900 case MSR_KERNEL_GS_BASE: which = SEGBASE_GS_USER; goto set; 901 case MSR_GS_BASE: which = SEGBASE_GS_KERNEL; goto set; 902 903 set: 904 base = ((u64)high << 32) | low; 905 if (HYPERVISOR_set_segment_base(which, base) != 0) 906 ret = -EIO; 907 break; 908 #endif 909 910 case MSR_STAR: 911 case MSR_CSTAR: 912 case MSR_LSTAR: 913 case MSR_SYSCALL_MASK: 914 case MSR_IA32_SYSENTER_CS: 915 case MSR_IA32_SYSENTER_ESP: 916 case MSR_IA32_SYSENTER_EIP: 917 /* Fast syscall setup is all done in hypercalls, so 918 these are all ignored. Stub them out here to stop 919 Xen console noise. */ 920 break; 921 922 default: 923 if (!pmu_msr_write(msr, low, high, &ret)) 924 ret = native_write_msr_safe(msr, low, high); 925 } 926 927 return ret; 928 } 929 930 static u64 xen_read_msr(unsigned int msr) 931 { 932 /* 933 * This will silently swallow a #GP from RDMSR. It may be worth 934 * changing that. 935 */ 936 int err; 937 938 return xen_read_msr_safe(msr, &err); 939 } 940 941 static void xen_write_msr(unsigned int msr, unsigned low, unsigned high) 942 { 943 /* 944 * This will silently swallow a #GP from WRMSR. It may be worth 945 * changing that. 946 */ 947 xen_write_msr_safe(msr, low, high); 948 } 949 950 void xen_setup_shared_info(void) 951 { 952 set_fixmap(FIX_PARAVIRT_BOOTMAP, xen_start_info->shared_info); 953 954 HYPERVISOR_shared_info = 955 (struct shared_info *)fix_to_virt(FIX_PARAVIRT_BOOTMAP); 956 957 xen_setup_mfn_list_list(); 958 959 if (system_state == SYSTEM_BOOTING) { 960 #ifndef CONFIG_SMP 961 /* 962 * In UP this is as good a place as any to set up shared info. 963 * Limit this to boot only, at restore vcpu setup is done via 964 * xen_vcpu_restore(). 965 */ 966 xen_setup_vcpu_info_placement(); 967 #endif 968 /* 969 * Now that shared info is set up we can start using routines 970 * that point to pvclock area. 971 */ 972 xen_init_time_ops(); 973 } 974 } 975 976 /* This is called once we have the cpu_possible_mask */ 977 void __ref xen_setup_vcpu_info_placement(void) 978 { 979 int cpu; 980 981 for_each_possible_cpu(cpu) { 982 /* Set up direct vCPU id mapping for PV guests. */ 983 per_cpu(xen_vcpu_id, cpu) = cpu; 984 985 /* 986 * xen_vcpu_setup(cpu) can fail -- in which case it 987 * falls back to the shared_info version for cpus 988 * where xen_vcpu_nr(cpu) < MAX_VIRT_CPUS. 989 * 990 * xen_cpu_up_prepare_pv() handles the rest by failing 991 * them in hotplug. 992 */ 993 (void) xen_vcpu_setup(cpu); 994 } 995 996 /* 997 * xen_vcpu_setup managed to place the vcpu_info within the 998 * percpu area for all cpus, so make use of it. 999 */ 1000 if (xen_have_vcpu_info_placement) { 1001 pv_irq_ops.save_fl = __PV_IS_CALLEE_SAVE(xen_save_fl_direct); 1002 pv_irq_ops.restore_fl = __PV_IS_CALLEE_SAVE(xen_restore_fl_direct); 1003 pv_irq_ops.irq_disable = __PV_IS_CALLEE_SAVE(xen_irq_disable_direct); 1004 pv_irq_ops.irq_enable = __PV_IS_CALLEE_SAVE(xen_irq_enable_direct); 1005 pv_mmu_ops.read_cr2 = xen_read_cr2_direct; 1006 } 1007 } 1008 1009 static const struct pv_info xen_info __initconst = { 1010 .shared_kernel_pmd = 0, 1011 1012 #ifdef CONFIG_X86_64 1013 .extra_user_64bit_cs = FLAT_USER_CS64, 1014 #endif 1015 .name = "Xen", 1016 }; 1017 1018 static const struct pv_cpu_ops xen_cpu_ops __initconst = { 1019 .cpuid = xen_cpuid, 1020 1021 .set_debugreg = xen_set_debugreg, 1022 .get_debugreg = xen_get_debugreg, 1023 1024 .read_cr0 = xen_read_cr0, 1025 .write_cr0 = xen_write_cr0, 1026 1027 .write_cr4 = xen_write_cr4, 1028 1029 #ifdef CONFIG_X86_64 1030 .read_cr8 = xen_read_cr8, 1031 .write_cr8 = xen_write_cr8, 1032 #endif 1033 1034 .wbinvd = native_wbinvd, 1035 1036 .read_msr = xen_read_msr, 1037 .write_msr = xen_write_msr, 1038 1039 .read_msr_safe = xen_read_msr_safe, 1040 .write_msr_safe = xen_write_msr_safe, 1041 1042 .read_pmc = xen_read_pmc, 1043 1044 .iret = xen_iret, 1045 #ifdef CONFIG_X86_64 1046 .usergs_sysret64 = xen_sysret64, 1047 #endif 1048 1049 .load_tr_desc = paravirt_nop, 1050 .set_ldt = xen_set_ldt, 1051 .load_gdt = xen_load_gdt, 1052 .load_idt = xen_load_idt, 1053 .load_tls = xen_load_tls, 1054 #ifdef CONFIG_X86_64 1055 .load_gs_index = xen_load_gs_index, 1056 #endif 1057 1058 .alloc_ldt = xen_alloc_ldt, 1059 .free_ldt = xen_free_ldt, 1060 1061 .store_tr = xen_store_tr, 1062 1063 .write_ldt_entry = xen_write_ldt_entry, 1064 .write_gdt_entry = xen_write_gdt_entry, 1065 .write_idt_entry = xen_write_idt_entry, 1066 .load_sp0 = xen_load_sp0, 1067 1068 .set_iopl_mask = xen_set_iopl_mask, 1069 .io_delay = xen_io_delay, 1070 1071 /* Xen takes care of %gs when switching to usermode for us */ 1072 .swapgs = paravirt_nop, 1073 1074 .start_context_switch = paravirt_start_context_switch, 1075 .end_context_switch = xen_end_context_switch, 1076 }; 1077 1078 static void xen_restart(char *msg) 1079 { 1080 xen_reboot(SHUTDOWN_reboot); 1081 } 1082 1083 static void xen_machine_halt(void) 1084 { 1085 xen_reboot(SHUTDOWN_poweroff); 1086 } 1087 1088 static void xen_machine_power_off(void) 1089 { 1090 if (pm_power_off) 1091 pm_power_off(); 1092 xen_reboot(SHUTDOWN_poweroff); 1093 } 1094 1095 static void xen_crash_shutdown(struct pt_regs *regs) 1096 { 1097 xen_reboot(SHUTDOWN_crash); 1098 } 1099 1100 static const struct machine_ops xen_machine_ops __initconst = { 1101 .restart = xen_restart, 1102 .halt = xen_machine_halt, 1103 .power_off = xen_machine_power_off, 1104 .shutdown = xen_machine_halt, 1105 .crash_shutdown = xen_crash_shutdown, 1106 .emergency_restart = xen_emergency_restart, 1107 }; 1108 1109 static unsigned char xen_get_nmi_reason(void) 1110 { 1111 unsigned char reason = 0; 1112 1113 /* Construct a value which looks like it came from port 0x61. */ 1114 if (test_bit(_XEN_NMIREASON_io_error, 1115 &HYPERVISOR_shared_info->arch.nmi_reason)) 1116 reason |= NMI_REASON_IOCHK; 1117 if (test_bit(_XEN_NMIREASON_pci_serr, 1118 &HYPERVISOR_shared_info->arch.nmi_reason)) 1119 reason |= NMI_REASON_SERR; 1120 1121 return reason; 1122 } 1123 1124 static void __init xen_boot_params_init_edd(void) 1125 { 1126 #if IS_ENABLED(CONFIG_EDD) 1127 struct xen_platform_op op; 1128 struct edd_info *edd_info; 1129 u32 *mbr_signature; 1130 unsigned nr; 1131 int ret; 1132 1133 edd_info = boot_params.eddbuf; 1134 mbr_signature = boot_params.edd_mbr_sig_buffer; 1135 1136 op.cmd = XENPF_firmware_info; 1137 1138 op.u.firmware_info.type = XEN_FW_DISK_INFO; 1139 for (nr = 0; nr < EDDMAXNR; nr++) { 1140 struct edd_info *info = edd_info + nr; 1141 1142 op.u.firmware_info.index = nr; 1143 info->params.length = sizeof(info->params); 1144 set_xen_guest_handle(op.u.firmware_info.u.disk_info.edd_params, 1145 &info->params); 1146 ret = HYPERVISOR_platform_op(&op); 1147 if (ret) 1148 break; 1149 1150 #define C(x) info->x = op.u.firmware_info.u.disk_info.x 1151 C(device); 1152 C(version); 1153 C(interface_support); 1154 C(legacy_max_cylinder); 1155 C(legacy_max_head); 1156 C(legacy_sectors_per_track); 1157 #undef C 1158 } 1159 boot_params.eddbuf_entries = nr; 1160 1161 op.u.firmware_info.type = XEN_FW_DISK_MBR_SIGNATURE; 1162 for (nr = 0; nr < EDD_MBR_SIG_MAX; nr++) { 1163 op.u.firmware_info.index = nr; 1164 ret = HYPERVISOR_platform_op(&op); 1165 if (ret) 1166 break; 1167 mbr_signature[nr] = op.u.firmware_info.u.disk_mbr_signature.mbr_signature; 1168 } 1169 boot_params.edd_mbr_sig_buf_entries = nr; 1170 #endif 1171 } 1172 1173 /* 1174 * Set up the GDT and segment registers for -fstack-protector. Until 1175 * we do this, we have to be careful not to call any stack-protected 1176 * function, which is most of the kernel. 1177 */ 1178 static void xen_setup_gdt(int cpu) 1179 { 1180 pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry_boot; 1181 pv_cpu_ops.load_gdt = xen_load_gdt_boot; 1182 1183 setup_stack_canary_segment(0); 1184 switch_to_new_gdt(0); 1185 1186 pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry; 1187 pv_cpu_ops.load_gdt = xen_load_gdt; 1188 } 1189 1190 static void __init xen_dom0_set_legacy_features(void) 1191 { 1192 x86_platform.legacy.rtc = 1; 1193 } 1194 1195 /* First C function to be called on Xen boot */ 1196 asmlinkage __visible void __init xen_start_kernel(void) 1197 { 1198 struct physdev_set_iopl set_iopl; 1199 unsigned long initrd_start = 0; 1200 int rc; 1201 1202 if (!xen_start_info) 1203 return; 1204 1205 xen_domain_type = XEN_PV_DOMAIN; 1206 xen_start_flags = xen_start_info->flags; 1207 1208 xen_setup_features(); 1209 1210 /* Install Xen paravirt ops */ 1211 pv_info = xen_info; 1212 pv_init_ops.patch = paravirt_patch_default; 1213 pv_cpu_ops = xen_cpu_ops; 1214 xen_init_irq_ops(); 1215 1216 /* 1217 * Setup xen_vcpu early because it is needed for 1218 * local_irq_disable(), irqs_disabled(), e.g. in printk(). 1219 * 1220 * Don't do the full vcpu_info placement stuff until we have 1221 * the cpu_possible_mask and a non-dummy shared_info. 1222 */ 1223 xen_vcpu_info_reset(0); 1224 1225 x86_platform.get_nmi_reason = xen_get_nmi_reason; 1226 1227 x86_init.resources.memory_setup = xen_memory_setup; 1228 x86_init.irqs.intr_mode_init = x86_init_noop; 1229 x86_init.oem.arch_setup = xen_arch_setup; 1230 x86_init.oem.banner = xen_banner; 1231 1232 /* 1233 * Set up some pagetable state before starting to set any ptes. 1234 */ 1235 1236 xen_setup_machphys_mapping(); 1237 xen_init_mmu_ops(); 1238 1239 /* Prevent unwanted bits from being set in PTEs. */ 1240 __supported_pte_mask &= ~_PAGE_GLOBAL; 1241 __default_kernel_pte_mask &= ~_PAGE_GLOBAL; 1242 1243 /* 1244 * Prevent page tables from being allocated in highmem, even 1245 * if CONFIG_HIGHPTE is enabled. 1246 */ 1247 __userpte_alloc_gfp &= ~__GFP_HIGHMEM; 1248 1249 /* Get mfn list */ 1250 xen_build_dynamic_phys_to_machine(); 1251 1252 /* 1253 * Set up kernel GDT and segment registers, mainly so that 1254 * -fstack-protector code can be executed. 1255 */ 1256 xen_setup_gdt(0); 1257 1258 /* Work out if we support NX */ 1259 get_cpu_cap(&boot_cpu_data); 1260 x86_configure_nx(); 1261 1262 /* Let's presume PV guests always boot on vCPU with id 0. */ 1263 per_cpu(xen_vcpu_id, 0) = 0; 1264 1265 idt_setup_early_handler(); 1266 1267 xen_init_capabilities(); 1268 1269 #ifdef CONFIG_X86_LOCAL_APIC 1270 /* 1271 * set up the basic apic ops. 1272 */ 1273 xen_init_apic(); 1274 #endif 1275 1276 if (xen_feature(XENFEAT_mmu_pt_update_preserve_ad)) { 1277 pv_mmu_ops.ptep_modify_prot_start = xen_ptep_modify_prot_start; 1278 pv_mmu_ops.ptep_modify_prot_commit = xen_ptep_modify_prot_commit; 1279 } 1280 1281 machine_ops = xen_machine_ops; 1282 1283 /* 1284 * The only reliable way to retain the initial address of the 1285 * percpu gdt_page is to remember it here, so we can go and 1286 * mark it RW later, when the initial percpu area is freed. 1287 */ 1288 xen_initial_gdt = &per_cpu(gdt_page, 0); 1289 1290 xen_smp_init(); 1291 1292 #ifdef CONFIG_ACPI_NUMA 1293 /* 1294 * The pages we from Xen are not related to machine pages, so 1295 * any NUMA information the kernel tries to get from ACPI will 1296 * be meaningless. Prevent it from trying. 1297 */ 1298 acpi_numa = -1; 1299 #endif 1300 WARN_ON(xen_cpuhp_setup(xen_cpu_up_prepare_pv, xen_cpu_dead_pv)); 1301 1302 local_irq_disable(); 1303 early_boot_irqs_disabled = true; 1304 1305 xen_raw_console_write("mapping kernel into physical memory\n"); 1306 xen_setup_kernel_pagetable((pgd_t *)xen_start_info->pt_base, 1307 xen_start_info->nr_pages); 1308 xen_reserve_special_pages(); 1309 1310 /* keep using Xen gdt for now; no urgent need to change it */ 1311 1312 #ifdef CONFIG_X86_32 1313 pv_info.kernel_rpl = 1; 1314 if (xen_feature(XENFEAT_supervisor_mode_kernel)) 1315 pv_info.kernel_rpl = 0; 1316 #else 1317 pv_info.kernel_rpl = 0; 1318 #endif 1319 /* set the limit of our address space */ 1320 xen_reserve_top(); 1321 1322 /* 1323 * We used to do this in xen_arch_setup, but that is too late 1324 * on AMD were early_cpu_init (run before ->arch_setup()) calls 1325 * early_amd_init which pokes 0xcf8 port. 1326 */ 1327 set_iopl.iopl = 1; 1328 rc = HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl); 1329 if (rc != 0) 1330 xen_raw_printk("physdev_op failed %d\n", rc); 1331 1332 #ifdef CONFIG_X86_32 1333 /* set up basic CPUID stuff */ 1334 cpu_detect(&new_cpu_data); 1335 set_cpu_cap(&new_cpu_data, X86_FEATURE_FPU); 1336 new_cpu_data.x86_capability[CPUID_1_EDX] = cpuid_edx(1); 1337 #endif 1338 1339 if (xen_start_info->mod_start) { 1340 if (xen_start_info->flags & SIF_MOD_START_PFN) 1341 initrd_start = PFN_PHYS(xen_start_info->mod_start); 1342 else 1343 initrd_start = __pa(xen_start_info->mod_start); 1344 } 1345 1346 /* Poke various useful things into boot_params */ 1347 boot_params.hdr.type_of_loader = (9 << 4) | 0; 1348 boot_params.hdr.ramdisk_image = initrd_start; 1349 boot_params.hdr.ramdisk_size = xen_start_info->mod_len; 1350 boot_params.hdr.cmd_line_ptr = __pa(xen_start_info->cmd_line); 1351 boot_params.hdr.hardware_subarch = X86_SUBARCH_XEN; 1352 1353 if (!xen_initial_domain()) { 1354 add_preferred_console("xenboot", 0, NULL); 1355 if (pci_xen) 1356 x86_init.pci.arch_init = pci_xen_init; 1357 } else { 1358 const struct dom0_vga_console_info *info = 1359 (void *)((char *)xen_start_info + 1360 xen_start_info->console.dom0.info_off); 1361 struct xen_platform_op op = { 1362 .cmd = XENPF_firmware_info, 1363 .interface_version = XENPF_INTERFACE_VERSION, 1364 .u.firmware_info.type = XEN_FW_KBD_SHIFT_FLAGS, 1365 }; 1366 1367 x86_platform.set_legacy_features = 1368 xen_dom0_set_legacy_features; 1369 xen_init_vga(info, xen_start_info->console.dom0.info_size); 1370 xen_start_info->console.domU.mfn = 0; 1371 xen_start_info->console.domU.evtchn = 0; 1372 1373 if (HYPERVISOR_platform_op(&op) == 0) 1374 boot_params.kbd_status = op.u.firmware_info.u.kbd_shift_flags; 1375 1376 /* Make sure ACS will be enabled */ 1377 pci_request_acs(); 1378 1379 xen_acpi_sleep_register(); 1380 1381 /* Avoid searching for BIOS MP tables */ 1382 x86_init.mpparse.find_smp_config = x86_init_noop; 1383 x86_init.mpparse.get_smp_config = x86_init_uint_noop; 1384 1385 xen_boot_params_init_edd(); 1386 } 1387 1388 add_preferred_console("tty", 0, NULL); 1389 add_preferred_console("hvc", 0, NULL); 1390 1391 #ifdef CONFIG_PCI 1392 /* PCI BIOS service won't work from a PV guest. */ 1393 pci_probe &= ~PCI_PROBE_BIOS; 1394 #endif 1395 xen_raw_console_write("about to get started...\n"); 1396 1397 /* We need this for printk timestamps */ 1398 xen_setup_runstate_info(0); 1399 1400 xen_efi_init(); 1401 1402 /* Start the world */ 1403 #ifdef CONFIG_X86_32 1404 i386_start_kernel(); 1405 #else 1406 cr4_init_shadow(); /* 32b kernel does this in i386_start_kernel() */ 1407 x86_64_start_reservations((char *)__pa_symbol(&boot_params)); 1408 #endif 1409 } 1410 1411 static int xen_cpu_up_prepare_pv(unsigned int cpu) 1412 { 1413 int rc; 1414 1415 if (per_cpu(xen_vcpu, cpu) == NULL) 1416 return -ENODEV; 1417 1418 xen_setup_timer(cpu); 1419 1420 rc = xen_smp_intr_init(cpu); 1421 if (rc) { 1422 WARN(1, "xen_smp_intr_init() for CPU %d failed: %d\n", 1423 cpu, rc); 1424 return rc; 1425 } 1426 1427 rc = xen_smp_intr_init_pv(cpu); 1428 if (rc) { 1429 WARN(1, "xen_smp_intr_init_pv() for CPU %d failed: %d\n", 1430 cpu, rc); 1431 return rc; 1432 } 1433 1434 return 0; 1435 } 1436 1437 static int xen_cpu_dead_pv(unsigned int cpu) 1438 { 1439 xen_smp_intr_free(cpu); 1440 xen_smp_intr_free_pv(cpu); 1441 1442 xen_teardown_timer(cpu); 1443 1444 return 0; 1445 } 1446 1447 static uint32_t __init xen_platform_pv(void) 1448 { 1449 if (xen_pv_domain()) 1450 return xen_cpuid_base(); 1451 1452 return 0; 1453 } 1454 1455 const __initconst struct hypervisor_x86 x86_hyper_xen_pv = { 1456 .name = "Xen PV", 1457 .detect = xen_platform_pv, 1458 .type = X86_HYPER_XEN_PV, 1459 .runtime.pin_vcpu = xen_pin_vcpu, 1460 }; 1461