1 /* 2 * Core of Xen paravirt_ops implementation. 3 * 4 * This file contains the xen_paravirt_ops structure itself, and the 5 * implementations for: 6 * - privileged instructions 7 * - interrupt flags 8 * - segment operations 9 * - booting and setup 10 * 11 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007 12 */ 13 14 #include <linux/cpu.h> 15 #include <linux/kernel.h> 16 #include <linux/init.h> 17 #include <linux/smp.h> 18 #include <linux/preempt.h> 19 #include <linux/hardirq.h> 20 #include <linux/percpu.h> 21 #include <linux/delay.h> 22 #include <linux/start_kernel.h> 23 #include <linux/sched.h> 24 #include <linux/kprobes.h> 25 #include <linux/bootmem.h> 26 #include <linux/export.h> 27 #include <linux/mm.h> 28 #include <linux/page-flags.h> 29 #include <linux/highmem.h> 30 #include <linux/console.h> 31 #include <linux/pci.h> 32 #include <linux/gfp.h> 33 #include <linux/memblock.h> 34 #include <linux/edd.h> 35 #include <linux/frame.h> 36 37 #include <xen/xen.h> 38 #include <xen/events.h> 39 #include <xen/interface/xen.h> 40 #include <xen/interface/version.h> 41 #include <xen/interface/physdev.h> 42 #include <xen/interface/vcpu.h> 43 #include <xen/interface/memory.h> 44 #include <xen/interface/nmi.h> 45 #include <xen/interface/xen-mca.h> 46 #include <xen/features.h> 47 #include <xen/page.h> 48 #include <xen/hvc-console.h> 49 #include <xen/acpi.h> 50 51 #include <asm/paravirt.h> 52 #include <asm/apic.h> 53 #include <asm/page.h> 54 #include <asm/xen/pci.h> 55 #include <asm/xen/hypercall.h> 56 #include <asm/xen/hypervisor.h> 57 #include <asm/xen/cpuid.h> 58 #include <asm/fixmap.h> 59 #include <asm/processor.h> 60 #include <asm/proto.h> 61 #include <asm/msr-index.h> 62 #include <asm/traps.h> 63 #include <asm/setup.h> 64 #include <asm/desc.h> 65 #include <asm/pgalloc.h> 66 #include <asm/pgtable.h> 67 #include <asm/tlbflush.h> 68 #include <asm/reboot.h> 69 #include <asm/stackprotector.h> 70 #include <asm/hypervisor.h> 71 #include <asm/mach_traps.h> 72 #include <asm/mwait.h> 73 #include <asm/pci_x86.h> 74 #include <asm/cpu.h> 75 76 #ifdef CONFIG_ACPI 77 #include <linux/acpi.h> 78 #include <asm/acpi.h> 79 #include <acpi/pdc_intel.h> 80 #include <acpi/processor.h> 81 #include <xen/interface/platform.h> 82 #endif 83 84 #include "xen-ops.h" 85 #include "mmu.h" 86 #include "smp.h" 87 #include "multicalls.h" 88 #include "pmu.h" 89 90 void *xen_initial_gdt; 91 92 RESERVE_BRK(shared_info_page_brk, PAGE_SIZE); 93 94 static int xen_cpu_up_prepare_pv(unsigned int cpu); 95 static int xen_cpu_dead_pv(unsigned int cpu); 96 97 struct tls_descs { 98 struct desc_struct desc[3]; 99 }; 100 101 /* 102 * Updating the 3 TLS descriptors in the GDT on every task switch is 103 * surprisingly expensive so we avoid updating them if they haven't 104 * changed. Since Xen writes different descriptors than the one 105 * passed in the update_descriptor hypercall we keep shadow copies to 106 * compare against. 107 */ 108 static DEFINE_PER_CPU(struct tls_descs, shadow_tls_desc); 109 110 /* 111 * On restore, set the vcpu placement up again. 112 * If it fails, then we're in a bad state, since 113 * we can't back out from using it... 114 */ 115 void xen_vcpu_restore(void) 116 { 117 int cpu; 118 119 for_each_possible_cpu(cpu) { 120 bool other_cpu = (cpu != smp_processor_id()); 121 bool is_up = HYPERVISOR_vcpu_op(VCPUOP_is_up, xen_vcpu_nr(cpu), 122 NULL); 123 124 if (other_cpu && is_up && 125 HYPERVISOR_vcpu_op(VCPUOP_down, xen_vcpu_nr(cpu), NULL)) 126 BUG(); 127 128 xen_setup_runstate_info(cpu); 129 130 if (xen_have_vcpu_info_placement) 131 xen_vcpu_setup(cpu); 132 133 if (other_cpu && is_up && 134 HYPERVISOR_vcpu_op(VCPUOP_up, xen_vcpu_nr(cpu), NULL)) 135 BUG(); 136 } 137 } 138 139 static void __init xen_banner(void) 140 { 141 unsigned version = HYPERVISOR_xen_version(XENVER_version, NULL); 142 struct xen_extraversion extra; 143 HYPERVISOR_xen_version(XENVER_extraversion, &extra); 144 145 pr_info("Booting paravirtualized kernel %son %s\n", 146 xen_feature(XENFEAT_auto_translated_physmap) ? 147 "with PVH extensions " : "", pv_info.name); 148 printk(KERN_INFO "Xen version: %d.%d%s%s\n", 149 version >> 16, version & 0xffff, extra.extraversion, 150 xen_feature(XENFEAT_mmu_pt_update_preserve_ad) ? " (preserve-AD)" : ""); 151 } 152 /* Check if running on Xen version (major, minor) or later */ 153 bool 154 xen_running_on_version_or_later(unsigned int major, unsigned int minor) 155 { 156 unsigned int version; 157 158 if (!xen_domain()) 159 return false; 160 161 version = HYPERVISOR_xen_version(XENVER_version, NULL); 162 if ((((version >> 16) == major) && ((version & 0xffff) >= minor)) || 163 ((version >> 16) > major)) 164 return true; 165 return false; 166 } 167 168 static __read_mostly unsigned int cpuid_leaf5_ecx_val; 169 static __read_mostly unsigned int cpuid_leaf5_edx_val; 170 171 static void xen_cpuid(unsigned int *ax, unsigned int *bx, 172 unsigned int *cx, unsigned int *dx) 173 { 174 unsigned maskebx = ~0; 175 176 /* 177 * Mask out inconvenient features, to try and disable as many 178 * unsupported kernel subsystems as possible. 179 */ 180 switch (*ax) { 181 case CPUID_MWAIT_LEAF: 182 /* Synthesize the values.. */ 183 *ax = 0; 184 *bx = 0; 185 *cx = cpuid_leaf5_ecx_val; 186 *dx = cpuid_leaf5_edx_val; 187 return; 188 189 case 0xb: 190 /* Suppress extended topology stuff */ 191 maskebx = 0; 192 break; 193 } 194 195 asm(XEN_EMULATE_PREFIX "cpuid" 196 : "=a" (*ax), 197 "=b" (*bx), 198 "=c" (*cx), 199 "=d" (*dx) 200 : "0" (*ax), "2" (*cx)); 201 202 *bx &= maskebx; 203 } 204 STACK_FRAME_NON_STANDARD(xen_cpuid); /* XEN_EMULATE_PREFIX */ 205 206 static bool __init xen_check_mwait(void) 207 { 208 #ifdef CONFIG_ACPI 209 struct xen_platform_op op = { 210 .cmd = XENPF_set_processor_pminfo, 211 .u.set_pminfo.id = -1, 212 .u.set_pminfo.type = XEN_PM_PDC, 213 }; 214 uint32_t buf[3]; 215 unsigned int ax, bx, cx, dx; 216 unsigned int mwait_mask; 217 218 /* We need to determine whether it is OK to expose the MWAIT 219 * capability to the kernel to harvest deeper than C3 states from ACPI 220 * _CST using the processor_harvest_xen.c module. For this to work, we 221 * need to gather the MWAIT_LEAF values (which the cstate.c code 222 * checks against). The hypervisor won't expose the MWAIT flag because 223 * it would break backwards compatibility; so we will find out directly 224 * from the hardware and hypercall. 225 */ 226 if (!xen_initial_domain()) 227 return false; 228 229 /* 230 * When running under platform earlier than Xen4.2, do not expose 231 * mwait, to avoid the risk of loading native acpi pad driver 232 */ 233 if (!xen_running_on_version_or_later(4, 2)) 234 return false; 235 236 ax = 1; 237 cx = 0; 238 239 native_cpuid(&ax, &bx, &cx, &dx); 240 241 mwait_mask = (1 << (X86_FEATURE_EST % 32)) | 242 (1 << (X86_FEATURE_MWAIT % 32)); 243 244 if ((cx & mwait_mask) != mwait_mask) 245 return false; 246 247 /* We need to emulate the MWAIT_LEAF and for that we need both 248 * ecx and edx. The hypercall provides only partial information. 249 */ 250 251 ax = CPUID_MWAIT_LEAF; 252 bx = 0; 253 cx = 0; 254 dx = 0; 255 256 native_cpuid(&ax, &bx, &cx, &dx); 257 258 /* Ask the Hypervisor whether to clear ACPI_PDC_C_C2C3_FFH. If so, 259 * don't expose MWAIT_LEAF and let ACPI pick the IOPORT version of C3. 260 */ 261 buf[0] = ACPI_PDC_REVISION_ID; 262 buf[1] = 1; 263 buf[2] = (ACPI_PDC_C_CAPABILITY_SMP | ACPI_PDC_EST_CAPABILITY_SWSMP); 264 265 set_xen_guest_handle(op.u.set_pminfo.pdc, buf); 266 267 if ((HYPERVISOR_platform_op(&op) == 0) && 268 (buf[2] & (ACPI_PDC_C_C1_FFH | ACPI_PDC_C_C2C3_FFH))) { 269 cpuid_leaf5_ecx_val = cx; 270 cpuid_leaf5_edx_val = dx; 271 } 272 return true; 273 #else 274 return false; 275 #endif 276 } 277 278 static bool __init xen_check_xsave(void) 279 { 280 unsigned int cx, xsave_mask; 281 282 cx = cpuid_ecx(1); 283 284 xsave_mask = (1 << (X86_FEATURE_XSAVE % 32)) | 285 (1 << (X86_FEATURE_OSXSAVE % 32)); 286 287 /* Xen will set CR4.OSXSAVE if supported and not disabled by force */ 288 return (cx & xsave_mask) == xsave_mask; 289 } 290 291 static void __init xen_init_capabilities(void) 292 { 293 setup_force_cpu_cap(X86_FEATURE_XENPV); 294 setup_clear_cpu_cap(X86_FEATURE_DCA); 295 setup_clear_cpu_cap(X86_FEATURE_APERFMPERF); 296 setup_clear_cpu_cap(X86_FEATURE_MTRR); 297 setup_clear_cpu_cap(X86_FEATURE_ACC); 298 setup_clear_cpu_cap(X86_FEATURE_X2APIC); 299 300 if (!xen_initial_domain()) 301 setup_clear_cpu_cap(X86_FEATURE_ACPI); 302 303 if (xen_check_mwait()) 304 setup_force_cpu_cap(X86_FEATURE_MWAIT); 305 else 306 setup_clear_cpu_cap(X86_FEATURE_MWAIT); 307 308 if (!xen_check_xsave()) { 309 setup_clear_cpu_cap(X86_FEATURE_XSAVE); 310 setup_clear_cpu_cap(X86_FEATURE_OSXSAVE); 311 } 312 } 313 314 static void xen_set_debugreg(int reg, unsigned long val) 315 { 316 HYPERVISOR_set_debugreg(reg, val); 317 } 318 319 static unsigned long xen_get_debugreg(int reg) 320 { 321 return HYPERVISOR_get_debugreg(reg); 322 } 323 324 static void xen_end_context_switch(struct task_struct *next) 325 { 326 xen_mc_flush(); 327 paravirt_end_context_switch(next); 328 } 329 330 static unsigned long xen_store_tr(void) 331 { 332 return 0; 333 } 334 335 /* 336 * Set the page permissions for a particular virtual address. If the 337 * address is a vmalloc mapping (or other non-linear mapping), then 338 * find the linear mapping of the page and also set its protections to 339 * match. 340 */ 341 static void set_aliased_prot(void *v, pgprot_t prot) 342 { 343 int level; 344 pte_t *ptep; 345 pte_t pte; 346 unsigned long pfn; 347 struct page *page; 348 unsigned char dummy; 349 350 ptep = lookup_address((unsigned long)v, &level); 351 BUG_ON(ptep == NULL); 352 353 pfn = pte_pfn(*ptep); 354 page = pfn_to_page(pfn); 355 356 pte = pfn_pte(pfn, prot); 357 358 /* 359 * Careful: update_va_mapping() will fail if the virtual address 360 * we're poking isn't populated in the page tables. We don't 361 * need to worry about the direct map (that's always in the page 362 * tables), but we need to be careful about vmap space. In 363 * particular, the top level page table can lazily propagate 364 * entries between processes, so if we've switched mms since we 365 * vmapped the target in the first place, we might not have the 366 * top-level page table entry populated. 367 * 368 * We disable preemption because we want the same mm active when 369 * we probe the target and when we issue the hypercall. We'll 370 * have the same nominal mm, but if we're a kernel thread, lazy 371 * mm dropping could change our pgd. 372 * 373 * Out of an abundance of caution, this uses __get_user() to fault 374 * in the target address just in case there's some obscure case 375 * in which the target address isn't readable. 376 */ 377 378 preempt_disable(); 379 380 probe_kernel_read(&dummy, v, 1); 381 382 if (HYPERVISOR_update_va_mapping((unsigned long)v, pte, 0)) 383 BUG(); 384 385 if (!PageHighMem(page)) { 386 void *av = __va(PFN_PHYS(pfn)); 387 388 if (av != v) 389 if (HYPERVISOR_update_va_mapping((unsigned long)av, pte, 0)) 390 BUG(); 391 } else 392 kmap_flush_unused(); 393 394 preempt_enable(); 395 } 396 397 static void xen_alloc_ldt(struct desc_struct *ldt, unsigned entries) 398 { 399 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE; 400 int i; 401 402 /* 403 * We need to mark the all aliases of the LDT pages RO. We 404 * don't need to call vm_flush_aliases(), though, since that's 405 * only responsible for flushing aliases out the TLBs, not the 406 * page tables, and Xen will flush the TLB for us if needed. 407 * 408 * To avoid confusing future readers: none of this is necessary 409 * to load the LDT. The hypervisor only checks this when the 410 * LDT is faulted in due to subsequent descriptor access. 411 */ 412 413 for (i = 0; i < entries; i += entries_per_page) 414 set_aliased_prot(ldt + i, PAGE_KERNEL_RO); 415 } 416 417 static void xen_free_ldt(struct desc_struct *ldt, unsigned entries) 418 { 419 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE; 420 int i; 421 422 for (i = 0; i < entries; i += entries_per_page) 423 set_aliased_prot(ldt + i, PAGE_KERNEL); 424 } 425 426 static void xen_set_ldt(const void *addr, unsigned entries) 427 { 428 struct mmuext_op *op; 429 struct multicall_space mcs = xen_mc_entry(sizeof(*op)); 430 431 trace_xen_cpu_set_ldt(addr, entries); 432 433 op = mcs.args; 434 op->cmd = MMUEXT_SET_LDT; 435 op->arg1.linear_addr = (unsigned long)addr; 436 op->arg2.nr_ents = entries; 437 438 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); 439 440 xen_mc_issue(PARAVIRT_LAZY_CPU); 441 } 442 443 static void xen_load_gdt(const struct desc_ptr *dtr) 444 { 445 unsigned long va = dtr->address; 446 unsigned int size = dtr->size + 1; 447 unsigned pages = DIV_ROUND_UP(size, PAGE_SIZE); 448 unsigned long frames[pages]; 449 int f; 450 451 /* 452 * A GDT can be up to 64k in size, which corresponds to 8192 453 * 8-byte entries, or 16 4k pages.. 454 */ 455 456 BUG_ON(size > 65536); 457 BUG_ON(va & ~PAGE_MASK); 458 459 for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) { 460 int level; 461 pte_t *ptep; 462 unsigned long pfn, mfn; 463 void *virt; 464 465 /* 466 * The GDT is per-cpu and is in the percpu data area. 467 * That can be virtually mapped, so we need to do a 468 * page-walk to get the underlying MFN for the 469 * hypercall. The page can also be in the kernel's 470 * linear range, so we need to RO that mapping too. 471 */ 472 ptep = lookup_address(va, &level); 473 BUG_ON(ptep == NULL); 474 475 pfn = pte_pfn(*ptep); 476 mfn = pfn_to_mfn(pfn); 477 virt = __va(PFN_PHYS(pfn)); 478 479 frames[f] = mfn; 480 481 make_lowmem_page_readonly((void *)va); 482 make_lowmem_page_readonly(virt); 483 } 484 485 if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct))) 486 BUG(); 487 } 488 489 /* 490 * load_gdt for early boot, when the gdt is only mapped once 491 */ 492 static void __init xen_load_gdt_boot(const struct desc_ptr *dtr) 493 { 494 unsigned long va = dtr->address; 495 unsigned int size = dtr->size + 1; 496 unsigned pages = DIV_ROUND_UP(size, PAGE_SIZE); 497 unsigned long frames[pages]; 498 int f; 499 500 /* 501 * A GDT can be up to 64k in size, which corresponds to 8192 502 * 8-byte entries, or 16 4k pages.. 503 */ 504 505 BUG_ON(size > 65536); 506 BUG_ON(va & ~PAGE_MASK); 507 508 for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) { 509 pte_t pte; 510 unsigned long pfn, mfn; 511 512 pfn = virt_to_pfn(va); 513 mfn = pfn_to_mfn(pfn); 514 515 pte = pfn_pte(pfn, PAGE_KERNEL_RO); 516 517 if (HYPERVISOR_update_va_mapping((unsigned long)va, pte, 0)) 518 BUG(); 519 520 frames[f] = mfn; 521 } 522 523 if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct))) 524 BUG(); 525 } 526 527 static inline bool desc_equal(const struct desc_struct *d1, 528 const struct desc_struct *d2) 529 { 530 return d1->a == d2->a && d1->b == d2->b; 531 } 532 533 static void load_TLS_descriptor(struct thread_struct *t, 534 unsigned int cpu, unsigned int i) 535 { 536 struct desc_struct *shadow = &per_cpu(shadow_tls_desc, cpu).desc[i]; 537 struct desc_struct *gdt; 538 xmaddr_t maddr; 539 struct multicall_space mc; 540 541 if (desc_equal(shadow, &t->tls_array[i])) 542 return; 543 544 *shadow = t->tls_array[i]; 545 546 gdt = get_cpu_gdt_rw(cpu); 547 maddr = arbitrary_virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]); 548 mc = __xen_mc_entry(0); 549 550 MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]); 551 } 552 553 static void xen_load_tls(struct thread_struct *t, unsigned int cpu) 554 { 555 /* 556 * XXX sleazy hack: If we're being called in a lazy-cpu zone 557 * and lazy gs handling is enabled, it means we're in a 558 * context switch, and %gs has just been saved. This means we 559 * can zero it out to prevent faults on exit from the 560 * hypervisor if the next process has no %gs. Either way, it 561 * has been saved, and the new value will get loaded properly. 562 * This will go away as soon as Xen has been modified to not 563 * save/restore %gs for normal hypercalls. 564 * 565 * On x86_64, this hack is not used for %gs, because gs points 566 * to KERNEL_GS_BASE (and uses it for PDA references), so we 567 * must not zero %gs on x86_64 568 * 569 * For x86_64, we need to zero %fs, otherwise we may get an 570 * exception between the new %fs descriptor being loaded and 571 * %fs being effectively cleared at __switch_to(). 572 */ 573 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU) { 574 #ifdef CONFIG_X86_32 575 lazy_load_gs(0); 576 #else 577 loadsegment(fs, 0); 578 #endif 579 } 580 581 xen_mc_batch(); 582 583 load_TLS_descriptor(t, cpu, 0); 584 load_TLS_descriptor(t, cpu, 1); 585 load_TLS_descriptor(t, cpu, 2); 586 587 xen_mc_issue(PARAVIRT_LAZY_CPU); 588 } 589 590 #ifdef CONFIG_X86_64 591 static void xen_load_gs_index(unsigned int idx) 592 { 593 if (HYPERVISOR_set_segment_base(SEGBASE_GS_USER_SEL, idx)) 594 BUG(); 595 } 596 #endif 597 598 static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum, 599 const void *ptr) 600 { 601 xmaddr_t mach_lp = arbitrary_virt_to_machine(&dt[entrynum]); 602 u64 entry = *(u64 *)ptr; 603 604 trace_xen_cpu_write_ldt_entry(dt, entrynum, entry); 605 606 preempt_disable(); 607 608 xen_mc_flush(); 609 if (HYPERVISOR_update_descriptor(mach_lp.maddr, entry)) 610 BUG(); 611 612 preempt_enable(); 613 } 614 615 static int cvt_gate_to_trap(int vector, const gate_desc *val, 616 struct trap_info *info) 617 { 618 unsigned long addr; 619 620 if (val->type != GATE_TRAP && val->type != GATE_INTERRUPT) 621 return 0; 622 623 info->vector = vector; 624 625 addr = gate_offset(*val); 626 #ifdef CONFIG_X86_64 627 /* 628 * Look for known traps using IST, and substitute them 629 * appropriately. The debugger ones are the only ones we care 630 * about. Xen will handle faults like double_fault, 631 * so we should never see them. Warn if 632 * there's an unexpected IST-using fault handler. 633 */ 634 if (addr == (unsigned long)debug) 635 addr = (unsigned long)xen_debug; 636 else if (addr == (unsigned long)int3) 637 addr = (unsigned long)xen_int3; 638 else if (addr == (unsigned long)stack_segment) 639 addr = (unsigned long)xen_stack_segment; 640 else if (addr == (unsigned long)double_fault) { 641 /* Don't need to handle these */ 642 return 0; 643 #ifdef CONFIG_X86_MCE 644 } else if (addr == (unsigned long)machine_check) { 645 /* 646 * when xen hypervisor inject vMCE to guest, 647 * use native mce handler to handle it 648 */ 649 ; 650 #endif 651 } else if (addr == (unsigned long)nmi) 652 /* 653 * Use the native version as well. 654 */ 655 ; 656 else { 657 /* Some other trap using IST? */ 658 if (WARN_ON(val->ist != 0)) 659 return 0; 660 } 661 #endif /* CONFIG_X86_64 */ 662 info->address = addr; 663 664 info->cs = gate_segment(*val); 665 info->flags = val->dpl; 666 /* interrupt gates clear IF */ 667 if (val->type == GATE_INTERRUPT) 668 info->flags |= 1 << 2; 669 670 return 1; 671 } 672 673 /* Locations of each CPU's IDT */ 674 static DEFINE_PER_CPU(struct desc_ptr, idt_desc); 675 676 /* Set an IDT entry. If the entry is part of the current IDT, then 677 also update Xen. */ 678 static void xen_write_idt_entry(gate_desc *dt, int entrynum, const gate_desc *g) 679 { 680 unsigned long p = (unsigned long)&dt[entrynum]; 681 unsigned long start, end; 682 683 trace_xen_cpu_write_idt_entry(dt, entrynum, g); 684 685 preempt_disable(); 686 687 start = __this_cpu_read(idt_desc.address); 688 end = start + __this_cpu_read(idt_desc.size) + 1; 689 690 xen_mc_flush(); 691 692 native_write_idt_entry(dt, entrynum, g); 693 694 if (p >= start && (p + 8) <= end) { 695 struct trap_info info[2]; 696 697 info[1].address = 0; 698 699 if (cvt_gate_to_trap(entrynum, g, &info[0])) 700 if (HYPERVISOR_set_trap_table(info)) 701 BUG(); 702 } 703 704 preempt_enable(); 705 } 706 707 static void xen_convert_trap_info(const struct desc_ptr *desc, 708 struct trap_info *traps) 709 { 710 unsigned in, out, count; 711 712 count = (desc->size+1) / sizeof(gate_desc); 713 BUG_ON(count > 256); 714 715 for (in = out = 0; in < count; in++) { 716 gate_desc *entry = (gate_desc *)(desc->address) + in; 717 718 if (cvt_gate_to_trap(in, entry, &traps[out])) 719 out++; 720 } 721 traps[out].address = 0; 722 } 723 724 void xen_copy_trap_info(struct trap_info *traps) 725 { 726 const struct desc_ptr *desc = this_cpu_ptr(&idt_desc); 727 728 xen_convert_trap_info(desc, traps); 729 } 730 731 /* Load a new IDT into Xen. In principle this can be per-CPU, so we 732 hold a spinlock to protect the static traps[] array (static because 733 it avoids allocation, and saves stack space). */ 734 static void xen_load_idt(const struct desc_ptr *desc) 735 { 736 static DEFINE_SPINLOCK(lock); 737 static struct trap_info traps[257]; 738 739 trace_xen_cpu_load_idt(desc); 740 741 spin_lock(&lock); 742 743 memcpy(this_cpu_ptr(&idt_desc), desc, sizeof(idt_desc)); 744 745 xen_convert_trap_info(desc, traps); 746 747 xen_mc_flush(); 748 if (HYPERVISOR_set_trap_table(traps)) 749 BUG(); 750 751 spin_unlock(&lock); 752 } 753 754 /* Write a GDT descriptor entry. Ignore LDT descriptors, since 755 they're handled differently. */ 756 static void xen_write_gdt_entry(struct desc_struct *dt, int entry, 757 const void *desc, int type) 758 { 759 trace_xen_cpu_write_gdt_entry(dt, entry, desc, type); 760 761 preempt_disable(); 762 763 switch (type) { 764 case DESC_LDT: 765 case DESC_TSS: 766 /* ignore */ 767 break; 768 769 default: { 770 xmaddr_t maddr = arbitrary_virt_to_machine(&dt[entry]); 771 772 xen_mc_flush(); 773 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc)) 774 BUG(); 775 } 776 777 } 778 779 preempt_enable(); 780 } 781 782 /* 783 * Version of write_gdt_entry for use at early boot-time needed to 784 * update an entry as simply as possible. 785 */ 786 static void __init xen_write_gdt_entry_boot(struct desc_struct *dt, int entry, 787 const void *desc, int type) 788 { 789 trace_xen_cpu_write_gdt_entry(dt, entry, desc, type); 790 791 switch (type) { 792 case DESC_LDT: 793 case DESC_TSS: 794 /* ignore */ 795 break; 796 797 default: { 798 xmaddr_t maddr = virt_to_machine(&dt[entry]); 799 800 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc)) 801 dt[entry] = *(struct desc_struct *)desc; 802 } 803 804 } 805 } 806 807 static void xen_load_sp0(struct tss_struct *tss, 808 struct thread_struct *thread) 809 { 810 struct multicall_space mcs; 811 812 mcs = xen_mc_entry(0); 813 MULTI_stack_switch(mcs.mc, __KERNEL_DS, thread->sp0); 814 xen_mc_issue(PARAVIRT_LAZY_CPU); 815 tss->x86_tss.sp0 = thread->sp0; 816 } 817 818 void xen_set_iopl_mask(unsigned mask) 819 { 820 struct physdev_set_iopl set_iopl; 821 822 /* Force the change at ring 0. */ 823 set_iopl.iopl = (mask == 0) ? 1 : (mask >> 12) & 3; 824 HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl); 825 } 826 827 static void xen_io_delay(void) 828 { 829 } 830 831 static DEFINE_PER_CPU(unsigned long, xen_cr0_value); 832 833 static unsigned long xen_read_cr0(void) 834 { 835 unsigned long cr0 = this_cpu_read(xen_cr0_value); 836 837 if (unlikely(cr0 == 0)) { 838 cr0 = native_read_cr0(); 839 this_cpu_write(xen_cr0_value, cr0); 840 } 841 842 return cr0; 843 } 844 845 static void xen_write_cr0(unsigned long cr0) 846 { 847 struct multicall_space mcs; 848 849 this_cpu_write(xen_cr0_value, cr0); 850 851 /* Only pay attention to cr0.TS; everything else is 852 ignored. */ 853 mcs = xen_mc_entry(0); 854 855 MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0); 856 857 xen_mc_issue(PARAVIRT_LAZY_CPU); 858 } 859 860 static void xen_write_cr4(unsigned long cr4) 861 { 862 cr4 &= ~(X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PCE); 863 864 native_write_cr4(cr4); 865 } 866 #ifdef CONFIG_X86_64 867 static inline unsigned long xen_read_cr8(void) 868 { 869 return 0; 870 } 871 static inline void xen_write_cr8(unsigned long val) 872 { 873 BUG_ON(val); 874 } 875 #endif 876 877 static u64 xen_read_msr_safe(unsigned int msr, int *err) 878 { 879 u64 val; 880 881 if (pmu_msr_read(msr, &val, err)) 882 return val; 883 884 val = native_read_msr_safe(msr, err); 885 switch (msr) { 886 case MSR_IA32_APICBASE: 887 #ifdef CONFIG_X86_X2APIC 888 if (!(cpuid_ecx(1) & (1 << (X86_FEATURE_X2APIC & 31)))) 889 #endif 890 val &= ~X2APIC_ENABLE; 891 break; 892 } 893 return val; 894 } 895 896 static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high) 897 { 898 int ret; 899 900 ret = 0; 901 902 switch (msr) { 903 #ifdef CONFIG_X86_64 904 unsigned which; 905 u64 base; 906 907 case MSR_FS_BASE: which = SEGBASE_FS; goto set; 908 case MSR_KERNEL_GS_BASE: which = SEGBASE_GS_USER; goto set; 909 case MSR_GS_BASE: which = SEGBASE_GS_KERNEL; goto set; 910 911 set: 912 base = ((u64)high << 32) | low; 913 if (HYPERVISOR_set_segment_base(which, base) != 0) 914 ret = -EIO; 915 break; 916 #endif 917 918 case MSR_STAR: 919 case MSR_CSTAR: 920 case MSR_LSTAR: 921 case MSR_SYSCALL_MASK: 922 case MSR_IA32_SYSENTER_CS: 923 case MSR_IA32_SYSENTER_ESP: 924 case MSR_IA32_SYSENTER_EIP: 925 /* Fast syscall setup is all done in hypercalls, so 926 these are all ignored. Stub them out here to stop 927 Xen console noise. */ 928 break; 929 930 default: 931 if (!pmu_msr_write(msr, low, high, &ret)) 932 ret = native_write_msr_safe(msr, low, high); 933 } 934 935 return ret; 936 } 937 938 static u64 xen_read_msr(unsigned int msr) 939 { 940 /* 941 * This will silently swallow a #GP from RDMSR. It may be worth 942 * changing that. 943 */ 944 int err; 945 946 return xen_read_msr_safe(msr, &err); 947 } 948 949 static void xen_write_msr(unsigned int msr, unsigned low, unsigned high) 950 { 951 /* 952 * This will silently swallow a #GP from WRMSR. It may be worth 953 * changing that. 954 */ 955 xen_write_msr_safe(msr, low, high); 956 } 957 958 void xen_setup_shared_info(void) 959 { 960 if (!xen_feature(XENFEAT_auto_translated_physmap)) { 961 set_fixmap(FIX_PARAVIRT_BOOTMAP, 962 xen_start_info->shared_info); 963 964 HYPERVISOR_shared_info = 965 (struct shared_info *)fix_to_virt(FIX_PARAVIRT_BOOTMAP); 966 } else 967 HYPERVISOR_shared_info = 968 (struct shared_info *)__va(xen_start_info->shared_info); 969 970 #ifndef CONFIG_SMP 971 /* In UP this is as good a place as any to set up shared info */ 972 xen_setup_vcpu_info_placement(); 973 #endif 974 975 xen_setup_mfn_list_list(); 976 977 /* 978 * Now that shared info is set up we can start using routines that 979 * point to pvclock area. 980 */ 981 if (system_state == SYSTEM_BOOTING) 982 xen_init_time_ops(); 983 } 984 985 /* This is called once we have the cpu_possible_mask */ 986 void xen_setup_vcpu_info_placement(void) 987 { 988 int cpu; 989 990 for_each_possible_cpu(cpu) { 991 /* Set up direct vCPU id mapping for PV guests. */ 992 per_cpu(xen_vcpu_id, cpu) = cpu; 993 xen_vcpu_setup(cpu); 994 } 995 996 /* 997 * xen_vcpu_setup managed to place the vcpu_info within the 998 * percpu area for all cpus, so make use of it. 999 */ 1000 if (xen_have_vcpu_info_placement) { 1001 pv_irq_ops.save_fl = __PV_IS_CALLEE_SAVE(xen_save_fl_direct); 1002 pv_irq_ops.restore_fl = __PV_IS_CALLEE_SAVE(xen_restore_fl_direct); 1003 pv_irq_ops.irq_disable = __PV_IS_CALLEE_SAVE(xen_irq_disable_direct); 1004 pv_irq_ops.irq_enable = __PV_IS_CALLEE_SAVE(xen_irq_enable_direct); 1005 pv_mmu_ops.read_cr2 = xen_read_cr2_direct; 1006 } 1007 } 1008 1009 static unsigned xen_patch(u8 type, u16 clobbers, void *insnbuf, 1010 unsigned long addr, unsigned len) 1011 { 1012 char *start, *end, *reloc; 1013 unsigned ret; 1014 1015 start = end = reloc = NULL; 1016 1017 #define SITE(op, x) \ 1018 case PARAVIRT_PATCH(op.x): \ 1019 if (xen_have_vcpu_info_placement) { \ 1020 start = (char *)xen_##x##_direct; \ 1021 end = xen_##x##_direct_end; \ 1022 reloc = xen_##x##_direct_reloc; \ 1023 } \ 1024 goto patch_site 1025 1026 switch (type) { 1027 SITE(pv_irq_ops, irq_enable); 1028 SITE(pv_irq_ops, irq_disable); 1029 SITE(pv_irq_ops, save_fl); 1030 SITE(pv_irq_ops, restore_fl); 1031 #undef SITE 1032 1033 patch_site: 1034 if (start == NULL || (end-start) > len) 1035 goto default_patch; 1036 1037 ret = paravirt_patch_insns(insnbuf, len, start, end); 1038 1039 /* Note: because reloc is assigned from something that 1040 appears to be an array, gcc assumes it's non-null, 1041 but doesn't know its relationship with start and 1042 end. */ 1043 if (reloc > start && reloc < end) { 1044 int reloc_off = reloc - start; 1045 long *relocp = (long *)(insnbuf + reloc_off); 1046 long delta = start - (char *)addr; 1047 1048 *relocp += delta; 1049 } 1050 break; 1051 1052 default_patch: 1053 default: 1054 ret = paravirt_patch_default(type, clobbers, insnbuf, 1055 addr, len); 1056 break; 1057 } 1058 1059 return ret; 1060 } 1061 1062 static const struct pv_info xen_info __initconst = { 1063 .shared_kernel_pmd = 0, 1064 1065 #ifdef CONFIG_X86_64 1066 .extra_user_64bit_cs = FLAT_USER_CS64, 1067 #endif 1068 .name = "Xen", 1069 }; 1070 1071 static const struct pv_init_ops xen_init_ops __initconst = { 1072 .patch = xen_patch, 1073 }; 1074 1075 static const struct pv_cpu_ops xen_cpu_ops __initconst = { 1076 .cpuid = xen_cpuid, 1077 1078 .set_debugreg = xen_set_debugreg, 1079 .get_debugreg = xen_get_debugreg, 1080 1081 .read_cr0 = xen_read_cr0, 1082 .write_cr0 = xen_write_cr0, 1083 1084 .read_cr4 = native_read_cr4, 1085 .write_cr4 = xen_write_cr4, 1086 1087 #ifdef CONFIG_X86_64 1088 .read_cr8 = xen_read_cr8, 1089 .write_cr8 = xen_write_cr8, 1090 #endif 1091 1092 .wbinvd = native_wbinvd, 1093 1094 .read_msr = xen_read_msr, 1095 .write_msr = xen_write_msr, 1096 1097 .read_msr_safe = xen_read_msr_safe, 1098 .write_msr_safe = xen_write_msr_safe, 1099 1100 .read_pmc = xen_read_pmc, 1101 1102 .iret = xen_iret, 1103 #ifdef CONFIG_X86_64 1104 .usergs_sysret64 = xen_sysret64, 1105 #endif 1106 1107 .load_tr_desc = paravirt_nop, 1108 .set_ldt = xen_set_ldt, 1109 .load_gdt = xen_load_gdt, 1110 .load_idt = xen_load_idt, 1111 .load_tls = xen_load_tls, 1112 #ifdef CONFIG_X86_64 1113 .load_gs_index = xen_load_gs_index, 1114 #endif 1115 1116 .alloc_ldt = xen_alloc_ldt, 1117 .free_ldt = xen_free_ldt, 1118 1119 .store_idt = native_store_idt, 1120 .store_tr = xen_store_tr, 1121 1122 .write_ldt_entry = xen_write_ldt_entry, 1123 .write_gdt_entry = xen_write_gdt_entry, 1124 .write_idt_entry = xen_write_idt_entry, 1125 .load_sp0 = xen_load_sp0, 1126 1127 .set_iopl_mask = xen_set_iopl_mask, 1128 .io_delay = xen_io_delay, 1129 1130 /* Xen takes care of %gs when switching to usermode for us */ 1131 .swapgs = paravirt_nop, 1132 1133 .start_context_switch = paravirt_start_context_switch, 1134 .end_context_switch = xen_end_context_switch, 1135 }; 1136 1137 static void xen_restart(char *msg) 1138 { 1139 xen_reboot(SHUTDOWN_reboot); 1140 } 1141 1142 static void xen_machine_halt(void) 1143 { 1144 xen_reboot(SHUTDOWN_poweroff); 1145 } 1146 1147 static void xen_machine_power_off(void) 1148 { 1149 if (pm_power_off) 1150 pm_power_off(); 1151 xen_reboot(SHUTDOWN_poweroff); 1152 } 1153 1154 static void xen_crash_shutdown(struct pt_regs *regs) 1155 { 1156 xen_reboot(SHUTDOWN_crash); 1157 } 1158 1159 static const struct machine_ops xen_machine_ops __initconst = { 1160 .restart = xen_restart, 1161 .halt = xen_machine_halt, 1162 .power_off = xen_machine_power_off, 1163 .shutdown = xen_machine_halt, 1164 .crash_shutdown = xen_crash_shutdown, 1165 .emergency_restart = xen_emergency_restart, 1166 }; 1167 1168 static unsigned char xen_get_nmi_reason(void) 1169 { 1170 unsigned char reason = 0; 1171 1172 /* Construct a value which looks like it came from port 0x61. */ 1173 if (test_bit(_XEN_NMIREASON_io_error, 1174 &HYPERVISOR_shared_info->arch.nmi_reason)) 1175 reason |= NMI_REASON_IOCHK; 1176 if (test_bit(_XEN_NMIREASON_pci_serr, 1177 &HYPERVISOR_shared_info->arch.nmi_reason)) 1178 reason |= NMI_REASON_SERR; 1179 1180 return reason; 1181 } 1182 1183 static void __init xen_boot_params_init_edd(void) 1184 { 1185 #if IS_ENABLED(CONFIG_EDD) 1186 struct xen_platform_op op; 1187 struct edd_info *edd_info; 1188 u32 *mbr_signature; 1189 unsigned nr; 1190 int ret; 1191 1192 edd_info = boot_params.eddbuf; 1193 mbr_signature = boot_params.edd_mbr_sig_buffer; 1194 1195 op.cmd = XENPF_firmware_info; 1196 1197 op.u.firmware_info.type = XEN_FW_DISK_INFO; 1198 for (nr = 0; nr < EDDMAXNR; nr++) { 1199 struct edd_info *info = edd_info + nr; 1200 1201 op.u.firmware_info.index = nr; 1202 info->params.length = sizeof(info->params); 1203 set_xen_guest_handle(op.u.firmware_info.u.disk_info.edd_params, 1204 &info->params); 1205 ret = HYPERVISOR_platform_op(&op); 1206 if (ret) 1207 break; 1208 1209 #define C(x) info->x = op.u.firmware_info.u.disk_info.x 1210 C(device); 1211 C(version); 1212 C(interface_support); 1213 C(legacy_max_cylinder); 1214 C(legacy_max_head); 1215 C(legacy_sectors_per_track); 1216 #undef C 1217 } 1218 boot_params.eddbuf_entries = nr; 1219 1220 op.u.firmware_info.type = XEN_FW_DISK_MBR_SIGNATURE; 1221 for (nr = 0; nr < EDD_MBR_SIG_MAX; nr++) { 1222 op.u.firmware_info.index = nr; 1223 ret = HYPERVISOR_platform_op(&op); 1224 if (ret) 1225 break; 1226 mbr_signature[nr] = op.u.firmware_info.u.disk_mbr_signature.mbr_signature; 1227 } 1228 boot_params.edd_mbr_sig_buf_entries = nr; 1229 #endif 1230 } 1231 1232 /* 1233 * Set up the GDT and segment registers for -fstack-protector. Until 1234 * we do this, we have to be careful not to call any stack-protected 1235 * function, which is most of the kernel. 1236 */ 1237 static void xen_setup_gdt(int cpu) 1238 { 1239 pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry_boot; 1240 pv_cpu_ops.load_gdt = xen_load_gdt_boot; 1241 1242 setup_stack_canary_segment(0); 1243 switch_to_new_gdt(0); 1244 1245 pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry; 1246 pv_cpu_ops.load_gdt = xen_load_gdt; 1247 } 1248 1249 static void __init xen_dom0_set_legacy_features(void) 1250 { 1251 x86_platform.legacy.rtc = 1; 1252 } 1253 1254 /* First C function to be called on Xen boot */ 1255 asmlinkage __visible void __init xen_start_kernel(void) 1256 { 1257 struct physdev_set_iopl set_iopl; 1258 unsigned long initrd_start = 0; 1259 int rc; 1260 1261 if (!xen_start_info) 1262 return; 1263 1264 xen_domain_type = XEN_PV_DOMAIN; 1265 1266 xen_setup_features(); 1267 1268 xen_setup_machphys_mapping(); 1269 1270 /* Install Xen paravirt ops */ 1271 pv_info = xen_info; 1272 pv_init_ops = xen_init_ops; 1273 pv_cpu_ops = xen_cpu_ops; 1274 1275 x86_platform.get_nmi_reason = xen_get_nmi_reason; 1276 1277 x86_init.resources.memory_setup = xen_memory_setup; 1278 x86_init.oem.arch_setup = xen_arch_setup; 1279 x86_init.oem.banner = xen_banner; 1280 1281 /* 1282 * Set up some pagetable state before starting to set any ptes. 1283 */ 1284 1285 xen_init_mmu_ops(); 1286 1287 /* Prevent unwanted bits from being set in PTEs. */ 1288 __supported_pte_mask &= ~_PAGE_GLOBAL; 1289 1290 /* 1291 * Prevent page tables from being allocated in highmem, even 1292 * if CONFIG_HIGHPTE is enabled. 1293 */ 1294 __userpte_alloc_gfp &= ~__GFP_HIGHMEM; 1295 1296 /* Work out if we support NX */ 1297 x86_configure_nx(); 1298 1299 /* Get mfn list */ 1300 xen_build_dynamic_phys_to_machine(); 1301 1302 /* 1303 * Set up kernel GDT and segment registers, mainly so that 1304 * -fstack-protector code can be executed. 1305 */ 1306 xen_setup_gdt(0); 1307 1308 xen_init_irq_ops(); 1309 xen_init_capabilities(); 1310 1311 #ifdef CONFIG_X86_LOCAL_APIC 1312 /* 1313 * set up the basic apic ops. 1314 */ 1315 xen_init_apic(); 1316 #endif 1317 1318 if (xen_feature(XENFEAT_mmu_pt_update_preserve_ad)) { 1319 pv_mmu_ops.ptep_modify_prot_start = xen_ptep_modify_prot_start; 1320 pv_mmu_ops.ptep_modify_prot_commit = xen_ptep_modify_prot_commit; 1321 } 1322 1323 machine_ops = xen_machine_ops; 1324 1325 /* 1326 * The only reliable way to retain the initial address of the 1327 * percpu gdt_page is to remember it here, so we can go and 1328 * mark it RW later, when the initial percpu area is freed. 1329 */ 1330 xen_initial_gdt = &per_cpu(gdt_page, 0); 1331 1332 xen_smp_init(); 1333 1334 #ifdef CONFIG_ACPI_NUMA 1335 /* 1336 * The pages we from Xen are not related to machine pages, so 1337 * any NUMA information the kernel tries to get from ACPI will 1338 * be meaningless. Prevent it from trying. 1339 */ 1340 acpi_numa = -1; 1341 #endif 1342 /* Don't do the full vcpu_info placement stuff until we have a 1343 possible map and a non-dummy shared_info. */ 1344 per_cpu(xen_vcpu, 0) = &HYPERVISOR_shared_info->vcpu_info[0]; 1345 1346 WARN_ON(xen_cpuhp_setup(xen_cpu_up_prepare_pv, xen_cpu_dead_pv)); 1347 1348 local_irq_disable(); 1349 early_boot_irqs_disabled = true; 1350 1351 xen_raw_console_write("mapping kernel into physical memory\n"); 1352 xen_setup_kernel_pagetable((pgd_t *)xen_start_info->pt_base, 1353 xen_start_info->nr_pages); 1354 xen_reserve_special_pages(); 1355 1356 /* keep using Xen gdt for now; no urgent need to change it */ 1357 1358 #ifdef CONFIG_X86_32 1359 pv_info.kernel_rpl = 1; 1360 if (xen_feature(XENFEAT_supervisor_mode_kernel)) 1361 pv_info.kernel_rpl = 0; 1362 #else 1363 pv_info.kernel_rpl = 0; 1364 #endif 1365 /* set the limit of our address space */ 1366 xen_reserve_top(); 1367 1368 /* 1369 * We used to do this in xen_arch_setup, but that is too late 1370 * on AMD were early_cpu_init (run before ->arch_setup()) calls 1371 * early_amd_init which pokes 0xcf8 port. 1372 */ 1373 set_iopl.iopl = 1; 1374 rc = HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl); 1375 if (rc != 0) 1376 xen_raw_printk("physdev_op failed %d\n", rc); 1377 1378 #ifdef CONFIG_X86_32 1379 /* set up basic CPUID stuff */ 1380 cpu_detect(&new_cpu_data); 1381 set_cpu_cap(&new_cpu_data, X86_FEATURE_FPU); 1382 new_cpu_data.x86_capability[CPUID_1_EDX] = cpuid_edx(1); 1383 #endif 1384 1385 if (xen_start_info->mod_start) { 1386 if (xen_start_info->flags & SIF_MOD_START_PFN) 1387 initrd_start = PFN_PHYS(xen_start_info->mod_start); 1388 else 1389 initrd_start = __pa(xen_start_info->mod_start); 1390 } 1391 1392 /* Poke various useful things into boot_params */ 1393 boot_params.hdr.type_of_loader = (9 << 4) | 0; 1394 boot_params.hdr.ramdisk_image = initrd_start; 1395 boot_params.hdr.ramdisk_size = xen_start_info->mod_len; 1396 boot_params.hdr.cmd_line_ptr = __pa(xen_start_info->cmd_line); 1397 boot_params.hdr.hardware_subarch = X86_SUBARCH_XEN; 1398 1399 if (!xen_initial_domain()) { 1400 add_preferred_console("xenboot", 0, NULL); 1401 add_preferred_console("tty", 0, NULL); 1402 add_preferred_console("hvc", 0, NULL); 1403 if (pci_xen) 1404 x86_init.pci.arch_init = pci_xen_init; 1405 } else { 1406 const struct dom0_vga_console_info *info = 1407 (void *)((char *)xen_start_info + 1408 xen_start_info->console.dom0.info_off); 1409 struct xen_platform_op op = { 1410 .cmd = XENPF_firmware_info, 1411 .interface_version = XENPF_INTERFACE_VERSION, 1412 .u.firmware_info.type = XEN_FW_KBD_SHIFT_FLAGS, 1413 }; 1414 1415 x86_platform.set_legacy_features = 1416 xen_dom0_set_legacy_features; 1417 xen_init_vga(info, xen_start_info->console.dom0.info_size); 1418 xen_start_info->console.domU.mfn = 0; 1419 xen_start_info->console.domU.evtchn = 0; 1420 1421 if (HYPERVISOR_platform_op(&op) == 0) 1422 boot_params.kbd_status = op.u.firmware_info.u.kbd_shift_flags; 1423 1424 /* Make sure ACS will be enabled */ 1425 pci_request_acs(); 1426 1427 xen_acpi_sleep_register(); 1428 1429 /* Avoid searching for BIOS MP tables */ 1430 x86_init.mpparse.find_smp_config = x86_init_noop; 1431 x86_init.mpparse.get_smp_config = x86_init_uint_noop; 1432 1433 xen_boot_params_init_edd(); 1434 } 1435 #ifdef CONFIG_PCI 1436 /* PCI BIOS service won't work from a PV guest. */ 1437 pci_probe &= ~PCI_PROBE_BIOS; 1438 #endif 1439 xen_raw_console_write("about to get started...\n"); 1440 1441 /* Let's presume PV guests always boot on vCPU with id 0. */ 1442 per_cpu(xen_vcpu_id, 0) = 0; 1443 1444 xen_setup_runstate_info(0); 1445 1446 xen_efi_init(); 1447 1448 /* Start the world */ 1449 #ifdef CONFIG_X86_32 1450 i386_start_kernel(); 1451 #else 1452 cr4_init_shadow(); /* 32b kernel does this in i386_start_kernel() */ 1453 x86_64_start_reservations((char *)__pa_symbol(&boot_params)); 1454 #endif 1455 } 1456 1457 static int xen_cpu_up_prepare_pv(unsigned int cpu) 1458 { 1459 int rc; 1460 1461 xen_setup_timer(cpu); 1462 1463 rc = xen_smp_intr_init(cpu); 1464 if (rc) { 1465 WARN(1, "xen_smp_intr_init() for CPU %d failed: %d\n", 1466 cpu, rc); 1467 return rc; 1468 } 1469 1470 rc = xen_smp_intr_init_pv(cpu); 1471 if (rc) { 1472 WARN(1, "xen_smp_intr_init_pv() for CPU %d failed: %d\n", 1473 cpu, rc); 1474 return rc; 1475 } 1476 1477 return 0; 1478 } 1479 1480 static int xen_cpu_dead_pv(unsigned int cpu) 1481 { 1482 xen_smp_intr_free(cpu); 1483 xen_smp_intr_free_pv(cpu); 1484 1485 xen_teardown_timer(cpu); 1486 1487 return 0; 1488 } 1489 1490 static uint32_t __init xen_platform_pv(void) 1491 { 1492 if (xen_pv_domain()) 1493 return xen_cpuid_base(); 1494 1495 return 0; 1496 } 1497 1498 const struct hypervisor_x86 x86_hyper_xen_pv = { 1499 .name = "Xen PV", 1500 .detect = xen_platform_pv, 1501 .pin_vcpu = xen_pin_vcpu, 1502 }; 1503 EXPORT_SYMBOL(x86_hyper_xen_pv); 1504