xref: /openbmc/linux/arch/x86/xen/enlighten.c (revision 9f380456)
1 /*
2  * Core of Xen paravirt_ops implementation.
3  *
4  * This file contains the xen_paravirt_ops structure itself, and the
5  * implementations for:
6  * - privileged instructions
7  * - interrupt flags
8  * - segment operations
9  * - booting and setup
10  *
11  * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
12  */
13 
14 #include <linux/cpu.h>
15 #include <linux/kernel.h>
16 #include <linux/init.h>
17 #include <linux/smp.h>
18 #include <linux/preempt.h>
19 #include <linux/hardirq.h>
20 #include <linux/percpu.h>
21 #include <linux/delay.h>
22 #include <linux/start_kernel.h>
23 #include <linux/sched.h>
24 #include <linux/kprobes.h>
25 #include <linux/bootmem.h>
26 #include <linux/module.h>
27 #include <linux/mm.h>
28 #include <linux/page-flags.h>
29 #include <linux/highmem.h>
30 #include <linux/console.h>
31 #include <linux/pci.h>
32 #include <linux/gfp.h>
33 #include <linux/memblock.h>
34 
35 #include <xen/xen.h>
36 #include <xen/interface/xen.h>
37 #include <xen/interface/version.h>
38 #include <xen/interface/physdev.h>
39 #include <xen/interface/vcpu.h>
40 #include <xen/interface/memory.h>
41 #include <xen/features.h>
42 #include <xen/page.h>
43 #include <xen/hvm.h>
44 #include <xen/hvc-console.h>
45 
46 #include <asm/paravirt.h>
47 #include <asm/apic.h>
48 #include <asm/page.h>
49 #include <asm/xen/pci.h>
50 #include <asm/xen/hypercall.h>
51 #include <asm/xen/hypervisor.h>
52 #include <asm/fixmap.h>
53 #include <asm/processor.h>
54 #include <asm/proto.h>
55 #include <asm/msr-index.h>
56 #include <asm/traps.h>
57 #include <asm/setup.h>
58 #include <asm/desc.h>
59 #include <asm/pgalloc.h>
60 #include <asm/pgtable.h>
61 #include <asm/tlbflush.h>
62 #include <asm/reboot.h>
63 #include <asm/stackprotector.h>
64 #include <asm/hypervisor.h>
65 #include <asm/mwait.h>
66 #include <asm/pci_x86.h>
67 
68 #ifdef CONFIG_ACPI
69 #include <linux/acpi.h>
70 #include <asm/acpi.h>
71 #include <acpi/pdc_intel.h>
72 #include <acpi/processor.h>
73 #include <xen/interface/platform.h>
74 #endif
75 
76 #include "xen-ops.h"
77 #include "mmu.h"
78 #include "multicalls.h"
79 
80 EXPORT_SYMBOL_GPL(hypercall_page);
81 
82 DEFINE_PER_CPU(struct vcpu_info *, xen_vcpu);
83 DEFINE_PER_CPU(struct vcpu_info, xen_vcpu_info);
84 
85 enum xen_domain_type xen_domain_type = XEN_NATIVE;
86 EXPORT_SYMBOL_GPL(xen_domain_type);
87 
88 unsigned long *machine_to_phys_mapping = (void *)MACH2PHYS_VIRT_START;
89 EXPORT_SYMBOL(machine_to_phys_mapping);
90 unsigned long  machine_to_phys_nr;
91 EXPORT_SYMBOL(machine_to_phys_nr);
92 
93 struct start_info *xen_start_info;
94 EXPORT_SYMBOL_GPL(xen_start_info);
95 
96 struct shared_info xen_dummy_shared_info;
97 
98 void *xen_initial_gdt;
99 
100 RESERVE_BRK(shared_info_page_brk, PAGE_SIZE);
101 __read_mostly int xen_have_vector_callback;
102 EXPORT_SYMBOL_GPL(xen_have_vector_callback);
103 
104 /*
105  * Point at some empty memory to start with. We map the real shared_info
106  * page as soon as fixmap is up and running.
107  */
108 struct shared_info *HYPERVISOR_shared_info = (void *)&xen_dummy_shared_info;
109 
110 /*
111  * Flag to determine whether vcpu info placement is available on all
112  * VCPUs.  We assume it is to start with, and then set it to zero on
113  * the first failure.  This is because it can succeed on some VCPUs
114  * and not others, since it can involve hypervisor memory allocation,
115  * or because the guest failed to guarantee all the appropriate
116  * constraints on all VCPUs (ie buffer can't cross a page boundary).
117  *
118  * Note that any particular CPU may be using a placed vcpu structure,
119  * but we can only optimise if the all are.
120  *
121  * 0: not available, 1: available
122  */
123 static int have_vcpu_info_placement = 1;
124 
125 static void clamp_max_cpus(void)
126 {
127 #ifdef CONFIG_SMP
128 	if (setup_max_cpus > MAX_VIRT_CPUS)
129 		setup_max_cpus = MAX_VIRT_CPUS;
130 #endif
131 }
132 
133 static void xen_vcpu_setup(int cpu)
134 {
135 	struct vcpu_register_vcpu_info info;
136 	int err;
137 	struct vcpu_info *vcpup;
138 
139 	BUG_ON(HYPERVISOR_shared_info == &xen_dummy_shared_info);
140 
141 	if (cpu < MAX_VIRT_CPUS)
142 		per_cpu(xen_vcpu,cpu) = &HYPERVISOR_shared_info->vcpu_info[cpu];
143 
144 	if (!have_vcpu_info_placement) {
145 		if (cpu >= MAX_VIRT_CPUS)
146 			clamp_max_cpus();
147 		return;
148 	}
149 
150 	vcpup = &per_cpu(xen_vcpu_info, cpu);
151 	info.mfn = arbitrary_virt_to_mfn(vcpup);
152 	info.offset = offset_in_page(vcpup);
153 
154 	/* Check to see if the hypervisor will put the vcpu_info
155 	   structure where we want it, which allows direct access via
156 	   a percpu-variable. */
157 	err = HYPERVISOR_vcpu_op(VCPUOP_register_vcpu_info, cpu, &info);
158 
159 	if (err) {
160 		printk(KERN_DEBUG "register_vcpu_info failed: err=%d\n", err);
161 		have_vcpu_info_placement = 0;
162 		clamp_max_cpus();
163 	} else {
164 		/* This cpu is using the registered vcpu info, even if
165 		   later ones fail to. */
166 		per_cpu(xen_vcpu, cpu) = vcpup;
167 	}
168 }
169 
170 /*
171  * On restore, set the vcpu placement up again.
172  * If it fails, then we're in a bad state, since
173  * we can't back out from using it...
174  */
175 void xen_vcpu_restore(void)
176 {
177 	int cpu;
178 
179 	for_each_online_cpu(cpu) {
180 		bool other_cpu = (cpu != smp_processor_id());
181 
182 		if (other_cpu &&
183 		    HYPERVISOR_vcpu_op(VCPUOP_down, cpu, NULL))
184 			BUG();
185 
186 		xen_setup_runstate_info(cpu);
187 
188 		if (have_vcpu_info_placement)
189 			xen_vcpu_setup(cpu);
190 
191 		if (other_cpu &&
192 		    HYPERVISOR_vcpu_op(VCPUOP_up, cpu, NULL))
193 			BUG();
194 	}
195 }
196 
197 static void __init xen_banner(void)
198 {
199 	unsigned version = HYPERVISOR_xen_version(XENVER_version, NULL);
200 	struct xen_extraversion extra;
201 	HYPERVISOR_xen_version(XENVER_extraversion, &extra);
202 
203 	printk(KERN_INFO "Booting paravirtualized kernel on %s\n",
204 	       pv_info.name);
205 	printk(KERN_INFO "Xen version: %d.%d%s%s\n",
206 	       version >> 16, version & 0xffff, extra.extraversion,
207 	       xen_feature(XENFEAT_mmu_pt_update_preserve_ad) ? " (preserve-AD)" : "");
208 }
209 
210 static __read_mostly unsigned int cpuid_leaf1_edx_mask = ~0;
211 static __read_mostly unsigned int cpuid_leaf1_ecx_mask = ~0;
212 
213 static __read_mostly unsigned int cpuid_leaf1_ecx_set_mask;
214 static __read_mostly unsigned int cpuid_leaf5_ecx_val;
215 static __read_mostly unsigned int cpuid_leaf5_edx_val;
216 
217 static void xen_cpuid(unsigned int *ax, unsigned int *bx,
218 		      unsigned int *cx, unsigned int *dx)
219 {
220 	unsigned maskebx = ~0;
221 	unsigned maskecx = ~0;
222 	unsigned maskedx = ~0;
223 	unsigned setecx = 0;
224 	/*
225 	 * Mask out inconvenient features, to try and disable as many
226 	 * unsupported kernel subsystems as possible.
227 	 */
228 	switch (*ax) {
229 	case 1:
230 		maskecx = cpuid_leaf1_ecx_mask;
231 		setecx = cpuid_leaf1_ecx_set_mask;
232 		maskedx = cpuid_leaf1_edx_mask;
233 		break;
234 
235 	case CPUID_MWAIT_LEAF:
236 		/* Synthesize the values.. */
237 		*ax = 0;
238 		*bx = 0;
239 		*cx = cpuid_leaf5_ecx_val;
240 		*dx = cpuid_leaf5_edx_val;
241 		return;
242 
243 	case 0xb:
244 		/* Suppress extended topology stuff */
245 		maskebx = 0;
246 		break;
247 	}
248 
249 	asm(XEN_EMULATE_PREFIX "cpuid"
250 		: "=a" (*ax),
251 		  "=b" (*bx),
252 		  "=c" (*cx),
253 		  "=d" (*dx)
254 		: "0" (*ax), "2" (*cx));
255 
256 	*bx &= maskebx;
257 	*cx &= maskecx;
258 	*cx |= setecx;
259 	*dx &= maskedx;
260 
261 }
262 
263 static bool __init xen_check_mwait(void)
264 {
265 #if defined(CONFIG_ACPI) && !defined(CONFIG_ACPI_PROCESSOR_AGGREGATOR) && \
266 	!defined(CONFIG_ACPI_PROCESSOR_AGGREGATOR_MODULE)
267 	struct xen_platform_op op = {
268 		.cmd			= XENPF_set_processor_pminfo,
269 		.u.set_pminfo.id	= -1,
270 		.u.set_pminfo.type	= XEN_PM_PDC,
271 	};
272 	uint32_t buf[3];
273 	unsigned int ax, bx, cx, dx;
274 	unsigned int mwait_mask;
275 
276 	/* We need to determine whether it is OK to expose the MWAIT
277 	 * capability to the kernel to harvest deeper than C3 states from ACPI
278 	 * _CST using the processor_harvest_xen.c module. For this to work, we
279 	 * need to gather the MWAIT_LEAF values (which the cstate.c code
280 	 * checks against). The hypervisor won't expose the MWAIT flag because
281 	 * it would break backwards compatibility; so we will find out directly
282 	 * from the hardware and hypercall.
283 	 */
284 	if (!xen_initial_domain())
285 		return false;
286 
287 	ax = 1;
288 	cx = 0;
289 
290 	native_cpuid(&ax, &bx, &cx, &dx);
291 
292 	mwait_mask = (1 << (X86_FEATURE_EST % 32)) |
293 		     (1 << (X86_FEATURE_MWAIT % 32));
294 
295 	if ((cx & mwait_mask) != mwait_mask)
296 		return false;
297 
298 	/* We need to emulate the MWAIT_LEAF and for that we need both
299 	 * ecx and edx. The hypercall provides only partial information.
300 	 */
301 
302 	ax = CPUID_MWAIT_LEAF;
303 	bx = 0;
304 	cx = 0;
305 	dx = 0;
306 
307 	native_cpuid(&ax, &bx, &cx, &dx);
308 
309 	/* Ask the Hypervisor whether to clear ACPI_PDC_C_C2C3_FFH. If so,
310 	 * don't expose MWAIT_LEAF and let ACPI pick the IOPORT version of C3.
311 	 */
312 	buf[0] = ACPI_PDC_REVISION_ID;
313 	buf[1] = 1;
314 	buf[2] = (ACPI_PDC_C_CAPABILITY_SMP | ACPI_PDC_EST_CAPABILITY_SWSMP);
315 
316 	set_xen_guest_handle(op.u.set_pminfo.pdc, buf);
317 
318 	if ((HYPERVISOR_dom0_op(&op) == 0) &&
319 	    (buf[2] & (ACPI_PDC_C_C1_FFH | ACPI_PDC_C_C2C3_FFH))) {
320 		cpuid_leaf5_ecx_val = cx;
321 		cpuid_leaf5_edx_val = dx;
322 	}
323 	return true;
324 #else
325 	return false;
326 #endif
327 }
328 static void __init xen_init_cpuid_mask(void)
329 {
330 	unsigned int ax, bx, cx, dx;
331 	unsigned int xsave_mask;
332 
333 	cpuid_leaf1_edx_mask =
334 		~((1 << X86_FEATURE_MCE)  |  /* disable MCE */
335 		  (1 << X86_FEATURE_MCA)  |  /* disable MCA */
336 		  (1 << X86_FEATURE_MTRR) |  /* disable MTRR */
337 		  (1 << X86_FEATURE_ACC));   /* thermal monitoring */
338 
339 	if (!xen_initial_domain())
340 		cpuid_leaf1_edx_mask &=
341 			~((1 << X86_FEATURE_APIC) |  /* disable local APIC */
342 			  (1 << X86_FEATURE_ACPI));  /* disable ACPI */
343 	ax = 1;
344 	cx = 0;
345 	xen_cpuid(&ax, &bx, &cx, &dx);
346 
347 	xsave_mask =
348 		(1 << (X86_FEATURE_XSAVE % 32)) |
349 		(1 << (X86_FEATURE_OSXSAVE % 32));
350 
351 	/* Xen will set CR4.OSXSAVE if supported and not disabled by force */
352 	if ((cx & xsave_mask) != xsave_mask)
353 		cpuid_leaf1_ecx_mask &= ~xsave_mask; /* disable XSAVE & OSXSAVE */
354 	if (xen_check_mwait())
355 		cpuid_leaf1_ecx_set_mask = (1 << (X86_FEATURE_MWAIT % 32));
356 }
357 
358 static void xen_set_debugreg(int reg, unsigned long val)
359 {
360 	HYPERVISOR_set_debugreg(reg, val);
361 }
362 
363 static unsigned long xen_get_debugreg(int reg)
364 {
365 	return HYPERVISOR_get_debugreg(reg);
366 }
367 
368 static void xen_end_context_switch(struct task_struct *next)
369 {
370 	xen_mc_flush();
371 	paravirt_end_context_switch(next);
372 }
373 
374 static unsigned long xen_store_tr(void)
375 {
376 	return 0;
377 }
378 
379 /*
380  * Set the page permissions for a particular virtual address.  If the
381  * address is a vmalloc mapping (or other non-linear mapping), then
382  * find the linear mapping of the page and also set its protections to
383  * match.
384  */
385 static void set_aliased_prot(void *v, pgprot_t prot)
386 {
387 	int level;
388 	pte_t *ptep;
389 	pte_t pte;
390 	unsigned long pfn;
391 	struct page *page;
392 
393 	ptep = lookup_address((unsigned long)v, &level);
394 	BUG_ON(ptep == NULL);
395 
396 	pfn = pte_pfn(*ptep);
397 	page = pfn_to_page(pfn);
398 
399 	pte = pfn_pte(pfn, prot);
400 
401 	if (HYPERVISOR_update_va_mapping((unsigned long)v, pte, 0))
402 		BUG();
403 
404 	if (!PageHighMem(page)) {
405 		void *av = __va(PFN_PHYS(pfn));
406 
407 		if (av != v)
408 			if (HYPERVISOR_update_va_mapping((unsigned long)av, pte, 0))
409 				BUG();
410 	} else
411 		kmap_flush_unused();
412 }
413 
414 static void xen_alloc_ldt(struct desc_struct *ldt, unsigned entries)
415 {
416 	const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE;
417 	int i;
418 
419 	for(i = 0; i < entries; i += entries_per_page)
420 		set_aliased_prot(ldt + i, PAGE_KERNEL_RO);
421 }
422 
423 static void xen_free_ldt(struct desc_struct *ldt, unsigned entries)
424 {
425 	const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE;
426 	int i;
427 
428 	for(i = 0; i < entries; i += entries_per_page)
429 		set_aliased_prot(ldt + i, PAGE_KERNEL);
430 }
431 
432 static void xen_set_ldt(const void *addr, unsigned entries)
433 {
434 	struct mmuext_op *op;
435 	struct multicall_space mcs = xen_mc_entry(sizeof(*op));
436 
437 	trace_xen_cpu_set_ldt(addr, entries);
438 
439 	op = mcs.args;
440 	op->cmd = MMUEXT_SET_LDT;
441 	op->arg1.linear_addr = (unsigned long)addr;
442 	op->arg2.nr_ents = entries;
443 
444 	MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
445 
446 	xen_mc_issue(PARAVIRT_LAZY_CPU);
447 }
448 
449 static void xen_load_gdt(const struct desc_ptr *dtr)
450 {
451 	unsigned long va = dtr->address;
452 	unsigned int size = dtr->size + 1;
453 	unsigned pages = (size + PAGE_SIZE - 1) / PAGE_SIZE;
454 	unsigned long frames[pages];
455 	int f;
456 
457 	/*
458 	 * A GDT can be up to 64k in size, which corresponds to 8192
459 	 * 8-byte entries, or 16 4k pages..
460 	 */
461 
462 	BUG_ON(size > 65536);
463 	BUG_ON(va & ~PAGE_MASK);
464 
465 	for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) {
466 		int level;
467 		pte_t *ptep;
468 		unsigned long pfn, mfn;
469 		void *virt;
470 
471 		/*
472 		 * The GDT is per-cpu and is in the percpu data area.
473 		 * That can be virtually mapped, so we need to do a
474 		 * page-walk to get the underlying MFN for the
475 		 * hypercall.  The page can also be in the kernel's
476 		 * linear range, so we need to RO that mapping too.
477 		 */
478 		ptep = lookup_address(va, &level);
479 		BUG_ON(ptep == NULL);
480 
481 		pfn = pte_pfn(*ptep);
482 		mfn = pfn_to_mfn(pfn);
483 		virt = __va(PFN_PHYS(pfn));
484 
485 		frames[f] = mfn;
486 
487 		make_lowmem_page_readonly((void *)va);
488 		make_lowmem_page_readonly(virt);
489 	}
490 
491 	if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct)))
492 		BUG();
493 }
494 
495 /*
496  * load_gdt for early boot, when the gdt is only mapped once
497  */
498 static void __init xen_load_gdt_boot(const struct desc_ptr *dtr)
499 {
500 	unsigned long va = dtr->address;
501 	unsigned int size = dtr->size + 1;
502 	unsigned pages = (size + PAGE_SIZE - 1) / PAGE_SIZE;
503 	unsigned long frames[pages];
504 	int f;
505 
506 	/*
507 	 * A GDT can be up to 64k in size, which corresponds to 8192
508 	 * 8-byte entries, or 16 4k pages..
509 	 */
510 
511 	BUG_ON(size > 65536);
512 	BUG_ON(va & ~PAGE_MASK);
513 
514 	for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) {
515 		pte_t pte;
516 		unsigned long pfn, mfn;
517 
518 		pfn = virt_to_pfn(va);
519 		mfn = pfn_to_mfn(pfn);
520 
521 		pte = pfn_pte(pfn, PAGE_KERNEL_RO);
522 
523 		if (HYPERVISOR_update_va_mapping((unsigned long)va, pte, 0))
524 			BUG();
525 
526 		frames[f] = mfn;
527 	}
528 
529 	if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct)))
530 		BUG();
531 }
532 
533 static void load_TLS_descriptor(struct thread_struct *t,
534 				unsigned int cpu, unsigned int i)
535 {
536 	struct desc_struct *gdt = get_cpu_gdt_table(cpu);
537 	xmaddr_t maddr = arbitrary_virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]);
538 	struct multicall_space mc = __xen_mc_entry(0);
539 
540 	MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]);
541 }
542 
543 static void xen_load_tls(struct thread_struct *t, unsigned int cpu)
544 {
545 	/*
546 	 * XXX sleazy hack: If we're being called in a lazy-cpu zone
547 	 * and lazy gs handling is enabled, it means we're in a
548 	 * context switch, and %gs has just been saved.  This means we
549 	 * can zero it out to prevent faults on exit from the
550 	 * hypervisor if the next process has no %gs.  Either way, it
551 	 * has been saved, and the new value will get loaded properly.
552 	 * This will go away as soon as Xen has been modified to not
553 	 * save/restore %gs for normal hypercalls.
554 	 *
555 	 * On x86_64, this hack is not used for %gs, because gs points
556 	 * to KERNEL_GS_BASE (and uses it for PDA references), so we
557 	 * must not zero %gs on x86_64
558 	 *
559 	 * For x86_64, we need to zero %fs, otherwise we may get an
560 	 * exception between the new %fs descriptor being loaded and
561 	 * %fs being effectively cleared at __switch_to().
562 	 */
563 	if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU) {
564 #ifdef CONFIG_X86_32
565 		lazy_load_gs(0);
566 #else
567 		loadsegment(fs, 0);
568 #endif
569 	}
570 
571 	xen_mc_batch();
572 
573 	load_TLS_descriptor(t, cpu, 0);
574 	load_TLS_descriptor(t, cpu, 1);
575 	load_TLS_descriptor(t, cpu, 2);
576 
577 	xen_mc_issue(PARAVIRT_LAZY_CPU);
578 }
579 
580 #ifdef CONFIG_X86_64
581 static void xen_load_gs_index(unsigned int idx)
582 {
583 	if (HYPERVISOR_set_segment_base(SEGBASE_GS_USER_SEL, idx))
584 		BUG();
585 }
586 #endif
587 
588 static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum,
589 				const void *ptr)
590 {
591 	xmaddr_t mach_lp = arbitrary_virt_to_machine(&dt[entrynum]);
592 	u64 entry = *(u64 *)ptr;
593 
594 	trace_xen_cpu_write_ldt_entry(dt, entrynum, entry);
595 
596 	preempt_disable();
597 
598 	xen_mc_flush();
599 	if (HYPERVISOR_update_descriptor(mach_lp.maddr, entry))
600 		BUG();
601 
602 	preempt_enable();
603 }
604 
605 static int cvt_gate_to_trap(int vector, const gate_desc *val,
606 			    struct trap_info *info)
607 {
608 	unsigned long addr;
609 
610 	if (val->type != GATE_TRAP && val->type != GATE_INTERRUPT)
611 		return 0;
612 
613 	info->vector = vector;
614 
615 	addr = gate_offset(*val);
616 #ifdef CONFIG_X86_64
617 	/*
618 	 * Look for known traps using IST, and substitute them
619 	 * appropriately.  The debugger ones are the only ones we care
620 	 * about.  Xen will handle faults like double_fault and
621 	 * machine_check, so we should never see them.  Warn if
622 	 * there's an unexpected IST-using fault handler.
623 	 */
624 	if (addr == (unsigned long)debug)
625 		addr = (unsigned long)xen_debug;
626 	else if (addr == (unsigned long)int3)
627 		addr = (unsigned long)xen_int3;
628 	else if (addr == (unsigned long)stack_segment)
629 		addr = (unsigned long)xen_stack_segment;
630 	else if (addr == (unsigned long)double_fault ||
631 		 addr == (unsigned long)nmi) {
632 		/* Don't need to handle these */
633 		return 0;
634 #ifdef CONFIG_X86_MCE
635 	} else if (addr == (unsigned long)machine_check) {
636 		return 0;
637 #endif
638 	} else {
639 		/* Some other trap using IST? */
640 		if (WARN_ON(val->ist != 0))
641 			return 0;
642 	}
643 #endif	/* CONFIG_X86_64 */
644 	info->address = addr;
645 
646 	info->cs = gate_segment(*val);
647 	info->flags = val->dpl;
648 	/* interrupt gates clear IF */
649 	if (val->type == GATE_INTERRUPT)
650 		info->flags |= 1 << 2;
651 
652 	return 1;
653 }
654 
655 /* Locations of each CPU's IDT */
656 static DEFINE_PER_CPU(struct desc_ptr, idt_desc);
657 
658 /* Set an IDT entry.  If the entry is part of the current IDT, then
659    also update Xen. */
660 static void xen_write_idt_entry(gate_desc *dt, int entrynum, const gate_desc *g)
661 {
662 	unsigned long p = (unsigned long)&dt[entrynum];
663 	unsigned long start, end;
664 
665 	trace_xen_cpu_write_idt_entry(dt, entrynum, g);
666 
667 	preempt_disable();
668 
669 	start = __this_cpu_read(idt_desc.address);
670 	end = start + __this_cpu_read(idt_desc.size) + 1;
671 
672 	xen_mc_flush();
673 
674 	native_write_idt_entry(dt, entrynum, g);
675 
676 	if (p >= start && (p + 8) <= end) {
677 		struct trap_info info[2];
678 
679 		info[1].address = 0;
680 
681 		if (cvt_gate_to_trap(entrynum, g, &info[0]))
682 			if (HYPERVISOR_set_trap_table(info))
683 				BUG();
684 	}
685 
686 	preempt_enable();
687 }
688 
689 static void xen_convert_trap_info(const struct desc_ptr *desc,
690 				  struct trap_info *traps)
691 {
692 	unsigned in, out, count;
693 
694 	count = (desc->size+1) / sizeof(gate_desc);
695 	BUG_ON(count > 256);
696 
697 	for (in = out = 0; in < count; in++) {
698 		gate_desc *entry = (gate_desc*)(desc->address) + in;
699 
700 		if (cvt_gate_to_trap(in, entry, &traps[out]))
701 			out++;
702 	}
703 	traps[out].address = 0;
704 }
705 
706 void xen_copy_trap_info(struct trap_info *traps)
707 {
708 	const struct desc_ptr *desc = &__get_cpu_var(idt_desc);
709 
710 	xen_convert_trap_info(desc, traps);
711 }
712 
713 /* Load a new IDT into Xen.  In principle this can be per-CPU, so we
714    hold a spinlock to protect the static traps[] array (static because
715    it avoids allocation, and saves stack space). */
716 static void xen_load_idt(const struct desc_ptr *desc)
717 {
718 	static DEFINE_SPINLOCK(lock);
719 	static struct trap_info traps[257];
720 
721 	trace_xen_cpu_load_idt(desc);
722 
723 	spin_lock(&lock);
724 
725 	__get_cpu_var(idt_desc) = *desc;
726 
727 	xen_convert_trap_info(desc, traps);
728 
729 	xen_mc_flush();
730 	if (HYPERVISOR_set_trap_table(traps))
731 		BUG();
732 
733 	spin_unlock(&lock);
734 }
735 
736 /* Write a GDT descriptor entry.  Ignore LDT descriptors, since
737    they're handled differently. */
738 static void xen_write_gdt_entry(struct desc_struct *dt, int entry,
739 				const void *desc, int type)
740 {
741 	trace_xen_cpu_write_gdt_entry(dt, entry, desc, type);
742 
743 	preempt_disable();
744 
745 	switch (type) {
746 	case DESC_LDT:
747 	case DESC_TSS:
748 		/* ignore */
749 		break;
750 
751 	default: {
752 		xmaddr_t maddr = arbitrary_virt_to_machine(&dt[entry]);
753 
754 		xen_mc_flush();
755 		if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc))
756 			BUG();
757 	}
758 
759 	}
760 
761 	preempt_enable();
762 }
763 
764 /*
765  * Version of write_gdt_entry for use at early boot-time needed to
766  * update an entry as simply as possible.
767  */
768 static void __init xen_write_gdt_entry_boot(struct desc_struct *dt, int entry,
769 					    const void *desc, int type)
770 {
771 	trace_xen_cpu_write_gdt_entry(dt, entry, desc, type);
772 
773 	switch (type) {
774 	case DESC_LDT:
775 	case DESC_TSS:
776 		/* ignore */
777 		break;
778 
779 	default: {
780 		xmaddr_t maddr = virt_to_machine(&dt[entry]);
781 
782 		if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc))
783 			dt[entry] = *(struct desc_struct *)desc;
784 	}
785 
786 	}
787 }
788 
789 static void xen_load_sp0(struct tss_struct *tss,
790 			 struct thread_struct *thread)
791 {
792 	struct multicall_space mcs;
793 
794 	mcs = xen_mc_entry(0);
795 	MULTI_stack_switch(mcs.mc, __KERNEL_DS, thread->sp0);
796 	xen_mc_issue(PARAVIRT_LAZY_CPU);
797 }
798 
799 static void xen_set_iopl_mask(unsigned mask)
800 {
801 	struct physdev_set_iopl set_iopl;
802 
803 	/* Force the change at ring 0. */
804 	set_iopl.iopl = (mask == 0) ? 1 : (mask >> 12) & 3;
805 	HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl);
806 }
807 
808 static void xen_io_delay(void)
809 {
810 }
811 
812 #ifdef CONFIG_X86_LOCAL_APIC
813 static unsigned long xen_set_apic_id(unsigned int x)
814 {
815 	WARN_ON(1);
816 	return x;
817 }
818 static unsigned int xen_get_apic_id(unsigned long x)
819 {
820 	return ((x)>>24) & 0xFFu;
821 }
822 static u32 xen_apic_read(u32 reg)
823 {
824 	struct xen_platform_op op = {
825 		.cmd = XENPF_get_cpuinfo,
826 		.interface_version = XENPF_INTERFACE_VERSION,
827 		.u.pcpu_info.xen_cpuid = 0,
828 	};
829 	int ret = 0;
830 
831 	/* Shouldn't need this as APIC is turned off for PV, and we only
832 	 * get called on the bootup processor. But just in case. */
833 	if (!xen_initial_domain() || smp_processor_id())
834 		return 0;
835 
836 	if (reg == APIC_LVR)
837 		return 0x10;
838 
839 	if (reg != APIC_ID)
840 		return 0;
841 
842 	ret = HYPERVISOR_dom0_op(&op);
843 	if (ret)
844 		return 0;
845 
846 	return op.u.pcpu_info.apic_id << 24;
847 }
848 
849 static void xen_apic_write(u32 reg, u32 val)
850 {
851 	/* Warn to see if there's any stray references */
852 	WARN_ON(1);
853 }
854 
855 static u64 xen_apic_icr_read(void)
856 {
857 	return 0;
858 }
859 
860 static void xen_apic_icr_write(u32 low, u32 id)
861 {
862 	/* Warn to see if there's any stray references */
863 	WARN_ON(1);
864 }
865 
866 static void xen_apic_wait_icr_idle(void)
867 {
868         return;
869 }
870 
871 static u32 xen_safe_apic_wait_icr_idle(void)
872 {
873         return 0;
874 }
875 
876 static void set_xen_basic_apic_ops(void)
877 {
878 	apic->read = xen_apic_read;
879 	apic->write = xen_apic_write;
880 	apic->icr_read = xen_apic_icr_read;
881 	apic->icr_write = xen_apic_icr_write;
882 	apic->wait_icr_idle = xen_apic_wait_icr_idle;
883 	apic->safe_wait_icr_idle = xen_safe_apic_wait_icr_idle;
884 	apic->set_apic_id = xen_set_apic_id;
885 	apic->get_apic_id = xen_get_apic_id;
886 }
887 
888 #endif
889 
890 static void xen_clts(void)
891 {
892 	struct multicall_space mcs;
893 
894 	mcs = xen_mc_entry(0);
895 
896 	MULTI_fpu_taskswitch(mcs.mc, 0);
897 
898 	xen_mc_issue(PARAVIRT_LAZY_CPU);
899 }
900 
901 static DEFINE_PER_CPU(unsigned long, xen_cr0_value);
902 
903 static unsigned long xen_read_cr0(void)
904 {
905 	unsigned long cr0 = this_cpu_read(xen_cr0_value);
906 
907 	if (unlikely(cr0 == 0)) {
908 		cr0 = native_read_cr0();
909 		this_cpu_write(xen_cr0_value, cr0);
910 	}
911 
912 	return cr0;
913 }
914 
915 static void xen_write_cr0(unsigned long cr0)
916 {
917 	struct multicall_space mcs;
918 
919 	this_cpu_write(xen_cr0_value, cr0);
920 
921 	/* Only pay attention to cr0.TS; everything else is
922 	   ignored. */
923 	mcs = xen_mc_entry(0);
924 
925 	MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0);
926 
927 	xen_mc_issue(PARAVIRT_LAZY_CPU);
928 }
929 
930 static void xen_write_cr4(unsigned long cr4)
931 {
932 	cr4 &= ~X86_CR4_PGE;
933 	cr4 &= ~X86_CR4_PSE;
934 
935 	native_write_cr4(cr4);
936 }
937 
938 static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high)
939 {
940 	int ret;
941 
942 	ret = 0;
943 
944 	switch (msr) {
945 #ifdef CONFIG_X86_64
946 		unsigned which;
947 		u64 base;
948 
949 	case MSR_FS_BASE:		which = SEGBASE_FS; goto set;
950 	case MSR_KERNEL_GS_BASE:	which = SEGBASE_GS_USER; goto set;
951 	case MSR_GS_BASE:		which = SEGBASE_GS_KERNEL; goto set;
952 
953 	set:
954 		base = ((u64)high << 32) | low;
955 		if (HYPERVISOR_set_segment_base(which, base) != 0)
956 			ret = -EIO;
957 		break;
958 #endif
959 
960 	case MSR_STAR:
961 	case MSR_CSTAR:
962 	case MSR_LSTAR:
963 	case MSR_SYSCALL_MASK:
964 	case MSR_IA32_SYSENTER_CS:
965 	case MSR_IA32_SYSENTER_ESP:
966 	case MSR_IA32_SYSENTER_EIP:
967 		/* Fast syscall setup is all done in hypercalls, so
968 		   these are all ignored.  Stub them out here to stop
969 		   Xen console noise. */
970 		break;
971 
972 	case MSR_IA32_CR_PAT:
973 		if (smp_processor_id() == 0)
974 			xen_set_pat(((u64)high << 32) | low);
975 		break;
976 
977 	default:
978 		ret = native_write_msr_safe(msr, low, high);
979 	}
980 
981 	return ret;
982 }
983 
984 void xen_setup_shared_info(void)
985 {
986 	if (!xen_feature(XENFEAT_auto_translated_physmap)) {
987 		set_fixmap(FIX_PARAVIRT_BOOTMAP,
988 			   xen_start_info->shared_info);
989 
990 		HYPERVISOR_shared_info =
991 			(struct shared_info *)fix_to_virt(FIX_PARAVIRT_BOOTMAP);
992 	} else
993 		HYPERVISOR_shared_info =
994 			(struct shared_info *)__va(xen_start_info->shared_info);
995 
996 #ifndef CONFIG_SMP
997 	/* In UP this is as good a place as any to set up shared info */
998 	xen_setup_vcpu_info_placement();
999 #endif
1000 
1001 	xen_setup_mfn_list_list();
1002 }
1003 
1004 /* This is called once we have the cpu_possible_mask */
1005 void xen_setup_vcpu_info_placement(void)
1006 {
1007 	int cpu;
1008 
1009 	for_each_possible_cpu(cpu)
1010 		xen_vcpu_setup(cpu);
1011 
1012 	/* xen_vcpu_setup managed to place the vcpu_info within the
1013 	   percpu area for all cpus, so make use of it */
1014 	if (have_vcpu_info_placement) {
1015 		pv_irq_ops.save_fl = __PV_IS_CALLEE_SAVE(xen_save_fl_direct);
1016 		pv_irq_ops.restore_fl = __PV_IS_CALLEE_SAVE(xen_restore_fl_direct);
1017 		pv_irq_ops.irq_disable = __PV_IS_CALLEE_SAVE(xen_irq_disable_direct);
1018 		pv_irq_ops.irq_enable = __PV_IS_CALLEE_SAVE(xen_irq_enable_direct);
1019 		pv_mmu_ops.read_cr2 = xen_read_cr2_direct;
1020 	}
1021 }
1022 
1023 static unsigned xen_patch(u8 type, u16 clobbers, void *insnbuf,
1024 			  unsigned long addr, unsigned len)
1025 {
1026 	char *start, *end, *reloc;
1027 	unsigned ret;
1028 
1029 	start = end = reloc = NULL;
1030 
1031 #define SITE(op, x)							\
1032 	case PARAVIRT_PATCH(op.x):					\
1033 	if (have_vcpu_info_placement) {					\
1034 		start = (char *)xen_##x##_direct;			\
1035 		end = xen_##x##_direct_end;				\
1036 		reloc = xen_##x##_direct_reloc;				\
1037 	}								\
1038 	goto patch_site
1039 
1040 	switch (type) {
1041 		SITE(pv_irq_ops, irq_enable);
1042 		SITE(pv_irq_ops, irq_disable);
1043 		SITE(pv_irq_ops, save_fl);
1044 		SITE(pv_irq_ops, restore_fl);
1045 #undef SITE
1046 
1047 	patch_site:
1048 		if (start == NULL || (end-start) > len)
1049 			goto default_patch;
1050 
1051 		ret = paravirt_patch_insns(insnbuf, len, start, end);
1052 
1053 		/* Note: because reloc is assigned from something that
1054 		   appears to be an array, gcc assumes it's non-null,
1055 		   but doesn't know its relationship with start and
1056 		   end. */
1057 		if (reloc > start && reloc < end) {
1058 			int reloc_off = reloc - start;
1059 			long *relocp = (long *)(insnbuf + reloc_off);
1060 			long delta = start - (char *)addr;
1061 
1062 			*relocp += delta;
1063 		}
1064 		break;
1065 
1066 	default_patch:
1067 	default:
1068 		ret = paravirt_patch_default(type, clobbers, insnbuf,
1069 					     addr, len);
1070 		break;
1071 	}
1072 
1073 	return ret;
1074 }
1075 
1076 static const struct pv_info xen_info __initconst = {
1077 	.paravirt_enabled = 1,
1078 	.shared_kernel_pmd = 0,
1079 
1080 #ifdef CONFIG_X86_64
1081 	.extra_user_64bit_cs = FLAT_USER_CS64,
1082 #endif
1083 
1084 	.name = "Xen",
1085 };
1086 
1087 static const struct pv_init_ops xen_init_ops __initconst = {
1088 	.patch = xen_patch,
1089 };
1090 
1091 static const struct pv_cpu_ops xen_cpu_ops __initconst = {
1092 	.cpuid = xen_cpuid,
1093 
1094 	.set_debugreg = xen_set_debugreg,
1095 	.get_debugreg = xen_get_debugreg,
1096 
1097 	.clts = xen_clts,
1098 
1099 	.read_cr0 = xen_read_cr0,
1100 	.write_cr0 = xen_write_cr0,
1101 
1102 	.read_cr4 = native_read_cr4,
1103 	.read_cr4_safe = native_read_cr4_safe,
1104 	.write_cr4 = xen_write_cr4,
1105 
1106 	.wbinvd = native_wbinvd,
1107 
1108 	.read_msr = native_read_msr_safe,
1109 	.write_msr = xen_write_msr_safe,
1110 	.read_tsc = native_read_tsc,
1111 	.read_pmc = native_read_pmc,
1112 
1113 	.iret = xen_iret,
1114 	.irq_enable_sysexit = xen_sysexit,
1115 #ifdef CONFIG_X86_64
1116 	.usergs_sysret32 = xen_sysret32,
1117 	.usergs_sysret64 = xen_sysret64,
1118 #endif
1119 
1120 	.load_tr_desc = paravirt_nop,
1121 	.set_ldt = xen_set_ldt,
1122 	.load_gdt = xen_load_gdt,
1123 	.load_idt = xen_load_idt,
1124 	.load_tls = xen_load_tls,
1125 #ifdef CONFIG_X86_64
1126 	.load_gs_index = xen_load_gs_index,
1127 #endif
1128 
1129 	.alloc_ldt = xen_alloc_ldt,
1130 	.free_ldt = xen_free_ldt,
1131 
1132 	.store_gdt = native_store_gdt,
1133 	.store_idt = native_store_idt,
1134 	.store_tr = xen_store_tr,
1135 
1136 	.write_ldt_entry = xen_write_ldt_entry,
1137 	.write_gdt_entry = xen_write_gdt_entry,
1138 	.write_idt_entry = xen_write_idt_entry,
1139 	.load_sp0 = xen_load_sp0,
1140 
1141 	.set_iopl_mask = xen_set_iopl_mask,
1142 	.io_delay = xen_io_delay,
1143 
1144 	/* Xen takes care of %gs when switching to usermode for us */
1145 	.swapgs = paravirt_nop,
1146 
1147 	.start_context_switch = paravirt_start_context_switch,
1148 	.end_context_switch = xen_end_context_switch,
1149 };
1150 
1151 static const struct pv_apic_ops xen_apic_ops __initconst = {
1152 #ifdef CONFIG_X86_LOCAL_APIC
1153 	.startup_ipi_hook = paravirt_nop,
1154 #endif
1155 };
1156 
1157 static void xen_reboot(int reason)
1158 {
1159 	struct sched_shutdown r = { .reason = reason };
1160 
1161 	if (HYPERVISOR_sched_op(SCHEDOP_shutdown, &r))
1162 		BUG();
1163 }
1164 
1165 static void xen_restart(char *msg)
1166 {
1167 	xen_reboot(SHUTDOWN_reboot);
1168 }
1169 
1170 static void xen_emergency_restart(void)
1171 {
1172 	xen_reboot(SHUTDOWN_reboot);
1173 }
1174 
1175 static void xen_machine_halt(void)
1176 {
1177 	xen_reboot(SHUTDOWN_poweroff);
1178 }
1179 
1180 static void xen_machine_power_off(void)
1181 {
1182 	if (pm_power_off)
1183 		pm_power_off();
1184 	xen_reboot(SHUTDOWN_poweroff);
1185 }
1186 
1187 static void xen_crash_shutdown(struct pt_regs *regs)
1188 {
1189 	xen_reboot(SHUTDOWN_crash);
1190 }
1191 
1192 static int
1193 xen_panic_event(struct notifier_block *this, unsigned long event, void *ptr)
1194 {
1195 	xen_reboot(SHUTDOWN_crash);
1196 	return NOTIFY_DONE;
1197 }
1198 
1199 static struct notifier_block xen_panic_block = {
1200 	.notifier_call= xen_panic_event,
1201 };
1202 
1203 int xen_panic_handler_init(void)
1204 {
1205 	atomic_notifier_chain_register(&panic_notifier_list, &xen_panic_block);
1206 	return 0;
1207 }
1208 
1209 static const struct machine_ops xen_machine_ops __initconst = {
1210 	.restart = xen_restart,
1211 	.halt = xen_machine_halt,
1212 	.power_off = xen_machine_power_off,
1213 	.shutdown = xen_machine_halt,
1214 	.crash_shutdown = xen_crash_shutdown,
1215 	.emergency_restart = xen_emergency_restart,
1216 };
1217 
1218 /*
1219  * Set up the GDT and segment registers for -fstack-protector.  Until
1220  * we do this, we have to be careful not to call any stack-protected
1221  * function, which is most of the kernel.
1222  */
1223 static void __init xen_setup_stackprotector(void)
1224 {
1225 	pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry_boot;
1226 	pv_cpu_ops.load_gdt = xen_load_gdt_boot;
1227 
1228 	setup_stack_canary_segment(0);
1229 	switch_to_new_gdt(0);
1230 
1231 	pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry;
1232 	pv_cpu_ops.load_gdt = xen_load_gdt;
1233 }
1234 
1235 /* First C function to be called on Xen boot */
1236 asmlinkage void __init xen_start_kernel(void)
1237 {
1238 	struct physdev_set_iopl set_iopl;
1239 	int rc;
1240 	pgd_t *pgd;
1241 
1242 	if (!xen_start_info)
1243 		return;
1244 
1245 	xen_domain_type = XEN_PV_DOMAIN;
1246 
1247 	xen_setup_machphys_mapping();
1248 
1249 	/* Install Xen paravirt ops */
1250 	pv_info = xen_info;
1251 	pv_init_ops = xen_init_ops;
1252 	pv_cpu_ops = xen_cpu_ops;
1253 	pv_apic_ops = xen_apic_ops;
1254 
1255 	x86_init.resources.memory_setup = xen_memory_setup;
1256 	x86_init.oem.arch_setup = xen_arch_setup;
1257 	x86_init.oem.banner = xen_banner;
1258 
1259 	xen_init_time_ops();
1260 
1261 	/*
1262 	 * Set up some pagetable state before starting to set any ptes.
1263 	 */
1264 
1265 	xen_init_mmu_ops();
1266 
1267 	/* Prevent unwanted bits from being set in PTEs. */
1268 	__supported_pte_mask &= ~_PAGE_GLOBAL;
1269 #if 0
1270 	if (!xen_initial_domain())
1271 #endif
1272 		__supported_pte_mask &= ~(_PAGE_PWT | _PAGE_PCD);
1273 
1274 	__supported_pte_mask |= _PAGE_IOMAP;
1275 
1276 	/*
1277 	 * Prevent page tables from being allocated in highmem, even
1278 	 * if CONFIG_HIGHPTE is enabled.
1279 	 */
1280 	__userpte_alloc_gfp &= ~__GFP_HIGHMEM;
1281 
1282 	/* Work out if we support NX */
1283 	x86_configure_nx();
1284 
1285 	xen_setup_features();
1286 
1287 	/* Get mfn list */
1288 	if (!xen_feature(XENFEAT_auto_translated_physmap))
1289 		xen_build_dynamic_phys_to_machine();
1290 
1291 	/*
1292 	 * Set up kernel GDT and segment registers, mainly so that
1293 	 * -fstack-protector code can be executed.
1294 	 */
1295 	xen_setup_stackprotector();
1296 
1297 	xen_init_irq_ops();
1298 	xen_init_cpuid_mask();
1299 
1300 #ifdef CONFIG_X86_LOCAL_APIC
1301 	/*
1302 	 * set up the basic apic ops.
1303 	 */
1304 	set_xen_basic_apic_ops();
1305 #endif
1306 
1307 	if (xen_feature(XENFEAT_mmu_pt_update_preserve_ad)) {
1308 		pv_mmu_ops.ptep_modify_prot_start = xen_ptep_modify_prot_start;
1309 		pv_mmu_ops.ptep_modify_prot_commit = xen_ptep_modify_prot_commit;
1310 	}
1311 
1312 	machine_ops = xen_machine_ops;
1313 
1314 	/*
1315 	 * The only reliable way to retain the initial address of the
1316 	 * percpu gdt_page is to remember it here, so we can go and
1317 	 * mark it RW later, when the initial percpu area is freed.
1318 	 */
1319 	xen_initial_gdt = &per_cpu(gdt_page, 0);
1320 
1321 	xen_smp_init();
1322 
1323 #ifdef CONFIG_ACPI_NUMA
1324 	/*
1325 	 * The pages we from Xen are not related to machine pages, so
1326 	 * any NUMA information the kernel tries to get from ACPI will
1327 	 * be meaningless.  Prevent it from trying.
1328 	 */
1329 	acpi_numa = -1;
1330 #endif
1331 
1332 	pgd = (pgd_t *)xen_start_info->pt_base;
1333 
1334 	/* Don't do the full vcpu_info placement stuff until we have a
1335 	   possible map and a non-dummy shared_info. */
1336 	per_cpu(xen_vcpu, 0) = &HYPERVISOR_shared_info->vcpu_info[0];
1337 
1338 	local_irq_disable();
1339 	early_boot_irqs_disabled = true;
1340 
1341 	xen_raw_console_write("mapping kernel into physical memory\n");
1342 	pgd = xen_setup_kernel_pagetable(pgd, xen_start_info->nr_pages);
1343 	xen_ident_map_ISA();
1344 
1345 	/* Allocate and initialize top and mid mfn levels for p2m structure */
1346 	xen_build_mfn_list_list();
1347 
1348 	/* keep using Xen gdt for now; no urgent need to change it */
1349 
1350 #ifdef CONFIG_X86_32
1351 	pv_info.kernel_rpl = 1;
1352 	if (xen_feature(XENFEAT_supervisor_mode_kernel))
1353 		pv_info.kernel_rpl = 0;
1354 #else
1355 	pv_info.kernel_rpl = 0;
1356 #endif
1357 	/* set the limit of our address space */
1358 	xen_reserve_top();
1359 
1360 	/* We used to do this in xen_arch_setup, but that is too late on AMD
1361 	 * were early_cpu_init (run before ->arch_setup()) calls early_amd_init
1362 	 * which pokes 0xcf8 port.
1363 	 */
1364 	set_iopl.iopl = 1;
1365 	rc = HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl);
1366 	if (rc != 0)
1367 		xen_raw_printk("physdev_op failed %d\n", rc);
1368 
1369 #ifdef CONFIG_X86_32
1370 	/* set up basic CPUID stuff */
1371 	cpu_detect(&new_cpu_data);
1372 	new_cpu_data.hard_math = 1;
1373 	new_cpu_data.wp_works_ok = 1;
1374 	new_cpu_data.x86_capability[0] = cpuid_edx(1);
1375 #endif
1376 
1377 	/* Poke various useful things into boot_params */
1378 	boot_params.hdr.type_of_loader = (9 << 4) | 0;
1379 	boot_params.hdr.ramdisk_image = xen_start_info->mod_start
1380 		? __pa(xen_start_info->mod_start) : 0;
1381 	boot_params.hdr.ramdisk_size = xen_start_info->mod_len;
1382 	boot_params.hdr.cmd_line_ptr = __pa(xen_start_info->cmd_line);
1383 
1384 	if (!xen_initial_domain()) {
1385 		add_preferred_console("xenboot", 0, NULL);
1386 		add_preferred_console("tty", 0, NULL);
1387 		add_preferred_console("hvc", 0, NULL);
1388 		if (pci_xen)
1389 			x86_init.pci.arch_init = pci_xen_init;
1390 	} else {
1391 		const struct dom0_vga_console_info *info =
1392 			(void *)((char *)xen_start_info +
1393 				 xen_start_info->console.dom0.info_off);
1394 
1395 		xen_init_vga(info, xen_start_info->console.dom0.info_size);
1396 		xen_start_info->console.domU.mfn = 0;
1397 		xen_start_info->console.domU.evtchn = 0;
1398 
1399 		/* Make sure ACS will be enabled */
1400 		pci_request_acs();
1401 	}
1402 #ifdef CONFIG_PCI
1403 	/* PCI BIOS service won't work from a PV guest. */
1404 	pci_probe &= ~PCI_PROBE_BIOS;
1405 #endif
1406 	xen_raw_console_write("about to get started...\n");
1407 
1408 	xen_setup_runstate_info(0);
1409 
1410 	/* Start the world */
1411 #ifdef CONFIG_X86_32
1412 	i386_start_kernel();
1413 #else
1414 	x86_64_start_reservations((char *)__pa_symbol(&boot_params));
1415 #endif
1416 }
1417 
1418 static int init_hvm_pv_info(int *major, int *minor)
1419 {
1420 	uint32_t eax, ebx, ecx, edx, pages, msr, base;
1421 	u64 pfn;
1422 
1423 	base = xen_cpuid_base();
1424 	cpuid(base + 1, &eax, &ebx, &ecx, &edx);
1425 
1426 	*major = eax >> 16;
1427 	*minor = eax & 0xffff;
1428 	printk(KERN_INFO "Xen version %d.%d.\n", *major, *minor);
1429 
1430 	cpuid(base + 2, &pages, &msr, &ecx, &edx);
1431 
1432 	pfn = __pa(hypercall_page);
1433 	wrmsr_safe(msr, (u32)pfn, (u32)(pfn >> 32));
1434 
1435 	xen_setup_features();
1436 
1437 	pv_info.name = "Xen HVM";
1438 
1439 	xen_domain_type = XEN_HVM_DOMAIN;
1440 
1441 	return 0;
1442 }
1443 
1444 void __ref xen_hvm_init_shared_info(void)
1445 {
1446 	int cpu;
1447 	struct xen_add_to_physmap xatp;
1448 	static struct shared_info *shared_info_page = 0;
1449 
1450 	if (!shared_info_page)
1451 		shared_info_page = (struct shared_info *)
1452 			extend_brk(PAGE_SIZE, PAGE_SIZE);
1453 	xatp.domid = DOMID_SELF;
1454 	xatp.idx = 0;
1455 	xatp.space = XENMAPSPACE_shared_info;
1456 	xatp.gpfn = __pa(shared_info_page) >> PAGE_SHIFT;
1457 	if (HYPERVISOR_memory_op(XENMEM_add_to_physmap, &xatp))
1458 		BUG();
1459 
1460 	HYPERVISOR_shared_info = (struct shared_info *)shared_info_page;
1461 
1462 	/* xen_vcpu is a pointer to the vcpu_info struct in the shared_info
1463 	 * page, we use it in the event channel upcall and in some pvclock
1464 	 * related functions. We don't need the vcpu_info placement
1465 	 * optimizations because we don't use any pv_mmu or pv_irq op on
1466 	 * HVM.
1467 	 * When xen_hvm_init_shared_info is run at boot time only vcpu 0 is
1468 	 * online but xen_hvm_init_shared_info is run at resume time too and
1469 	 * in that case multiple vcpus might be online. */
1470 	for_each_online_cpu(cpu) {
1471 		per_cpu(xen_vcpu, cpu) = &HYPERVISOR_shared_info->vcpu_info[cpu];
1472 	}
1473 }
1474 
1475 #ifdef CONFIG_XEN_PVHVM
1476 static int __cpuinit xen_hvm_cpu_notify(struct notifier_block *self,
1477 				    unsigned long action, void *hcpu)
1478 {
1479 	int cpu = (long)hcpu;
1480 	switch (action) {
1481 	case CPU_UP_PREPARE:
1482 		xen_vcpu_setup(cpu);
1483 		if (xen_have_vector_callback)
1484 			xen_init_lock_cpu(cpu);
1485 		break;
1486 	default:
1487 		break;
1488 	}
1489 	return NOTIFY_OK;
1490 }
1491 
1492 static struct notifier_block xen_hvm_cpu_notifier __cpuinitdata = {
1493 	.notifier_call	= xen_hvm_cpu_notify,
1494 };
1495 
1496 static void __init xen_hvm_guest_init(void)
1497 {
1498 	int r;
1499 	int major, minor;
1500 
1501 	r = init_hvm_pv_info(&major, &minor);
1502 	if (r < 0)
1503 		return;
1504 
1505 	xen_hvm_init_shared_info();
1506 
1507 	if (xen_feature(XENFEAT_hvm_callback_vector))
1508 		xen_have_vector_callback = 1;
1509 	xen_hvm_smp_init();
1510 	register_cpu_notifier(&xen_hvm_cpu_notifier);
1511 	xen_unplug_emulated_devices();
1512 	x86_init.irqs.intr_init = xen_init_IRQ;
1513 	xen_hvm_init_time_ops();
1514 	xen_hvm_init_mmu_ops();
1515 }
1516 
1517 static bool __init xen_hvm_platform(void)
1518 {
1519 	if (xen_pv_domain())
1520 		return false;
1521 
1522 	if (!xen_cpuid_base())
1523 		return false;
1524 
1525 	return true;
1526 }
1527 
1528 bool xen_hvm_need_lapic(void)
1529 {
1530 	if (xen_pv_domain())
1531 		return false;
1532 	if (!xen_hvm_domain())
1533 		return false;
1534 	if (xen_feature(XENFEAT_hvm_pirqs) && xen_have_vector_callback)
1535 		return false;
1536 	return true;
1537 }
1538 EXPORT_SYMBOL_GPL(xen_hvm_need_lapic);
1539 
1540 const struct hypervisor_x86 x86_hyper_xen_hvm __refconst = {
1541 	.name			= "Xen HVM",
1542 	.detect			= xen_hvm_platform,
1543 	.init_platform		= xen_hvm_guest_init,
1544 };
1545 EXPORT_SYMBOL(x86_hyper_xen_hvm);
1546 #endif
1547