1/*
2 *
3 *	Trampoline.S	Derived from Setup.S by Linus Torvalds
4 *
5 *	4 Jan 1997 Michael Chastain: changed to gnu as.
6 *	15 Sept 2005 Eric Biederman: 64bit PIC support
7 *
8 *	Entry: CS:IP point to the start of our code, we are
9 *	in real mode with no stack, but the rest of the
10 *	trampoline page to make our stack and everything else
11 *	is a mystery.
12 *
13 *	On entry to trampoline_start, the processor is in real mode
14 *	with 16-bit addressing and 16-bit data.  CS has some value
15 *	and IP is zero.  Thus, data addresses need to be absolute
16 *	(no relocation) and are taken with regard to r_base.
17 *
18 *	With the addition of trampoline_level4_pgt this code can
19 *	now enter a 64bit kernel that lives at arbitrary 64bit
20 *	physical addresses.
21 *
22 *	If you work on this file, check the object module with objdump
23 *	--full-contents --reloc to make sure there are no relocation
24 *	entries.
25 */
26
27#include <linux/linkage.h>
28#include <asm/pgtable_types.h>
29#include <asm/page_types.h>
30#include <asm/msr.h>
31#include <asm/segment.h>
32#include <asm/processor-flags.h>
33#include <asm/realmode.h>
34#include "realmode.h"
35
36	.text
37	.code16
38
39	.balign	PAGE_SIZE
40ENTRY(trampoline_start)
41	cli			# We should be safe anyway
42	wbinvd
43
44	LJMPW_RM(1f)
451:
46	mov	%cs, %ax	# Code and data in the same place
47	mov	%ax, %ds
48	mov	%ax, %es
49	mov	%ax, %ss
50
51	movl	$0xA5A5A5A5, trampoline_status
52	# write marker for master knows we're running
53
54	# Setup stack
55	movl	$rm_stack_end, %esp
56
57	call	verify_cpu		# Verify the cpu supports long mode
58	testl   %eax, %eax		# Check for return code
59	jnz	no_longmode
60
61	/*
62	 * GDT tables in non default location kernel can be beyond 16MB and
63	 * lgdt will not be able to load the address as in real mode default
64	 * operand size is 16bit. Use lgdtl instead to force operand size
65	 * to 32 bit.
66	 */
67
68	lidtl	tr_idt	# load idt with 0, 0
69	lgdtl	tr_gdt	# load gdt with whatever is appropriate
70
71	movw	$__KERNEL_DS, %dx	# Data segment descriptor
72
73	# Enable protected mode
74	movl	$X86_CR0_PE, %eax	# protected mode (PE) bit
75	movl	%eax, %cr0		# into protected mode
76
77	# flush prefetch and jump to startup_32
78	ljmpl	$__KERNEL32_CS, $pa_startup_32
79
80no_longmode:
81	hlt
82	jmp no_longmode
83#include "../kernel/verify_cpu.S"
84
85	.section ".text32","ax"
86	.code32
87	.balign 4
88ENTRY(startup_32)
89	movl	%edx, %ss
90	addl	$pa_real_mode_base, %esp
91	movl	%edx, %ds
92	movl	%edx, %es
93	movl	%edx, %fs
94	movl	%edx, %gs
95
96	/*
97	 * Check for memory encryption support. This is a safety net in
98	 * case BIOS hasn't done the necessary step of setting the bit in
99	 * the MSR for this AP. If SME is active and we've gotten this far
100	 * then it is safe for us to set the MSR bit and continue. If we
101	 * don't we'll eventually crash trying to execute encrypted
102	 * instructions.
103	 */
104	bt	$TH_FLAGS_SME_ACTIVE_BIT, pa_tr_flags
105	jnc	.Ldone
106	movl	$MSR_K8_SYSCFG, %ecx
107	rdmsr
108	bts	$MSR_K8_SYSCFG_MEM_ENCRYPT_BIT, %eax
109	jc	.Ldone
110
111	/*
112	 * Memory encryption is enabled but the SME enable bit for this
113	 * CPU has has not been set.  It is safe to set it, so do so.
114	 */
115	wrmsr
116.Ldone:
117
118	movl	pa_tr_cr4, %eax
119	movl	%eax, %cr4		# Enable PAE mode
120
121	# Setup trampoline 4 level pagetables
122	movl	$pa_trampoline_pgd, %eax
123	movl	%eax, %cr3
124
125	# Set up EFER
126	movl	pa_tr_efer, %eax
127	movl	pa_tr_efer + 4, %edx
128	movl	$MSR_EFER, %ecx
129	wrmsr
130
131	# Enable paging and in turn activate Long Mode
132	movl	$(X86_CR0_PG | X86_CR0_WP | X86_CR0_PE), %eax
133	movl	%eax, %cr0
134
135	/*
136	 * At this point we're in long mode but in 32bit compatibility mode
137	 * with EFER.LME = 1, CS.L = 0, CS.D = 1 (and in turn
138	 * EFER.LMA = 1). Now we want to jump in 64bit mode, to do that we use
139	 * the new gdt/idt that has __KERNEL_CS with CS.L = 1.
140	 */
141	ljmpl	$__KERNEL_CS, $pa_startup_64
142
143	.section ".text64","ax"
144	.code64
145	.balign 4
146ENTRY(startup_64)
147	# Now jump into the kernel using virtual addresses
148	jmpq	*tr_start(%rip)
149
150	.section ".rodata","a"
151	# Duplicate the global descriptor table
152	# so the kernel can live anywhere
153	.balign	16
154	.globl tr_gdt
155tr_gdt:
156	.short	tr_gdt_end - tr_gdt - 1	# gdt limit
157	.long	pa_tr_gdt
158	.short	0
159	.quad	0x00cf9b000000ffff	# __KERNEL32_CS
160	.quad	0x00af9b000000ffff	# __KERNEL_CS
161	.quad	0x00cf93000000ffff	# __KERNEL_DS
162tr_gdt_end:
163
164	.bss
165	.balign	PAGE_SIZE
166GLOBAL(trampoline_pgd)		.space	PAGE_SIZE
167
168	.balign	8
169GLOBAL(trampoline_header)
170	tr_start:		.space	8
171	GLOBAL(tr_efer)		.space	8
172	GLOBAL(tr_cr4)		.space	4
173	GLOBAL(tr_flags)	.space	4
174END(trampoline_header)
175
176#include "trampoline_common.S"
177