1/*
2 *
3 *	Trampoline.S	Derived from Setup.S by Linus Torvalds
4 *
5 *	4 Jan 1997 Michael Chastain: changed to gnu as.
6 *	15 Sept 2005 Eric Biederman: 64bit PIC support
7 *
8 *	Entry: CS:IP point to the start of our code, we are
9 *	in real mode with no stack, but the rest of the
10 *	trampoline page to make our stack and everything else
11 *	is a mystery.
12 *
13 *	On entry to trampoline_start, the processor is in real mode
14 *	with 16-bit addressing and 16-bit data.  CS has some value
15 *	and IP is zero.  Thus, data addresses need to be absolute
16 *	(no relocation) and are taken with regard to r_base.
17 *
18 *	With the addition of trampoline_level4_pgt this code can
19 *	now enter a 64bit kernel that lives at arbitrary 64bit
20 *	physical addresses.
21 *
22 *	If you work on this file, check the object module with objdump
23 *	--full-contents --reloc to make sure there are no relocation
24 *	entries.
25 */
26
27#include <linux/linkage.h>
28#include <linux/init.h>
29#include <asm/pgtable_types.h>
30#include <asm/page_types.h>
31#include <asm/msr.h>
32#include <asm/segment.h>
33#include <asm/processor-flags.h>
34#include "realmode.h"
35
36	.text
37	.code16
38
39	.balign	PAGE_SIZE
40ENTRY(trampoline_start)
41	cli			# We should be safe anyway
42	wbinvd
43
44	LJMPW_RM(1f)
451:
46	mov	%cs, %ax	# Code and data in the same place
47	mov	%ax, %ds
48	mov	%ax, %es
49	mov	%ax, %ss
50
51	movl	$0xA5A5A5A5, trampoline_status
52	# write marker for master knows we're running
53
54	# Setup stack
55	movl	$rm_stack_end, %esp
56
57	call	verify_cpu		# Verify the cpu supports long mode
58	testl   %eax, %eax		# Check for return code
59	jnz	no_longmode
60
61	/*
62	 * GDT tables in non default location kernel can be beyond 16MB and
63	 * lgdt will not be able to load the address as in real mode default
64	 * operand size is 16bit. Use lgdtl instead to force operand size
65	 * to 32 bit.
66	 */
67
68	lidtl	tr_idt	# load idt with 0, 0
69	lgdtl	tr_gdt	# load gdt with whatever is appropriate
70
71	movw	$__KERNEL_DS, %dx	# Data segment descriptor
72
73	# Enable protected mode
74	movl	$X86_CR0_PE, %eax	# protected mode (PE) bit
75	movl	%eax, %cr0		# into protected mode
76
77	# flush prefetch and jump to startup_32
78	ljmpl	$__KERNEL32_CS, $pa_startup_32
79
80no_longmode:
81	hlt
82	jmp no_longmode
83#include "../kernel/verify_cpu.S"
84
85	.section ".text32","ax"
86	.code32
87	.balign 4
88ENTRY(startup_32)
89	movl	%edx, %ss
90	addl	$pa_real_mode_base, %esp
91	movl	%edx, %ds
92	movl	%edx, %es
93	movl	%edx, %fs
94	movl	%edx, %gs
95
96	movl	pa_tr_cr4, %eax
97	movl	%eax, %cr4		# Enable PAE mode
98
99	# Setup trampoline 4 level pagetables
100	movl	$pa_trampoline_pgd, %eax
101	movl	%eax, %cr3
102
103	# Set up EFER
104	movl	pa_tr_efer, %eax
105	movl	pa_tr_efer + 4, %edx
106	movl	$MSR_EFER, %ecx
107	wrmsr
108
109	# Enable paging and in turn activate Long Mode
110	movl	$(X86_CR0_PG | X86_CR0_WP | X86_CR0_PE), %eax
111	movl	%eax, %cr0
112
113	/*
114	 * At this point we're in long mode but in 32bit compatibility mode
115	 * with EFER.LME = 1, CS.L = 0, CS.D = 1 (and in turn
116	 * EFER.LMA = 1). Now we want to jump in 64bit mode, to do that we use
117	 * the new gdt/idt that has __KERNEL_CS with CS.L = 1.
118	 */
119	ljmpl	$__KERNEL_CS, $pa_startup_64
120
121	.section ".text64","ax"
122	.code64
123	.balign 4
124ENTRY(startup_64)
125	# Now jump into the kernel using virtual addresses
126	jmpq	*tr_start(%rip)
127
128	.section ".rodata","a"
129	# Duplicate the global descriptor table
130	# so the kernel can live anywhere
131	.balign	16
132	.globl tr_gdt
133tr_gdt:
134	.short	tr_gdt_end - tr_gdt - 1	# gdt limit
135	.long	pa_tr_gdt
136	.short	0
137	.quad	0x00cf9b000000ffff	# __KERNEL32_CS
138	.quad	0x00af9b000000ffff	# __KERNEL_CS
139	.quad	0x00cf93000000ffff	# __KERNEL_DS
140tr_gdt_end:
141
142	.bss
143	.balign	PAGE_SIZE
144GLOBAL(trampoline_pgd)		.space	PAGE_SIZE
145
146	.balign	8
147GLOBAL(trampoline_header)
148	tr_start:		.space	8
149	GLOBAL(tr_efer)		.space	8
150	GLOBAL(tr_cr4)		.space	4
151END(trampoline_header)
152
153#include "trampoline_common.S"
154