1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 *
4 *	Trampoline.S	Derived from Setup.S by Linus Torvalds
5 *
6 *	4 Jan 1997 Michael Chastain: changed to gnu as.
7 *	15 Sept 2005 Eric Biederman: 64bit PIC support
8 *
9 *	Entry: CS:IP point to the start of our code, we are
10 *	in real mode with no stack, but the rest of the
11 *	trampoline page to make our stack and everything else
12 *	is a mystery.
13 *
14 *	On entry to trampoline_start, the processor is in real mode
15 *	with 16-bit addressing and 16-bit data.  CS has some value
16 *	and IP is zero.  Thus, data addresses need to be absolute
17 *	(no relocation) and are taken with regard to r_base.
18 *
19 *	With the addition of trampoline_level4_pgt this code can
20 *	now enter a 64bit kernel that lives at arbitrary 64bit
21 *	physical addresses.
22 *
23 *	If you work on this file, check the object module with objdump
24 *	--full-contents --reloc to make sure there are no relocation
25 *	entries.
26 */
27
28#include <linux/linkage.h>
29#include <asm/pgtable_types.h>
30#include <asm/page_types.h>
31#include <asm/msr.h>
32#include <asm/segment.h>
33#include <asm/processor-flags.h>
34#include <asm/realmode.h>
35#include "realmode.h"
36
37	.text
38	.code16
39
40	.balign	PAGE_SIZE
41ENTRY(trampoline_start)
42	cli			# We should be safe anyway
43	wbinvd
44
45	LJMPW_RM(1f)
461:
47	mov	%cs, %ax	# Code and data in the same place
48	mov	%ax, %ds
49	mov	%ax, %es
50	mov	%ax, %ss
51
52	# Setup stack
53	movl	$rm_stack_end, %esp
54
55	call	verify_cpu		# Verify the cpu supports long mode
56	testl   %eax, %eax		# Check for return code
57	jnz	no_longmode
58
59	/*
60	 * GDT tables in non default location kernel can be beyond 16MB and
61	 * lgdt will not be able to load the address as in real mode default
62	 * operand size is 16bit. Use lgdtl instead to force operand size
63	 * to 32 bit.
64	 */
65
66	lidtl	tr_idt	# load idt with 0, 0
67	lgdtl	tr_gdt	# load gdt with whatever is appropriate
68
69	movw	$__KERNEL_DS, %dx	# Data segment descriptor
70
71	# Enable protected mode
72	movl	$X86_CR0_PE, %eax	# protected mode (PE) bit
73	movl	%eax, %cr0		# into protected mode
74
75	# flush prefetch and jump to startup_32
76	ljmpl	$__KERNEL32_CS, $pa_startup_32
77
78no_longmode:
79	hlt
80	jmp no_longmode
81#include "../kernel/verify_cpu.S"
82
83	.section ".text32","ax"
84	.code32
85	.balign 4
86ENTRY(startup_32)
87	movl	%edx, %ss
88	addl	$pa_real_mode_base, %esp
89	movl	%edx, %ds
90	movl	%edx, %es
91	movl	%edx, %fs
92	movl	%edx, %gs
93
94	/*
95	 * Check for memory encryption support. This is a safety net in
96	 * case BIOS hasn't done the necessary step of setting the bit in
97	 * the MSR for this AP. If SME is active and we've gotten this far
98	 * then it is safe for us to set the MSR bit and continue. If we
99	 * don't we'll eventually crash trying to execute encrypted
100	 * instructions.
101	 */
102	btl	$TH_FLAGS_SME_ACTIVE_BIT, pa_tr_flags
103	jnc	.Ldone
104	movl	$MSR_K8_SYSCFG, %ecx
105	rdmsr
106	bts	$MSR_K8_SYSCFG_MEM_ENCRYPT_BIT, %eax
107	jc	.Ldone
108
109	/*
110	 * Memory encryption is enabled but the SME enable bit for this
111	 * CPU has has not been set.  It is safe to set it, so do so.
112	 */
113	wrmsr
114.Ldone:
115
116	movl	pa_tr_cr4, %eax
117	movl	%eax, %cr4		# Enable PAE mode
118
119	# Setup trampoline 4 level pagetables
120	movl	$pa_trampoline_pgd, %eax
121	movl	%eax, %cr3
122
123	# Set up EFER
124	movl	pa_tr_efer, %eax
125	movl	pa_tr_efer + 4, %edx
126	movl	$MSR_EFER, %ecx
127	wrmsr
128
129	# Enable paging and in turn activate Long Mode
130	movl	$(X86_CR0_PG | X86_CR0_WP | X86_CR0_PE), %eax
131	movl	%eax, %cr0
132
133	/*
134	 * At this point we're in long mode but in 32bit compatibility mode
135	 * with EFER.LME = 1, CS.L = 0, CS.D = 1 (and in turn
136	 * EFER.LMA = 1). Now we want to jump in 64bit mode, to do that we use
137	 * the new gdt/idt that has __KERNEL_CS with CS.L = 1.
138	 */
139	ljmpl	$__KERNEL_CS, $pa_startup_64
140
141	.section ".text64","ax"
142	.code64
143	.balign 4
144ENTRY(startup_64)
145	# Now jump into the kernel using virtual addresses
146	jmpq	*tr_start(%rip)
147
148	.section ".rodata","a"
149	# Duplicate the global descriptor table
150	# so the kernel can live anywhere
151	.balign	16
152	.globl tr_gdt
153tr_gdt:
154	.short	tr_gdt_end - tr_gdt - 1	# gdt limit
155	.long	pa_tr_gdt
156	.short	0
157	.quad	0x00cf9b000000ffff	# __KERNEL32_CS
158	.quad	0x00af9b000000ffff	# __KERNEL_CS
159	.quad	0x00cf93000000ffff	# __KERNEL_DS
160tr_gdt_end:
161
162	.bss
163	.balign	PAGE_SIZE
164GLOBAL(trampoline_pgd)		.space	PAGE_SIZE
165
166	.balign	8
167GLOBAL(trampoline_header)
168	tr_start:		.space	8
169	GLOBAL(tr_efer)		.space	8
170	GLOBAL(tr_cr4)		.space	4
171	GLOBAL(tr_flags)	.space	4
172END(trampoline_header)
173
174#include "trampoline_common.S"
175