1 /* 2 * This file is subject to the terms and conditions of the GNU General Public 3 * License. See the file "COPYING" in the main directory of this archive 4 * for more details. 5 * 6 * SGI UV IRQ functions 7 * 8 * Copyright (C) 2008 Silicon Graphics, Inc. All rights reserved. 9 */ 10 11 #include <linux/export.h> 12 #include <linux/rbtree.h> 13 #include <linux/slab.h> 14 #include <linux/irq.h> 15 16 #include <asm/irqdomain.h> 17 #include <asm/apic.h> 18 #include <asm/uv/uv_irq.h> 19 #include <asm/uv/uv_hub.h> 20 21 /* MMR offset and pnode of hub sourcing interrupts for a given irq */ 22 struct uv_irq_2_mmr_pnode { 23 unsigned long offset; 24 int pnode; 25 }; 26 27 static void uv_program_mmr(struct irq_cfg *cfg, struct uv_irq_2_mmr_pnode *info) 28 { 29 unsigned long mmr_value; 30 struct uv_IO_APIC_route_entry *entry; 31 32 BUILD_BUG_ON(sizeof(struct uv_IO_APIC_route_entry) != 33 sizeof(unsigned long)); 34 35 mmr_value = 0; 36 entry = (struct uv_IO_APIC_route_entry *)&mmr_value; 37 entry->vector = cfg->vector; 38 entry->delivery_mode = apic->irq_delivery_mode; 39 entry->dest_mode = apic->irq_dest_mode; 40 entry->polarity = 0; 41 entry->trigger = 0; 42 entry->mask = 0; 43 entry->dest = cfg->dest_apicid; 44 45 uv_write_global_mmr64(info->pnode, info->offset, mmr_value); 46 } 47 48 static void uv_noop(struct irq_data *data) { } 49 50 static void uv_ack_apic(struct irq_data *data) 51 { 52 ack_APIC_irq(); 53 } 54 55 static int 56 uv_set_irq_affinity(struct irq_data *data, const struct cpumask *mask, 57 bool force) 58 { 59 struct irq_data *parent = data->parent_data; 60 struct irq_cfg *cfg = irqd_cfg(data); 61 int ret; 62 63 ret = parent->chip->irq_set_affinity(parent, mask, force); 64 if (ret >= 0) { 65 uv_program_mmr(cfg, data->chip_data); 66 send_cleanup_vector(cfg); 67 } 68 69 return ret; 70 } 71 72 static struct irq_chip uv_irq_chip = { 73 .name = "UV-CORE", 74 .irq_mask = uv_noop, 75 .irq_unmask = uv_noop, 76 .irq_eoi = uv_ack_apic, 77 .irq_set_affinity = uv_set_irq_affinity, 78 }; 79 80 static int uv_domain_alloc(struct irq_domain *domain, unsigned int virq, 81 unsigned int nr_irqs, void *arg) 82 { 83 struct uv_irq_2_mmr_pnode *chip_data; 84 struct irq_alloc_info *info = arg; 85 struct irq_data *irq_data = irq_domain_get_irq_data(domain, virq); 86 int ret; 87 88 if (nr_irqs > 1 || !info || info->type != X86_IRQ_ALLOC_TYPE_UV) 89 return -EINVAL; 90 91 chip_data = kmalloc_node(sizeof(*chip_data), GFP_KERNEL, 92 irq_data_get_node(irq_data)); 93 if (!chip_data) 94 return -ENOMEM; 95 96 ret = irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, arg); 97 if (ret >= 0) { 98 if (info->uv_limit == UV_AFFINITY_CPU) 99 irq_set_status_flags(virq, IRQ_NO_BALANCING); 100 else 101 irq_set_status_flags(virq, IRQ_MOVE_PCNTXT); 102 103 chip_data->pnode = uv_blade_to_pnode(info->uv_blade); 104 chip_data->offset = info->uv_offset; 105 irq_domain_set_info(domain, virq, virq, &uv_irq_chip, chip_data, 106 handle_percpu_irq, NULL, info->uv_name); 107 } else { 108 kfree(chip_data); 109 } 110 111 return ret; 112 } 113 114 static void uv_domain_free(struct irq_domain *domain, unsigned int virq, 115 unsigned int nr_irqs) 116 { 117 struct irq_data *irq_data = irq_domain_get_irq_data(domain, virq); 118 119 BUG_ON(nr_irqs != 1); 120 kfree(irq_data->chip_data); 121 irq_clear_status_flags(virq, IRQ_MOVE_PCNTXT); 122 irq_clear_status_flags(virq, IRQ_NO_BALANCING); 123 irq_domain_free_irqs_top(domain, virq, nr_irqs); 124 } 125 126 /* 127 * Re-target the irq to the specified CPU and enable the specified MMR located 128 * on the specified blade to allow the sending of MSIs to the specified CPU. 129 */ 130 static int uv_domain_activate(struct irq_domain *domain, 131 struct irq_data *irq_data, bool reserve) 132 { 133 uv_program_mmr(irqd_cfg(irq_data), irq_data->chip_data); 134 return 0; 135 } 136 137 /* 138 * Disable the specified MMR located on the specified blade so that MSIs are 139 * longer allowed to be sent. 140 */ 141 static void uv_domain_deactivate(struct irq_domain *domain, 142 struct irq_data *irq_data) 143 { 144 unsigned long mmr_value; 145 struct uv_IO_APIC_route_entry *entry; 146 147 mmr_value = 0; 148 entry = (struct uv_IO_APIC_route_entry *)&mmr_value; 149 entry->mask = 1; 150 uv_program_mmr(irqd_cfg(irq_data), irq_data->chip_data); 151 } 152 153 static const struct irq_domain_ops uv_domain_ops = { 154 .alloc = uv_domain_alloc, 155 .free = uv_domain_free, 156 .activate = uv_domain_activate, 157 .deactivate = uv_domain_deactivate, 158 }; 159 160 static struct irq_domain *uv_get_irq_domain(void) 161 { 162 static struct irq_domain *uv_domain; 163 static DEFINE_MUTEX(uv_lock); 164 struct fwnode_handle *fn; 165 166 mutex_lock(&uv_lock); 167 if (uv_domain) 168 goto out; 169 170 fn = irq_domain_alloc_named_fwnode("UV-CORE"); 171 if (!fn) 172 goto out; 173 174 uv_domain = irq_domain_create_tree(fn, &uv_domain_ops, NULL); 175 irq_domain_free_fwnode(fn); 176 if (uv_domain) 177 uv_domain->parent = x86_vector_domain; 178 out: 179 mutex_unlock(&uv_lock); 180 181 return uv_domain; 182 } 183 184 /* 185 * Set up a mapping of an available irq and vector, and enable the specified 186 * MMR that defines the MSI that is to be sent to the specified CPU when an 187 * interrupt is raised. 188 */ 189 int uv_setup_irq(char *irq_name, int cpu, int mmr_blade, 190 unsigned long mmr_offset, int limit) 191 { 192 struct irq_alloc_info info; 193 struct irq_domain *domain = uv_get_irq_domain(); 194 195 if (!domain) 196 return -ENOMEM; 197 198 init_irq_alloc_info(&info, cpumask_of(cpu)); 199 info.type = X86_IRQ_ALLOC_TYPE_UV; 200 info.uv_limit = limit; 201 info.uv_blade = mmr_blade; 202 info.uv_offset = mmr_offset; 203 info.uv_name = irq_name; 204 205 return irq_domain_alloc_irqs(domain, 1, 206 uv_blade_to_memory_nid(mmr_blade), &info); 207 } 208 EXPORT_SYMBOL_GPL(uv_setup_irq); 209 210 /* 211 * Tear down a mapping of an irq and vector, and disable the specified MMR that 212 * defined the MSI that was to be sent to the specified CPU when an interrupt 213 * was raised. 214 * 215 * Set mmr_blade and mmr_offset to what was passed in on uv_setup_irq(). 216 */ 217 void uv_teardown_irq(unsigned int irq) 218 { 219 irq_domain_free_irqs(irq, 1); 220 } 221 EXPORT_SYMBOL_GPL(uv_teardown_irq); 222