1/* SPDX-License-Identifier: GPL-2.0 */ 2 3/* 4 * Copyright C 2016, Oracle and/or its affiliates. All rights reserved. 5 */ 6 7 .code32 8 .text 9#define _pa(x) ((x) - __START_KERNEL_map) 10 11#include <linux/elfnote.h> 12#include <linux/init.h> 13#include <linux/linkage.h> 14#include <asm/segment.h> 15#include <asm/asm.h> 16#include <asm/boot.h> 17#include <asm/processor-flags.h> 18#include <asm/msr.h> 19#include <asm/nospec-branch.h> 20#include <xen/interface/elfnote.h> 21 22 __HEAD 23 24/* 25 * Entry point for PVH guests. 26 * 27 * Xen ABI specifies the following register state when we come here: 28 * 29 * - `ebx`: contains the physical memory address where the loader has placed 30 * the boot start info structure. 31 * - `cr0`: bit 0 (PE) must be set. All the other writeable bits are cleared. 32 * - `cr4`: all bits are cleared. 33 * - `cs `: must be a 32-bit read/execute code segment with a base of ‘0’ 34 * and a limit of ‘0xFFFFFFFF’. The selector value is unspecified. 35 * - `ds`, `es`: must be a 32-bit read/write data segment with a base of 36 * ‘0’ and a limit of ‘0xFFFFFFFF’. The selector values are all 37 * unspecified. 38 * - `tr`: must be a 32-bit TSS (active) with a base of '0' and a limit 39 * of '0x67'. 40 * - `eflags`: bit 17 (VM) must be cleared. Bit 9 (IF) must be cleared. 41 * Bit 8 (TF) must be cleared. Other bits are all unspecified. 42 * 43 * All other processor registers and flag bits are unspecified. The OS is in 44 * charge of setting up it's own stack, GDT and IDT. 45 */ 46 47#define PVH_GDT_ENTRY_CS 1 48#define PVH_GDT_ENTRY_DS 2 49#define PVH_GDT_ENTRY_CANARY 3 50#define PVH_CS_SEL (PVH_GDT_ENTRY_CS * 8) 51#define PVH_DS_SEL (PVH_GDT_ENTRY_DS * 8) 52#define PVH_CANARY_SEL (PVH_GDT_ENTRY_CANARY * 8) 53 54SYM_CODE_START_LOCAL(pvh_start_xen) 55 cld 56 57 lgdt (_pa(gdt)) 58 59 mov $PVH_DS_SEL,%eax 60 mov %eax,%ds 61 mov %eax,%es 62 mov %eax,%ss 63 64 /* Stash hvm_start_info. */ 65 mov $_pa(pvh_start_info), %edi 66 mov %ebx, %esi 67 mov _pa(pvh_start_info_sz), %ecx 68 shr $2,%ecx 69 rep 70 movsl 71 72 mov $_pa(early_stack_end), %esp 73 74 /* Enable PAE mode. */ 75 mov %cr4, %eax 76 orl $X86_CR4_PAE, %eax 77 mov %eax, %cr4 78 79#ifdef CONFIG_X86_64 80 /* Enable Long mode. */ 81 mov $MSR_EFER, %ecx 82 rdmsr 83 btsl $_EFER_LME, %eax 84 wrmsr 85 86 /* Enable pre-constructed page tables. */ 87 mov $_pa(init_top_pgt), %eax 88 mov %eax, %cr3 89 mov $(X86_CR0_PG | X86_CR0_PE), %eax 90 mov %eax, %cr0 91 92 /* Jump to 64-bit mode. */ 93 ljmp $PVH_CS_SEL, $_pa(1f) 94 95 /* 64-bit entry point. */ 96 .code64 971: 98 /* Set base address in stack canary descriptor. */ 99 mov $MSR_GS_BASE,%ecx 100 mov $_pa(canary), %eax 101 xor %edx, %edx 102 wrmsr 103 104 call xen_prepare_pvh 105 106 /* startup_64 expects boot_params in %rsi. */ 107 mov $_pa(pvh_bootparams), %rsi 108 mov $_pa(startup_64), %rax 109 ANNOTATE_RETPOLINE_SAFE 110 jmp *%rax 111 112#else /* CONFIG_X86_64 */ 113 114 /* Set base address in stack canary descriptor. */ 115 movl $_pa(gdt_start),%eax 116 movl $_pa(canary),%ecx 117 movw %cx, (PVH_GDT_ENTRY_CANARY * 8) + 2(%eax) 118 shrl $16, %ecx 119 movb %cl, (PVH_GDT_ENTRY_CANARY * 8) + 4(%eax) 120 movb %ch, (PVH_GDT_ENTRY_CANARY * 8) + 7(%eax) 121 122 mov $PVH_CANARY_SEL,%eax 123 mov %eax,%gs 124 125 call mk_early_pgtbl_32 126 127 mov $_pa(initial_page_table), %eax 128 mov %eax, %cr3 129 130 mov %cr0, %eax 131 or $(X86_CR0_PG | X86_CR0_PE), %eax 132 mov %eax, %cr0 133 134 ljmp $PVH_CS_SEL, $1f 1351: 136 call xen_prepare_pvh 137 mov $_pa(pvh_bootparams), %esi 138 139 /* startup_32 doesn't expect paging and PAE to be on. */ 140 ljmp $PVH_CS_SEL, $_pa(2f) 1412: 142 mov %cr0, %eax 143 and $~X86_CR0_PG, %eax 144 mov %eax, %cr0 145 mov %cr4, %eax 146 and $~X86_CR4_PAE, %eax 147 mov %eax, %cr4 148 149 ljmp $PVH_CS_SEL, $_pa(startup_32) 150#endif 151SYM_CODE_END(pvh_start_xen) 152 153 .section ".init.data","aw" 154 .balign 8 155SYM_DATA_START_LOCAL(gdt) 156 .word gdt_end - gdt_start 157 .long _pa(gdt_start) 158 .word 0 159SYM_DATA_END(gdt) 160SYM_DATA_START_LOCAL(gdt_start) 161 .quad 0x0000000000000000 /* NULL descriptor */ 162#ifdef CONFIG_X86_64 163 .quad GDT_ENTRY(0xa09a, 0, 0xfffff) /* PVH_CS_SEL */ 164#else 165 .quad GDT_ENTRY(0xc09a, 0, 0xfffff) /* PVH_CS_SEL */ 166#endif 167 .quad GDT_ENTRY(0xc092, 0, 0xfffff) /* PVH_DS_SEL */ 168 .quad GDT_ENTRY(0x4090, 0, 0x18) /* PVH_CANARY_SEL */ 169SYM_DATA_END_LABEL(gdt_start, SYM_L_LOCAL, gdt_end) 170 171 .balign 16 172SYM_DATA_LOCAL(canary, .fill 48, 1, 0) 173 174SYM_DATA_START_LOCAL(early_stack) 175 .fill BOOT_STACK_SIZE, 1, 0 176SYM_DATA_END_LABEL(early_stack, SYM_L_LOCAL, early_stack_end) 177 178 ELFNOTE(Xen, XEN_ELFNOTE_PHYS32_ENTRY, 179 _ASM_PTR (pvh_start_xen - __START_KERNEL_map)) 180