xref: /openbmc/linux/arch/x86/platform/ce4100/falconfalls.dts (revision df2634f43f5106947f3735a0b61a6527a4b278cd) 
1/*
2 * CE4100 on Falcon Falls
3 *
4 * (c) Copyright 2010 Intel Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; version 2 of the License.
9 */
10/dts-v1/;
11/ {
12	model = "intel,falconfalls";
13	compatible = "intel,falconfalls";
14	#address-cells = <1>;
15	#size-cells = <1>;
16
17	cpus {
18		#address-cells = <1>;
19		#size-cells = <0>;
20
21		cpu@0 {
22			device_type = "cpu";
23			compatible = "intel,ce4100";
24			reg = <0>;
25			lapic = <&lapic0>;
26		};
27	};
28
29	soc@0 {
30		#address-cells = <1>;
31		#size-cells = <1>;
32		compatible = "intel,ce4100-cp";
33		ranges;
34
35		ioapic1: interrupt-controller@fec00000 {
36			#interrupt-cells = <2>;
37			compatible = "intel,ce4100-ioapic";
38			interrupt-controller;
39			reg = <0xfec00000 0x1000>;
40		};
41
42		timer@fed00000 {
43			compatible = "intel,ce4100-hpet";
44			reg = <0xfed00000 0x200>;
45		};
46
47		lapic0: interrupt-controller@fee00000 {
48			compatible = "intel,ce4100-lapic";
49			reg = <0xfee00000 0x1000>;
50		};
51
52		pci@3fc {
53			#address-cells = <3>;
54			#size-cells = <2>;
55			compatible = "intel,ce4100-pci", "pci";
56			device_type = "pci";
57			bus-range = <0 0>;
58			ranges = <0x2000000 0 0xbffff000 0xbffff000 0 0x1000
59				  0x2000000 0 0xdffe0000 0xdffe0000 0 0x1000
60				  0x0000000 0 0x0	 0x0	    0 0x100>;
61
62			/* Secondary IO-APIC */
63			ioapic2: interrupt-controller@0,1 {
64				#interrupt-cells = <2>;
65				compatible = "intel,ce4100-ioapic";
66				interrupt-controller;
67				reg = <0x100 0x0 0x0 0x0 0x0>;
68				assigned-addresses = <0x02000000 0x0 0xbffff000 0x0 0x1000>;
69			};
70
71			pci@1,0 {
72				#address-cells = <3>;
73				#size-cells = <2>;
74				compatible = "intel,ce4100-pci", "pci";
75				device_type = "pci";
76				bus-range = <1 1>;
77				ranges = <0x2000000 0 0xdffe0000 0x2000000 0 0xdffe0000 0 0x1000>;
78
79				interrupt-parent = <&ioapic2>;
80
81				display@2,0 {
82					compatible = "pci8086,2e5b.2",
83						   "pci8086,2e5b",
84						   "pciclass038000",
85						   "pciclass0380";
86
87					reg = <0x11000 0x0 0x0 0x0 0x0>;
88					interrupts = <0 1>;
89				};
90
91				multimedia@3,0 {
92					compatible = "pci8086,2e5c.2",
93						   "pci8086,2e5c",
94						   "pciclass048000",
95						   "pciclass0480";
96
97					reg = <0x11800 0x0 0x0 0x0 0x0>;
98					interrupts = <2 1>;
99				};
100
101				multimedia@4,0 {
102					compatible = "pci8086,2e5d.2",
103						   "pci8086,2e5d",
104						   "pciclass048000",
105						   "pciclass0480";
106
107					reg = <0x12000 0x0 0x0 0x0 0x0>;
108					interrupts = <4 1>;
109				};
110
111				multimedia@4,1 {
112					compatible = "pci8086,2e5e.2",
113						   "pci8086,2e5e",
114						   "pciclass048000",
115						   "pciclass0480";
116
117					reg = <0x12100 0x0 0x0 0x0 0x0>;
118					interrupts = <5 1>;
119				};
120
121				sound@6,0 {
122					compatible = "pci8086,2e5f.2",
123						   "pci8086,2e5f",
124						   "pciclass040100",
125						   "pciclass0401";
126
127					reg = <0x13000 0x0 0x0 0x0 0x0>;
128					interrupts = <6 1>;
129				};
130
131				sound@6,1 {
132					compatible = "pci8086,2e5f.2",
133						   "pci8086,2e5f",
134						   "pciclass040100",
135						   "pciclass0401";
136
137					reg = <0x13100 0x0 0x0 0x0 0x0>;
138					interrupts = <7 1>;
139				};
140
141				sound@6,2 {
142					compatible = "pci8086,2e60.2",
143						   "pci8086,2e60",
144						   "pciclass040100",
145						   "pciclass0401";
146
147					reg = <0x13200 0x0 0x0 0x0 0x0>;
148					interrupts = <8 1>;
149				};
150
151				display@8,0 {
152					compatible = "pci8086,2e61.2",
153						   "pci8086,2e61",
154						   "pciclass038000",
155						   "pciclass0380";
156
157					reg = <0x14000 0x0 0x0 0x0 0x0>;
158					interrupts = <9 1>;
159				};
160
161				display@8,1 {
162					compatible = "pci8086,2e62.2",
163						   "pci8086,2e62",
164						   "pciclass038000",
165						   "pciclass0380";
166
167					reg = <0x14100 0x0 0x0 0x0 0x0>;
168					interrupts = <10 1>;
169				};
170
171				multimedia@8,2 {
172					compatible = "pci8086,2e63.2",
173						   "pci8086,2e63",
174						   "pciclass048000",
175						   "pciclass0480";
176
177					reg = <0x14200 0x0 0x0 0x0 0x0>;
178					interrupts = <11 1>;
179				};
180
181				entertainment-encryption@9,0 {
182					compatible = "pci8086,2e64.2",
183						   "pci8086,2e64",
184						   "pciclass101000",
185						   "pciclass1010";
186
187					reg = <0x14800 0x0 0x0 0x0 0x0>;
188					interrupts = <12 1>;
189				};
190
191				localbus@a,0 {
192					compatible = "pci8086,2e65.2",
193						   "pci8086,2e65",
194						   "pciclassff0000",
195						   "pciclassff00";
196
197					reg = <0x15000 0x0 0x0 0x0 0x0>;
198				};
199
200				serial@b,0 {
201					compatible = "pci8086,2e66.2",
202						   "pci8086,2e66",
203						   "pciclass070003",
204						   "pciclass0700";
205
206					reg = <0x15800 0x0 0x0 0x0 0x0>;
207					interrupts = <14 1>;
208				};
209
210				gpio@b,1 {
211					compatible = "pci8086,2e67.2",
212						   "pci8086,2e67",
213						   "pciclassff0000",
214						   "pciclassff00";
215
216					#gpio-cells = <2>;
217					reg = <0x15900 0x0 0x0 0x0 0x0>;
218					interrupts = <15 1>;
219					gpio-controller;
220				};
221
222				i2c-controller@b,2 {
223					#address-cells = <2>;
224					#size-cells = <1>;
225					compatible = "pci8086,2e68.2",
226						   "pci8086,2e68",
227						   "pciclass,ff0000",
228						   "pciclass,ff00";
229
230					reg = <0x15a00 0x0 0x0 0x0 0x0>;
231					interrupts = <16 1>;
232					ranges = <0 0	0x02000000 0 0xdffe0500	0x100
233						  1 0	0x02000000 0 0xdffe0600	0x100
234						  2 0	0x02000000 0 0xdffe0700	0x100>;
235
236					i2c@0 {
237						#address-cells = <1>;
238						#size-cells = <0>;
239						compatible = "intel,ce4100-i2c-controller";
240						reg = <0 0 0x100>;
241					};
242
243					i2c@1 {
244						#address-cells = <1>;
245						#size-cells = <0>;
246						compatible = "intel,ce4100-i2c-controller";
247						reg = <1 0 0x100>;
248
249						gpio@26 {
250							#gpio-cells = <2>;
251							compatible = "ti,pcf8575";
252							reg = <0x26>;
253							gpio-controller;
254						};
255					};
256
257					i2c@2 {
258						#address-cells = <1>;
259						#size-cells = <0>;
260						compatible = "intel,ce4100-i2c-controller";
261						reg = <2 0 0x100>;
262
263						gpio@26 {
264							#gpio-cells = <2>;
265							compatible = "ti,pcf8575";
266							reg = <0x26>;
267							gpio-controller;
268						};
269					};
270				};
271
272				smard-card@b,3 {
273					compatible = "pci8086,2e69.2",
274						   "pci8086,2e69",
275						   "pciclass070500",
276						   "pciclass0705";
277
278					reg = <0x15b00 0x0 0x0 0x0 0x0>;
279					interrupts = <15 1>;
280				};
281
282				spi-controller@b,4 {
283					#address-cells = <1>;
284					#size-cells = <0>;
285					compatible =
286						"pci8086,2e6a.2",
287						"pci8086,2e6a",
288						"pciclass,ff0000",
289						"pciclass,ff00";
290
291					reg = <0x15c00 0x0 0x0 0x0 0x0>;
292					interrupts = <15 1>;
293
294					dac@0 {
295						compatible = "ti,pcm1755";
296						reg = <0>;
297						spi-max-frequency = <115200>;
298					};
299
300					dac@1 {
301						compatible = "ti,pcm1609a";
302						reg = <1>;
303						spi-max-frequency = <115200>;
304					};
305
306					eeprom@2 {
307						compatible = "atmel,at93c46";
308						reg = <2>;
309						spi-max-frequency = <115200>;
310					};
311				};
312
313				multimedia@b,7 {
314					compatible = "pci8086,2e6d.2",
315						   "pci8086,2e6d",
316						   "pciclassff0000",
317						   "pciclassff00";
318
319					reg = <0x15f00 0x0 0x0 0x0 0x0>;
320				};
321
322				ethernet@c,0 {
323					compatible = "pci8086,2e6e.2",
324						   "pci8086,2e6e",
325						   "pciclass020000",
326						   "pciclass0200";
327
328					reg = <0x16000 0x0 0x0 0x0 0x0>;
329					interrupts = <21 1>;
330				};
331
332				clock@c,1 {
333					compatible = "pci8086,2e6f.2",
334						   "pci8086,2e6f",
335						   "pciclassff0000",
336						   "pciclassff00";
337
338					reg = <0x16100 0x0 0x0 0x0 0x0>;
339					interrupts = <3 1>;
340				};
341
342				usb@d,0 {
343					compatible = "pci8086,2e70.2",
344						   "pci8086,2e70",
345						   "pciclass0c0320",
346						   "pciclass0c03";
347
348					reg = <0x16800 0x0 0x0 0x0 0x0>;
349					interrupts = <22 3>;
350				};
351
352				usb@d,1 {
353					compatible = "pci8086,2e70.2",
354						   "pci8086,2e70",
355						   "pciclass0c0320",
356						   "pciclass0c03";
357
358					reg = <0x16900 0x0 0x0 0x0 0x0>;
359					interrupts = <22 3>;
360				};
361
362				sata@e,0 {
363					compatible = "pci8086,2e71.0",
364						   "pci8086,2e71",
365						   "pciclass010601",
366						   "pciclass0106";
367
368					reg = <0x17000 0x0 0x0 0x0 0x0>;
369					interrupts = <23 3>;
370				};
371
372				flash@f,0 {
373					compatible = "pci8086,701.1",
374						   "pci8086,701",
375						   "pciclass050100",
376						   "pciclass0501";
377
378					reg = <0x17800 0x0 0x0 0x0 0x0>;
379					interrupts = <13 1>;
380				};
381
382				entertainment-encryption@10,0 {
383					compatible = "pci8086,702.1",
384						   "pci8086,702",
385						   "pciclass101000",
386						   "pciclass1010";
387
388					reg = <0x18000 0x0 0x0 0x0 0x0>;
389				};
390
391				co-processor@11,0 {
392					compatible = "pci8086,703.1",
393						   "pci8086,703",
394						   "pciclass0b4000",
395						   "pciclass0b40";
396
397					reg = <0x18800 0x0 0x0 0x0 0x0>;
398					interrupts = <1 1>;
399				};
400
401				multimedia@12,0 {
402					compatible = "pci8086,704.0",
403						   "pci8086,704",
404						   "pciclass048000",
405						   "pciclass0480";
406
407					reg = <0x19000 0x0 0x0 0x0 0x0>;
408				};
409			};
410
411			isa@1f,0 {
412				#address-cells = <2>;
413				#size-cells = <1>;
414				compatible = "isa";
415				ranges = <1 0 0 0 0 0x100>;
416
417				rtc@70 {
418					compatible = "intel,ce4100-rtc", "motorola,mc146818";
419					interrupts = <8 3>;
420					interrupt-parent = <&ioapic1>;
421					ctrl-reg = <2>;
422					freq-reg = <0x26>;
423					reg = <1 0x70 2>;
424				};
425			};
426		};
427	};
428};
429