1 /* 2 * Xen PCI - handle PCI (INTx) and MSI infrastructure calls for PV, HVM and 3 * initial domain support. We also handle the DSDT _PRT callbacks for GSI's 4 * used in HVM and initial domain mode (PV does not parse ACPI, so it has no 5 * concept of GSIs). Under PV we hook under the pnbbios API for IRQs and 6 * 0xcf8 PCI configuration read/write. 7 * 8 * Author: Ryan Wilson <hap9@epoch.ncsc.mil> 9 * Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> 10 * Stefano Stabellini <stefano.stabellini@eu.citrix.com> 11 */ 12 #include <linux/module.h> 13 #include <linux/init.h> 14 #include <linux/pci.h> 15 #include <linux/acpi.h> 16 17 #include <linux/io.h> 18 #include <asm/io_apic.h> 19 #include <asm/pci_x86.h> 20 21 #include <asm/xen/hypervisor.h> 22 23 #include <xen/features.h> 24 #include <xen/events.h> 25 #include <asm/xen/pci.h> 26 27 static int xen_pcifront_enable_irq(struct pci_dev *dev) 28 { 29 int rc; 30 int share = 1; 31 int pirq; 32 u8 gsi; 33 34 rc = pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &gsi); 35 if (rc < 0) { 36 dev_warn(&dev->dev, "Xen PCI: failed to read interrupt line: %d\n", 37 rc); 38 return rc; 39 } 40 /* In PV DomU the Xen PCI backend puts the PIRQ in the interrupt line.*/ 41 pirq = gsi; 42 43 if (gsi < NR_IRQS_LEGACY) 44 share = 0; 45 46 rc = xen_bind_pirq_gsi_to_irq(gsi, pirq, share, "pcifront"); 47 if (rc < 0) { 48 dev_warn(&dev->dev, "Xen PCI: failed to bind GSI%d (PIRQ%d) to IRQ: %d\n", 49 gsi, pirq, rc); 50 return rc; 51 } 52 53 dev->irq = rc; 54 dev_info(&dev->dev, "Xen PCI mapped GSI%d to IRQ%d\n", gsi, dev->irq); 55 return 0; 56 } 57 58 #ifdef CONFIG_ACPI 59 static int xen_register_pirq(u32 gsi, int gsi_override, int triggering, 60 bool set_pirq) 61 { 62 int rc, pirq = -1, irq = -1; 63 struct physdev_map_pirq map_irq; 64 int shareable = 0; 65 char *name; 66 67 irq = xen_irq_from_gsi(gsi); 68 if (irq > 0) 69 return irq; 70 71 if (set_pirq) 72 pirq = gsi; 73 74 map_irq.domid = DOMID_SELF; 75 map_irq.type = MAP_PIRQ_TYPE_GSI; 76 map_irq.index = gsi; 77 map_irq.pirq = pirq; 78 79 rc = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq); 80 if (rc) { 81 printk(KERN_WARNING "xen map irq failed %d\n", rc); 82 return -1; 83 } 84 85 if (triggering == ACPI_EDGE_SENSITIVE) { 86 shareable = 0; 87 name = "ioapic-edge"; 88 } else { 89 shareable = 1; 90 name = "ioapic-level"; 91 } 92 93 if (gsi_override >= 0) 94 gsi = gsi_override; 95 96 irq = xen_bind_pirq_gsi_to_irq(gsi, map_irq.pirq, shareable, name); 97 if (irq < 0) 98 goto out; 99 100 printk(KERN_DEBUG "xen: --> pirq=%d -> irq=%d (gsi=%d)\n", map_irq.pirq, irq, gsi); 101 out: 102 return irq; 103 } 104 105 static int acpi_register_gsi_xen_hvm(struct device *dev, u32 gsi, 106 int trigger, int polarity) 107 { 108 if (!xen_hvm_domain()) 109 return -1; 110 111 return xen_register_pirq(gsi, -1 /* no GSI override */, trigger, 112 false /* no mapping of GSI to PIRQ */); 113 } 114 115 #ifdef CONFIG_XEN_DOM0 116 static int xen_register_gsi(u32 gsi, int gsi_override, int triggering, int polarity) 117 { 118 int rc, irq; 119 struct physdev_setup_gsi setup_gsi; 120 121 if (!xen_pv_domain()) 122 return -1; 123 124 printk(KERN_DEBUG "xen: registering gsi %u triggering %d polarity %d\n", 125 gsi, triggering, polarity); 126 127 irq = xen_register_pirq(gsi, gsi_override, triggering, true); 128 129 setup_gsi.gsi = gsi; 130 setup_gsi.triggering = (triggering == ACPI_EDGE_SENSITIVE ? 0 : 1); 131 setup_gsi.polarity = (polarity == ACPI_ACTIVE_HIGH ? 0 : 1); 132 133 rc = HYPERVISOR_physdev_op(PHYSDEVOP_setup_gsi, &setup_gsi); 134 if (rc == -EEXIST) 135 printk(KERN_INFO "Already setup the GSI :%d\n", gsi); 136 else if (rc) { 137 printk(KERN_ERR "Failed to setup GSI :%d, err_code:%d\n", 138 gsi, rc); 139 } 140 141 return irq; 142 } 143 144 static int acpi_register_gsi_xen(struct device *dev, u32 gsi, 145 int trigger, int polarity) 146 { 147 return xen_register_gsi(gsi, -1 /* no GSI override */, trigger, polarity); 148 } 149 #endif 150 #endif 151 152 #if defined(CONFIG_PCI_MSI) 153 #include <linux/msi.h> 154 #include <asm/msidef.h> 155 156 struct xen_pci_frontend_ops *xen_pci_frontend; 157 EXPORT_SYMBOL_GPL(xen_pci_frontend); 158 159 static int xen_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) 160 { 161 int irq, ret, i; 162 struct msi_desc *msidesc; 163 int *v; 164 165 if (type == PCI_CAP_ID_MSI && nvec > 1) 166 return 1; 167 168 v = kzalloc(sizeof(int) * max(1, nvec), GFP_KERNEL); 169 if (!v) 170 return -ENOMEM; 171 172 if (type == PCI_CAP_ID_MSIX) 173 ret = xen_pci_frontend_enable_msix(dev, v, nvec); 174 else 175 ret = xen_pci_frontend_enable_msi(dev, v); 176 if (ret) 177 goto error; 178 i = 0; 179 list_for_each_entry(msidesc, &dev->msi_list, list) { 180 irq = xen_bind_pirq_msi_to_irq(dev, msidesc, v[i], 181 (type == PCI_CAP_ID_MSIX) ? 182 "pcifront-msi-x" : 183 "pcifront-msi", 184 DOMID_SELF); 185 if (irq < 0) { 186 ret = irq; 187 goto free; 188 } 189 i++; 190 } 191 kfree(v); 192 return 0; 193 194 error: 195 dev_err(&dev->dev, "Xen PCI frontend has not registered MSI/MSI-X support!\n"); 196 free: 197 kfree(v); 198 return ret; 199 } 200 201 #define XEN_PIRQ_MSI_DATA (MSI_DATA_TRIGGER_EDGE | \ 202 MSI_DATA_LEVEL_ASSERT | (3 << 8) | MSI_DATA_VECTOR(0)) 203 204 static void xen_msi_compose_msg(struct pci_dev *pdev, unsigned int pirq, 205 struct msi_msg *msg) 206 { 207 /* We set vector == 0 to tell the hypervisor we don't care about it, 208 * but we want a pirq setup instead. 209 * We use the dest_id field to pass the pirq that we want. */ 210 msg->address_hi = MSI_ADDR_BASE_HI | MSI_ADDR_EXT_DEST_ID(pirq); 211 msg->address_lo = 212 MSI_ADDR_BASE_LO | 213 MSI_ADDR_DEST_MODE_PHYSICAL | 214 MSI_ADDR_REDIRECTION_CPU | 215 MSI_ADDR_DEST_ID(pirq); 216 217 msg->data = XEN_PIRQ_MSI_DATA; 218 } 219 220 static int xen_hvm_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) 221 { 222 int irq, pirq; 223 struct msi_desc *msidesc; 224 struct msi_msg msg; 225 226 if (type == PCI_CAP_ID_MSI && nvec > 1) 227 return 1; 228 229 list_for_each_entry(msidesc, &dev->msi_list, list) { 230 __read_msi_msg(msidesc, &msg); 231 pirq = MSI_ADDR_EXT_DEST_ID(msg.address_hi) | 232 ((msg.address_lo >> MSI_ADDR_DEST_ID_SHIFT) & 0xff); 233 if (msg.data != XEN_PIRQ_MSI_DATA || 234 xen_irq_from_pirq(pirq) < 0) { 235 pirq = xen_allocate_pirq_msi(dev, msidesc); 236 if (pirq < 0) { 237 irq = -ENODEV; 238 goto error; 239 } 240 xen_msi_compose_msg(dev, pirq, &msg); 241 __write_msi_msg(msidesc, &msg); 242 dev_dbg(&dev->dev, "xen: msi bound to pirq=%d\n", pirq); 243 } else { 244 dev_dbg(&dev->dev, 245 "xen: msi already bound to pirq=%d\n", pirq); 246 } 247 irq = xen_bind_pirq_msi_to_irq(dev, msidesc, pirq, 248 (type == PCI_CAP_ID_MSIX) ? 249 "msi-x" : "msi", 250 DOMID_SELF); 251 if (irq < 0) 252 goto error; 253 dev_dbg(&dev->dev, 254 "xen: msi --> pirq=%d --> irq=%d\n", pirq, irq); 255 } 256 return 0; 257 258 error: 259 dev_err(&dev->dev, 260 "Xen PCI frontend has not registered MSI/MSI-X support!\n"); 261 return irq; 262 } 263 264 #ifdef CONFIG_XEN_DOM0 265 static bool __read_mostly pci_seg_supported = true; 266 267 static int xen_initdom_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) 268 { 269 int ret = 0; 270 struct msi_desc *msidesc; 271 272 if (type == PCI_CAP_ID_MSI && nvec > 1) 273 return 1; 274 275 list_for_each_entry(msidesc, &dev->msi_list, list) { 276 struct physdev_map_pirq map_irq; 277 domid_t domid; 278 279 domid = ret = xen_find_device_domain_owner(dev); 280 /* N.B. Casting int's -ENODEV to uint16_t results in 0xFFED, 281 * hence check ret value for < 0. */ 282 if (ret < 0) 283 domid = DOMID_SELF; 284 285 memset(&map_irq, 0, sizeof(map_irq)); 286 map_irq.domid = domid; 287 map_irq.type = MAP_PIRQ_TYPE_MSI_SEG; 288 map_irq.index = -1; 289 map_irq.pirq = -1; 290 map_irq.bus = dev->bus->number | 291 (pci_domain_nr(dev->bus) << 16); 292 map_irq.devfn = dev->devfn; 293 294 if (type == PCI_CAP_ID_MSIX) { 295 int pos; 296 u32 table_offset, bir; 297 298 pos = dev->msix_cap; 299 pci_read_config_dword(dev, pos + PCI_MSIX_TABLE, 300 &table_offset); 301 bir = (u8)(table_offset & PCI_MSIX_TABLE_BIR); 302 303 map_irq.table_base = pci_resource_start(dev, bir); 304 map_irq.entry_nr = msidesc->msi_attrib.entry_nr; 305 } 306 307 ret = -EINVAL; 308 if (pci_seg_supported) 309 ret = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, 310 &map_irq); 311 if (ret == -EINVAL && !pci_domain_nr(dev->bus)) { 312 map_irq.type = MAP_PIRQ_TYPE_MSI; 313 map_irq.index = -1; 314 map_irq.pirq = -1; 315 map_irq.bus = dev->bus->number; 316 ret = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, 317 &map_irq); 318 if (ret != -EINVAL) 319 pci_seg_supported = false; 320 } 321 if (ret) { 322 dev_warn(&dev->dev, "xen map irq failed %d for %d domain\n", 323 ret, domid); 324 goto out; 325 } 326 327 ret = xen_bind_pirq_msi_to_irq(dev, msidesc, 328 map_irq.pirq, 329 (type == PCI_CAP_ID_MSIX) ? 330 "msi-x" : "msi", 331 domid); 332 if (ret < 0) 333 goto out; 334 } 335 ret = 0; 336 out: 337 return ret; 338 } 339 340 static void xen_initdom_restore_msi_irqs(struct pci_dev *dev) 341 { 342 int ret = 0; 343 344 if (pci_seg_supported) { 345 struct physdev_pci_device restore_ext; 346 347 restore_ext.seg = pci_domain_nr(dev->bus); 348 restore_ext.bus = dev->bus->number; 349 restore_ext.devfn = dev->devfn; 350 ret = HYPERVISOR_physdev_op(PHYSDEVOP_restore_msi_ext, 351 &restore_ext); 352 if (ret == -ENOSYS) 353 pci_seg_supported = false; 354 WARN(ret && ret != -ENOSYS, "restore_msi_ext -> %d\n", ret); 355 } 356 if (!pci_seg_supported) { 357 struct physdev_restore_msi restore; 358 359 restore.bus = dev->bus->number; 360 restore.devfn = dev->devfn; 361 ret = HYPERVISOR_physdev_op(PHYSDEVOP_restore_msi, &restore); 362 WARN(ret && ret != -ENOSYS, "restore_msi -> %d\n", ret); 363 } 364 } 365 #endif 366 367 static void xen_teardown_msi_irqs(struct pci_dev *dev) 368 { 369 struct msi_desc *msidesc; 370 371 msidesc = list_entry(dev->msi_list.next, struct msi_desc, list); 372 if (msidesc->msi_attrib.is_msix) 373 xen_pci_frontend_disable_msix(dev); 374 else 375 xen_pci_frontend_disable_msi(dev); 376 377 /* Free the IRQ's and the msidesc using the generic code. */ 378 default_teardown_msi_irqs(dev); 379 } 380 381 static void xen_teardown_msi_irq(unsigned int irq) 382 { 383 xen_destroy_irq(irq); 384 } 385 static u32 xen_nop_msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag) 386 { 387 return 0; 388 } 389 static u32 xen_nop_msix_mask_irq(struct msi_desc *desc, u32 flag) 390 { 391 return 0; 392 } 393 #endif 394 395 int __init pci_xen_init(void) 396 { 397 if (!xen_pv_domain() || xen_initial_domain()) 398 return -ENODEV; 399 400 printk(KERN_INFO "PCI: setting up Xen PCI frontend stub\n"); 401 402 pcibios_set_cache_line_size(); 403 404 pcibios_enable_irq = xen_pcifront_enable_irq; 405 pcibios_disable_irq = NULL; 406 407 #ifdef CONFIG_ACPI 408 /* Keep ACPI out of the picture */ 409 acpi_noirq = 1; 410 #endif 411 412 #ifdef CONFIG_PCI_MSI 413 x86_msi.setup_msi_irqs = xen_setup_msi_irqs; 414 x86_msi.teardown_msi_irq = xen_teardown_msi_irq; 415 x86_msi.teardown_msi_irqs = xen_teardown_msi_irqs; 416 x86_msi.msi_mask_irq = xen_nop_msi_mask_irq; 417 x86_msi.msix_mask_irq = xen_nop_msix_mask_irq; 418 #endif 419 return 0; 420 } 421 422 int __init pci_xen_hvm_init(void) 423 { 424 if (!xen_have_vector_callback || !xen_feature(XENFEAT_hvm_pirqs)) 425 return 0; 426 427 #ifdef CONFIG_ACPI 428 /* 429 * We don't want to change the actual ACPI delivery model, 430 * just how GSIs get registered. 431 */ 432 __acpi_register_gsi = acpi_register_gsi_xen_hvm; 433 #endif 434 435 #ifdef CONFIG_PCI_MSI 436 x86_msi.setup_msi_irqs = xen_hvm_setup_msi_irqs; 437 x86_msi.teardown_msi_irq = xen_teardown_msi_irq; 438 #endif 439 return 0; 440 } 441 442 #ifdef CONFIG_XEN_DOM0 443 static __init void xen_setup_acpi_sci(void) 444 { 445 int rc; 446 int trigger, polarity; 447 int gsi = acpi_sci_override_gsi; 448 int irq = -1; 449 int gsi_override = -1; 450 451 if (!gsi) 452 return; 453 454 rc = acpi_get_override_irq(gsi, &trigger, &polarity); 455 if (rc) { 456 printk(KERN_WARNING "xen: acpi_get_override_irq failed for acpi" 457 " sci, rc=%d\n", rc); 458 return; 459 } 460 trigger = trigger ? ACPI_LEVEL_SENSITIVE : ACPI_EDGE_SENSITIVE; 461 polarity = polarity ? ACPI_ACTIVE_LOW : ACPI_ACTIVE_HIGH; 462 463 printk(KERN_INFO "xen: sci override: global_irq=%d trigger=%d " 464 "polarity=%d\n", gsi, trigger, polarity); 465 466 /* Before we bind the GSI to a Linux IRQ, check whether 467 * we need to override it with bus_irq (IRQ) value. Usually for 468 * IRQs below IRQ_LEGACY_IRQ this holds IRQ == GSI, as so: 469 * ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 low level) 470 * but there are oddballs where the IRQ != GSI: 471 * ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 20 low level) 472 * which ends up being: gsi_to_irq[9] == 20 473 * (which is what acpi_gsi_to_irq ends up calling when starting the 474 * the ACPI interpreter and keels over since IRQ 9 has not been 475 * setup as we had setup IRQ 20 for it). 476 */ 477 if (acpi_gsi_to_irq(gsi, &irq) == 0) { 478 /* Use the provided value if it's valid. */ 479 if (irq >= 0) 480 gsi_override = irq; 481 } 482 483 gsi = xen_register_gsi(gsi, gsi_override, trigger, polarity); 484 printk(KERN_INFO "xen: acpi sci %d\n", gsi); 485 486 return; 487 } 488 489 int __init pci_xen_initial_domain(void) 490 { 491 int irq; 492 493 #ifdef CONFIG_PCI_MSI 494 x86_msi.setup_msi_irqs = xen_initdom_setup_msi_irqs; 495 x86_msi.teardown_msi_irq = xen_teardown_msi_irq; 496 x86_msi.restore_msi_irqs = xen_initdom_restore_msi_irqs; 497 x86_msi.msi_mask_irq = xen_nop_msi_mask_irq; 498 x86_msi.msix_mask_irq = xen_nop_msix_mask_irq; 499 #endif 500 xen_setup_acpi_sci(); 501 __acpi_register_gsi = acpi_register_gsi_xen; 502 /* Pre-allocate legacy irqs */ 503 for (irq = 0; irq < NR_IRQS_LEGACY; irq++) { 504 int trigger, polarity; 505 506 if (acpi_get_override_irq(irq, &trigger, &polarity) == -1) 507 continue; 508 509 xen_register_pirq(irq, -1 /* no GSI override */, 510 trigger ? ACPI_LEVEL_SENSITIVE : ACPI_EDGE_SENSITIVE, 511 true /* Map GSI to PIRQ */); 512 } 513 if (0 == nr_ioapics) { 514 for (irq = 0; irq < NR_IRQS_LEGACY; irq++) 515 xen_bind_pirq_gsi_to_irq(irq, irq, 0, "xt-pic"); 516 } 517 return 0; 518 } 519 520 struct xen_device_domain_owner { 521 domid_t domain; 522 struct pci_dev *dev; 523 struct list_head list; 524 }; 525 526 static DEFINE_SPINLOCK(dev_domain_list_spinlock); 527 static struct list_head dev_domain_list = LIST_HEAD_INIT(dev_domain_list); 528 529 static struct xen_device_domain_owner *find_device(struct pci_dev *dev) 530 { 531 struct xen_device_domain_owner *owner; 532 533 list_for_each_entry(owner, &dev_domain_list, list) { 534 if (owner->dev == dev) 535 return owner; 536 } 537 return NULL; 538 } 539 540 int xen_find_device_domain_owner(struct pci_dev *dev) 541 { 542 struct xen_device_domain_owner *owner; 543 int domain = -ENODEV; 544 545 spin_lock(&dev_domain_list_spinlock); 546 owner = find_device(dev); 547 if (owner) 548 domain = owner->domain; 549 spin_unlock(&dev_domain_list_spinlock); 550 return domain; 551 } 552 EXPORT_SYMBOL_GPL(xen_find_device_domain_owner); 553 554 int xen_register_device_domain_owner(struct pci_dev *dev, uint16_t domain) 555 { 556 struct xen_device_domain_owner *owner; 557 558 owner = kzalloc(sizeof(struct xen_device_domain_owner), GFP_KERNEL); 559 if (!owner) 560 return -ENODEV; 561 562 spin_lock(&dev_domain_list_spinlock); 563 if (find_device(dev)) { 564 spin_unlock(&dev_domain_list_spinlock); 565 kfree(owner); 566 return -EEXIST; 567 } 568 owner->domain = domain; 569 owner->dev = dev; 570 list_add_tail(&owner->list, &dev_domain_list); 571 spin_unlock(&dev_domain_list_spinlock); 572 return 0; 573 } 574 EXPORT_SYMBOL_GPL(xen_register_device_domain_owner); 575 576 int xen_unregister_device_domain_owner(struct pci_dev *dev) 577 { 578 struct xen_device_domain_owner *owner; 579 580 spin_lock(&dev_domain_list_spinlock); 581 owner = find_device(dev); 582 if (!owner) { 583 spin_unlock(&dev_domain_list_spinlock); 584 return -ENODEV; 585 } 586 list_del(&owner->list); 587 spin_unlock(&dev_domain_list_spinlock); 588 kfree(owner); 589 return 0; 590 } 591 EXPORT_SYMBOL_GPL(xen_unregister_device_domain_owner); 592 #endif 593