1 /* 2 * Xen PCI - handle PCI (INTx) and MSI infrastructure calls for PV, HVM and 3 * initial domain support. We also handle the DSDT _PRT callbacks for GSI's 4 * used in HVM and initial domain mode (PV does not parse ACPI, so it has no 5 * concept of GSIs). Under PV we hook under the pnbbios API for IRQs and 6 * 0xcf8 PCI configuration read/write. 7 * 8 * Author: Ryan Wilson <hap9@epoch.ncsc.mil> 9 * Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> 10 * Stefano Stabellini <stefano.stabellini@eu.citrix.com> 11 */ 12 #include <linux/export.h> 13 #include <linux/init.h> 14 #include <linux/pci.h> 15 #include <linux/acpi.h> 16 17 #include <linux/io.h> 18 #include <asm/io_apic.h> 19 #include <asm/pci_x86.h> 20 21 #include <asm/xen/hypervisor.h> 22 23 #include <xen/features.h> 24 #include <xen/events.h> 25 #include <asm/xen/pci.h> 26 #include <asm/xen/cpuid.h> 27 #include <asm/apic.h> 28 #include <asm/i8259.h> 29 30 static int xen_pcifront_enable_irq(struct pci_dev *dev) 31 { 32 int rc; 33 int share = 1; 34 int pirq; 35 u8 gsi; 36 37 rc = pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &gsi); 38 if (rc < 0) { 39 dev_warn(&dev->dev, "Xen PCI: failed to read interrupt line: %d\n", 40 rc); 41 return rc; 42 } 43 /* In PV DomU the Xen PCI backend puts the PIRQ in the interrupt line.*/ 44 pirq = gsi; 45 46 if (gsi < nr_legacy_irqs()) 47 share = 0; 48 49 rc = xen_bind_pirq_gsi_to_irq(gsi, pirq, share, "pcifront"); 50 if (rc < 0) { 51 dev_warn(&dev->dev, "Xen PCI: failed to bind GSI%d (PIRQ%d) to IRQ: %d\n", 52 gsi, pirq, rc); 53 return rc; 54 } 55 56 dev->irq = rc; 57 dev_info(&dev->dev, "Xen PCI mapped GSI%d to IRQ%d\n", gsi, dev->irq); 58 return 0; 59 } 60 61 #ifdef CONFIG_ACPI 62 static int xen_register_pirq(u32 gsi, int gsi_override, int triggering, 63 bool set_pirq) 64 { 65 int rc, pirq = -1, irq = -1; 66 struct physdev_map_pirq map_irq; 67 int shareable = 0; 68 char *name; 69 70 irq = xen_irq_from_gsi(gsi); 71 if (irq > 0) 72 return irq; 73 74 if (set_pirq) 75 pirq = gsi; 76 77 map_irq.domid = DOMID_SELF; 78 map_irq.type = MAP_PIRQ_TYPE_GSI; 79 map_irq.index = gsi; 80 map_irq.pirq = pirq; 81 82 rc = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq); 83 if (rc) { 84 printk(KERN_WARNING "xen map irq failed %d\n", rc); 85 return -1; 86 } 87 88 if (triggering == ACPI_EDGE_SENSITIVE) { 89 shareable = 0; 90 name = "ioapic-edge"; 91 } else { 92 shareable = 1; 93 name = "ioapic-level"; 94 } 95 96 if (gsi_override >= 0) 97 gsi = gsi_override; 98 99 irq = xen_bind_pirq_gsi_to_irq(gsi, map_irq.pirq, shareable, name); 100 if (irq < 0) 101 goto out; 102 103 printk(KERN_DEBUG "xen: --> pirq=%d -> irq=%d (gsi=%d)\n", map_irq.pirq, irq, gsi); 104 out: 105 return irq; 106 } 107 108 static int acpi_register_gsi_xen_hvm(struct device *dev, u32 gsi, 109 int trigger, int polarity) 110 { 111 if (!xen_hvm_domain()) 112 return -1; 113 114 return xen_register_pirq(gsi, -1 /* no GSI override */, trigger, 115 false /* no mapping of GSI to PIRQ */); 116 } 117 118 #ifdef CONFIG_XEN_DOM0 119 static int xen_register_gsi(u32 gsi, int gsi_override, int triggering, int polarity) 120 { 121 int rc, irq; 122 struct physdev_setup_gsi setup_gsi; 123 124 if (!xen_pv_domain()) 125 return -1; 126 127 printk(KERN_DEBUG "xen: registering gsi %u triggering %d polarity %d\n", 128 gsi, triggering, polarity); 129 130 irq = xen_register_pirq(gsi, gsi_override, triggering, true); 131 132 setup_gsi.gsi = gsi; 133 setup_gsi.triggering = (triggering == ACPI_EDGE_SENSITIVE ? 0 : 1); 134 setup_gsi.polarity = (polarity == ACPI_ACTIVE_HIGH ? 0 : 1); 135 136 rc = HYPERVISOR_physdev_op(PHYSDEVOP_setup_gsi, &setup_gsi); 137 if (rc == -EEXIST) 138 printk(KERN_INFO "Already setup the GSI :%d\n", gsi); 139 else if (rc) { 140 printk(KERN_ERR "Failed to setup GSI :%d, err_code:%d\n", 141 gsi, rc); 142 } 143 144 return irq; 145 } 146 147 static int acpi_register_gsi_xen(struct device *dev, u32 gsi, 148 int trigger, int polarity) 149 { 150 return xen_register_gsi(gsi, -1 /* no GSI override */, trigger, polarity); 151 } 152 #endif 153 #endif 154 155 #if defined(CONFIG_PCI_MSI) 156 #include <linux/msi.h> 157 #include <asm/msidef.h> 158 159 struct xen_pci_frontend_ops *xen_pci_frontend; 160 EXPORT_SYMBOL_GPL(xen_pci_frontend); 161 162 static int xen_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) 163 { 164 int irq, ret, i; 165 struct msi_desc *msidesc; 166 int *v; 167 168 if (type == PCI_CAP_ID_MSI && nvec > 1) 169 return 1; 170 171 v = kzalloc(sizeof(int) * max(1, nvec), GFP_KERNEL); 172 if (!v) 173 return -ENOMEM; 174 175 if (type == PCI_CAP_ID_MSIX) 176 ret = xen_pci_frontend_enable_msix(dev, v, nvec); 177 else 178 ret = xen_pci_frontend_enable_msi(dev, v); 179 if (ret) 180 goto error; 181 i = 0; 182 for_each_pci_msi_entry(msidesc, dev) { 183 irq = xen_bind_pirq_msi_to_irq(dev, msidesc, v[i], 184 (type == PCI_CAP_ID_MSI) ? nvec : 1, 185 (type == PCI_CAP_ID_MSIX) ? 186 "pcifront-msi-x" : 187 "pcifront-msi", 188 DOMID_SELF); 189 if (irq < 0) { 190 ret = irq; 191 goto free; 192 } 193 i++; 194 } 195 kfree(v); 196 return 0; 197 198 error: 199 if (ret == -ENOSYS) 200 dev_err(&dev->dev, "Xen PCI frontend has not registered MSI/MSI-X support!\n"); 201 else if (ret) 202 dev_err(&dev->dev, "Xen PCI frontend error: %d!\n", ret); 203 free: 204 kfree(v); 205 return ret; 206 } 207 208 #define XEN_PIRQ_MSI_DATA (MSI_DATA_TRIGGER_EDGE | \ 209 MSI_DATA_LEVEL_ASSERT | (3 << 8) | MSI_DATA_VECTOR(0)) 210 211 static void xen_msi_compose_msg(struct pci_dev *pdev, unsigned int pirq, 212 struct msi_msg *msg) 213 { 214 /* We set vector == 0 to tell the hypervisor we don't care about it, 215 * but we want a pirq setup instead. 216 * We use the dest_id field to pass the pirq that we want. */ 217 msg->address_hi = MSI_ADDR_BASE_HI | MSI_ADDR_EXT_DEST_ID(pirq); 218 msg->address_lo = 219 MSI_ADDR_BASE_LO | 220 MSI_ADDR_DEST_MODE_PHYSICAL | 221 MSI_ADDR_REDIRECTION_CPU | 222 MSI_ADDR_DEST_ID(pirq); 223 224 msg->data = XEN_PIRQ_MSI_DATA; 225 } 226 227 static int xen_hvm_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) 228 { 229 int irq, pirq; 230 struct msi_desc *msidesc; 231 struct msi_msg msg; 232 233 if (type == PCI_CAP_ID_MSI && nvec > 1) 234 return 1; 235 236 for_each_pci_msi_entry(msidesc, dev) { 237 __pci_read_msi_msg(msidesc, &msg); 238 pirq = MSI_ADDR_EXT_DEST_ID(msg.address_hi) | 239 ((msg.address_lo >> MSI_ADDR_DEST_ID_SHIFT) & 0xff); 240 if (msg.data != XEN_PIRQ_MSI_DATA || 241 xen_irq_from_pirq(pirq) < 0) { 242 pirq = xen_allocate_pirq_msi(dev, msidesc); 243 if (pirq < 0) { 244 irq = -ENODEV; 245 goto error; 246 } 247 xen_msi_compose_msg(dev, pirq, &msg); 248 __pci_write_msi_msg(msidesc, &msg); 249 dev_dbg(&dev->dev, "xen: msi bound to pirq=%d\n", pirq); 250 } else { 251 dev_dbg(&dev->dev, 252 "xen: msi already bound to pirq=%d\n", pirq); 253 } 254 irq = xen_bind_pirq_msi_to_irq(dev, msidesc, pirq, 255 (type == PCI_CAP_ID_MSI) ? nvec : 1, 256 (type == PCI_CAP_ID_MSIX) ? 257 "msi-x" : "msi", 258 DOMID_SELF); 259 if (irq < 0) 260 goto error; 261 dev_dbg(&dev->dev, 262 "xen: msi --> pirq=%d --> irq=%d\n", pirq, irq); 263 } 264 return 0; 265 266 error: 267 dev_err(&dev->dev, 268 "Xen PCI frontend has not registered MSI/MSI-X support!\n"); 269 return irq; 270 } 271 272 #ifdef CONFIG_XEN_DOM0 273 static bool __read_mostly pci_seg_supported = true; 274 275 static int xen_initdom_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) 276 { 277 int ret = 0; 278 struct msi_desc *msidesc; 279 280 for_each_pci_msi_entry(msidesc, dev) { 281 struct physdev_map_pirq map_irq; 282 domid_t domid; 283 284 domid = ret = xen_find_device_domain_owner(dev); 285 /* N.B. Casting int's -ENODEV to uint16_t results in 0xFFED, 286 * hence check ret value for < 0. */ 287 if (ret < 0) 288 domid = DOMID_SELF; 289 290 memset(&map_irq, 0, sizeof(map_irq)); 291 map_irq.domid = domid; 292 map_irq.type = MAP_PIRQ_TYPE_MSI_SEG; 293 map_irq.index = -1; 294 map_irq.pirq = -1; 295 map_irq.bus = dev->bus->number | 296 (pci_domain_nr(dev->bus) << 16); 297 map_irq.devfn = dev->devfn; 298 299 if (type == PCI_CAP_ID_MSI && nvec > 1) { 300 map_irq.type = MAP_PIRQ_TYPE_MULTI_MSI; 301 map_irq.entry_nr = nvec; 302 } else if (type == PCI_CAP_ID_MSIX) { 303 int pos; 304 unsigned long flags; 305 u32 table_offset, bir; 306 307 pos = dev->msix_cap; 308 pci_read_config_dword(dev, pos + PCI_MSIX_TABLE, 309 &table_offset); 310 bir = (u8)(table_offset & PCI_MSIX_TABLE_BIR); 311 flags = pci_resource_flags(dev, bir); 312 if (!flags || (flags & IORESOURCE_UNSET)) 313 return -EINVAL; 314 315 map_irq.table_base = pci_resource_start(dev, bir); 316 map_irq.entry_nr = msidesc->msi_attrib.entry_nr; 317 } 318 319 ret = -EINVAL; 320 if (pci_seg_supported) 321 ret = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, 322 &map_irq); 323 if (type == PCI_CAP_ID_MSI && nvec > 1 && ret) { 324 /* 325 * If MAP_PIRQ_TYPE_MULTI_MSI is not available 326 * there's nothing else we can do in this case. 327 * Just set ret > 0 so driver can retry with 328 * single MSI. 329 */ 330 ret = 1; 331 goto out; 332 } 333 if (ret == -EINVAL && !pci_domain_nr(dev->bus)) { 334 map_irq.type = MAP_PIRQ_TYPE_MSI; 335 map_irq.index = -1; 336 map_irq.pirq = -1; 337 map_irq.bus = dev->bus->number; 338 ret = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, 339 &map_irq); 340 if (ret != -EINVAL) 341 pci_seg_supported = false; 342 } 343 if (ret) { 344 dev_warn(&dev->dev, "xen map irq failed %d for %d domain\n", 345 ret, domid); 346 goto out; 347 } 348 349 ret = xen_bind_pirq_msi_to_irq(dev, msidesc, map_irq.pirq, 350 (type == PCI_CAP_ID_MSI) ? nvec : 1, 351 (type == PCI_CAP_ID_MSIX) ? "msi-x" : "msi", 352 domid); 353 if (ret < 0) 354 goto out; 355 } 356 ret = 0; 357 out: 358 return ret; 359 } 360 361 static void xen_initdom_restore_msi_irqs(struct pci_dev *dev) 362 { 363 int ret = 0; 364 365 if (pci_seg_supported) { 366 struct physdev_pci_device restore_ext; 367 368 restore_ext.seg = pci_domain_nr(dev->bus); 369 restore_ext.bus = dev->bus->number; 370 restore_ext.devfn = dev->devfn; 371 ret = HYPERVISOR_physdev_op(PHYSDEVOP_restore_msi_ext, 372 &restore_ext); 373 if (ret == -ENOSYS) 374 pci_seg_supported = false; 375 WARN(ret && ret != -ENOSYS, "restore_msi_ext -> %d\n", ret); 376 } 377 if (!pci_seg_supported) { 378 struct physdev_restore_msi restore; 379 380 restore.bus = dev->bus->number; 381 restore.devfn = dev->devfn; 382 ret = HYPERVISOR_physdev_op(PHYSDEVOP_restore_msi, &restore); 383 WARN(ret && ret != -ENOSYS, "restore_msi -> %d\n", ret); 384 } 385 } 386 #endif 387 388 static void xen_teardown_msi_irqs(struct pci_dev *dev) 389 { 390 struct msi_desc *msidesc; 391 392 msidesc = first_pci_msi_entry(dev); 393 if (msidesc->msi_attrib.is_msix) 394 xen_pci_frontend_disable_msix(dev); 395 else 396 xen_pci_frontend_disable_msi(dev); 397 398 /* Free the IRQ's and the msidesc using the generic code. */ 399 default_teardown_msi_irqs(dev); 400 } 401 402 static void xen_teardown_msi_irq(unsigned int irq) 403 { 404 xen_destroy_irq(irq); 405 } 406 407 #endif 408 409 int __init pci_xen_init(void) 410 { 411 if (!xen_pv_domain() || xen_initial_domain()) 412 return -ENODEV; 413 414 printk(KERN_INFO "PCI: setting up Xen PCI frontend stub\n"); 415 416 pcibios_set_cache_line_size(); 417 418 pcibios_enable_irq = xen_pcifront_enable_irq; 419 pcibios_disable_irq = NULL; 420 421 #ifdef CONFIG_ACPI 422 /* Keep ACPI out of the picture */ 423 acpi_noirq = 1; 424 #endif 425 426 #ifdef CONFIG_PCI_MSI 427 x86_msi.setup_msi_irqs = xen_setup_msi_irqs; 428 x86_msi.teardown_msi_irq = xen_teardown_msi_irq; 429 x86_msi.teardown_msi_irqs = xen_teardown_msi_irqs; 430 pci_msi_ignore_mask = 1; 431 #endif 432 return 0; 433 } 434 435 #ifdef CONFIG_PCI_MSI 436 void __init xen_msi_init(void) 437 { 438 if (!disable_apic) { 439 /* 440 * If hardware supports (x2)APIC virtualization (as indicated 441 * by hypervisor's leaf 4) then we don't need to use pirqs/ 442 * event channels for MSI handling and instead use regular 443 * APIC processing 444 */ 445 uint32_t eax = cpuid_eax(xen_cpuid_base() + 4); 446 447 if (((eax & XEN_HVM_CPUID_X2APIC_VIRT) && x2apic_mode) || 448 ((eax & XEN_HVM_CPUID_APIC_ACCESS_VIRT) && boot_cpu_has(X86_FEATURE_APIC))) 449 return; 450 } 451 452 x86_msi.setup_msi_irqs = xen_hvm_setup_msi_irqs; 453 x86_msi.teardown_msi_irq = xen_teardown_msi_irq; 454 } 455 #endif 456 457 int __init pci_xen_hvm_init(void) 458 { 459 if (!xen_feature(XENFEAT_hvm_pirqs)) 460 return 0; 461 462 #ifdef CONFIG_ACPI 463 /* 464 * We don't want to change the actual ACPI delivery model, 465 * just how GSIs get registered. 466 */ 467 __acpi_register_gsi = acpi_register_gsi_xen_hvm; 468 __acpi_unregister_gsi = NULL; 469 #endif 470 471 #ifdef CONFIG_PCI_MSI 472 /* 473 * We need to wait until after x2apic is initialized 474 * before we can set MSI IRQ ops. 475 */ 476 x86_platform.apic_post_init = xen_msi_init; 477 #endif 478 return 0; 479 } 480 481 #ifdef CONFIG_XEN_DOM0 482 int __init pci_xen_initial_domain(void) 483 { 484 int irq; 485 486 #ifdef CONFIG_PCI_MSI 487 x86_msi.setup_msi_irqs = xen_initdom_setup_msi_irqs; 488 x86_msi.teardown_msi_irq = xen_teardown_msi_irq; 489 x86_msi.restore_msi_irqs = xen_initdom_restore_msi_irqs; 490 pci_msi_ignore_mask = 1; 491 #endif 492 __acpi_register_gsi = acpi_register_gsi_xen; 493 __acpi_unregister_gsi = NULL; 494 /* 495 * Pre-allocate the legacy IRQs. Use NR_LEGACY_IRQS here 496 * because we don't have a PIC and thus nr_legacy_irqs() is zero. 497 */ 498 for (irq = 0; irq < NR_IRQS_LEGACY; irq++) { 499 int trigger, polarity; 500 501 if (acpi_get_override_irq(irq, &trigger, &polarity) == -1) 502 continue; 503 504 xen_register_pirq(irq, -1 /* no GSI override */, 505 trigger ? ACPI_LEVEL_SENSITIVE : ACPI_EDGE_SENSITIVE, 506 true /* Map GSI to PIRQ */); 507 } 508 if (0 == nr_ioapics) { 509 for (irq = 0; irq < nr_legacy_irqs(); irq++) 510 xen_bind_pirq_gsi_to_irq(irq, irq, 0, "xt-pic"); 511 } 512 return 0; 513 } 514 515 struct xen_device_domain_owner { 516 domid_t domain; 517 struct pci_dev *dev; 518 struct list_head list; 519 }; 520 521 static DEFINE_SPINLOCK(dev_domain_list_spinlock); 522 static struct list_head dev_domain_list = LIST_HEAD_INIT(dev_domain_list); 523 524 static struct xen_device_domain_owner *find_device(struct pci_dev *dev) 525 { 526 struct xen_device_domain_owner *owner; 527 528 list_for_each_entry(owner, &dev_domain_list, list) { 529 if (owner->dev == dev) 530 return owner; 531 } 532 return NULL; 533 } 534 535 int xen_find_device_domain_owner(struct pci_dev *dev) 536 { 537 struct xen_device_domain_owner *owner; 538 int domain = -ENODEV; 539 540 spin_lock(&dev_domain_list_spinlock); 541 owner = find_device(dev); 542 if (owner) 543 domain = owner->domain; 544 spin_unlock(&dev_domain_list_spinlock); 545 return domain; 546 } 547 EXPORT_SYMBOL_GPL(xen_find_device_domain_owner); 548 549 int xen_register_device_domain_owner(struct pci_dev *dev, uint16_t domain) 550 { 551 struct xen_device_domain_owner *owner; 552 553 owner = kzalloc(sizeof(struct xen_device_domain_owner), GFP_KERNEL); 554 if (!owner) 555 return -ENODEV; 556 557 spin_lock(&dev_domain_list_spinlock); 558 if (find_device(dev)) { 559 spin_unlock(&dev_domain_list_spinlock); 560 kfree(owner); 561 return -EEXIST; 562 } 563 owner->domain = domain; 564 owner->dev = dev; 565 list_add_tail(&owner->list, &dev_domain_list); 566 spin_unlock(&dev_domain_list_spinlock); 567 return 0; 568 } 569 EXPORT_SYMBOL_GPL(xen_register_device_domain_owner); 570 571 int xen_unregister_device_domain_owner(struct pci_dev *dev) 572 { 573 struct xen_device_domain_owner *owner; 574 575 spin_lock(&dev_domain_list_spinlock); 576 owner = find_device(dev); 577 if (!owner) { 578 spin_unlock(&dev_domain_list_spinlock); 579 return -ENODEV; 580 } 581 list_del(&owner->list); 582 spin_unlock(&dev_domain_list_spinlock); 583 kfree(owner); 584 return 0; 585 } 586 EXPORT_SYMBOL_GPL(xen_unregister_device_domain_owner); 587 #endif 588