xref: /openbmc/linux/arch/x86/pci/common.c (revision 8fa5723aa7e053d498336b48448b292fc2e0458b)
1 /*
2  *	Low-Level PCI Support for PC
3  *
4  *	(c) 1999--2000 Martin Mares <mj@ucw.cz>
5  */
6 
7 #include <linux/sched.h>
8 #include <linux/pci.h>
9 #include <linux/ioport.h>
10 #include <linux/init.h>
11 #include <linux/dmi.h>
12 
13 #include <asm/acpi.h>
14 #include <asm/segment.h>
15 #include <asm/io.h>
16 #include <asm/smp.h>
17 
18 #include "pci.h"
19 
20 unsigned int pci_probe = PCI_PROBE_BIOS | PCI_PROBE_CONF1 | PCI_PROBE_CONF2 |
21 				PCI_PROBE_MMCONF;
22 
23 unsigned int pci_early_dump_regs;
24 static int pci_bf_sort;
25 int pci_routeirq;
26 int pcibios_last_bus = -1;
27 unsigned long pirq_table_addr;
28 struct pci_bus *pci_root_bus;
29 struct pci_raw_ops *raw_pci_ops;
30 struct pci_raw_ops *raw_pci_ext_ops;
31 
32 int raw_pci_read(unsigned int domain, unsigned int bus, unsigned int devfn,
33 						int reg, int len, u32 *val)
34 {
35 	if (domain == 0 && reg < 256 && raw_pci_ops)
36 		return raw_pci_ops->read(domain, bus, devfn, reg, len, val);
37 	if (raw_pci_ext_ops)
38 		return raw_pci_ext_ops->read(domain, bus, devfn, reg, len, val);
39 	return -EINVAL;
40 }
41 
42 int raw_pci_write(unsigned int domain, unsigned int bus, unsigned int devfn,
43 						int reg, int len, u32 val)
44 {
45 	if (domain == 0 && reg < 256 && raw_pci_ops)
46 		return raw_pci_ops->write(domain, bus, devfn, reg, len, val);
47 	if (raw_pci_ext_ops)
48 		return raw_pci_ext_ops->write(domain, bus, devfn, reg, len, val);
49 	return -EINVAL;
50 }
51 
52 static int pci_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value)
53 {
54 	return raw_pci_read(pci_domain_nr(bus), bus->number,
55 				 devfn, where, size, value);
56 }
57 
58 static int pci_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value)
59 {
60 	return raw_pci_write(pci_domain_nr(bus), bus->number,
61 				  devfn, where, size, value);
62 }
63 
64 struct pci_ops pci_root_ops = {
65 	.read = pci_read,
66 	.write = pci_write,
67 };
68 
69 /*
70  * legacy, numa, and acpi all want to call pcibios_scan_root
71  * from their initcalls. This flag prevents that.
72  */
73 int pcibios_scanned;
74 
75 /*
76  * This interrupt-safe spinlock protects all accesses to PCI
77  * configuration space.
78  */
79 DEFINE_SPINLOCK(pci_config_lock);
80 
81 static int __devinit can_skip_ioresource_align(const struct dmi_system_id *d)
82 {
83 	pci_probe |= PCI_CAN_SKIP_ISA_ALIGN;
84 	printk(KERN_INFO "PCI: %s detected, can skip ISA alignment\n", d->ident);
85 	return 0;
86 }
87 
88 static struct dmi_system_id can_skip_pciprobe_dmi_table[] __devinitdata = {
89 /*
90  * Systems where PCI IO resource ISA alignment can be skipped
91  * when the ISA enable bit in the bridge control is not set
92  */
93 	{
94 		.callback = can_skip_ioresource_align,
95 		.ident = "IBM System x3800",
96 		.matches = {
97 			DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
98 			DMI_MATCH(DMI_PRODUCT_NAME, "x3800"),
99 		},
100 	},
101 	{
102 		.callback = can_skip_ioresource_align,
103 		.ident = "IBM System x3850",
104 		.matches = {
105 			DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
106 			DMI_MATCH(DMI_PRODUCT_NAME, "x3850"),
107 		},
108 	},
109 	{
110 		.callback = can_skip_ioresource_align,
111 		.ident = "IBM System x3950",
112 		.matches = {
113 			DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
114 			DMI_MATCH(DMI_PRODUCT_NAME, "x3950"),
115 		},
116 	},
117 	{}
118 };
119 
120 void __init dmi_check_skip_isa_align(void)
121 {
122 	dmi_check_system(can_skip_pciprobe_dmi_table);
123 }
124 
125 static void __devinit pcibios_fixup_device_resources(struct pci_dev *dev)
126 {
127 	struct resource *rom_r = &dev->resource[PCI_ROM_RESOURCE];
128 
129 	if (pci_probe & PCI_NOASSIGN_ROMS) {
130 		if (rom_r->parent)
131 			return;
132 		if (rom_r->start) {
133 			/* we deal with BIOS assigned ROM later */
134 			return;
135 		}
136 		rom_r->start = rom_r->end = rom_r->flags = 0;
137 	}
138 }
139 
140 /*
141  *  Called after each bus is probed, but before its children
142  *  are examined.
143  */
144 
145 void __devinit  pcibios_fixup_bus(struct pci_bus *b)
146 {
147 	struct pci_dev *dev;
148 
149 	pci_read_bridge_bases(b);
150 	list_for_each_entry(dev, &b->devices, bus_list)
151 		pcibios_fixup_device_resources(dev);
152 }
153 
154 /*
155  * Only use DMI information to set this if nothing was passed
156  * on the kernel command line (which was parsed earlier).
157  */
158 
159 static int __devinit set_bf_sort(const struct dmi_system_id *d)
160 {
161 	if (pci_bf_sort == pci_bf_sort_default) {
162 		pci_bf_sort = pci_dmi_bf;
163 		printk(KERN_INFO "PCI: %s detected, enabling pci=bfsort.\n", d->ident);
164 	}
165 	return 0;
166 }
167 
168 /*
169  * Enable renumbering of PCI bus# ranges to reach all PCI busses (Cardbus)
170  */
171 #ifdef __i386__
172 static int __devinit assign_all_busses(const struct dmi_system_id *d)
173 {
174 	pci_probe |= PCI_ASSIGN_ALL_BUSSES;
175 	printk(KERN_INFO "%s detected: enabling PCI bus# renumbering"
176 			" (pci=assign-busses)\n", d->ident);
177 	return 0;
178 }
179 #endif
180 
181 static struct dmi_system_id __devinitdata pciprobe_dmi_table[] = {
182 #ifdef __i386__
183 /*
184  * Laptops which need pci=assign-busses to see Cardbus cards
185  */
186 	{
187 		.callback = assign_all_busses,
188 		.ident = "Samsung X20 Laptop",
189 		.matches = {
190 			DMI_MATCH(DMI_SYS_VENDOR, "Samsung Electronics"),
191 			DMI_MATCH(DMI_PRODUCT_NAME, "SX20S"),
192 		},
193 	},
194 #endif		/* __i386__ */
195 	{
196 		.callback = set_bf_sort,
197 		.ident = "Dell PowerEdge 1950",
198 		.matches = {
199 			DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
200 			DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1950"),
201 		},
202 	},
203 	{
204 		.callback = set_bf_sort,
205 		.ident = "Dell PowerEdge 1955",
206 		.matches = {
207 			DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
208 			DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1955"),
209 		},
210 	},
211 	{
212 		.callback = set_bf_sort,
213 		.ident = "Dell PowerEdge 2900",
214 		.matches = {
215 			DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
216 			DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2900"),
217 		},
218 	},
219 	{
220 		.callback = set_bf_sort,
221 		.ident = "Dell PowerEdge 2950",
222 		.matches = {
223 			DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
224 			DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2950"),
225 		},
226 	},
227 	{
228 		.callback = set_bf_sort,
229 		.ident = "Dell PowerEdge R900",
230 		.matches = {
231 			DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
232 			DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge R900"),
233 		},
234 	},
235 	{
236 		.callback = set_bf_sort,
237 		.ident = "HP ProLiant BL20p G3",
238 		.matches = {
239 			DMI_MATCH(DMI_SYS_VENDOR, "HP"),
240 			DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL20p G3"),
241 		},
242 	},
243 	{
244 		.callback = set_bf_sort,
245 		.ident = "HP ProLiant BL20p G4",
246 		.matches = {
247 			DMI_MATCH(DMI_SYS_VENDOR, "HP"),
248 			DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL20p G4"),
249 		},
250 	},
251 	{
252 		.callback = set_bf_sort,
253 		.ident = "HP ProLiant BL30p G1",
254 		.matches = {
255 			DMI_MATCH(DMI_SYS_VENDOR, "HP"),
256 			DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL30p G1"),
257 		},
258 	},
259 	{
260 		.callback = set_bf_sort,
261 		.ident = "HP ProLiant BL25p G1",
262 		.matches = {
263 			DMI_MATCH(DMI_SYS_VENDOR, "HP"),
264 			DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL25p G1"),
265 		},
266 	},
267 	{
268 		.callback = set_bf_sort,
269 		.ident = "HP ProLiant BL35p G1",
270 		.matches = {
271 			DMI_MATCH(DMI_SYS_VENDOR, "HP"),
272 			DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL35p G1"),
273 		},
274 	},
275 	{
276 		.callback = set_bf_sort,
277 		.ident = "HP ProLiant BL45p G1",
278 		.matches = {
279 			DMI_MATCH(DMI_SYS_VENDOR, "HP"),
280 			DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL45p G1"),
281 		},
282 	},
283 	{
284 		.callback = set_bf_sort,
285 		.ident = "HP ProLiant BL45p G2",
286 		.matches = {
287 			DMI_MATCH(DMI_SYS_VENDOR, "HP"),
288 			DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL45p G2"),
289 		},
290 	},
291 	{
292 		.callback = set_bf_sort,
293 		.ident = "HP ProLiant BL460c G1",
294 		.matches = {
295 			DMI_MATCH(DMI_SYS_VENDOR, "HP"),
296 			DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL460c G1"),
297 		},
298 	},
299 	{
300 		.callback = set_bf_sort,
301 		.ident = "HP ProLiant BL465c G1",
302 		.matches = {
303 			DMI_MATCH(DMI_SYS_VENDOR, "HP"),
304 			DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL465c G1"),
305 		},
306 	},
307 	{
308 		.callback = set_bf_sort,
309 		.ident = "HP ProLiant BL480c G1",
310 		.matches = {
311 			DMI_MATCH(DMI_SYS_VENDOR, "HP"),
312 			DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL480c G1"),
313 		},
314 	},
315 	{
316 		.callback = set_bf_sort,
317 		.ident = "HP ProLiant BL685c G1",
318 		.matches = {
319 			DMI_MATCH(DMI_SYS_VENDOR, "HP"),
320 			DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL685c G1"),
321 		},
322 	},
323 	{
324 		.callback = set_bf_sort,
325 		.ident = "HP ProLiant DL360",
326 		.matches = {
327 			DMI_MATCH(DMI_SYS_VENDOR, "HP"),
328 			DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL360"),
329 		},
330 	},
331 	{
332 		.callback = set_bf_sort,
333 		.ident = "HP ProLiant DL380",
334 		.matches = {
335 			DMI_MATCH(DMI_SYS_VENDOR, "HP"),
336 			DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL380"),
337 		},
338 	},
339 #ifdef __i386__
340 	{
341 		.callback = assign_all_busses,
342 		.ident = "Compaq EVO N800c",
343 		.matches = {
344 			DMI_MATCH(DMI_SYS_VENDOR, "Compaq"),
345 			DMI_MATCH(DMI_PRODUCT_NAME, "EVO N800c"),
346 		},
347 	},
348 #endif
349 	{
350 		.callback = set_bf_sort,
351 		.ident = "HP ProLiant DL385 G2",
352 		.matches = {
353 			DMI_MATCH(DMI_SYS_VENDOR, "HP"),
354 			DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL385 G2"),
355 		},
356 	},
357 	{
358 		.callback = set_bf_sort,
359 		.ident = "HP ProLiant DL585 G2",
360 		.matches = {
361 			DMI_MATCH(DMI_SYS_VENDOR, "HP"),
362 			DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL585 G2"),
363 		},
364 	},
365 	{}
366 };
367 
368 void __init dmi_check_pciprobe(void)
369 {
370 	dmi_check_system(pciprobe_dmi_table);
371 }
372 
373 struct pci_bus * __devinit pcibios_scan_root(int busnum)
374 {
375 	struct pci_bus *bus = NULL;
376 	struct pci_sysdata *sd;
377 
378 	while ((bus = pci_find_next_bus(bus)) != NULL) {
379 		if (bus->number == busnum) {
380 			/* Already scanned */
381 			return bus;
382 		}
383 	}
384 
385 	/* Allocate per-root-bus (not per bus) arch-specific data.
386 	 * TODO: leak; this memory is never freed.
387 	 * It's arguable whether it's worth the trouble to care.
388 	 */
389 	sd = kzalloc(sizeof(*sd), GFP_KERNEL);
390 	if (!sd) {
391 		printk(KERN_ERR "PCI: OOM, not probing PCI bus %02x\n", busnum);
392 		return NULL;
393 	}
394 
395 	sd->node = get_mp_bus_to_node(busnum);
396 
397 	printk(KERN_DEBUG "PCI: Probing PCI hardware (bus %02x)\n", busnum);
398 	bus = pci_scan_bus_parented(NULL, busnum, &pci_root_ops, sd);
399 	if (!bus)
400 		kfree(sd);
401 
402 	return bus;
403 }
404 
405 extern u8 pci_cache_line_size;
406 
407 int __init pcibios_init(void)
408 {
409 	struct cpuinfo_x86 *c = &boot_cpu_data;
410 
411 	if (!raw_pci_ops) {
412 		printk(KERN_WARNING "PCI: System does not support PCI\n");
413 		return 0;
414 	}
415 
416 	/*
417 	 * Assume PCI cacheline size of 32 bytes for all x86s except K7/K8
418 	 * and P4. It's also good for 386/486s (which actually have 16)
419 	 * as quite a few PCI devices do not support smaller values.
420 	 */
421 	pci_cache_line_size = 32 >> 2;
422 	if (c->x86 >= 6 && c->x86_vendor == X86_VENDOR_AMD)
423 		pci_cache_line_size = 64 >> 2;	/* K7 & K8 */
424 	else if (c->x86 > 6 && c->x86_vendor == X86_VENDOR_INTEL)
425 		pci_cache_line_size = 128 >> 2;	/* P4 */
426 
427 	pcibios_resource_survey();
428 
429 	if (pci_bf_sort >= pci_force_bf)
430 		pci_sort_breadthfirst();
431 	return 0;
432 }
433 
434 char * __devinit  pcibios_setup(char *str)
435 {
436 	if (!strcmp(str, "off")) {
437 		pci_probe = 0;
438 		return NULL;
439 	} else if (!strcmp(str, "bfsort")) {
440 		pci_bf_sort = pci_force_bf;
441 		return NULL;
442 	} else if (!strcmp(str, "nobfsort")) {
443 		pci_bf_sort = pci_force_nobf;
444 		return NULL;
445 	}
446 #ifdef CONFIG_PCI_BIOS
447 	else if (!strcmp(str, "bios")) {
448 		pci_probe = PCI_PROBE_BIOS;
449 		return NULL;
450 	} else if (!strcmp(str, "nobios")) {
451 		pci_probe &= ~PCI_PROBE_BIOS;
452 		return NULL;
453 	} else if (!strcmp(str, "biosirq")) {
454 		pci_probe |= PCI_BIOS_IRQ_SCAN;
455 		return NULL;
456 	} else if (!strncmp(str, "pirqaddr=", 9)) {
457 		pirq_table_addr = simple_strtoul(str+9, NULL, 0);
458 		return NULL;
459 	}
460 #endif
461 #ifdef CONFIG_PCI_DIRECT
462 	else if (!strcmp(str, "conf1")) {
463 		pci_probe = PCI_PROBE_CONF1 | PCI_NO_CHECKS;
464 		return NULL;
465 	}
466 	else if (!strcmp(str, "conf2")) {
467 		pci_probe = PCI_PROBE_CONF2 | PCI_NO_CHECKS;
468 		return NULL;
469 	}
470 #endif
471 #ifdef CONFIG_PCI_MMCONFIG
472 	else if (!strcmp(str, "nommconf")) {
473 		pci_probe &= ~PCI_PROBE_MMCONF;
474 		return NULL;
475 	}
476 	else if (!strcmp(str, "check_enable_amd_mmconf")) {
477 		pci_probe |= PCI_CHECK_ENABLE_AMD_MMCONF;
478 		return NULL;
479 	}
480 #endif
481 	else if (!strcmp(str, "noacpi")) {
482 		acpi_noirq_set();
483 		return NULL;
484 	}
485 	else if (!strcmp(str, "noearly")) {
486 		pci_probe |= PCI_PROBE_NOEARLY;
487 		return NULL;
488 	}
489 #ifndef CONFIG_X86_VISWS
490 	else if (!strcmp(str, "usepirqmask")) {
491 		pci_probe |= PCI_USE_PIRQ_MASK;
492 		return NULL;
493 	} else if (!strncmp(str, "irqmask=", 8)) {
494 		pcibios_irq_mask = simple_strtol(str+8, NULL, 0);
495 		return NULL;
496 	} else if (!strncmp(str, "lastbus=", 8)) {
497 		pcibios_last_bus = simple_strtol(str+8, NULL, 0);
498 		return NULL;
499 	}
500 #endif
501 	else if (!strcmp(str, "rom")) {
502 		pci_probe |= PCI_ASSIGN_ROMS;
503 		return NULL;
504 	} else if (!strcmp(str, "norom")) {
505 		pci_probe |= PCI_NOASSIGN_ROMS;
506 		return NULL;
507 	} else if (!strcmp(str, "assign-busses")) {
508 		pci_probe |= PCI_ASSIGN_ALL_BUSSES;
509 		return NULL;
510 	} else if (!strcmp(str, "use_crs")) {
511 		pci_probe |= PCI_USE__CRS;
512 		return NULL;
513 	} else if (!strcmp(str, "earlydump")) {
514 		pci_early_dump_regs = 1;
515 		return NULL;
516 	} else if (!strcmp(str, "routeirq")) {
517 		pci_routeirq = 1;
518 		return NULL;
519 	} else if (!strcmp(str, "skip_isa_align")) {
520 		pci_probe |= PCI_CAN_SKIP_ISA_ALIGN;
521 		return NULL;
522 	}
523 	return str;
524 }
525 
526 unsigned int pcibios_assign_all_busses(void)
527 {
528 	return (pci_probe & PCI_ASSIGN_ALL_BUSSES) ? 1 : 0;
529 }
530 
531 int pcibios_enable_device(struct pci_dev *dev, int mask)
532 {
533 	int err;
534 
535 	if ((err = pci_enable_resources(dev, mask)) < 0)
536 		return err;
537 
538 	if (!dev->msi_enabled)
539 		return pcibios_enable_irq(dev);
540 	return 0;
541 }
542 
543 void pcibios_disable_device (struct pci_dev *dev)
544 {
545 	if (!dev->msi_enabled && pcibios_disable_irq)
546 		pcibios_disable_irq(dev);
547 }
548 
549 struct pci_bus * __devinit pci_scan_bus_on_node(int busno, struct pci_ops *ops, int node)
550 {
551 	struct pci_bus *bus = NULL;
552 	struct pci_sysdata *sd;
553 
554 	/*
555 	 * Allocate per-root-bus (not per bus) arch-specific data.
556 	 * TODO: leak; this memory is never freed.
557 	 * It's arguable whether it's worth the trouble to care.
558 	 */
559 	sd = kzalloc(sizeof(*sd), GFP_KERNEL);
560 	if (!sd) {
561 		printk(KERN_ERR "PCI: OOM, skipping PCI bus %02x\n", busno);
562 		return NULL;
563 	}
564 	sd->node = node;
565 	bus = pci_scan_bus(busno, ops, sd);
566 	if (!bus)
567 		kfree(sd);
568 
569 	return bus;
570 }
571 
572 struct pci_bus * __devinit pci_scan_bus_with_sysdata(int busno)
573 {
574 	return pci_scan_bus_on_node(busno, &pci_root_ops, -1);
575 }
576