1 /* 2 * Low-Level PCI Support for PC 3 * 4 * (c) 1999--2000 Martin Mares <mj@ucw.cz> 5 */ 6 7 #include <linux/sched.h> 8 #include <linux/pci.h> 9 #include <linux/ioport.h> 10 #include <linux/init.h> 11 #include <linux/dmi.h> 12 13 #include <asm/acpi.h> 14 #include <asm/segment.h> 15 #include <asm/io.h> 16 #include <asm/smp.h> 17 18 #include "pci.h" 19 20 unsigned int pci_probe = PCI_PROBE_BIOS | PCI_PROBE_CONF1 | PCI_PROBE_CONF2 | 21 PCI_PROBE_MMCONF; 22 23 static int pci_bf_sort; 24 int pci_routeirq; 25 int pcibios_last_bus = -1; 26 unsigned long pirq_table_addr; 27 struct pci_bus *pci_root_bus; 28 struct pci_raw_ops *raw_pci_ops; 29 30 static int pci_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value) 31 { 32 return raw_pci_ops->read(pci_domain_nr(bus), bus->number, 33 devfn, where, size, value); 34 } 35 36 static int pci_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value) 37 { 38 return raw_pci_ops->write(pci_domain_nr(bus), bus->number, 39 devfn, where, size, value); 40 } 41 42 struct pci_ops pci_root_ops = { 43 .read = pci_read, 44 .write = pci_write, 45 }; 46 47 /* 48 * legacy, numa, and acpi all want to call pcibios_scan_root 49 * from their initcalls. This flag prevents that. 50 */ 51 int pcibios_scanned; 52 53 /* 54 * This interrupt-safe spinlock protects all accesses to PCI 55 * configuration space. 56 */ 57 DEFINE_SPINLOCK(pci_config_lock); 58 59 /* 60 * Several buggy motherboards address only 16 devices and mirror 61 * them to next 16 IDs. We try to detect this `feature' on all 62 * primary buses (those containing host bridges as they are 63 * expected to be unique) and remove the ghost devices. 64 */ 65 66 static void __devinit pcibios_fixup_ghosts(struct pci_bus *b) 67 { 68 struct list_head *ln, *mn; 69 struct pci_dev *d, *e; 70 int mirror = PCI_DEVFN(16,0); 71 int seen_host_bridge = 0; 72 int i; 73 74 DBG("PCI: Scanning for ghost devices on bus %d\n", b->number); 75 list_for_each(ln, &b->devices) { 76 d = pci_dev_b(ln); 77 if ((d->class >> 8) == PCI_CLASS_BRIDGE_HOST) 78 seen_host_bridge++; 79 for (mn=ln->next; mn != &b->devices; mn=mn->next) { 80 e = pci_dev_b(mn); 81 if (e->devfn != d->devfn + mirror || 82 e->vendor != d->vendor || 83 e->device != d->device || 84 e->class != d->class) 85 continue; 86 for(i=0; i<PCI_NUM_RESOURCES; i++) 87 if (e->resource[i].start != d->resource[i].start || 88 e->resource[i].end != d->resource[i].end || 89 e->resource[i].flags != d->resource[i].flags) 90 continue; 91 break; 92 } 93 if (mn == &b->devices) 94 return; 95 } 96 if (!seen_host_bridge) 97 return; 98 printk(KERN_WARNING "PCI: Ignoring ghost devices on bus %02x\n", b->number); 99 100 ln = &b->devices; 101 while (ln->next != &b->devices) { 102 d = pci_dev_b(ln->next); 103 if (d->devfn >= mirror) { 104 list_del(&d->global_list); 105 list_del(&d->bus_list); 106 kfree(d); 107 } else 108 ln = ln->next; 109 } 110 } 111 112 static void __devinit pcibios_fixup_device_resources(struct pci_dev *dev) 113 { 114 struct resource *rom_r = &dev->resource[PCI_ROM_RESOURCE]; 115 116 if (rom_r->parent) 117 return; 118 if (rom_r->start) 119 /* we deal with BIOS assigned ROM later */ 120 return; 121 if (!(pci_probe & PCI_ASSIGN_ROMS)) 122 rom_r->start = rom_r->end = rom_r->flags = 0; 123 } 124 125 /* 126 * Called after each bus is probed, but before its children 127 * are examined. 128 */ 129 130 void __devinit pcibios_fixup_bus(struct pci_bus *b) 131 { 132 struct pci_dev *dev; 133 134 pcibios_fixup_ghosts(b); 135 pci_read_bridge_bases(b); 136 list_for_each_entry(dev, &b->devices, bus_list) 137 pcibios_fixup_device_resources(dev); 138 } 139 140 /* 141 * Only use DMI information to set this if nothing was passed 142 * on the kernel command line (which was parsed earlier). 143 */ 144 145 static int __devinit set_bf_sort(const struct dmi_system_id *d) 146 { 147 if (pci_bf_sort == pci_bf_sort_default) { 148 pci_bf_sort = pci_dmi_bf; 149 printk(KERN_INFO "PCI: %s detected, enabling pci=bfsort.\n", d->ident); 150 } 151 return 0; 152 } 153 154 /* 155 * Enable renumbering of PCI bus# ranges to reach all PCI busses (Cardbus) 156 */ 157 #ifdef __i386__ 158 static int __devinit assign_all_busses(const struct dmi_system_id *d) 159 { 160 pci_probe |= PCI_ASSIGN_ALL_BUSSES; 161 printk(KERN_INFO "%s detected: enabling PCI bus# renumbering" 162 " (pci=assign-busses)\n", d->ident); 163 return 0; 164 } 165 #endif 166 167 static struct dmi_system_id __devinitdata pciprobe_dmi_table[] = { 168 #ifdef __i386__ 169 /* 170 * Laptops which need pci=assign-busses to see Cardbus cards 171 */ 172 { 173 .callback = assign_all_busses, 174 .ident = "Samsung X20 Laptop", 175 .matches = { 176 DMI_MATCH(DMI_SYS_VENDOR, "Samsung Electronics"), 177 DMI_MATCH(DMI_PRODUCT_NAME, "SX20S"), 178 }, 179 }, 180 #endif /* __i386__ */ 181 { 182 .callback = set_bf_sort, 183 .ident = "Dell PowerEdge 1950", 184 .matches = { 185 DMI_MATCH(DMI_SYS_VENDOR, "Dell"), 186 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1950"), 187 }, 188 }, 189 { 190 .callback = set_bf_sort, 191 .ident = "Dell PowerEdge 1955", 192 .matches = { 193 DMI_MATCH(DMI_SYS_VENDOR, "Dell"), 194 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1955"), 195 }, 196 }, 197 { 198 .callback = set_bf_sort, 199 .ident = "Dell PowerEdge 2900", 200 .matches = { 201 DMI_MATCH(DMI_SYS_VENDOR, "Dell"), 202 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2900"), 203 }, 204 }, 205 { 206 .callback = set_bf_sort, 207 .ident = "Dell PowerEdge 2950", 208 .matches = { 209 DMI_MATCH(DMI_SYS_VENDOR, "Dell"), 210 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2950"), 211 }, 212 }, 213 { 214 .callback = set_bf_sort, 215 .ident = "Dell PowerEdge R900", 216 .matches = { 217 DMI_MATCH(DMI_SYS_VENDOR, "Dell"), 218 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge R900"), 219 }, 220 }, 221 { 222 .callback = set_bf_sort, 223 .ident = "HP ProLiant BL20p G3", 224 .matches = { 225 DMI_MATCH(DMI_SYS_VENDOR, "HP"), 226 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL20p G3"), 227 }, 228 }, 229 { 230 .callback = set_bf_sort, 231 .ident = "HP ProLiant BL20p G4", 232 .matches = { 233 DMI_MATCH(DMI_SYS_VENDOR, "HP"), 234 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL20p G4"), 235 }, 236 }, 237 { 238 .callback = set_bf_sort, 239 .ident = "HP ProLiant BL30p G1", 240 .matches = { 241 DMI_MATCH(DMI_SYS_VENDOR, "HP"), 242 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL30p G1"), 243 }, 244 }, 245 { 246 .callback = set_bf_sort, 247 .ident = "HP ProLiant BL25p G1", 248 .matches = { 249 DMI_MATCH(DMI_SYS_VENDOR, "HP"), 250 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL25p G1"), 251 }, 252 }, 253 { 254 .callback = set_bf_sort, 255 .ident = "HP ProLiant BL35p G1", 256 .matches = { 257 DMI_MATCH(DMI_SYS_VENDOR, "HP"), 258 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL35p G1"), 259 }, 260 }, 261 { 262 .callback = set_bf_sort, 263 .ident = "HP ProLiant BL45p G1", 264 .matches = { 265 DMI_MATCH(DMI_SYS_VENDOR, "HP"), 266 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL45p G1"), 267 }, 268 }, 269 { 270 .callback = set_bf_sort, 271 .ident = "HP ProLiant BL45p G2", 272 .matches = { 273 DMI_MATCH(DMI_SYS_VENDOR, "HP"), 274 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL45p G2"), 275 }, 276 }, 277 { 278 .callback = set_bf_sort, 279 .ident = "HP ProLiant BL460c G1", 280 .matches = { 281 DMI_MATCH(DMI_SYS_VENDOR, "HP"), 282 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL460c G1"), 283 }, 284 }, 285 { 286 .callback = set_bf_sort, 287 .ident = "HP ProLiant BL465c G1", 288 .matches = { 289 DMI_MATCH(DMI_SYS_VENDOR, "HP"), 290 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL465c G1"), 291 }, 292 }, 293 { 294 .callback = set_bf_sort, 295 .ident = "HP ProLiant BL480c G1", 296 .matches = { 297 DMI_MATCH(DMI_SYS_VENDOR, "HP"), 298 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL480c G1"), 299 }, 300 }, 301 { 302 .callback = set_bf_sort, 303 .ident = "HP ProLiant BL685c G1", 304 .matches = { 305 DMI_MATCH(DMI_SYS_VENDOR, "HP"), 306 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL685c G1"), 307 }, 308 }, 309 { 310 .callback = set_bf_sort, 311 .ident = "HP ProLiant DL385 G2", 312 .matches = { 313 DMI_MATCH(DMI_SYS_VENDOR, "HP"), 314 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL385 G2"), 315 }, 316 }, 317 { 318 .callback = set_bf_sort, 319 .ident = "HP ProLiant DL585 G2", 320 .matches = { 321 DMI_MATCH(DMI_SYS_VENDOR, "HP"), 322 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL585 G2"), 323 }, 324 }, 325 #ifdef __i386__ 326 { 327 .callback = assign_all_busses, 328 .ident = "Compaq EVO N800c", 329 .matches = { 330 DMI_MATCH(DMI_SYS_VENDOR, "Compaq"), 331 DMI_MATCH(DMI_PRODUCT_NAME, "EVO N800c"), 332 }, 333 }, 334 #endif 335 { 336 .callback = set_bf_sort, 337 .ident = "HP ProLiant DL385 G2", 338 .matches = { 339 DMI_MATCH(DMI_SYS_VENDOR, "HP"), 340 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL385 G2"), 341 }, 342 }, 343 { 344 .callback = set_bf_sort, 345 .ident = "HP ProLiant DL585 G2", 346 .matches = { 347 DMI_MATCH(DMI_SYS_VENDOR, "HP"), 348 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL585 G2"), 349 }, 350 }, 351 {} 352 }; 353 354 struct pci_bus * __devinit pcibios_scan_root(int busnum) 355 { 356 struct pci_bus *bus = NULL; 357 struct pci_sysdata *sd; 358 359 dmi_check_system(pciprobe_dmi_table); 360 361 while ((bus = pci_find_next_bus(bus)) != NULL) { 362 if (bus->number == busnum) { 363 /* Already scanned */ 364 return bus; 365 } 366 } 367 368 /* Allocate per-root-bus (not per bus) arch-specific data. 369 * TODO: leak; this memory is never freed. 370 * It's arguable whether it's worth the trouble to care. 371 */ 372 sd = kzalloc(sizeof(*sd), GFP_KERNEL); 373 if (!sd) { 374 printk(KERN_ERR "PCI: OOM, not probing PCI bus %02x\n", busnum); 375 return NULL; 376 } 377 378 printk(KERN_DEBUG "PCI: Probing PCI hardware (bus %02x)\n", busnum); 379 380 return pci_scan_bus_parented(NULL, busnum, &pci_root_ops, sd); 381 } 382 383 extern u8 pci_cache_line_size; 384 385 static int __init pcibios_init(void) 386 { 387 struct cpuinfo_x86 *c = &boot_cpu_data; 388 389 if (!raw_pci_ops) { 390 printk(KERN_WARNING "PCI: System does not support PCI\n"); 391 return 0; 392 } 393 394 /* 395 * Assume PCI cacheline size of 32 bytes for all x86s except K7/K8 396 * and P4. It's also good for 386/486s (which actually have 16) 397 * as quite a few PCI devices do not support smaller values. 398 */ 399 pci_cache_line_size = 32 >> 2; 400 if (c->x86 >= 6 && c->x86_vendor == X86_VENDOR_AMD) 401 pci_cache_line_size = 64 >> 2; /* K7 & K8 */ 402 else if (c->x86 > 6 && c->x86_vendor == X86_VENDOR_INTEL) 403 pci_cache_line_size = 128 >> 2; /* P4 */ 404 405 pcibios_resource_survey(); 406 407 if (pci_bf_sort >= pci_force_bf) 408 pci_sort_breadthfirst(); 409 #ifdef CONFIG_PCI_BIOS 410 if ((pci_probe & PCI_BIOS_SORT) && !(pci_probe & PCI_NO_SORT)) 411 pcibios_sort(); 412 #endif 413 return 0; 414 } 415 416 subsys_initcall(pcibios_init); 417 418 char * __devinit pcibios_setup(char *str) 419 { 420 if (!strcmp(str, "off")) { 421 pci_probe = 0; 422 return NULL; 423 } else if (!strcmp(str, "bfsort")) { 424 pci_bf_sort = pci_force_bf; 425 return NULL; 426 } else if (!strcmp(str, "nobfsort")) { 427 pci_bf_sort = pci_force_nobf; 428 return NULL; 429 } 430 #ifdef CONFIG_PCI_BIOS 431 else if (!strcmp(str, "bios")) { 432 pci_probe = PCI_PROBE_BIOS; 433 return NULL; 434 } else if (!strcmp(str, "nobios")) { 435 pci_probe &= ~PCI_PROBE_BIOS; 436 return NULL; 437 } else if (!strcmp(str, "nosort")) { 438 pci_probe |= PCI_NO_SORT; 439 return NULL; 440 } else if (!strcmp(str, "biosirq")) { 441 pci_probe |= PCI_BIOS_IRQ_SCAN; 442 return NULL; 443 } else if (!strncmp(str, "pirqaddr=", 9)) { 444 pirq_table_addr = simple_strtoul(str+9, NULL, 0); 445 return NULL; 446 } 447 #endif 448 #ifdef CONFIG_PCI_DIRECT 449 else if (!strcmp(str, "conf1")) { 450 pci_probe = PCI_PROBE_CONF1 | PCI_NO_CHECKS; 451 return NULL; 452 } 453 else if (!strcmp(str, "conf2")) { 454 pci_probe = PCI_PROBE_CONF2 | PCI_NO_CHECKS; 455 return NULL; 456 } 457 #endif 458 #ifdef CONFIG_PCI_MMCONFIG 459 else if (!strcmp(str, "nommconf")) { 460 pci_probe &= ~PCI_PROBE_MMCONF; 461 return NULL; 462 } 463 #endif 464 else if (!strcmp(str, "noacpi")) { 465 acpi_noirq_set(); 466 return NULL; 467 } 468 else if (!strcmp(str, "noearly")) { 469 pci_probe |= PCI_PROBE_NOEARLY; 470 return NULL; 471 } 472 #ifndef CONFIG_X86_VISWS 473 else if (!strcmp(str, "usepirqmask")) { 474 pci_probe |= PCI_USE_PIRQ_MASK; 475 return NULL; 476 } else if (!strncmp(str, "irqmask=", 8)) { 477 pcibios_irq_mask = simple_strtol(str+8, NULL, 0); 478 return NULL; 479 } else if (!strncmp(str, "lastbus=", 8)) { 480 pcibios_last_bus = simple_strtol(str+8, NULL, 0); 481 return NULL; 482 } 483 #endif 484 else if (!strcmp(str, "rom")) { 485 pci_probe |= PCI_ASSIGN_ROMS; 486 return NULL; 487 } else if (!strcmp(str, "assign-busses")) { 488 pci_probe |= PCI_ASSIGN_ALL_BUSSES; 489 return NULL; 490 } else if (!strcmp(str, "use_crs")) { 491 pci_probe |= PCI_USE__CRS; 492 return NULL; 493 } else if (!strcmp(str, "routeirq")) { 494 pci_routeirq = 1; 495 return NULL; 496 } 497 return str; 498 } 499 500 unsigned int pcibios_assign_all_busses(void) 501 { 502 return (pci_probe & PCI_ASSIGN_ALL_BUSSES) ? 1 : 0; 503 } 504 505 int pcibios_enable_device(struct pci_dev *dev, int mask) 506 { 507 int err; 508 509 if ((err = pcibios_enable_resources(dev, mask)) < 0) 510 return err; 511 512 if (!dev->msi_enabled) 513 return pcibios_enable_irq(dev); 514 return 0; 515 } 516 517 void pcibios_disable_device (struct pci_dev *dev) 518 { 519 if (!dev->msi_enabled && pcibios_disable_irq) 520 pcibios_disable_irq(dev); 521 } 522 523 struct pci_bus *pci_scan_bus_with_sysdata(int busno) 524 { 525 struct pci_bus *bus = NULL; 526 struct pci_sysdata *sd; 527 528 /* 529 * Allocate per-root-bus (not per bus) arch-specific data. 530 * TODO: leak; this memory is never freed. 531 * It's arguable whether it's worth the trouble to care. 532 */ 533 sd = kzalloc(sizeof(*sd), GFP_KERNEL); 534 if (!sd) { 535 printk(KERN_ERR "PCI: OOM, skipping PCI bus %02x\n", busno); 536 return NULL; 537 } 538 sd->node = -1; 539 bus = pci_scan_bus(busno, &pci_root_ops, sd); 540 if (!bus) 541 kfree(sd); 542 543 return bus; 544 } 545