1 /* 2 * Low-Level PCI Support for PC 3 * 4 * (c) 1999--2000 Martin Mares <mj@ucw.cz> 5 */ 6 7 #include <linux/sched.h> 8 #include <linux/pci.h> 9 #include <linux/ioport.h> 10 #include <linux/init.h> 11 #include <linux/dmi.h> 12 #include <linux/slab.h> 13 14 #include <asm/acpi.h> 15 #include <asm/segment.h> 16 #include <asm/io.h> 17 #include <asm/smp.h> 18 #include <asm/pci_x86.h> 19 20 unsigned int pci_probe = PCI_PROBE_BIOS | PCI_PROBE_CONF1 | PCI_PROBE_CONF2 | 21 PCI_PROBE_MMCONF; 22 23 unsigned int pci_early_dump_regs; 24 static int pci_bf_sort; 25 int pci_routeirq; 26 int noioapicquirk; 27 #ifdef CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS 28 int noioapicreroute = 0; 29 #else 30 int noioapicreroute = 1; 31 #endif 32 int pcibios_last_bus = -1; 33 unsigned long pirq_table_addr; 34 struct pci_bus *pci_root_bus; 35 struct pci_raw_ops *raw_pci_ops; 36 struct pci_raw_ops *raw_pci_ext_ops; 37 38 int raw_pci_read(unsigned int domain, unsigned int bus, unsigned int devfn, 39 int reg, int len, u32 *val) 40 { 41 if (domain == 0 && reg < 256 && raw_pci_ops) 42 return raw_pci_ops->read(domain, bus, devfn, reg, len, val); 43 if (raw_pci_ext_ops) 44 return raw_pci_ext_ops->read(domain, bus, devfn, reg, len, val); 45 return -EINVAL; 46 } 47 48 int raw_pci_write(unsigned int domain, unsigned int bus, unsigned int devfn, 49 int reg, int len, u32 val) 50 { 51 if (domain == 0 && reg < 256 && raw_pci_ops) 52 return raw_pci_ops->write(domain, bus, devfn, reg, len, val); 53 if (raw_pci_ext_ops) 54 return raw_pci_ext_ops->write(domain, bus, devfn, reg, len, val); 55 return -EINVAL; 56 } 57 58 static int pci_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value) 59 { 60 return raw_pci_read(pci_domain_nr(bus), bus->number, 61 devfn, where, size, value); 62 } 63 64 static int pci_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value) 65 { 66 return raw_pci_write(pci_domain_nr(bus), bus->number, 67 devfn, where, size, value); 68 } 69 70 struct pci_ops pci_root_ops = { 71 .read = pci_read, 72 .write = pci_write, 73 }; 74 75 /* 76 * This interrupt-safe spinlock protects all accesses to PCI 77 * configuration space. 78 */ 79 DEFINE_RAW_SPINLOCK(pci_config_lock); 80 81 static int __devinit can_skip_ioresource_align(const struct dmi_system_id *d) 82 { 83 pci_probe |= PCI_CAN_SKIP_ISA_ALIGN; 84 printk(KERN_INFO "PCI: %s detected, can skip ISA alignment\n", d->ident); 85 return 0; 86 } 87 88 static const struct dmi_system_id can_skip_pciprobe_dmi_table[] __devinitconst = { 89 /* 90 * Systems where PCI IO resource ISA alignment can be skipped 91 * when the ISA enable bit in the bridge control is not set 92 */ 93 { 94 .callback = can_skip_ioresource_align, 95 .ident = "IBM System x3800", 96 .matches = { 97 DMI_MATCH(DMI_SYS_VENDOR, "IBM"), 98 DMI_MATCH(DMI_PRODUCT_NAME, "x3800"), 99 }, 100 }, 101 { 102 .callback = can_skip_ioresource_align, 103 .ident = "IBM System x3850", 104 .matches = { 105 DMI_MATCH(DMI_SYS_VENDOR, "IBM"), 106 DMI_MATCH(DMI_PRODUCT_NAME, "x3850"), 107 }, 108 }, 109 { 110 .callback = can_skip_ioresource_align, 111 .ident = "IBM System x3950", 112 .matches = { 113 DMI_MATCH(DMI_SYS_VENDOR, "IBM"), 114 DMI_MATCH(DMI_PRODUCT_NAME, "x3950"), 115 }, 116 }, 117 {} 118 }; 119 120 void __init dmi_check_skip_isa_align(void) 121 { 122 dmi_check_system(can_skip_pciprobe_dmi_table); 123 } 124 125 static void __devinit pcibios_fixup_device_resources(struct pci_dev *dev) 126 { 127 struct resource *rom_r = &dev->resource[PCI_ROM_RESOURCE]; 128 struct resource *bar_r; 129 int bar; 130 131 if (pci_probe & PCI_NOASSIGN_BARS) { 132 /* 133 * If the BIOS did not assign the BAR, zero out the 134 * resource so the kernel doesn't attmept to assign 135 * it later on in pci_assign_unassigned_resources 136 */ 137 for (bar = 0; bar <= PCI_STD_RESOURCE_END; bar++) { 138 bar_r = &dev->resource[bar]; 139 if (bar_r->start == 0 && bar_r->end != 0) { 140 bar_r->flags = 0; 141 bar_r->end = 0; 142 } 143 } 144 } 145 146 if (pci_probe & PCI_NOASSIGN_ROMS) { 147 if (rom_r->parent) 148 return; 149 if (rom_r->start) { 150 /* we deal with BIOS assigned ROM later */ 151 return; 152 } 153 rom_r->start = rom_r->end = rom_r->flags = 0; 154 } 155 } 156 157 /* 158 * Called after each bus is probed, but before its children 159 * are examined. 160 */ 161 162 void __devinit pcibios_fixup_bus(struct pci_bus *b) 163 { 164 struct pci_dev *dev; 165 166 /* root bus? */ 167 if (!b->parent) 168 x86_pci_root_bus_res_quirks(b); 169 pci_read_bridge_bases(b); 170 list_for_each_entry(dev, &b->devices, bus_list) 171 pcibios_fixup_device_resources(dev); 172 } 173 174 /* 175 * Only use DMI information to set this if nothing was passed 176 * on the kernel command line (which was parsed earlier). 177 */ 178 179 static int __devinit set_bf_sort(const struct dmi_system_id *d) 180 { 181 if (pci_bf_sort == pci_bf_sort_default) { 182 pci_bf_sort = pci_dmi_bf; 183 printk(KERN_INFO "PCI: %s detected, enabling pci=bfsort.\n", d->ident); 184 } 185 return 0; 186 } 187 188 /* 189 * Enable renumbering of PCI bus# ranges to reach all PCI busses (Cardbus) 190 */ 191 #ifdef __i386__ 192 static int __devinit assign_all_busses(const struct dmi_system_id *d) 193 { 194 pci_probe |= PCI_ASSIGN_ALL_BUSSES; 195 printk(KERN_INFO "%s detected: enabling PCI bus# renumbering" 196 " (pci=assign-busses)\n", d->ident); 197 return 0; 198 } 199 #endif 200 201 static const struct dmi_system_id __devinitconst pciprobe_dmi_table[] = { 202 #ifdef __i386__ 203 /* 204 * Laptops which need pci=assign-busses to see Cardbus cards 205 */ 206 { 207 .callback = assign_all_busses, 208 .ident = "Samsung X20 Laptop", 209 .matches = { 210 DMI_MATCH(DMI_SYS_VENDOR, "Samsung Electronics"), 211 DMI_MATCH(DMI_PRODUCT_NAME, "SX20S"), 212 }, 213 }, 214 #endif /* __i386__ */ 215 { 216 .callback = set_bf_sort, 217 .ident = "Dell PowerEdge 1950", 218 .matches = { 219 DMI_MATCH(DMI_SYS_VENDOR, "Dell"), 220 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1950"), 221 }, 222 }, 223 { 224 .callback = set_bf_sort, 225 .ident = "Dell PowerEdge 1955", 226 .matches = { 227 DMI_MATCH(DMI_SYS_VENDOR, "Dell"), 228 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1955"), 229 }, 230 }, 231 { 232 .callback = set_bf_sort, 233 .ident = "Dell PowerEdge 2900", 234 .matches = { 235 DMI_MATCH(DMI_SYS_VENDOR, "Dell"), 236 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2900"), 237 }, 238 }, 239 { 240 .callback = set_bf_sort, 241 .ident = "Dell PowerEdge 2950", 242 .matches = { 243 DMI_MATCH(DMI_SYS_VENDOR, "Dell"), 244 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2950"), 245 }, 246 }, 247 { 248 .callback = set_bf_sort, 249 .ident = "Dell PowerEdge R900", 250 .matches = { 251 DMI_MATCH(DMI_SYS_VENDOR, "Dell"), 252 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge R900"), 253 }, 254 }, 255 { 256 .callback = set_bf_sort, 257 .ident = "HP ProLiant BL20p G3", 258 .matches = { 259 DMI_MATCH(DMI_SYS_VENDOR, "HP"), 260 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL20p G3"), 261 }, 262 }, 263 { 264 .callback = set_bf_sort, 265 .ident = "HP ProLiant BL20p G4", 266 .matches = { 267 DMI_MATCH(DMI_SYS_VENDOR, "HP"), 268 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL20p G4"), 269 }, 270 }, 271 { 272 .callback = set_bf_sort, 273 .ident = "HP ProLiant BL30p G1", 274 .matches = { 275 DMI_MATCH(DMI_SYS_VENDOR, "HP"), 276 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL30p G1"), 277 }, 278 }, 279 { 280 .callback = set_bf_sort, 281 .ident = "HP ProLiant BL25p G1", 282 .matches = { 283 DMI_MATCH(DMI_SYS_VENDOR, "HP"), 284 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL25p G1"), 285 }, 286 }, 287 { 288 .callback = set_bf_sort, 289 .ident = "HP ProLiant BL35p G1", 290 .matches = { 291 DMI_MATCH(DMI_SYS_VENDOR, "HP"), 292 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL35p G1"), 293 }, 294 }, 295 { 296 .callback = set_bf_sort, 297 .ident = "HP ProLiant BL45p G1", 298 .matches = { 299 DMI_MATCH(DMI_SYS_VENDOR, "HP"), 300 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL45p G1"), 301 }, 302 }, 303 { 304 .callback = set_bf_sort, 305 .ident = "HP ProLiant BL45p G2", 306 .matches = { 307 DMI_MATCH(DMI_SYS_VENDOR, "HP"), 308 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL45p G2"), 309 }, 310 }, 311 { 312 .callback = set_bf_sort, 313 .ident = "HP ProLiant BL460c G1", 314 .matches = { 315 DMI_MATCH(DMI_SYS_VENDOR, "HP"), 316 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL460c G1"), 317 }, 318 }, 319 { 320 .callback = set_bf_sort, 321 .ident = "HP ProLiant BL465c G1", 322 .matches = { 323 DMI_MATCH(DMI_SYS_VENDOR, "HP"), 324 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL465c G1"), 325 }, 326 }, 327 { 328 .callback = set_bf_sort, 329 .ident = "HP ProLiant BL480c G1", 330 .matches = { 331 DMI_MATCH(DMI_SYS_VENDOR, "HP"), 332 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL480c G1"), 333 }, 334 }, 335 { 336 .callback = set_bf_sort, 337 .ident = "HP ProLiant BL685c G1", 338 .matches = { 339 DMI_MATCH(DMI_SYS_VENDOR, "HP"), 340 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL685c G1"), 341 }, 342 }, 343 { 344 .callback = set_bf_sort, 345 .ident = "HP ProLiant DL360", 346 .matches = { 347 DMI_MATCH(DMI_SYS_VENDOR, "HP"), 348 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL360"), 349 }, 350 }, 351 { 352 .callback = set_bf_sort, 353 .ident = "HP ProLiant DL380", 354 .matches = { 355 DMI_MATCH(DMI_SYS_VENDOR, "HP"), 356 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL380"), 357 }, 358 }, 359 #ifdef __i386__ 360 { 361 .callback = assign_all_busses, 362 .ident = "Compaq EVO N800c", 363 .matches = { 364 DMI_MATCH(DMI_SYS_VENDOR, "Compaq"), 365 DMI_MATCH(DMI_PRODUCT_NAME, "EVO N800c"), 366 }, 367 }, 368 #endif 369 { 370 .callback = set_bf_sort, 371 .ident = "HP ProLiant DL385 G2", 372 .matches = { 373 DMI_MATCH(DMI_SYS_VENDOR, "HP"), 374 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL385 G2"), 375 }, 376 }, 377 { 378 .callback = set_bf_sort, 379 .ident = "HP ProLiant DL585 G2", 380 .matches = { 381 DMI_MATCH(DMI_SYS_VENDOR, "HP"), 382 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL585 G2"), 383 }, 384 }, 385 {} 386 }; 387 388 void __init dmi_check_pciprobe(void) 389 { 390 dmi_check_system(pciprobe_dmi_table); 391 } 392 393 struct pci_bus * __devinit pcibios_scan_root(int busnum) 394 { 395 struct pci_bus *bus = NULL; 396 struct pci_sysdata *sd; 397 398 while ((bus = pci_find_next_bus(bus)) != NULL) { 399 if (bus->number == busnum) { 400 /* Already scanned */ 401 return bus; 402 } 403 } 404 405 /* Allocate per-root-bus (not per bus) arch-specific data. 406 * TODO: leak; this memory is never freed. 407 * It's arguable whether it's worth the trouble to care. 408 */ 409 sd = kzalloc(sizeof(*sd), GFP_KERNEL); 410 if (!sd) { 411 printk(KERN_ERR "PCI: OOM, not probing PCI bus %02x\n", busnum); 412 return NULL; 413 } 414 415 sd->node = get_mp_bus_to_node(busnum); 416 417 printk(KERN_DEBUG "PCI: Probing PCI hardware (bus %02x)\n", busnum); 418 bus = pci_scan_bus_parented(NULL, busnum, &pci_root_ops, sd); 419 if (!bus) 420 kfree(sd); 421 422 return bus; 423 } 424 425 int __init pcibios_init(void) 426 { 427 struct cpuinfo_x86 *c = &boot_cpu_data; 428 429 if (!raw_pci_ops) { 430 printk(KERN_WARNING "PCI: System does not support PCI\n"); 431 return 0; 432 } 433 434 /* 435 * Set PCI cacheline size to that of the CPU if the CPU has reported it. 436 * (For older CPUs that don't support cpuid, we se it to 32 bytes 437 * It's also good for 386/486s (which actually have 16) 438 * as quite a few PCI devices do not support smaller values. 439 */ 440 if (c->x86_clflush_size > 0) { 441 pci_dfl_cache_line_size = c->x86_clflush_size >> 2; 442 printk(KERN_DEBUG "PCI: pci_cache_line_size set to %d bytes\n", 443 pci_dfl_cache_line_size << 2); 444 } else { 445 pci_dfl_cache_line_size = 32 >> 2; 446 printk(KERN_DEBUG "PCI: Unknown cacheline size. Setting to 32 bytes\n"); 447 } 448 449 pcibios_resource_survey(); 450 451 if (pci_bf_sort >= pci_force_bf) 452 pci_sort_breadthfirst(); 453 return 0; 454 } 455 456 char * __devinit pcibios_setup(char *str) 457 { 458 if (!strcmp(str, "off")) { 459 pci_probe = 0; 460 return NULL; 461 } else if (!strcmp(str, "bfsort")) { 462 pci_bf_sort = pci_force_bf; 463 return NULL; 464 } else if (!strcmp(str, "nobfsort")) { 465 pci_bf_sort = pci_force_nobf; 466 return NULL; 467 } 468 #ifdef CONFIG_PCI_BIOS 469 else if (!strcmp(str, "bios")) { 470 pci_probe = PCI_PROBE_BIOS; 471 return NULL; 472 } else if (!strcmp(str, "nobios")) { 473 pci_probe &= ~PCI_PROBE_BIOS; 474 return NULL; 475 } else if (!strcmp(str, "biosirq")) { 476 pci_probe |= PCI_BIOS_IRQ_SCAN; 477 return NULL; 478 } else if (!strncmp(str, "pirqaddr=", 9)) { 479 pirq_table_addr = simple_strtoul(str+9, NULL, 0); 480 return NULL; 481 } 482 #endif 483 #ifdef CONFIG_PCI_DIRECT 484 else if (!strcmp(str, "conf1")) { 485 pci_probe = PCI_PROBE_CONF1 | PCI_NO_CHECKS; 486 return NULL; 487 } 488 else if (!strcmp(str, "conf2")) { 489 pci_probe = PCI_PROBE_CONF2 | PCI_NO_CHECKS; 490 return NULL; 491 } 492 #endif 493 #ifdef CONFIG_PCI_MMCONFIG 494 else if (!strcmp(str, "nommconf")) { 495 pci_probe &= ~PCI_PROBE_MMCONF; 496 return NULL; 497 } 498 else if (!strcmp(str, "check_enable_amd_mmconf")) { 499 pci_probe |= PCI_CHECK_ENABLE_AMD_MMCONF; 500 return NULL; 501 } 502 #endif 503 else if (!strcmp(str, "noacpi")) { 504 acpi_noirq_set(); 505 return NULL; 506 } 507 else if (!strcmp(str, "noearly")) { 508 pci_probe |= PCI_PROBE_NOEARLY; 509 return NULL; 510 } 511 #ifndef CONFIG_X86_VISWS 512 else if (!strcmp(str, "usepirqmask")) { 513 pci_probe |= PCI_USE_PIRQ_MASK; 514 return NULL; 515 } else if (!strncmp(str, "irqmask=", 8)) { 516 pcibios_irq_mask = simple_strtol(str+8, NULL, 0); 517 return NULL; 518 } else if (!strncmp(str, "lastbus=", 8)) { 519 pcibios_last_bus = simple_strtol(str+8, NULL, 0); 520 return NULL; 521 } 522 #endif 523 else if (!strcmp(str, "rom")) { 524 pci_probe |= PCI_ASSIGN_ROMS; 525 return NULL; 526 } else if (!strcmp(str, "norom")) { 527 pci_probe |= PCI_NOASSIGN_ROMS; 528 return NULL; 529 } else if (!strcmp(str, "nobar")) { 530 pci_probe |= PCI_NOASSIGN_BARS; 531 return NULL; 532 } else if (!strcmp(str, "assign-busses")) { 533 pci_probe |= PCI_ASSIGN_ALL_BUSSES; 534 return NULL; 535 } else if (!strcmp(str, "use_crs")) { 536 pci_probe |= PCI_USE__CRS; 537 return NULL; 538 } else if (!strcmp(str, "nocrs")) { 539 pci_probe |= PCI_ROOT_NO_CRS; 540 return NULL; 541 } else if (!strcmp(str, "earlydump")) { 542 pci_early_dump_regs = 1; 543 return NULL; 544 } else if (!strcmp(str, "routeirq")) { 545 pci_routeirq = 1; 546 return NULL; 547 } else if (!strcmp(str, "skip_isa_align")) { 548 pci_probe |= PCI_CAN_SKIP_ISA_ALIGN; 549 return NULL; 550 } else if (!strcmp(str, "noioapicquirk")) { 551 noioapicquirk = 1; 552 return NULL; 553 } else if (!strcmp(str, "ioapicreroute")) { 554 if (noioapicreroute != -1) 555 noioapicreroute = 0; 556 return NULL; 557 } else if (!strcmp(str, "noioapicreroute")) { 558 if (noioapicreroute != -1) 559 noioapicreroute = 1; 560 return NULL; 561 } 562 return str; 563 } 564 565 unsigned int pcibios_assign_all_busses(void) 566 { 567 return (pci_probe & PCI_ASSIGN_ALL_BUSSES) ? 1 : 0; 568 } 569 570 int pcibios_enable_device(struct pci_dev *dev, int mask) 571 { 572 int err; 573 574 if ((err = pci_enable_resources(dev, mask)) < 0) 575 return err; 576 577 if (!pci_dev_msi_enabled(dev)) 578 return pcibios_enable_irq(dev); 579 return 0; 580 } 581 582 void pcibios_disable_device (struct pci_dev *dev) 583 { 584 if (!pci_dev_msi_enabled(dev) && pcibios_disable_irq) 585 pcibios_disable_irq(dev); 586 } 587 588 int pci_ext_cfg_avail(struct pci_dev *dev) 589 { 590 if (raw_pci_ext_ops) 591 return 1; 592 else 593 return 0; 594 } 595 596 struct pci_bus * __devinit pci_scan_bus_on_node(int busno, struct pci_ops *ops, int node) 597 { 598 struct pci_bus *bus = NULL; 599 struct pci_sysdata *sd; 600 601 /* 602 * Allocate per-root-bus (not per bus) arch-specific data. 603 * TODO: leak; this memory is never freed. 604 * It's arguable whether it's worth the trouble to care. 605 */ 606 sd = kzalloc(sizeof(*sd), GFP_KERNEL); 607 if (!sd) { 608 printk(KERN_ERR "PCI: OOM, skipping PCI bus %02x\n", busno); 609 return NULL; 610 } 611 sd->node = node; 612 bus = pci_scan_bus(busno, ops, sd); 613 if (!bus) 614 kfree(sd); 615 616 return bus; 617 } 618 619 struct pci_bus * __devinit pci_scan_bus_with_sysdata(int busno) 620 { 621 return pci_scan_bus_on_node(busno, &pci_root_ops, -1); 622 } 623 624 /* 625 * NUMA info for PCI busses 626 * 627 * Early arch code is responsible for filling in reasonable values here. 628 * A node id of "-1" means "use current node". In other words, if a bus 629 * has a -1 node id, it's not tightly coupled to any particular chunk 630 * of memory (as is the case on some Nehalem systems). 631 */ 632 #ifdef CONFIG_NUMA 633 634 #define BUS_NR 256 635 636 #ifdef CONFIG_X86_64 637 638 static int mp_bus_to_node[BUS_NR] = { 639 [0 ... BUS_NR - 1] = -1 640 }; 641 642 void set_mp_bus_to_node(int busnum, int node) 643 { 644 if (busnum >= 0 && busnum < BUS_NR) 645 mp_bus_to_node[busnum] = node; 646 } 647 648 int get_mp_bus_to_node(int busnum) 649 { 650 int node = -1; 651 652 if (busnum < 0 || busnum > (BUS_NR - 1)) 653 return node; 654 655 node = mp_bus_to_node[busnum]; 656 657 /* 658 * let numa_node_id to decide it later in dma_alloc_pages 659 * if there is no ram on that node 660 */ 661 if (node != -1 && !node_online(node)) 662 node = -1; 663 664 return node; 665 } 666 667 #else /* CONFIG_X86_32 */ 668 669 static int mp_bus_to_node[BUS_NR] = { 670 [0 ... BUS_NR - 1] = -1 671 }; 672 673 void set_mp_bus_to_node(int busnum, int node) 674 { 675 if (busnum >= 0 && busnum < BUS_NR) 676 mp_bus_to_node[busnum] = (unsigned char) node; 677 } 678 679 int get_mp_bus_to_node(int busnum) 680 { 681 int node; 682 683 if (busnum < 0 || busnum > (BUS_NR - 1)) 684 return 0; 685 node = mp_bus_to_node[busnum]; 686 return node; 687 } 688 689 #endif /* CONFIG_X86_32 */ 690 691 #endif /* CONFIG_NUMA */ 692