1 // SPDX-License-Identifier: GPL-2.0 2 #include <linux/pci.h> 3 #include <linux/acpi.h> 4 #include <linux/init.h> 5 #include <linux/irq.h> 6 #include <linux/dmi.h> 7 #include <linux/slab.h> 8 #include <linux/pci-acpi.h> 9 #include <asm/numa.h> 10 #include <asm/pci_x86.h> 11 #include <asm/e820/api.h> 12 13 struct pci_root_info { 14 struct acpi_pci_root_info common; 15 struct pci_sysdata sd; 16 #ifdef CONFIG_PCI_MMCONFIG 17 bool mcfg_added; 18 u8 start_bus; 19 u8 end_bus; 20 #endif 21 }; 22 23 static bool pci_use_e820 = true; 24 static bool pci_use_crs = true; 25 static bool pci_ignore_seg; 26 27 static int __init set_use_crs(const struct dmi_system_id *id) 28 { 29 pci_use_crs = true; 30 return 0; 31 } 32 33 static int __init set_nouse_crs(const struct dmi_system_id *id) 34 { 35 pci_use_crs = false; 36 return 0; 37 } 38 39 static int __init set_ignore_seg(const struct dmi_system_id *id) 40 { 41 printk(KERN_INFO "PCI: %s detected: ignoring ACPI _SEG\n", id->ident); 42 pci_ignore_seg = true; 43 return 0; 44 } 45 46 static int __init set_no_e820(const struct dmi_system_id *id) 47 { 48 printk(KERN_INFO "PCI: %s detected: not clipping E820 regions from _CRS\n", 49 id->ident); 50 pci_use_e820 = false; 51 return 0; 52 } 53 54 static const struct dmi_system_id pci_crs_quirks[] __initconst = { 55 /* http://bugzilla.kernel.org/show_bug.cgi?id=14183 */ 56 { 57 .callback = set_use_crs, 58 .ident = "IBM System x3800", 59 .matches = { 60 DMI_MATCH(DMI_SYS_VENDOR, "IBM"), 61 DMI_MATCH(DMI_PRODUCT_NAME, "x3800"), 62 }, 63 }, 64 /* https://bugzilla.kernel.org/show_bug.cgi?id=16007 */ 65 /* 2006 AMD HT/VIA system with two host bridges */ 66 { 67 .callback = set_use_crs, 68 .ident = "ASRock ALiveSATA2-GLAN", 69 .matches = { 70 DMI_MATCH(DMI_PRODUCT_NAME, "ALiveSATA2-GLAN"), 71 }, 72 }, 73 /* https://bugzilla.kernel.org/show_bug.cgi?id=30552 */ 74 /* 2006 AMD HT/VIA system with two host bridges */ 75 { 76 .callback = set_use_crs, 77 .ident = "ASUS M2V-MX SE", 78 .matches = { 79 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), 80 DMI_MATCH(DMI_BOARD_NAME, "M2V-MX SE"), 81 DMI_MATCH(DMI_BIOS_VENDOR, "American Megatrends Inc."), 82 }, 83 }, 84 /* https://bugzilla.kernel.org/show_bug.cgi?id=42619 */ 85 { 86 .callback = set_use_crs, 87 .ident = "MSI MS-7253", 88 .matches = { 89 DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"), 90 DMI_MATCH(DMI_BOARD_NAME, "MS-7253"), 91 DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies, LTD"), 92 }, 93 }, 94 /* https://bugs.launchpad.net/ubuntu/+source/alsa-driver/+bug/931368 */ 95 /* https://bugs.launchpad.net/ubuntu/+source/alsa-driver/+bug/1033299 */ 96 { 97 .callback = set_use_crs, 98 .ident = "Foxconn K8M890-8237A", 99 .matches = { 100 DMI_MATCH(DMI_BOARD_VENDOR, "Foxconn"), 101 DMI_MATCH(DMI_BOARD_NAME, "K8M890-8237A"), 102 DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies, LTD"), 103 }, 104 }, 105 106 /* Now for the blacklist.. */ 107 108 /* https://bugzilla.redhat.com/show_bug.cgi?id=769657 */ 109 { 110 .callback = set_nouse_crs, 111 .ident = "Dell Studio 1557", 112 .matches = { 113 DMI_MATCH(DMI_BOARD_VENDOR, "Dell Inc."), 114 DMI_MATCH(DMI_PRODUCT_NAME, "Studio 1557"), 115 DMI_MATCH(DMI_BIOS_VERSION, "A09"), 116 }, 117 }, 118 /* https://bugzilla.redhat.com/show_bug.cgi?id=769657 */ 119 { 120 .callback = set_nouse_crs, 121 .ident = "Thinkpad SL510", 122 .matches = { 123 DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"), 124 DMI_MATCH(DMI_BOARD_NAME, "2847DFG"), 125 DMI_MATCH(DMI_BIOS_VERSION, "6JET85WW (1.43 )"), 126 }, 127 }, 128 /* https://bugzilla.kernel.org/show_bug.cgi?id=42606 */ 129 { 130 .callback = set_nouse_crs, 131 .ident = "Supermicro X8DTH", 132 .matches = { 133 DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"), 134 DMI_MATCH(DMI_PRODUCT_NAME, "X8DTH-i/6/iF/6F"), 135 DMI_MATCH(DMI_BIOS_VERSION, "2.0a"), 136 }, 137 }, 138 139 /* https://bugzilla.kernel.org/show_bug.cgi?id=15362 */ 140 { 141 .callback = set_ignore_seg, 142 .ident = "HP xw9300", 143 .matches = { 144 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), 145 DMI_MATCH(DMI_PRODUCT_NAME, "HP xw9300 Workstation"), 146 }, 147 }, 148 149 /* 150 * Many Lenovo models with "IIL" in their DMI_PRODUCT_VERSION have 151 * an E820 reserved region that covers the entire 32-bit host 152 * bridge memory window from _CRS. Using the E820 region to clip 153 * _CRS means no space is available for hot-added or uninitialized 154 * PCI devices. This typically breaks I2C controllers for touchpads 155 * and hot-added Thunderbolt devices. See the commit log for 156 * models known to require this quirk and related bug reports. 157 */ 158 { 159 .callback = set_no_e820, 160 .ident = "Lenovo *IIL* product version", 161 .matches = { 162 DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), 163 DMI_MATCH(DMI_PRODUCT_VERSION, "IIL"), 164 }, 165 }, 166 167 /* 168 * The Acer Spin 5 (SP513-54N) has the same E820 reservation covering 169 * the entire _CRS 32-bit window issue as the Lenovo *IIL* models. 170 * See https://bugs.launchpad.net/bugs/1884232 171 */ 172 { 173 .callback = set_no_e820, 174 .ident = "Acer Spin 5 (SP513-54N)", 175 .matches = { 176 DMI_MATCH(DMI_SYS_VENDOR, "Acer"), 177 DMI_MATCH(DMI_PRODUCT_NAME, "Spin SP513-54N"), 178 }, 179 }, 180 181 /* 182 * Clevo X170KM-G barebones have the same E820 reservation covering 183 * the entire _CRS 32-bit window issue as the Lenovo *IIL* models. 184 * See https://bugzilla.kernel.org/show_bug.cgi?id=214259 185 */ 186 { 187 .callback = set_no_e820, 188 .ident = "Clevo X170KM-G Barebone", 189 .matches = { 190 DMI_MATCH(DMI_BOARD_NAME, "X170KM-G"), 191 }, 192 }, 193 {} 194 }; 195 196 void __init pci_acpi_crs_quirks(void) 197 { 198 int year = dmi_get_bios_year(); 199 200 if (year >= 0 && year < 2008 && iomem_resource.end <= 0xffffffff) 201 pci_use_crs = false; 202 203 /* 204 * Some firmware includes unusable space (host bridge registers, 205 * hidden PCI device BARs, etc) in PCI host bridge _CRS. This is a 206 * firmware defect, and 4dc2287c1805 ("x86: avoid E820 regions when 207 * allocating address space") has clipped out the unusable space in 208 * the past. 209 * 210 * But other firmware supplies E820 reserved regions that cover 211 * entire _CRS windows, so clipping throws away the entire window, 212 * leaving none for hot-added or uninitialized devices. These E820 213 * entries are probably *not* a firmware defect, so disable the 214 * clipping by default for post-2022 machines. 215 * 216 * We already have quirks to disable clipping for pre-2023 217 * machines, and we'll likely need quirks to *enable* clipping for 218 * post-2022 machines that incorrectly include unusable space in 219 * _CRS. 220 */ 221 if (year >= 2023) 222 pci_use_e820 = false; 223 224 dmi_check_system(pci_crs_quirks); 225 226 /* 227 * If the user specifies "pci=use_crs" or "pci=nocrs" explicitly, that 228 * takes precedence over anything we figured out above. 229 */ 230 if (pci_probe & PCI_ROOT_NO_CRS) 231 pci_use_crs = false; 232 else if (pci_probe & PCI_USE__CRS) 233 pci_use_crs = true; 234 235 printk(KERN_INFO "PCI: %s host bridge windows from ACPI; " 236 "if necessary, use \"pci=%s\" and report a bug\n", 237 pci_use_crs ? "Using" : "Ignoring", 238 pci_use_crs ? "nocrs" : "use_crs"); 239 240 /* "pci=use_e820"/"pci=no_e820" on the kernel cmdline takes precedence */ 241 if (pci_probe & PCI_NO_E820) 242 pci_use_e820 = false; 243 else if (pci_probe & PCI_USE_E820) 244 pci_use_e820 = true; 245 246 printk(KERN_INFO "PCI: %s E820 reservations for host bridge windows\n", 247 pci_use_e820 ? "Using" : "Ignoring"); 248 if (pci_probe & (PCI_NO_E820 | PCI_USE_E820)) 249 printk(KERN_INFO "PCI: Please notify linux-pci@vger.kernel.org so future kernels can this automatically\n"); 250 } 251 252 #ifdef CONFIG_PCI_MMCONFIG 253 static int check_segment(u16 seg, struct device *dev, char *estr) 254 { 255 if (seg) { 256 dev_err(dev, 257 "%s can't access PCI configuration " 258 "space under this host bridge.\n", 259 estr); 260 return -EIO; 261 } 262 263 /* 264 * Failure in adding MMCFG information is not fatal, 265 * just can't access extended configuration space of 266 * devices under this host bridge. 267 */ 268 dev_warn(dev, 269 "%s can't access extended PCI configuration " 270 "space under this bridge.\n", 271 estr); 272 273 return 0; 274 } 275 276 static int setup_mcfg_map(struct acpi_pci_root_info *ci) 277 { 278 int result, seg; 279 struct pci_root_info *info; 280 struct acpi_pci_root *root = ci->root; 281 struct device *dev = &ci->bridge->dev; 282 283 info = container_of(ci, struct pci_root_info, common); 284 info->start_bus = (u8)root->secondary.start; 285 info->end_bus = (u8)root->secondary.end; 286 info->mcfg_added = false; 287 seg = info->sd.domain; 288 289 /* return success if MMCFG is not in use */ 290 if (raw_pci_ext_ops && raw_pci_ext_ops != &pci_mmcfg) 291 return 0; 292 293 if (!(pci_probe & PCI_PROBE_MMCONF)) 294 return check_segment(seg, dev, "MMCONFIG is disabled,"); 295 296 result = pci_mmconfig_insert(dev, seg, info->start_bus, info->end_bus, 297 root->mcfg_addr); 298 if (result == 0) { 299 /* enable MMCFG if it hasn't been enabled yet */ 300 if (raw_pci_ext_ops == NULL) 301 raw_pci_ext_ops = &pci_mmcfg; 302 info->mcfg_added = true; 303 } else if (result != -EEXIST) 304 return check_segment(seg, dev, 305 "fail to add MMCONFIG information,"); 306 307 return 0; 308 } 309 310 static void teardown_mcfg_map(struct acpi_pci_root_info *ci) 311 { 312 struct pci_root_info *info; 313 314 info = container_of(ci, struct pci_root_info, common); 315 if (info->mcfg_added) { 316 pci_mmconfig_delete(info->sd.domain, 317 info->start_bus, info->end_bus); 318 info->mcfg_added = false; 319 } 320 } 321 #else 322 static int setup_mcfg_map(struct acpi_pci_root_info *ci) 323 { 324 return 0; 325 } 326 327 static void teardown_mcfg_map(struct acpi_pci_root_info *ci) 328 { 329 } 330 #endif 331 332 static int pci_acpi_root_get_node(struct acpi_pci_root *root) 333 { 334 int busnum = root->secondary.start; 335 struct acpi_device *device = root->device; 336 int node = acpi_get_node(device->handle); 337 338 if (node == NUMA_NO_NODE) { 339 node = x86_pci_root_bus_node(busnum); 340 if (node != 0 && node != NUMA_NO_NODE) 341 dev_info(&device->dev, FW_BUG "no _PXM; falling back to node %d from hardware (may be inconsistent with ACPI node numbers)\n", 342 node); 343 } 344 if (node != NUMA_NO_NODE && !node_online(node)) 345 node = NUMA_NO_NODE; 346 347 return node; 348 } 349 350 static int pci_acpi_root_init_info(struct acpi_pci_root_info *ci) 351 { 352 return setup_mcfg_map(ci); 353 } 354 355 static void pci_acpi_root_release_info(struct acpi_pci_root_info *ci) 356 { 357 teardown_mcfg_map(ci); 358 kfree(container_of(ci, struct pci_root_info, common)); 359 } 360 361 /* 362 * An IO port or MMIO resource assigned to a PCI host bridge may be 363 * consumed by the host bridge itself or available to its child 364 * bus/devices. The ACPI specification defines a bit (Producer/Consumer) 365 * to tell whether the resource is consumed by the host bridge itself, 366 * but firmware hasn't used that bit consistently, so we can't rely on it. 367 * 368 * On x86 and IA64 platforms, all IO port and MMIO resources are assumed 369 * to be available to child bus/devices except one special case: 370 * IO port [0xCF8-0xCFF] is consumed by the host bridge itself 371 * to access PCI configuration space. 372 * 373 * So explicitly filter out PCI CFG IO ports[0xCF8-0xCFF]. 374 */ 375 static bool resource_is_pcicfg_ioport(struct resource *res) 376 { 377 return (res->flags & IORESOURCE_IO) && 378 res->start == 0xCF8 && res->end == 0xCFF; 379 } 380 381 static int pci_acpi_root_prepare_resources(struct acpi_pci_root_info *ci) 382 { 383 struct acpi_device *device = ci->bridge; 384 int busnum = ci->root->secondary.start; 385 struct resource_entry *entry, *tmp; 386 int status; 387 388 status = acpi_pci_probe_root_resources(ci); 389 390 if (pci_use_e820) { 391 resource_list_for_each_entry(entry, &ci->resources) 392 remove_e820_regions(&device->dev, entry->res); 393 } 394 395 if (pci_use_crs) { 396 resource_list_for_each_entry_safe(entry, tmp, &ci->resources) 397 if (resource_is_pcicfg_ioport(entry->res)) 398 resource_list_destroy_entry(entry); 399 return status; 400 } 401 402 resource_list_for_each_entry_safe(entry, tmp, &ci->resources) { 403 dev_printk(KERN_DEBUG, &device->dev, 404 "host bridge window %pR (ignored)\n", entry->res); 405 resource_list_destroy_entry(entry); 406 } 407 x86_pci_root_bus_resources(busnum, &ci->resources); 408 409 return 0; 410 } 411 412 static struct acpi_pci_root_ops acpi_pci_root_ops = { 413 .pci_ops = &pci_root_ops, 414 .init_info = pci_acpi_root_init_info, 415 .release_info = pci_acpi_root_release_info, 416 .prepare_resources = pci_acpi_root_prepare_resources, 417 }; 418 419 struct pci_bus *pci_acpi_scan_root(struct acpi_pci_root *root) 420 { 421 int domain = root->segment; 422 int busnum = root->secondary.start; 423 int node = pci_acpi_root_get_node(root); 424 struct pci_bus *bus; 425 426 if (pci_ignore_seg) 427 root->segment = domain = 0; 428 429 if (domain && !pci_domains_supported) { 430 printk(KERN_WARNING "pci_bus %04x:%02x: " 431 "ignored (multiple domains not supported)\n", 432 domain, busnum); 433 return NULL; 434 } 435 436 bus = pci_find_bus(domain, busnum); 437 if (bus) { 438 /* 439 * If the desired bus has been scanned already, replace 440 * its bus->sysdata. 441 */ 442 struct pci_sysdata sd = { 443 .domain = domain, 444 .node = node, 445 .companion = root->device 446 }; 447 448 memcpy(bus->sysdata, &sd, sizeof(sd)); 449 } else { 450 struct pci_root_info *info; 451 452 info = kzalloc(sizeof(*info), GFP_KERNEL); 453 if (!info) 454 dev_err(&root->device->dev, 455 "pci_bus %04x:%02x: ignored (out of memory)\n", 456 domain, busnum); 457 else { 458 info->sd.domain = domain; 459 info->sd.node = node; 460 info->sd.companion = root->device; 461 bus = acpi_pci_root_create(root, &acpi_pci_root_ops, 462 &info->common, &info->sd); 463 } 464 } 465 466 /* After the PCI-E bus has been walked and all devices discovered, 467 * configure any settings of the fabric that might be necessary. 468 */ 469 if (bus) { 470 struct pci_bus *child; 471 list_for_each_entry(child, &bus->children, node) 472 pcie_bus_configure_settings(child); 473 } 474 475 return bus; 476 } 477 478 int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge) 479 { 480 /* 481 * We pass NULL as parent to pci_create_root_bus(), so if it is not NULL 482 * here, pci_create_root_bus() has been called by someone else and 483 * sysdata is likely to be different from what we expect. Let it go in 484 * that case. 485 */ 486 if (!bridge->dev.parent) { 487 struct pci_sysdata *sd = bridge->bus->sysdata; 488 ACPI_COMPANION_SET(&bridge->dev, sd->companion); 489 } 490 return 0; 491 } 492 493 int __init pci_acpi_init(void) 494 { 495 struct pci_dev *dev = NULL; 496 497 if (acpi_noirq) 498 return -ENODEV; 499 500 printk(KERN_INFO "PCI: Using ACPI for IRQ routing\n"); 501 acpi_irq_penalty_init(); 502 pcibios_enable_irq = acpi_pci_irq_enable; 503 pcibios_disable_irq = acpi_pci_irq_disable; 504 x86_init.pci.init_irq = x86_init_noop; 505 506 if (pci_routeirq) { 507 /* 508 * PCI IRQ routing is set up by pci_enable_device(), but we 509 * also do it here in case there are still broken drivers that 510 * don't use pci_enable_device(). 511 */ 512 printk(KERN_INFO "PCI: Routing PCI interrupts for all devices because \"pci=routeirq\" specified\n"); 513 for_each_pci_dev(dev) 514 acpi_pci_irq_enable(dev); 515 } 516 517 return 0; 518 } 519