1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * linux/arch/x86_64/mm/init.c 4 * 5 * Copyright (C) 1995 Linus Torvalds 6 * Copyright (C) 2000 Pavel Machek <pavel@ucw.cz> 7 * Copyright (C) 2002,2003 Andi Kleen <ak@suse.de> 8 */ 9 10 #include <linux/signal.h> 11 #include <linux/sched.h> 12 #include <linux/kernel.h> 13 #include <linux/errno.h> 14 #include <linux/string.h> 15 #include <linux/types.h> 16 #include <linux/ptrace.h> 17 #include <linux/mman.h> 18 #include <linux/mm.h> 19 #include <linux/swap.h> 20 #include <linux/smp.h> 21 #include <linux/init.h> 22 #include <linux/initrd.h> 23 #include <linux/pagemap.h> 24 #include <linux/memblock.h> 25 #include <linux/proc_fs.h> 26 #include <linux/pci.h> 27 #include <linux/pfn.h> 28 #include <linux/poison.h> 29 #include <linux/dma-mapping.h> 30 #include <linux/memory.h> 31 #include <linux/memory_hotplug.h> 32 #include <linux/memremap.h> 33 #include <linux/nmi.h> 34 #include <linux/gfp.h> 35 #include <linux/kcore.h> 36 37 #include <asm/processor.h> 38 #include <asm/bios_ebda.h> 39 #include <linux/uaccess.h> 40 #include <asm/pgtable.h> 41 #include <asm/pgalloc.h> 42 #include <asm/dma.h> 43 #include <asm/fixmap.h> 44 #include <asm/e820/api.h> 45 #include <asm/apic.h> 46 #include <asm/tlb.h> 47 #include <asm/mmu_context.h> 48 #include <asm/proto.h> 49 #include <asm/smp.h> 50 #include <asm/sections.h> 51 #include <asm/kdebug.h> 52 #include <asm/numa.h> 53 #include <asm/set_memory.h> 54 #include <asm/init.h> 55 #include <asm/uv/uv.h> 56 #include <asm/setup.h> 57 58 #include "mm_internal.h" 59 60 #include "ident_map.c" 61 62 #define DEFINE_POPULATE(fname, type1, type2, init) \ 63 static inline void fname##_init(struct mm_struct *mm, \ 64 type1##_t *arg1, type2##_t *arg2, bool init) \ 65 { \ 66 if (init) \ 67 fname##_safe(mm, arg1, arg2); \ 68 else \ 69 fname(mm, arg1, arg2); \ 70 } 71 72 DEFINE_POPULATE(p4d_populate, p4d, pud, init) 73 DEFINE_POPULATE(pgd_populate, pgd, p4d, init) 74 DEFINE_POPULATE(pud_populate, pud, pmd, init) 75 DEFINE_POPULATE(pmd_populate_kernel, pmd, pte, init) 76 77 #define DEFINE_ENTRY(type1, type2, init) \ 78 static inline void set_##type1##_init(type1##_t *arg1, \ 79 type2##_t arg2, bool init) \ 80 { \ 81 if (init) \ 82 set_##type1##_safe(arg1, arg2); \ 83 else \ 84 set_##type1(arg1, arg2); \ 85 } 86 87 DEFINE_ENTRY(p4d, p4d, init) 88 DEFINE_ENTRY(pud, pud, init) 89 DEFINE_ENTRY(pmd, pmd, init) 90 DEFINE_ENTRY(pte, pte, init) 91 92 93 /* 94 * NOTE: pagetable_init alloc all the fixmap pagetables contiguous on the 95 * physical space so we can cache the place of the first one and move 96 * around without checking the pgd every time. 97 */ 98 99 /* Bits supported by the hardware: */ 100 pteval_t __supported_pte_mask __read_mostly = ~0; 101 /* Bits allowed in normal kernel mappings: */ 102 pteval_t __default_kernel_pte_mask __read_mostly = ~0; 103 EXPORT_SYMBOL_GPL(__supported_pte_mask); 104 /* Used in PAGE_KERNEL_* macros which are reasonably used out-of-tree: */ 105 EXPORT_SYMBOL(__default_kernel_pte_mask); 106 107 int force_personality32; 108 109 /* 110 * noexec32=on|off 111 * Control non executable heap for 32bit processes. 112 * To control the stack too use noexec=off 113 * 114 * on PROT_READ does not imply PROT_EXEC for 32-bit processes (default) 115 * off PROT_READ implies PROT_EXEC 116 */ 117 static int __init nonx32_setup(char *str) 118 { 119 if (!strcmp(str, "on")) 120 force_personality32 &= ~READ_IMPLIES_EXEC; 121 else if (!strcmp(str, "off")) 122 force_personality32 |= READ_IMPLIES_EXEC; 123 return 1; 124 } 125 __setup("noexec32=", nonx32_setup); 126 127 static void sync_global_pgds_l5(unsigned long start, unsigned long end) 128 { 129 unsigned long addr; 130 131 for (addr = start; addr <= end; addr = ALIGN(addr + 1, PGDIR_SIZE)) { 132 const pgd_t *pgd_ref = pgd_offset_k(addr); 133 struct page *page; 134 135 /* Check for overflow */ 136 if (addr < start) 137 break; 138 139 if (pgd_none(*pgd_ref)) 140 continue; 141 142 spin_lock(&pgd_lock); 143 list_for_each_entry(page, &pgd_list, lru) { 144 pgd_t *pgd; 145 spinlock_t *pgt_lock; 146 147 pgd = (pgd_t *)page_address(page) + pgd_index(addr); 148 /* the pgt_lock only for Xen */ 149 pgt_lock = &pgd_page_get_mm(page)->page_table_lock; 150 spin_lock(pgt_lock); 151 152 if (!pgd_none(*pgd_ref) && !pgd_none(*pgd)) 153 BUG_ON(pgd_page_vaddr(*pgd) != pgd_page_vaddr(*pgd_ref)); 154 155 if (pgd_none(*pgd)) 156 set_pgd(pgd, *pgd_ref); 157 158 spin_unlock(pgt_lock); 159 } 160 spin_unlock(&pgd_lock); 161 } 162 } 163 164 static void sync_global_pgds_l4(unsigned long start, unsigned long end) 165 { 166 unsigned long addr; 167 168 for (addr = start; addr <= end; addr = ALIGN(addr + 1, PGDIR_SIZE)) { 169 pgd_t *pgd_ref = pgd_offset_k(addr); 170 const p4d_t *p4d_ref; 171 struct page *page; 172 173 /* 174 * With folded p4d, pgd_none() is always false, we need to 175 * handle synchonization on p4d level. 176 */ 177 MAYBE_BUILD_BUG_ON(pgd_none(*pgd_ref)); 178 p4d_ref = p4d_offset(pgd_ref, addr); 179 180 if (p4d_none(*p4d_ref)) 181 continue; 182 183 spin_lock(&pgd_lock); 184 list_for_each_entry(page, &pgd_list, lru) { 185 pgd_t *pgd; 186 p4d_t *p4d; 187 spinlock_t *pgt_lock; 188 189 pgd = (pgd_t *)page_address(page) + pgd_index(addr); 190 p4d = p4d_offset(pgd, addr); 191 /* the pgt_lock only for Xen */ 192 pgt_lock = &pgd_page_get_mm(page)->page_table_lock; 193 spin_lock(pgt_lock); 194 195 if (!p4d_none(*p4d_ref) && !p4d_none(*p4d)) 196 BUG_ON(p4d_page_vaddr(*p4d) 197 != p4d_page_vaddr(*p4d_ref)); 198 199 if (p4d_none(*p4d)) 200 set_p4d(p4d, *p4d_ref); 201 202 spin_unlock(pgt_lock); 203 } 204 spin_unlock(&pgd_lock); 205 } 206 } 207 208 /* 209 * When memory was added make sure all the processes MM have 210 * suitable PGD entries in the local PGD level page. 211 */ 212 void sync_global_pgds(unsigned long start, unsigned long end) 213 { 214 if (pgtable_l5_enabled()) 215 sync_global_pgds_l5(start, end); 216 else 217 sync_global_pgds_l4(start, end); 218 } 219 220 /* 221 * NOTE: This function is marked __ref because it calls __init function 222 * (alloc_bootmem_pages). It's safe to do it ONLY when after_bootmem == 0. 223 */ 224 static __ref void *spp_getpage(void) 225 { 226 void *ptr; 227 228 if (after_bootmem) 229 ptr = (void *) get_zeroed_page(GFP_ATOMIC); 230 else 231 ptr = memblock_alloc(PAGE_SIZE, PAGE_SIZE); 232 233 if (!ptr || ((unsigned long)ptr & ~PAGE_MASK)) { 234 panic("set_pte_phys: cannot allocate page data %s\n", 235 after_bootmem ? "after bootmem" : ""); 236 } 237 238 pr_debug("spp_getpage %p\n", ptr); 239 240 return ptr; 241 } 242 243 static p4d_t *fill_p4d(pgd_t *pgd, unsigned long vaddr) 244 { 245 if (pgd_none(*pgd)) { 246 p4d_t *p4d = (p4d_t *)spp_getpage(); 247 pgd_populate(&init_mm, pgd, p4d); 248 if (p4d != p4d_offset(pgd, 0)) 249 printk(KERN_ERR "PAGETABLE BUG #00! %p <-> %p\n", 250 p4d, p4d_offset(pgd, 0)); 251 } 252 return p4d_offset(pgd, vaddr); 253 } 254 255 static pud_t *fill_pud(p4d_t *p4d, unsigned long vaddr) 256 { 257 if (p4d_none(*p4d)) { 258 pud_t *pud = (pud_t *)spp_getpage(); 259 p4d_populate(&init_mm, p4d, pud); 260 if (pud != pud_offset(p4d, 0)) 261 printk(KERN_ERR "PAGETABLE BUG #01! %p <-> %p\n", 262 pud, pud_offset(p4d, 0)); 263 } 264 return pud_offset(p4d, vaddr); 265 } 266 267 static pmd_t *fill_pmd(pud_t *pud, unsigned long vaddr) 268 { 269 if (pud_none(*pud)) { 270 pmd_t *pmd = (pmd_t *) spp_getpage(); 271 pud_populate(&init_mm, pud, pmd); 272 if (pmd != pmd_offset(pud, 0)) 273 printk(KERN_ERR "PAGETABLE BUG #02! %p <-> %p\n", 274 pmd, pmd_offset(pud, 0)); 275 } 276 return pmd_offset(pud, vaddr); 277 } 278 279 static pte_t *fill_pte(pmd_t *pmd, unsigned long vaddr) 280 { 281 if (pmd_none(*pmd)) { 282 pte_t *pte = (pte_t *) spp_getpage(); 283 pmd_populate_kernel(&init_mm, pmd, pte); 284 if (pte != pte_offset_kernel(pmd, 0)) 285 printk(KERN_ERR "PAGETABLE BUG #03!\n"); 286 } 287 return pte_offset_kernel(pmd, vaddr); 288 } 289 290 static void __set_pte_vaddr(pud_t *pud, unsigned long vaddr, pte_t new_pte) 291 { 292 pmd_t *pmd = fill_pmd(pud, vaddr); 293 pte_t *pte = fill_pte(pmd, vaddr); 294 295 set_pte(pte, new_pte); 296 297 /* 298 * It's enough to flush this one mapping. 299 * (PGE mappings get flushed as well) 300 */ 301 __flush_tlb_one_kernel(vaddr); 302 } 303 304 void set_pte_vaddr_p4d(p4d_t *p4d_page, unsigned long vaddr, pte_t new_pte) 305 { 306 p4d_t *p4d = p4d_page + p4d_index(vaddr); 307 pud_t *pud = fill_pud(p4d, vaddr); 308 309 __set_pte_vaddr(pud, vaddr, new_pte); 310 } 311 312 void set_pte_vaddr_pud(pud_t *pud_page, unsigned long vaddr, pte_t new_pte) 313 { 314 pud_t *pud = pud_page + pud_index(vaddr); 315 316 __set_pte_vaddr(pud, vaddr, new_pte); 317 } 318 319 void set_pte_vaddr(unsigned long vaddr, pte_t pteval) 320 { 321 pgd_t *pgd; 322 p4d_t *p4d_page; 323 324 pr_debug("set_pte_vaddr %lx to %lx\n", vaddr, native_pte_val(pteval)); 325 326 pgd = pgd_offset_k(vaddr); 327 if (pgd_none(*pgd)) { 328 printk(KERN_ERR 329 "PGD FIXMAP MISSING, it should be setup in head.S!\n"); 330 return; 331 } 332 333 p4d_page = p4d_offset(pgd, 0); 334 set_pte_vaddr_p4d(p4d_page, vaddr, pteval); 335 } 336 337 pmd_t * __init populate_extra_pmd(unsigned long vaddr) 338 { 339 pgd_t *pgd; 340 p4d_t *p4d; 341 pud_t *pud; 342 343 pgd = pgd_offset_k(vaddr); 344 p4d = fill_p4d(pgd, vaddr); 345 pud = fill_pud(p4d, vaddr); 346 return fill_pmd(pud, vaddr); 347 } 348 349 pte_t * __init populate_extra_pte(unsigned long vaddr) 350 { 351 pmd_t *pmd; 352 353 pmd = populate_extra_pmd(vaddr); 354 return fill_pte(pmd, vaddr); 355 } 356 357 /* 358 * Create large page table mappings for a range of physical addresses. 359 */ 360 static void __init __init_extra_mapping(unsigned long phys, unsigned long size, 361 enum page_cache_mode cache) 362 { 363 pgd_t *pgd; 364 p4d_t *p4d; 365 pud_t *pud; 366 pmd_t *pmd; 367 pgprot_t prot; 368 369 pgprot_val(prot) = pgprot_val(PAGE_KERNEL_LARGE) | 370 pgprot_val(pgprot_4k_2_large(cachemode2pgprot(cache))); 371 BUG_ON((phys & ~PMD_MASK) || (size & ~PMD_MASK)); 372 for (; size; phys += PMD_SIZE, size -= PMD_SIZE) { 373 pgd = pgd_offset_k((unsigned long)__va(phys)); 374 if (pgd_none(*pgd)) { 375 p4d = (p4d_t *) spp_getpage(); 376 set_pgd(pgd, __pgd(__pa(p4d) | _KERNPG_TABLE | 377 _PAGE_USER)); 378 } 379 p4d = p4d_offset(pgd, (unsigned long)__va(phys)); 380 if (p4d_none(*p4d)) { 381 pud = (pud_t *) spp_getpage(); 382 set_p4d(p4d, __p4d(__pa(pud) | _KERNPG_TABLE | 383 _PAGE_USER)); 384 } 385 pud = pud_offset(p4d, (unsigned long)__va(phys)); 386 if (pud_none(*pud)) { 387 pmd = (pmd_t *) spp_getpage(); 388 set_pud(pud, __pud(__pa(pmd) | _KERNPG_TABLE | 389 _PAGE_USER)); 390 } 391 pmd = pmd_offset(pud, phys); 392 BUG_ON(!pmd_none(*pmd)); 393 set_pmd(pmd, __pmd(phys | pgprot_val(prot))); 394 } 395 } 396 397 void __init init_extra_mapping_wb(unsigned long phys, unsigned long size) 398 { 399 __init_extra_mapping(phys, size, _PAGE_CACHE_MODE_WB); 400 } 401 402 void __init init_extra_mapping_uc(unsigned long phys, unsigned long size) 403 { 404 __init_extra_mapping(phys, size, _PAGE_CACHE_MODE_UC); 405 } 406 407 /* 408 * The head.S code sets up the kernel high mapping: 409 * 410 * from __START_KERNEL_map to __START_KERNEL_map + size (== _end-_text) 411 * 412 * phys_base holds the negative offset to the kernel, which is added 413 * to the compile time generated pmds. This results in invalid pmds up 414 * to the point where we hit the physaddr 0 mapping. 415 * 416 * We limit the mappings to the region from _text to _brk_end. _brk_end 417 * is rounded up to the 2MB boundary. This catches the invalid pmds as 418 * well, as they are located before _text: 419 */ 420 void __init cleanup_highmap(void) 421 { 422 unsigned long vaddr = __START_KERNEL_map; 423 unsigned long vaddr_end = __START_KERNEL_map + KERNEL_IMAGE_SIZE; 424 unsigned long end = roundup((unsigned long)_brk_end, PMD_SIZE) - 1; 425 pmd_t *pmd = level2_kernel_pgt; 426 427 /* 428 * Native path, max_pfn_mapped is not set yet. 429 * Xen has valid max_pfn_mapped set in 430 * arch/x86/xen/mmu.c:xen_setup_kernel_pagetable(). 431 */ 432 if (max_pfn_mapped) 433 vaddr_end = __START_KERNEL_map + (max_pfn_mapped << PAGE_SHIFT); 434 435 for (; vaddr + PMD_SIZE - 1 < vaddr_end; pmd++, vaddr += PMD_SIZE) { 436 if (pmd_none(*pmd)) 437 continue; 438 if (vaddr < (unsigned long) _text || vaddr > end) 439 set_pmd(pmd, __pmd(0)); 440 } 441 } 442 443 /* 444 * Create PTE level page table mapping for physical addresses. 445 * It returns the last physical address mapped. 446 */ 447 static unsigned long __meminit 448 phys_pte_init(pte_t *pte_page, unsigned long paddr, unsigned long paddr_end, 449 pgprot_t prot, bool init) 450 { 451 unsigned long pages = 0, paddr_next; 452 unsigned long paddr_last = paddr_end; 453 pte_t *pte; 454 int i; 455 456 pte = pte_page + pte_index(paddr); 457 i = pte_index(paddr); 458 459 for (; i < PTRS_PER_PTE; i++, paddr = paddr_next, pte++) { 460 paddr_next = (paddr & PAGE_MASK) + PAGE_SIZE; 461 if (paddr >= paddr_end) { 462 if (!after_bootmem && 463 !e820__mapped_any(paddr & PAGE_MASK, paddr_next, 464 E820_TYPE_RAM) && 465 !e820__mapped_any(paddr & PAGE_MASK, paddr_next, 466 E820_TYPE_RESERVED_KERN)) 467 set_pte_init(pte, __pte(0), init); 468 continue; 469 } 470 471 /* 472 * We will re-use the existing mapping. 473 * Xen for example has some special requirements, like mapping 474 * pagetable pages as RO. So assume someone who pre-setup 475 * these mappings are more intelligent. 476 */ 477 if (!pte_none(*pte)) { 478 if (!after_bootmem) 479 pages++; 480 continue; 481 } 482 483 if (0) 484 pr_info(" pte=%p addr=%lx pte=%016lx\n", pte, paddr, 485 pfn_pte(paddr >> PAGE_SHIFT, PAGE_KERNEL).pte); 486 pages++; 487 set_pte_init(pte, pfn_pte(paddr >> PAGE_SHIFT, prot), init); 488 paddr_last = (paddr & PAGE_MASK) + PAGE_SIZE; 489 } 490 491 update_page_count(PG_LEVEL_4K, pages); 492 493 return paddr_last; 494 } 495 496 /* 497 * Create PMD level page table mapping for physical addresses. The virtual 498 * and physical address have to be aligned at this level. 499 * It returns the last physical address mapped. 500 */ 501 static unsigned long __meminit 502 phys_pmd_init(pmd_t *pmd_page, unsigned long paddr, unsigned long paddr_end, 503 unsigned long page_size_mask, pgprot_t prot, bool init) 504 { 505 unsigned long pages = 0, paddr_next; 506 unsigned long paddr_last = paddr_end; 507 508 int i = pmd_index(paddr); 509 510 for (; i < PTRS_PER_PMD; i++, paddr = paddr_next) { 511 pmd_t *pmd = pmd_page + pmd_index(paddr); 512 pte_t *pte; 513 pgprot_t new_prot = prot; 514 515 paddr_next = (paddr & PMD_MASK) + PMD_SIZE; 516 if (paddr >= paddr_end) { 517 if (!after_bootmem && 518 !e820__mapped_any(paddr & PMD_MASK, paddr_next, 519 E820_TYPE_RAM) && 520 !e820__mapped_any(paddr & PMD_MASK, paddr_next, 521 E820_TYPE_RESERVED_KERN)) 522 set_pmd_init(pmd, __pmd(0), init); 523 continue; 524 } 525 526 if (!pmd_none(*pmd)) { 527 if (!pmd_large(*pmd)) { 528 spin_lock(&init_mm.page_table_lock); 529 pte = (pte_t *)pmd_page_vaddr(*pmd); 530 paddr_last = phys_pte_init(pte, paddr, 531 paddr_end, prot, 532 init); 533 spin_unlock(&init_mm.page_table_lock); 534 continue; 535 } 536 /* 537 * If we are ok with PG_LEVEL_2M mapping, then we will 538 * use the existing mapping, 539 * 540 * Otherwise, we will split the large page mapping but 541 * use the same existing protection bits except for 542 * large page, so that we don't violate Intel's TLB 543 * Application note (317080) which says, while changing 544 * the page sizes, new and old translations should 545 * not differ with respect to page frame and 546 * attributes. 547 */ 548 if (page_size_mask & (1 << PG_LEVEL_2M)) { 549 if (!after_bootmem) 550 pages++; 551 paddr_last = paddr_next; 552 continue; 553 } 554 new_prot = pte_pgprot(pte_clrhuge(*(pte_t *)pmd)); 555 } 556 557 if (page_size_mask & (1<<PG_LEVEL_2M)) { 558 pages++; 559 spin_lock(&init_mm.page_table_lock); 560 set_pte_init((pte_t *)pmd, 561 pfn_pte((paddr & PMD_MASK) >> PAGE_SHIFT, 562 __pgprot(pgprot_val(prot) | _PAGE_PSE)), 563 init); 564 spin_unlock(&init_mm.page_table_lock); 565 paddr_last = paddr_next; 566 continue; 567 } 568 569 pte = alloc_low_page(); 570 paddr_last = phys_pte_init(pte, paddr, paddr_end, new_prot, init); 571 572 spin_lock(&init_mm.page_table_lock); 573 pmd_populate_kernel_init(&init_mm, pmd, pte, init); 574 spin_unlock(&init_mm.page_table_lock); 575 } 576 update_page_count(PG_LEVEL_2M, pages); 577 return paddr_last; 578 } 579 580 /* 581 * Create PUD level page table mapping for physical addresses. The virtual 582 * and physical address do not have to be aligned at this level. KASLR can 583 * randomize virtual addresses up to this level. 584 * It returns the last physical address mapped. 585 */ 586 static unsigned long __meminit 587 phys_pud_init(pud_t *pud_page, unsigned long paddr, unsigned long paddr_end, 588 unsigned long page_size_mask, bool init) 589 { 590 unsigned long pages = 0, paddr_next; 591 unsigned long paddr_last = paddr_end; 592 unsigned long vaddr = (unsigned long)__va(paddr); 593 int i = pud_index(vaddr); 594 595 for (; i < PTRS_PER_PUD; i++, paddr = paddr_next) { 596 pud_t *pud; 597 pmd_t *pmd; 598 pgprot_t prot = PAGE_KERNEL; 599 600 vaddr = (unsigned long)__va(paddr); 601 pud = pud_page + pud_index(vaddr); 602 paddr_next = (paddr & PUD_MASK) + PUD_SIZE; 603 604 if (paddr >= paddr_end) { 605 if (!after_bootmem && 606 !e820__mapped_any(paddr & PUD_MASK, paddr_next, 607 E820_TYPE_RAM) && 608 !e820__mapped_any(paddr & PUD_MASK, paddr_next, 609 E820_TYPE_RESERVED_KERN)) 610 set_pud_init(pud, __pud(0), init); 611 continue; 612 } 613 614 if (!pud_none(*pud)) { 615 if (!pud_large(*pud)) { 616 pmd = pmd_offset(pud, 0); 617 paddr_last = phys_pmd_init(pmd, paddr, 618 paddr_end, 619 page_size_mask, 620 prot, init); 621 continue; 622 } 623 /* 624 * If we are ok with PG_LEVEL_1G mapping, then we will 625 * use the existing mapping. 626 * 627 * Otherwise, we will split the gbpage mapping but use 628 * the same existing protection bits except for large 629 * page, so that we don't violate Intel's TLB 630 * Application note (317080) which says, while changing 631 * the page sizes, new and old translations should 632 * not differ with respect to page frame and 633 * attributes. 634 */ 635 if (page_size_mask & (1 << PG_LEVEL_1G)) { 636 if (!after_bootmem) 637 pages++; 638 paddr_last = paddr_next; 639 continue; 640 } 641 prot = pte_pgprot(pte_clrhuge(*(pte_t *)pud)); 642 } 643 644 if (page_size_mask & (1<<PG_LEVEL_1G)) { 645 pages++; 646 spin_lock(&init_mm.page_table_lock); 647 set_pte_init((pte_t *)pud, 648 pfn_pte((paddr & PUD_MASK) >> PAGE_SHIFT, 649 PAGE_KERNEL_LARGE), 650 init); 651 spin_unlock(&init_mm.page_table_lock); 652 paddr_last = paddr_next; 653 continue; 654 } 655 656 pmd = alloc_low_page(); 657 paddr_last = phys_pmd_init(pmd, paddr, paddr_end, 658 page_size_mask, prot, init); 659 660 spin_lock(&init_mm.page_table_lock); 661 pud_populate_init(&init_mm, pud, pmd, init); 662 spin_unlock(&init_mm.page_table_lock); 663 } 664 665 update_page_count(PG_LEVEL_1G, pages); 666 667 return paddr_last; 668 } 669 670 static unsigned long __meminit 671 phys_p4d_init(p4d_t *p4d_page, unsigned long paddr, unsigned long paddr_end, 672 unsigned long page_size_mask, bool init) 673 { 674 unsigned long vaddr, vaddr_end, vaddr_next, paddr_next, paddr_last; 675 676 paddr_last = paddr_end; 677 vaddr = (unsigned long)__va(paddr); 678 vaddr_end = (unsigned long)__va(paddr_end); 679 680 if (!pgtable_l5_enabled()) 681 return phys_pud_init((pud_t *) p4d_page, paddr, paddr_end, 682 page_size_mask, init); 683 684 for (; vaddr < vaddr_end; vaddr = vaddr_next) { 685 p4d_t *p4d = p4d_page + p4d_index(vaddr); 686 pud_t *pud; 687 688 vaddr_next = (vaddr & P4D_MASK) + P4D_SIZE; 689 paddr = __pa(vaddr); 690 691 if (paddr >= paddr_end) { 692 paddr_next = __pa(vaddr_next); 693 if (!after_bootmem && 694 !e820__mapped_any(paddr & P4D_MASK, paddr_next, 695 E820_TYPE_RAM) && 696 !e820__mapped_any(paddr & P4D_MASK, paddr_next, 697 E820_TYPE_RESERVED_KERN)) 698 set_p4d_init(p4d, __p4d(0), init); 699 continue; 700 } 701 702 if (!p4d_none(*p4d)) { 703 pud = pud_offset(p4d, 0); 704 paddr_last = phys_pud_init(pud, paddr, __pa(vaddr_end), 705 page_size_mask, init); 706 continue; 707 } 708 709 pud = alloc_low_page(); 710 paddr_last = phys_pud_init(pud, paddr, __pa(vaddr_end), 711 page_size_mask, init); 712 713 spin_lock(&init_mm.page_table_lock); 714 p4d_populate_init(&init_mm, p4d, pud, init); 715 spin_unlock(&init_mm.page_table_lock); 716 } 717 718 return paddr_last; 719 } 720 721 static unsigned long __meminit 722 __kernel_physical_mapping_init(unsigned long paddr_start, 723 unsigned long paddr_end, 724 unsigned long page_size_mask, 725 bool init) 726 { 727 bool pgd_changed = false; 728 unsigned long vaddr, vaddr_start, vaddr_end, vaddr_next, paddr_last; 729 730 paddr_last = paddr_end; 731 vaddr = (unsigned long)__va(paddr_start); 732 vaddr_end = (unsigned long)__va(paddr_end); 733 vaddr_start = vaddr; 734 735 for (; vaddr < vaddr_end; vaddr = vaddr_next) { 736 pgd_t *pgd = pgd_offset_k(vaddr); 737 p4d_t *p4d; 738 739 vaddr_next = (vaddr & PGDIR_MASK) + PGDIR_SIZE; 740 741 if (pgd_val(*pgd)) { 742 p4d = (p4d_t *)pgd_page_vaddr(*pgd); 743 paddr_last = phys_p4d_init(p4d, __pa(vaddr), 744 __pa(vaddr_end), 745 page_size_mask, 746 init); 747 continue; 748 } 749 750 p4d = alloc_low_page(); 751 paddr_last = phys_p4d_init(p4d, __pa(vaddr), __pa(vaddr_end), 752 page_size_mask, init); 753 754 spin_lock(&init_mm.page_table_lock); 755 if (pgtable_l5_enabled()) 756 pgd_populate_init(&init_mm, pgd, p4d, init); 757 else 758 p4d_populate_init(&init_mm, p4d_offset(pgd, vaddr), 759 (pud_t *) p4d, init); 760 761 spin_unlock(&init_mm.page_table_lock); 762 pgd_changed = true; 763 } 764 765 if (pgd_changed) 766 sync_global_pgds(vaddr_start, vaddr_end - 1); 767 768 return paddr_last; 769 } 770 771 772 /* 773 * Create page table mapping for the physical memory for specific physical 774 * addresses. Note that it can only be used to populate non-present entries. 775 * The virtual and physical addresses have to be aligned on PMD level 776 * down. It returns the last physical address mapped. 777 */ 778 unsigned long __meminit 779 kernel_physical_mapping_init(unsigned long paddr_start, 780 unsigned long paddr_end, 781 unsigned long page_size_mask) 782 { 783 return __kernel_physical_mapping_init(paddr_start, paddr_end, 784 page_size_mask, true); 785 } 786 787 /* 788 * This function is similar to kernel_physical_mapping_init() above with the 789 * exception that it uses set_{pud,pmd}() instead of the set_{pud,pte}_safe() 790 * when updating the mapping. The caller is responsible to flush the TLBs after 791 * the function returns. 792 */ 793 unsigned long __meminit 794 kernel_physical_mapping_change(unsigned long paddr_start, 795 unsigned long paddr_end, 796 unsigned long page_size_mask) 797 { 798 return __kernel_physical_mapping_init(paddr_start, paddr_end, 799 page_size_mask, false); 800 } 801 802 #ifndef CONFIG_NUMA 803 void __init initmem_init(void) 804 { 805 memblock_set_node(0, PHYS_ADDR_MAX, &memblock.memory, 0); 806 } 807 #endif 808 809 void __init paging_init(void) 810 { 811 sparse_memory_present_with_active_regions(MAX_NUMNODES); 812 sparse_init(); 813 814 /* 815 * clear the default setting with node 0 816 * note: don't use nodes_clear here, that is really clearing when 817 * numa support is not compiled in, and later node_set_state 818 * will not set it back. 819 */ 820 node_clear_state(0, N_MEMORY); 821 if (N_MEMORY != N_NORMAL_MEMORY) 822 node_clear_state(0, N_NORMAL_MEMORY); 823 824 zone_sizes_init(); 825 } 826 827 /* 828 * Memory hotplug specific functions 829 */ 830 #ifdef CONFIG_MEMORY_HOTPLUG 831 /* 832 * After memory hotplug the variables max_pfn, max_low_pfn and high_memory need 833 * updating. 834 */ 835 static void update_end_of_memory_vars(u64 start, u64 size) 836 { 837 unsigned long end_pfn = PFN_UP(start + size); 838 839 if (end_pfn > max_pfn) { 840 max_pfn = end_pfn; 841 max_low_pfn = end_pfn; 842 high_memory = (void *)__va(max_pfn * PAGE_SIZE - 1) + 1; 843 } 844 } 845 846 int add_pages(int nid, unsigned long start_pfn, unsigned long nr_pages, 847 struct mhp_restrictions *restrictions) 848 { 849 int ret; 850 851 ret = __add_pages(nid, start_pfn, nr_pages, restrictions); 852 WARN_ON_ONCE(ret); 853 854 /* update max_pfn, max_low_pfn and high_memory */ 855 update_end_of_memory_vars(start_pfn << PAGE_SHIFT, 856 nr_pages << PAGE_SHIFT); 857 858 return ret; 859 } 860 861 int arch_add_memory(int nid, u64 start, u64 size, 862 struct mhp_restrictions *restrictions) 863 { 864 unsigned long start_pfn = start >> PAGE_SHIFT; 865 unsigned long nr_pages = size >> PAGE_SHIFT; 866 867 init_memory_mapping(start, start + size); 868 869 return add_pages(nid, start_pfn, nr_pages, restrictions); 870 } 871 872 #define PAGE_INUSE 0xFD 873 874 static void __meminit free_pagetable(struct page *page, int order) 875 { 876 unsigned long magic; 877 unsigned int nr_pages = 1 << order; 878 879 /* bootmem page has reserved flag */ 880 if (PageReserved(page)) { 881 __ClearPageReserved(page); 882 883 magic = (unsigned long)page->freelist; 884 if (magic == SECTION_INFO || magic == MIX_SECTION_INFO) { 885 while (nr_pages--) 886 put_page_bootmem(page++); 887 } else 888 while (nr_pages--) 889 free_reserved_page(page++); 890 } else 891 free_pages((unsigned long)page_address(page), order); 892 } 893 894 static void __meminit free_hugepage_table(struct page *page, 895 struct vmem_altmap *altmap) 896 { 897 if (altmap) 898 vmem_altmap_free(altmap, PMD_SIZE / PAGE_SIZE); 899 else 900 free_pagetable(page, get_order(PMD_SIZE)); 901 } 902 903 static void __meminit free_pte_table(pte_t *pte_start, pmd_t *pmd) 904 { 905 pte_t *pte; 906 int i; 907 908 for (i = 0; i < PTRS_PER_PTE; i++) { 909 pte = pte_start + i; 910 if (!pte_none(*pte)) 911 return; 912 } 913 914 /* free a pte talbe */ 915 free_pagetable(pmd_page(*pmd), 0); 916 spin_lock(&init_mm.page_table_lock); 917 pmd_clear(pmd); 918 spin_unlock(&init_mm.page_table_lock); 919 } 920 921 static void __meminit free_pmd_table(pmd_t *pmd_start, pud_t *pud) 922 { 923 pmd_t *pmd; 924 int i; 925 926 for (i = 0; i < PTRS_PER_PMD; i++) { 927 pmd = pmd_start + i; 928 if (!pmd_none(*pmd)) 929 return; 930 } 931 932 /* free a pmd talbe */ 933 free_pagetable(pud_page(*pud), 0); 934 spin_lock(&init_mm.page_table_lock); 935 pud_clear(pud); 936 spin_unlock(&init_mm.page_table_lock); 937 } 938 939 static void __meminit free_pud_table(pud_t *pud_start, p4d_t *p4d) 940 { 941 pud_t *pud; 942 int i; 943 944 for (i = 0; i < PTRS_PER_PUD; i++) { 945 pud = pud_start + i; 946 if (!pud_none(*pud)) 947 return; 948 } 949 950 /* free a pud talbe */ 951 free_pagetable(p4d_page(*p4d), 0); 952 spin_lock(&init_mm.page_table_lock); 953 p4d_clear(p4d); 954 spin_unlock(&init_mm.page_table_lock); 955 } 956 957 static void __meminit 958 remove_pte_table(pte_t *pte_start, unsigned long addr, unsigned long end, 959 bool direct) 960 { 961 unsigned long next, pages = 0; 962 pte_t *pte; 963 void *page_addr; 964 phys_addr_t phys_addr; 965 966 pte = pte_start + pte_index(addr); 967 for (; addr < end; addr = next, pte++) { 968 next = (addr + PAGE_SIZE) & PAGE_MASK; 969 if (next > end) 970 next = end; 971 972 if (!pte_present(*pte)) 973 continue; 974 975 /* 976 * We mapped [0,1G) memory as identity mapping when 977 * initializing, in arch/x86/kernel/head_64.S. These 978 * pagetables cannot be removed. 979 */ 980 phys_addr = pte_val(*pte) + (addr & PAGE_MASK); 981 if (phys_addr < (phys_addr_t)0x40000000) 982 return; 983 984 if (PAGE_ALIGNED(addr) && PAGE_ALIGNED(next)) { 985 /* 986 * Do not free direct mapping pages since they were 987 * freed when offlining, or simplely not in use. 988 */ 989 if (!direct) 990 free_pagetable(pte_page(*pte), 0); 991 992 spin_lock(&init_mm.page_table_lock); 993 pte_clear(&init_mm, addr, pte); 994 spin_unlock(&init_mm.page_table_lock); 995 996 /* For non-direct mapping, pages means nothing. */ 997 pages++; 998 } else { 999 /* 1000 * If we are here, we are freeing vmemmap pages since 1001 * direct mapped memory ranges to be freed are aligned. 1002 * 1003 * If we are not removing the whole page, it means 1004 * other page structs in this page are being used and 1005 * we canot remove them. So fill the unused page_structs 1006 * with 0xFD, and remove the page when it is wholly 1007 * filled with 0xFD. 1008 */ 1009 memset((void *)addr, PAGE_INUSE, next - addr); 1010 1011 page_addr = page_address(pte_page(*pte)); 1012 if (!memchr_inv(page_addr, PAGE_INUSE, PAGE_SIZE)) { 1013 free_pagetable(pte_page(*pte), 0); 1014 1015 spin_lock(&init_mm.page_table_lock); 1016 pte_clear(&init_mm, addr, pte); 1017 spin_unlock(&init_mm.page_table_lock); 1018 } 1019 } 1020 } 1021 1022 /* Call free_pte_table() in remove_pmd_table(). */ 1023 flush_tlb_all(); 1024 if (direct) 1025 update_page_count(PG_LEVEL_4K, -pages); 1026 } 1027 1028 static void __meminit 1029 remove_pmd_table(pmd_t *pmd_start, unsigned long addr, unsigned long end, 1030 bool direct, struct vmem_altmap *altmap) 1031 { 1032 unsigned long next, pages = 0; 1033 pte_t *pte_base; 1034 pmd_t *pmd; 1035 void *page_addr; 1036 1037 pmd = pmd_start + pmd_index(addr); 1038 for (; addr < end; addr = next, pmd++) { 1039 next = pmd_addr_end(addr, end); 1040 1041 if (!pmd_present(*pmd)) 1042 continue; 1043 1044 if (pmd_large(*pmd)) { 1045 if (IS_ALIGNED(addr, PMD_SIZE) && 1046 IS_ALIGNED(next, PMD_SIZE)) { 1047 if (!direct) 1048 free_hugepage_table(pmd_page(*pmd), 1049 altmap); 1050 1051 spin_lock(&init_mm.page_table_lock); 1052 pmd_clear(pmd); 1053 spin_unlock(&init_mm.page_table_lock); 1054 pages++; 1055 } else { 1056 /* If here, we are freeing vmemmap pages. */ 1057 memset((void *)addr, PAGE_INUSE, next - addr); 1058 1059 page_addr = page_address(pmd_page(*pmd)); 1060 if (!memchr_inv(page_addr, PAGE_INUSE, 1061 PMD_SIZE)) { 1062 free_hugepage_table(pmd_page(*pmd), 1063 altmap); 1064 1065 spin_lock(&init_mm.page_table_lock); 1066 pmd_clear(pmd); 1067 spin_unlock(&init_mm.page_table_lock); 1068 } 1069 } 1070 1071 continue; 1072 } 1073 1074 pte_base = (pte_t *)pmd_page_vaddr(*pmd); 1075 remove_pte_table(pte_base, addr, next, direct); 1076 free_pte_table(pte_base, pmd); 1077 } 1078 1079 /* Call free_pmd_table() in remove_pud_table(). */ 1080 if (direct) 1081 update_page_count(PG_LEVEL_2M, -pages); 1082 } 1083 1084 static void __meminit 1085 remove_pud_table(pud_t *pud_start, unsigned long addr, unsigned long end, 1086 struct vmem_altmap *altmap, bool direct) 1087 { 1088 unsigned long next, pages = 0; 1089 pmd_t *pmd_base; 1090 pud_t *pud; 1091 void *page_addr; 1092 1093 pud = pud_start + pud_index(addr); 1094 for (; addr < end; addr = next, pud++) { 1095 next = pud_addr_end(addr, end); 1096 1097 if (!pud_present(*pud)) 1098 continue; 1099 1100 if (pud_large(*pud)) { 1101 if (IS_ALIGNED(addr, PUD_SIZE) && 1102 IS_ALIGNED(next, PUD_SIZE)) { 1103 if (!direct) 1104 free_pagetable(pud_page(*pud), 1105 get_order(PUD_SIZE)); 1106 1107 spin_lock(&init_mm.page_table_lock); 1108 pud_clear(pud); 1109 spin_unlock(&init_mm.page_table_lock); 1110 pages++; 1111 } else { 1112 /* If here, we are freeing vmemmap pages. */ 1113 memset((void *)addr, PAGE_INUSE, next - addr); 1114 1115 page_addr = page_address(pud_page(*pud)); 1116 if (!memchr_inv(page_addr, PAGE_INUSE, 1117 PUD_SIZE)) { 1118 free_pagetable(pud_page(*pud), 1119 get_order(PUD_SIZE)); 1120 1121 spin_lock(&init_mm.page_table_lock); 1122 pud_clear(pud); 1123 spin_unlock(&init_mm.page_table_lock); 1124 } 1125 } 1126 1127 continue; 1128 } 1129 1130 pmd_base = pmd_offset(pud, 0); 1131 remove_pmd_table(pmd_base, addr, next, direct, altmap); 1132 free_pmd_table(pmd_base, pud); 1133 } 1134 1135 if (direct) 1136 update_page_count(PG_LEVEL_1G, -pages); 1137 } 1138 1139 static void __meminit 1140 remove_p4d_table(p4d_t *p4d_start, unsigned long addr, unsigned long end, 1141 struct vmem_altmap *altmap, bool direct) 1142 { 1143 unsigned long next, pages = 0; 1144 pud_t *pud_base; 1145 p4d_t *p4d; 1146 1147 p4d = p4d_start + p4d_index(addr); 1148 for (; addr < end; addr = next, p4d++) { 1149 next = p4d_addr_end(addr, end); 1150 1151 if (!p4d_present(*p4d)) 1152 continue; 1153 1154 BUILD_BUG_ON(p4d_large(*p4d)); 1155 1156 pud_base = pud_offset(p4d, 0); 1157 remove_pud_table(pud_base, addr, next, altmap, direct); 1158 /* 1159 * For 4-level page tables we do not want to free PUDs, but in the 1160 * 5-level case we should free them. This code will have to change 1161 * to adapt for boot-time switching between 4 and 5 level page tables. 1162 */ 1163 if (pgtable_l5_enabled()) 1164 free_pud_table(pud_base, p4d); 1165 } 1166 1167 if (direct) 1168 update_page_count(PG_LEVEL_512G, -pages); 1169 } 1170 1171 /* start and end are both virtual address. */ 1172 static void __meminit 1173 remove_pagetable(unsigned long start, unsigned long end, bool direct, 1174 struct vmem_altmap *altmap) 1175 { 1176 unsigned long next; 1177 unsigned long addr; 1178 pgd_t *pgd; 1179 p4d_t *p4d; 1180 1181 for (addr = start; addr < end; addr = next) { 1182 next = pgd_addr_end(addr, end); 1183 1184 pgd = pgd_offset_k(addr); 1185 if (!pgd_present(*pgd)) 1186 continue; 1187 1188 p4d = p4d_offset(pgd, 0); 1189 remove_p4d_table(p4d, addr, next, altmap, direct); 1190 } 1191 1192 flush_tlb_all(); 1193 } 1194 1195 void __ref vmemmap_free(unsigned long start, unsigned long end, 1196 struct vmem_altmap *altmap) 1197 { 1198 remove_pagetable(start, end, false, altmap); 1199 } 1200 1201 static void __meminit 1202 kernel_physical_mapping_remove(unsigned long start, unsigned long end) 1203 { 1204 start = (unsigned long)__va(start); 1205 end = (unsigned long)__va(end); 1206 1207 remove_pagetable(start, end, true, NULL); 1208 } 1209 1210 void __ref arch_remove_memory(int nid, u64 start, u64 size, 1211 struct vmem_altmap *altmap) 1212 { 1213 unsigned long start_pfn = start >> PAGE_SHIFT; 1214 unsigned long nr_pages = size >> PAGE_SHIFT; 1215 1216 __remove_pages(start_pfn, nr_pages, altmap); 1217 kernel_physical_mapping_remove(start, start + size); 1218 } 1219 #endif /* CONFIG_MEMORY_HOTPLUG */ 1220 1221 static struct kcore_list kcore_vsyscall; 1222 1223 static void __init register_page_bootmem_info(void) 1224 { 1225 #ifdef CONFIG_NUMA 1226 int i; 1227 1228 for_each_online_node(i) 1229 register_page_bootmem_info_node(NODE_DATA(i)); 1230 #endif 1231 } 1232 1233 void __init mem_init(void) 1234 { 1235 pci_iommu_alloc(); 1236 1237 /* clear_bss() already clear the empty_zero_page */ 1238 1239 /* this will put all memory onto the freelists */ 1240 memblock_free_all(); 1241 after_bootmem = 1; 1242 x86_init.hyper.init_after_bootmem(); 1243 1244 /* 1245 * Must be done after boot memory is put on freelist, because here we 1246 * might set fields in deferred struct pages that have not yet been 1247 * initialized, and memblock_free_all() initializes all the reserved 1248 * deferred pages for us. 1249 */ 1250 register_page_bootmem_info(); 1251 1252 /* Register memory areas for /proc/kcore */ 1253 if (get_gate_vma(&init_mm)) 1254 kclist_add(&kcore_vsyscall, (void *)VSYSCALL_ADDR, PAGE_SIZE, KCORE_USER); 1255 1256 mem_init_print_info(NULL); 1257 } 1258 1259 int kernel_set_to_readonly; 1260 1261 void mark_rodata_ro(void) 1262 { 1263 unsigned long start = PFN_ALIGN(_text); 1264 unsigned long rodata_start = PFN_ALIGN(__start_rodata); 1265 unsigned long end = (unsigned long)__end_rodata_hpage_align; 1266 unsigned long text_end = PFN_ALIGN(_etext); 1267 unsigned long rodata_end = PFN_ALIGN(__end_rodata); 1268 unsigned long all_end; 1269 1270 printk(KERN_INFO "Write protecting the kernel read-only data: %luk\n", 1271 (end - start) >> 10); 1272 set_memory_ro(start, (end - start) >> PAGE_SHIFT); 1273 1274 kernel_set_to_readonly = 1; 1275 1276 /* 1277 * The rodata/data/bss/brk section (but not the kernel text!) 1278 * should also be not-executable. 1279 * 1280 * We align all_end to PMD_SIZE because the existing mapping 1281 * is a full PMD. If we would align _brk_end to PAGE_SIZE we 1282 * split the PMD and the reminder between _brk_end and the end 1283 * of the PMD will remain mapped executable. 1284 * 1285 * Any PMD which was setup after the one which covers _brk_end 1286 * has been zapped already via cleanup_highmem(). 1287 */ 1288 all_end = roundup((unsigned long)_brk_end, PMD_SIZE); 1289 set_memory_nx(text_end, (all_end - text_end) >> PAGE_SHIFT); 1290 1291 #ifdef CONFIG_CPA_DEBUG 1292 printk(KERN_INFO "Testing CPA: undo %lx-%lx\n", start, end); 1293 set_memory_rw(start, (end-start) >> PAGE_SHIFT); 1294 1295 printk(KERN_INFO "Testing CPA: again\n"); 1296 set_memory_ro(start, (end-start) >> PAGE_SHIFT); 1297 #endif 1298 1299 free_kernel_image_pages("unused kernel image (text/rodata gap)", 1300 (void *)text_end, (void *)rodata_start); 1301 free_kernel_image_pages("unused kernel image (rodata/data gap)", 1302 (void *)rodata_end, (void *)_sdata); 1303 1304 debug_checkwx(); 1305 } 1306 1307 int kern_addr_valid(unsigned long addr) 1308 { 1309 unsigned long above = ((long)addr) >> __VIRTUAL_MASK_SHIFT; 1310 pgd_t *pgd; 1311 p4d_t *p4d; 1312 pud_t *pud; 1313 pmd_t *pmd; 1314 pte_t *pte; 1315 1316 if (above != 0 && above != -1UL) 1317 return 0; 1318 1319 pgd = pgd_offset_k(addr); 1320 if (pgd_none(*pgd)) 1321 return 0; 1322 1323 p4d = p4d_offset(pgd, addr); 1324 if (p4d_none(*p4d)) 1325 return 0; 1326 1327 pud = pud_offset(p4d, addr); 1328 if (pud_none(*pud)) 1329 return 0; 1330 1331 if (pud_large(*pud)) 1332 return pfn_valid(pud_pfn(*pud)); 1333 1334 pmd = pmd_offset(pud, addr); 1335 if (pmd_none(*pmd)) 1336 return 0; 1337 1338 if (pmd_large(*pmd)) 1339 return pfn_valid(pmd_pfn(*pmd)); 1340 1341 pte = pte_offset_kernel(pmd, addr); 1342 if (pte_none(*pte)) 1343 return 0; 1344 1345 return pfn_valid(pte_pfn(*pte)); 1346 } 1347 1348 /* 1349 * Block size is the minimum amount of memory which can be hotplugged or 1350 * hotremoved. It must be power of two and must be equal or larger than 1351 * MIN_MEMORY_BLOCK_SIZE. 1352 */ 1353 #define MAX_BLOCK_SIZE (2UL << 30) 1354 1355 /* Amount of ram needed to start using large blocks */ 1356 #define MEM_SIZE_FOR_LARGE_BLOCK (64UL << 30) 1357 1358 /* Adjustable memory block size */ 1359 static unsigned long set_memory_block_size; 1360 int __init set_memory_block_size_order(unsigned int order) 1361 { 1362 unsigned long size = 1UL << order; 1363 1364 if (size > MEM_SIZE_FOR_LARGE_BLOCK || size < MIN_MEMORY_BLOCK_SIZE) 1365 return -EINVAL; 1366 1367 set_memory_block_size = size; 1368 return 0; 1369 } 1370 1371 static unsigned long probe_memory_block_size(void) 1372 { 1373 unsigned long boot_mem_end = max_pfn << PAGE_SHIFT; 1374 unsigned long bz; 1375 1376 /* If memory block size has been set, then use it */ 1377 bz = set_memory_block_size; 1378 if (bz) 1379 goto done; 1380 1381 /* Use regular block if RAM is smaller than MEM_SIZE_FOR_LARGE_BLOCK */ 1382 if (boot_mem_end < MEM_SIZE_FOR_LARGE_BLOCK) { 1383 bz = MIN_MEMORY_BLOCK_SIZE; 1384 goto done; 1385 } 1386 1387 /* Find the largest allowed block size that aligns to memory end */ 1388 for (bz = MAX_BLOCK_SIZE; bz > MIN_MEMORY_BLOCK_SIZE; bz >>= 1) { 1389 if (IS_ALIGNED(boot_mem_end, bz)) 1390 break; 1391 } 1392 done: 1393 pr_info("x86/mm: Memory block size: %ldMB\n", bz >> 20); 1394 1395 return bz; 1396 } 1397 1398 static unsigned long memory_block_size_probed; 1399 unsigned long memory_block_size_bytes(void) 1400 { 1401 if (!memory_block_size_probed) 1402 memory_block_size_probed = probe_memory_block_size(); 1403 1404 return memory_block_size_probed; 1405 } 1406 1407 #ifdef CONFIG_SPARSEMEM_VMEMMAP 1408 /* 1409 * Initialise the sparsemem vmemmap using huge-pages at the PMD level. 1410 */ 1411 static long __meminitdata addr_start, addr_end; 1412 static void __meminitdata *p_start, *p_end; 1413 static int __meminitdata node_start; 1414 1415 static int __meminit vmemmap_populate_hugepages(unsigned long start, 1416 unsigned long end, int node, struct vmem_altmap *altmap) 1417 { 1418 unsigned long addr; 1419 unsigned long next; 1420 pgd_t *pgd; 1421 p4d_t *p4d; 1422 pud_t *pud; 1423 pmd_t *pmd; 1424 1425 for (addr = start; addr < end; addr = next) { 1426 next = pmd_addr_end(addr, end); 1427 1428 pgd = vmemmap_pgd_populate(addr, node); 1429 if (!pgd) 1430 return -ENOMEM; 1431 1432 p4d = vmemmap_p4d_populate(pgd, addr, node); 1433 if (!p4d) 1434 return -ENOMEM; 1435 1436 pud = vmemmap_pud_populate(p4d, addr, node); 1437 if (!pud) 1438 return -ENOMEM; 1439 1440 pmd = pmd_offset(pud, addr); 1441 if (pmd_none(*pmd)) { 1442 void *p; 1443 1444 if (altmap) 1445 p = altmap_alloc_block_buf(PMD_SIZE, altmap); 1446 else 1447 p = vmemmap_alloc_block_buf(PMD_SIZE, node); 1448 if (p) { 1449 pte_t entry; 1450 1451 entry = pfn_pte(__pa(p) >> PAGE_SHIFT, 1452 PAGE_KERNEL_LARGE); 1453 set_pmd(pmd, __pmd(pte_val(entry))); 1454 1455 /* check to see if we have contiguous blocks */ 1456 if (p_end != p || node_start != node) { 1457 if (p_start) 1458 pr_debug(" [%lx-%lx] PMD -> [%p-%p] on node %d\n", 1459 addr_start, addr_end-1, p_start, p_end-1, node_start); 1460 addr_start = addr; 1461 node_start = node; 1462 p_start = p; 1463 } 1464 1465 addr_end = addr + PMD_SIZE; 1466 p_end = p + PMD_SIZE; 1467 continue; 1468 } else if (altmap) 1469 return -ENOMEM; /* no fallback */ 1470 } else if (pmd_large(*pmd)) { 1471 vmemmap_verify((pte_t *)pmd, node, addr, next); 1472 continue; 1473 } 1474 if (vmemmap_populate_basepages(addr, next, node)) 1475 return -ENOMEM; 1476 } 1477 return 0; 1478 } 1479 1480 int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node, 1481 struct vmem_altmap *altmap) 1482 { 1483 int err; 1484 1485 if (end - start < PAGES_PER_SECTION * sizeof(struct page)) 1486 err = vmemmap_populate_basepages(start, end, node); 1487 else if (boot_cpu_has(X86_FEATURE_PSE)) 1488 err = vmemmap_populate_hugepages(start, end, node, altmap); 1489 else if (altmap) { 1490 pr_err_once("%s: no cpu support for altmap allocations\n", 1491 __func__); 1492 err = -ENOMEM; 1493 } else 1494 err = vmemmap_populate_basepages(start, end, node); 1495 if (!err) 1496 sync_global_pgds(start, end - 1); 1497 return err; 1498 } 1499 1500 #if defined(CONFIG_MEMORY_HOTPLUG_SPARSE) && defined(CONFIG_HAVE_BOOTMEM_INFO_NODE) 1501 void register_page_bootmem_memmap(unsigned long section_nr, 1502 struct page *start_page, unsigned long nr_pages) 1503 { 1504 unsigned long addr = (unsigned long)start_page; 1505 unsigned long end = (unsigned long)(start_page + nr_pages); 1506 unsigned long next; 1507 pgd_t *pgd; 1508 p4d_t *p4d; 1509 pud_t *pud; 1510 pmd_t *pmd; 1511 unsigned int nr_pmd_pages; 1512 struct page *page; 1513 1514 for (; addr < end; addr = next) { 1515 pte_t *pte = NULL; 1516 1517 pgd = pgd_offset_k(addr); 1518 if (pgd_none(*pgd)) { 1519 next = (addr + PAGE_SIZE) & PAGE_MASK; 1520 continue; 1521 } 1522 get_page_bootmem(section_nr, pgd_page(*pgd), MIX_SECTION_INFO); 1523 1524 p4d = p4d_offset(pgd, addr); 1525 if (p4d_none(*p4d)) { 1526 next = (addr + PAGE_SIZE) & PAGE_MASK; 1527 continue; 1528 } 1529 get_page_bootmem(section_nr, p4d_page(*p4d), MIX_SECTION_INFO); 1530 1531 pud = pud_offset(p4d, addr); 1532 if (pud_none(*pud)) { 1533 next = (addr + PAGE_SIZE) & PAGE_MASK; 1534 continue; 1535 } 1536 get_page_bootmem(section_nr, pud_page(*pud), MIX_SECTION_INFO); 1537 1538 if (!boot_cpu_has(X86_FEATURE_PSE)) { 1539 next = (addr + PAGE_SIZE) & PAGE_MASK; 1540 pmd = pmd_offset(pud, addr); 1541 if (pmd_none(*pmd)) 1542 continue; 1543 get_page_bootmem(section_nr, pmd_page(*pmd), 1544 MIX_SECTION_INFO); 1545 1546 pte = pte_offset_kernel(pmd, addr); 1547 if (pte_none(*pte)) 1548 continue; 1549 get_page_bootmem(section_nr, pte_page(*pte), 1550 SECTION_INFO); 1551 } else { 1552 next = pmd_addr_end(addr, end); 1553 1554 pmd = pmd_offset(pud, addr); 1555 if (pmd_none(*pmd)) 1556 continue; 1557 1558 nr_pmd_pages = 1 << get_order(PMD_SIZE); 1559 page = pmd_page(*pmd); 1560 while (nr_pmd_pages--) 1561 get_page_bootmem(section_nr, page++, 1562 SECTION_INFO); 1563 } 1564 } 1565 } 1566 #endif 1567 1568 void __meminit vmemmap_populate_print_last(void) 1569 { 1570 if (p_start) { 1571 pr_debug(" [%lx-%lx] PMD -> [%p-%p] on node %d\n", 1572 addr_start, addr_end-1, p_start, p_end-1, node_start); 1573 p_start = NULL; 1574 p_end = NULL; 1575 node_start = 0; 1576 } 1577 } 1578 #endif 1579