xref: /openbmc/linux/arch/x86/mm/init_64.c (revision 83268fa6)
1 /*
2  *  linux/arch/x86_64/mm/init.c
3  *
4  *  Copyright (C) 1995  Linus Torvalds
5  *  Copyright (C) 2000  Pavel Machek <pavel@ucw.cz>
6  *  Copyright (C) 2002,2003 Andi Kleen <ak@suse.de>
7  */
8 
9 #include <linux/signal.h>
10 #include <linux/sched.h>
11 #include <linux/kernel.h>
12 #include <linux/errno.h>
13 #include <linux/string.h>
14 #include <linux/types.h>
15 #include <linux/ptrace.h>
16 #include <linux/mman.h>
17 #include <linux/mm.h>
18 #include <linux/swap.h>
19 #include <linux/smp.h>
20 #include <linux/init.h>
21 #include <linux/initrd.h>
22 #include <linux/pagemap.h>
23 #include <linux/memblock.h>
24 #include <linux/proc_fs.h>
25 #include <linux/pci.h>
26 #include <linux/pfn.h>
27 #include <linux/poison.h>
28 #include <linux/dma-mapping.h>
29 #include <linux/memory.h>
30 #include <linux/memory_hotplug.h>
31 #include <linux/memremap.h>
32 #include <linux/nmi.h>
33 #include <linux/gfp.h>
34 #include <linux/kcore.h>
35 
36 #include <asm/processor.h>
37 #include <asm/bios_ebda.h>
38 #include <linux/uaccess.h>
39 #include <asm/pgtable.h>
40 #include <asm/pgalloc.h>
41 #include <asm/dma.h>
42 #include <asm/fixmap.h>
43 #include <asm/e820/api.h>
44 #include <asm/apic.h>
45 #include <asm/tlb.h>
46 #include <asm/mmu_context.h>
47 #include <asm/proto.h>
48 #include <asm/smp.h>
49 #include <asm/sections.h>
50 #include <asm/kdebug.h>
51 #include <asm/numa.h>
52 #include <asm/set_memory.h>
53 #include <asm/init.h>
54 #include <asm/uv/uv.h>
55 #include <asm/setup.h>
56 
57 #include "mm_internal.h"
58 
59 #include "ident_map.c"
60 
61 /*
62  * NOTE: pagetable_init alloc all the fixmap pagetables contiguous on the
63  * physical space so we can cache the place of the first one and move
64  * around without checking the pgd every time.
65  */
66 
67 /* Bits supported by the hardware: */
68 pteval_t __supported_pte_mask __read_mostly = ~0;
69 /* Bits allowed in normal kernel mappings: */
70 pteval_t __default_kernel_pte_mask __read_mostly = ~0;
71 EXPORT_SYMBOL_GPL(__supported_pte_mask);
72 /* Used in PAGE_KERNEL_* macros which are reasonably used out-of-tree: */
73 EXPORT_SYMBOL(__default_kernel_pte_mask);
74 
75 int force_personality32;
76 
77 /*
78  * noexec32=on|off
79  * Control non executable heap for 32bit processes.
80  * To control the stack too use noexec=off
81  *
82  * on	PROT_READ does not imply PROT_EXEC for 32-bit processes (default)
83  * off	PROT_READ implies PROT_EXEC
84  */
85 static int __init nonx32_setup(char *str)
86 {
87 	if (!strcmp(str, "on"))
88 		force_personality32 &= ~READ_IMPLIES_EXEC;
89 	else if (!strcmp(str, "off"))
90 		force_personality32 |= READ_IMPLIES_EXEC;
91 	return 1;
92 }
93 __setup("noexec32=", nonx32_setup);
94 
95 static void sync_global_pgds_l5(unsigned long start, unsigned long end)
96 {
97 	unsigned long addr;
98 
99 	for (addr = start; addr <= end; addr = ALIGN(addr + 1, PGDIR_SIZE)) {
100 		const pgd_t *pgd_ref = pgd_offset_k(addr);
101 		struct page *page;
102 
103 		/* Check for overflow */
104 		if (addr < start)
105 			break;
106 
107 		if (pgd_none(*pgd_ref))
108 			continue;
109 
110 		spin_lock(&pgd_lock);
111 		list_for_each_entry(page, &pgd_list, lru) {
112 			pgd_t *pgd;
113 			spinlock_t *pgt_lock;
114 
115 			pgd = (pgd_t *)page_address(page) + pgd_index(addr);
116 			/* the pgt_lock only for Xen */
117 			pgt_lock = &pgd_page_get_mm(page)->page_table_lock;
118 			spin_lock(pgt_lock);
119 
120 			if (!pgd_none(*pgd_ref) && !pgd_none(*pgd))
121 				BUG_ON(pgd_page_vaddr(*pgd) != pgd_page_vaddr(*pgd_ref));
122 
123 			if (pgd_none(*pgd))
124 				set_pgd(pgd, *pgd_ref);
125 
126 			spin_unlock(pgt_lock);
127 		}
128 		spin_unlock(&pgd_lock);
129 	}
130 }
131 
132 static void sync_global_pgds_l4(unsigned long start, unsigned long end)
133 {
134 	unsigned long addr;
135 
136 	for (addr = start; addr <= end; addr = ALIGN(addr + 1, PGDIR_SIZE)) {
137 		pgd_t *pgd_ref = pgd_offset_k(addr);
138 		const p4d_t *p4d_ref;
139 		struct page *page;
140 
141 		/*
142 		 * With folded p4d, pgd_none() is always false, we need to
143 		 * handle synchonization on p4d level.
144 		 */
145 		MAYBE_BUILD_BUG_ON(pgd_none(*pgd_ref));
146 		p4d_ref = p4d_offset(pgd_ref, addr);
147 
148 		if (p4d_none(*p4d_ref))
149 			continue;
150 
151 		spin_lock(&pgd_lock);
152 		list_for_each_entry(page, &pgd_list, lru) {
153 			pgd_t *pgd;
154 			p4d_t *p4d;
155 			spinlock_t *pgt_lock;
156 
157 			pgd = (pgd_t *)page_address(page) + pgd_index(addr);
158 			p4d = p4d_offset(pgd, addr);
159 			/* the pgt_lock only for Xen */
160 			pgt_lock = &pgd_page_get_mm(page)->page_table_lock;
161 			spin_lock(pgt_lock);
162 
163 			if (!p4d_none(*p4d_ref) && !p4d_none(*p4d))
164 				BUG_ON(p4d_page_vaddr(*p4d)
165 				       != p4d_page_vaddr(*p4d_ref));
166 
167 			if (p4d_none(*p4d))
168 				set_p4d(p4d, *p4d_ref);
169 
170 			spin_unlock(pgt_lock);
171 		}
172 		spin_unlock(&pgd_lock);
173 	}
174 }
175 
176 /*
177  * When memory was added make sure all the processes MM have
178  * suitable PGD entries in the local PGD level page.
179  */
180 void sync_global_pgds(unsigned long start, unsigned long end)
181 {
182 	if (pgtable_l5_enabled())
183 		sync_global_pgds_l5(start, end);
184 	else
185 		sync_global_pgds_l4(start, end);
186 }
187 
188 /*
189  * NOTE: This function is marked __ref because it calls __init function
190  * (alloc_bootmem_pages). It's safe to do it ONLY when after_bootmem == 0.
191  */
192 static __ref void *spp_getpage(void)
193 {
194 	void *ptr;
195 
196 	if (after_bootmem)
197 		ptr = (void *) get_zeroed_page(GFP_ATOMIC);
198 	else
199 		ptr = memblock_alloc(PAGE_SIZE, PAGE_SIZE);
200 
201 	if (!ptr || ((unsigned long)ptr & ~PAGE_MASK)) {
202 		panic("set_pte_phys: cannot allocate page data %s\n",
203 			after_bootmem ? "after bootmem" : "");
204 	}
205 
206 	pr_debug("spp_getpage %p\n", ptr);
207 
208 	return ptr;
209 }
210 
211 static p4d_t *fill_p4d(pgd_t *pgd, unsigned long vaddr)
212 {
213 	if (pgd_none(*pgd)) {
214 		p4d_t *p4d = (p4d_t *)spp_getpage();
215 		pgd_populate(&init_mm, pgd, p4d);
216 		if (p4d != p4d_offset(pgd, 0))
217 			printk(KERN_ERR "PAGETABLE BUG #00! %p <-> %p\n",
218 			       p4d, p4d_offset(pgd, 0));
219 	}
220 	return p4d_offset(pgd, vaddr);
221 }
222 
223 static pud_t *fill_pud(p4d_t *p4d, unsigned long vaddr)
224 {
225 	if (p4d_none(*p4d)) {
226 		pud_t *pud = (pud_t *)spp_getpage();
227 		p4d_populate(&init_mm, p4d, pud);
228 		if (pud != pud_offset(p4d, 0))
229 			printk(KERN_ERR "PAGETABLE BUG #01! %p <-> %p\n",
230 			       pud, pud_offset(p4d, 0));
231 	}
232 	return pud_offset(p4d, vaddr);
233 }
234 
235 static pmd_t *fill_pmd(pud_t *pud, unsigned long vaddr)
236 {
237 	if (pud_none(*pud)) {
238 		pmd_t *pmd = (pmd_t *) spp_getpage();
239 		pud_populate(&init_mm, pud, pmd);
240 		if (pmd != pmd_offset(pud, 0))
241 			printk(KERN_ERR "PAGETABLE BUG #02! %p <-> %p\n",
242 			       pmd, pmd_offset(pud, 0));
243 	}
244 	return pmd_offset(pud, vaddr);
245 }
246 
247 static pte_t *fill_pte(pmd_t *pmd, unsigned long vaddr)
248 {
249 	if (pmd_none(*pmd)) {
250 		pte_t *pte = (pte_t *) spp_getpage();
251 		pmd_populate_kernel(&init_mm, pmd, pte);
252 		if (pte != pte_offset_kernel(pmd, 0))
253 			printk(KERN_ERR "PAGETABLE BUG #03!\n");
254 	}
255 	return pte_offset_kernel(pmd, vaddr);
256 }
257 
258 static void __set_pte_vaddr(pud_t *pud, unsigned long vaddr, pte_t new_pte)
259 {
260 	pmd_t *pmd = fill_pmd(pud, vaddr);
261 	pte_t *pte = fill_pte(pmd, vaddr);
262 
263 	set_pte(pte, new_pte);
264 
265 	/*
266 	 * It's enough to flush this one mapping.
267 	 * (PGE mappings get flushed as well)
268 	 */
269 	__flush_tlb_one_kernel(vaddr);
270 }
271 
272 void set_pte_vaddr_p4d(p4d_t *p4d_page, unsigned long vaddr, pte_t new_pte)
273 {
274 	p4d_t *p4d = p4d_page + p4d_index(vaddr);
275 	pud_t *pud = fill_pud(p4d, vaddr);
276 
277 	__set_pte_vaddr(pud, vaddr, new_pte);
278 }
279 
280 void set_pte_vaddr_pud(pud_t *pud_page, unsigned long vaddr, pte_t new_pte)
281 {
282 	pud_t *pud = pud_page + pud_index(vaddr);
283 
284 	__set_pte_vaddr(pud, vaddr, new_pte);
285 }
286 
287 void set_pte_vaddr(unsigned long vaddr, pte_t pteval)
288 {
289 	pgd_t *pgd;
290 	p4d_t *p4d_page;
291 
292 	pr_debug("set_pte_vaddr %lx to %lx\n", vaddr, native_pte_val(pteval));
293 
294 	pgd = pgd_offset_k(vaddr);
295 	if (pgd_none(*pgd)) {
296 		printk(KERN_ERR
297 			"PGD FIXMAP MISSING, it should be setup in head.S!\n");
298 		return;
299 	}
300 
301 	p4d_page = p4d_offset(pgd, 0);
302 	set_pte_vaddr_p4d(p4d_page, vaddr, pteval);
303 }
304 
305 pmd_t * __init populate_extra_pmd(unsigned long vaddr)
306 {
307 	pgd_t *pgd;
308 	p4d_t *p4d;
309 	pud_t *pud;
310 
311 	pgd = pgd_offset_k(vaddr);
312 	p4d = fill_p4d(pgd, vaddr);
313 	pud = fill_pud(p4d, vaddr);
314 	return fill_pmd(pud, vaddr);
315 }
316 
317 pte_t * __init populate_extra_pte(unsigned long vaddr)
318 {
319 	pmd_t *pmd;
320 
321 	pmd = populate_extra_pmd(vaddr);
322 	return fill_pte(pmd, vaddr);
323 }
324 
325 /*
326  * Create large page table mappings for a range of physical addresses.
327  */
328 static void __init __init_extra_mapping(unsigned long phys, unsigned long size,
329 					enum page_cache_mode cache)
330 {
331 	pgd_t *pgd;
332 	p4d_t *p4d;
333 	pud_t *pud;
334 	pmd_t *pmd;
335 	pgprot_t prot;
336 
337 	pgprot_val(prot) = pgprot_val(PAGE_KERNEL_LARGE) |
338 		pgprot_val(pgprot_4k_2_large(cachemode2pgprot(cache)));
339 	BUG_ON((phys & ~PMD_MASK) || (size & ~PMD_MASK));
340 	for (; size; phys += PMD_SIZE, size -= PMD_SIZE) {
341 		pgd = pgd_offset_k((unsigned long)__va(phys));
342 		if (pgd_none(*pgd)) {
343 			p4d = (p4d_t *) spp_getpage();
344 			set_pgd(pgd, __pgd(__pa(p4d) | _KERNPG_TABLE |
345 						_PAGE_USER));
346 		}
347 		p4d = p4d_offset(pgd, (unsigned long)__va(phys));
348 		if (p4d_none(*p4d)) {
349 			pud = (pud_t *) spp_getpage();
350 			set_p4d(p4d, __p4d(__pa(pud) | _KERNPG_TABLE |
351 						_PAGE_USER));
352 		}
353 		pud = pud_offset(p4d, (unsigned long)__va(phys));
354 		if (pud_none(*pud)) {
355 			pmd = (pmd_t *) spp_getpage();
356 			set_pud(pud, __pud(__pa(pmd) | _KERNPG_TABLE |
357 						_PAGE_USER));
358 		}
359 		pmd = pmd_offset(pud, phys);
360 		BUG_ON(!pmd_none(*pmd));
361 		set_pmd(pmd, __pmd(phys | pgprot_val(prot)));
362 	}
363 }
364 
365 void __init init_extra_mapping_wb(unsigned long phys, unsigned long size)
366 {
367 	__init_extra_mapping(phys, size, _PAGE_CACHE_MODE_WB);
368 }
369 
370 void __init init_extra_mapping_uc(unsigned long phys, unsigned long size)
371 {
372 	__init_extra_mapping(phys, size, _PAGE_CACHE_MODE_UC);
373 }
374 
375 /*
376  * The head.S code sets up the kernel high mapping:
377  *
378  *   from __START_KERNEL_map to __START_KERNEL_map + size (== _end-_text)
379  *
380  * phys_base holds the negative offset to the kernel, which is added
381  * to the compile time generated pmds. This results in invalid pmds up
382  * to the point where we hit the physaddr 0 mapping.
383  *
384  * We limit the mappings to the region from _text to _brk_end.  _brk_end
385  * is rounded up to the 2MB boundary. This catches the invalid pmds as
386  * well, as they are located before _text:
387  */
388 void __init cleanup_highmap(void)
389 {
390 	unsigned long vaddr = __START_KERNEL_map;
391 	unsigned long vaddr_end = __START_KERNEL_map + KERNEL_IMAGE_SIZE;
392 	unsigned long end = roundup((unsigned long)_brk_end, PMD_SIZE) - 1;
393 	pmd_t *pmd = level2_kernel_pgt;
394 
395 	/*
396 	 * Native path, max_pfn_mapped is not set yet.
397 	 * Xen has valid max_pfn_mapped set in
398 	 *	arch/x86/xen/mmu.c:xen_setup_kernel_pagetable().
399 	 */
400 	if (max_pfn_mapped)
401 		vaddr_end = __START_KERNEL_map + (max_pfn_mapped << PAGE_SHIFT);
402 
403 	for (; vaddr + PMD_SIZE - 1 < vaddr_end; pmd++, vaddr += PMD_SIZE) {
404 		if (pmd_none(*pmd))
405 			continue;
406 		if (vaddr < (unsigned long) _text || vaddr > end)
407 			set_pmd(pmd, __pmd(0));
408 	}
409 }
410 
411 /*
412  * Create PTE level page table mapping for physical addresses.
413  * It returns the last physical address mapped.
414  */
415 static unsigned long __meminit
416 phys_pte_init(pte_t *pte_page, unsigned long paddr, unsigned long paddr_end,
417 	      pgprot_t prot)
418 {
419 	unsigned long pages = 0, paddr_next;
420 	unsigned long paddr_last = paddr_end;
421 	pte_t *pte;
422 	int i;
423 
424 	pte = pte_page + pte_index(paddr);
425 	i = pte_index(paddr);
426 
427 	for (; i < PTRS_PER_PTE; i++, paddr = paddr_next, pte++) {
428 		paddr_next = (paddr & PAGE_MASK) + PAGE_SIZE;
429 		if (paddr >= paddr_end) {
430 			if (!after_bootmem &&
431 			    !e820__mapped_any(paddr & PAGE_MASK, paddr_next,
432 					     E820_TYPE_RAM) &&
433 			    !e820__mapped_any(paddr & PAGE_MASK, paddr_next,
434 					     E820_TYPE_RESERVED_KERN))
435 				set_pte(pte, __pte(0));
436 			continue;
437 		}
438 
439 		/*
440 		 * We will re-use the existing mapping.
441 		 * Xen for example has some special requirements, like mapping
442 		 * pagetable pages as RO. So assume someone who pre-setup
443 		 * these mappings are more intelligent.
444 		 */
445 		if (!pte_none(*pte)) {
446 			if (!after_bootmem)
447 				pages++;
448 			continue;
449 		}
450 
451 		if (0)
452 			pr_info("   pte=%p addr=%lx pte=%016lx\n", pte, paddr,
453 				pfn_pte(paddr >> PAGE_SHIFT, PAGE_KERNEL).pte);
454 		pages++;
455 		set_pte(pte, pfn_pte(paddr >> PAGE_SHIFT, prot));
456 		paddr_last = (paddr & PAGE_MASK) + PAGE_SIZE;
457 	}
458 
459 	update_page_count(PG_LEVEL_4K, pages);
460 
461 	return paddr_last;
462 }
463 
464 /*
465  * Create PMD level page table mapping for physical addresses. The virtual
466  * and physical address have to be aligned at this level.
467  * It returns the last physical address mapped.
468  */
469 static unsigned long __meminit
470 phys_pmd_init(pmd_t *pmd_page, unsigned long paddr, unsigned long paddr_end,
471 	      unsigned long page_size_mask, pgprot_t prot)
472 {
473 	unsigned long pages = 0, paddr_next;
474 	unsigned long paddr_last = paddr_end;
475 
476 	int i = pmd_index(paddr);
477 
478 	for (; i < PTRS_PER_PMD; i++, paddr = paddr_next) {
479 		pmd_t *pmd = pmd_page + pmd_index(paddr);
480 		pte_t *pte;
481 		pgprot_t new_prot = prot;
482 
483 		paddr_next = (paddr & PMD_MASK) + PMD_SIZE;
484 		if (paddr >= paddr_end) {
485 			if (!after_bootmem &&
486 			    !e820__mapped_any(paddr & PMD_MASK, paddr_next,
487 					     E820_TYPE_RAM) &&
488 			    !e820__mapped_any(paddr & PMD_MASK, paddr_next,
489 					     E820_TYPE_RESERVED_KERN))
490 				set_pmd(pmd, __pmd(0));
491 			continue;
492 		}
493 
494 		if (!pmd_none(*pmd)) {
495 			if (!pmd_large(*pmd)) {
496 				spin_lock(&init_mm.page_table_lock);
497 				pte = (pte_t *)pmd_page_vaddr(*pmd);
498 				paddr_last = phys_pte_init(pte, paddr,
499 							   paddr_end, prot);
500 				spin_unlock(&init_mm.page_table_lock);
501 				continue;
502 			}
503 			/*
504 			 * If we are ok with PG_LEVEL_2M mapping, then we will
505 			 * use the existing mapping,
506 			 *
507 			 * Otherwise, we will split the large page mapping but
508 			 * use the same existing protection bits except for
509 			 * large page, so that we don't violate Intel's TLB
510 			 * Application note (317080) which says, while changing
511 			 * the page sizes, new and old translations should
512 			 * not differ with respect to page frame and
513 			 * attributes.
514 			 */
515 			if (page_size_mask & (1 << PG_LEVEL_2M)) {
516 				if (!after_bootmem)
517 					pages++;
518 				paddr_last = paddr_next;
519 				continue;
520 			}
521 			new_prot = pte_pgprot(pte_clrhuge(*(pte_t *)pmd));
522 		}
523 
524 		if (page_size_mask & (1<<PG_LEVEL_2M)) {
525 			pages++;
526 			spin_lock(&init_mm.page_table_lock);
527 			set_pte((pte_t *)pmd,
528 				pfn_pte((paddr & PMD_MASK) >> PAGE_SHIFT,
529 					__pgprot(pgprot_val(prot) | _PAGE_PSE)));
530 			spin_unlock(&init_mm.page_table_lock);
531 			paddr_last = paddr_next;
532 			continue;
533 		}
534 
535 		pte = alloc_low_page();
536 		paddr_last = phys_pte_init(pte, paddr, paddr_end, new_prot);
537 
538 		spin_lock(&init_mm.page_table_lock);
539 		pmd_populate_kernel(&init_mm, pmd, pte);
540 		spin_unlock(&init_mm.page_table_lock);
541 	}
542 	update_page_count(PG_LEVEL_2M, pages);
543 	return paddr_last;
544 }
545 
546 /*
547  * Create PUD level page table mapping for physical addresses. The virtual
548  * and physical address do not have to be aligned at this level. KASLR can
549  * randomize virtual addresses up to this level.
550  * It returns the last physical address mapped.
551  */
552 static unsigned long __meminit
553 phys_pud_init(pud_t *pud_page, unsigned long paddr, unsigned long paddr_end,
554 	      unsigned long page_size_mask)
555 {
556 	unsigned long pages = 0, paddr_next;
557 	unsigned long paddr_last = paddr_end;
558 	unsigned long vaddr = (unsigned long)__va(paddr);
559 	int i = pud_index(vaddr);
560 
561 	for (; i < PTRS_PER_PUD; i++, paddr = paddr_next) {
562 		pud_t *pud;
563 		pmd_t *pmd;
564 		pgprot_t prot = PAGE_KERNEL;
565 
566 		vaddr = (unsigned long)__va(paddr);
567 		pud = pud_page + pud_index(vaddr);
568 		paddr_next = (paddr & PUD_MASK) + PUD_SIZE;
569 
570 		if (paddr >= paddr_end) {
571 			if (!after_bootmem &&
572 			    !e820__mapped_any(paddr & PUD_MASK, paddr_next,
573 					     E820_TYPE_RAM) &&
574 			    !e820__mapped_any(paddr & PUD_MASK, paddr_next,
575 					     E820_TYPE_RESERVED_KERN))
576 				set_pud(pud, __pud(0));
577 			continue;
578 		}
579 
580 		if (!pud_none(*pud)) {
581 			if (!pud_large(*pud)) {
582 				pmd = pmd_offset(pud, 0);
583 				paddr_last = phys_pmd_init(pmd, paddr,
584 							   paddr_end,
585 							   page_size_mask,
586 							   prot);
587 				__flush_tlb_all();
588 				continue;
589 			}
590 			/*
591 			 * If we are ok with PG_LEVEL_1G mapping, then we will
592 			 * use the existing mapping.
593 			 *
594 			 * Otherwise, we will split the gbpage mapping but use
595 			 * the same existing protection  bits except for large
596 			 * page, so that we don't violate Intel's TLB
597 			 * Application note (317080) which says, while changing
598 			 * the page sizes, new and old translations should
599 			 * not differ with respect to page frame and
600 			 * attributes.
601 			 */
602 			if (page_size_mask & (1 << PG_LEVEL_1G)) {
603 				if (!after_bootmem)
604 					pages++;
605 				paddr_last = paddr_next;
606 				continue;
607 			}
608 			prot = pte_pgprot(pte_clrhuge(*(pte_t *)pud));
609 		}
610 
611 		if (page_size_mask & (1<<PG_LEVEL_1G)) {
612 			pages++;
613 			spin_lock(&init_mm.page_table_lock);
614 			set_pte((pte_t *)pud,
615 				pfn_pte((paddr & PUD_MASK) >> PAGE_SHIFT,
616 					PAGE_KERNEL_LARGE));
617 			spin_unlock(&init_mm.page_table_lock);
618 			paddr_last = paddr_next;
619 			continue;
620 		}
621 
622 		pmd = alloc_low_page();
623 		paddr_last = phys_pmd_init(pmd, paddr, paddr_end,
624 					   page_size_mask, prot);
625 
626 		spin_lock(&init_mm.page_table_lock);
627 		pud_populate(&init_mm, pud, pmd);
628 		spin_unlock(&init_mm.page_table_lock);
629 	}
630 	__flush_tlb_all();
631 
632 	update_page_count(PG_LEVEL_1G, pages);
633 
634 	return paddr_last;
635 }
636 
637 static unsigned long __meminit
638 phys_p4d_init(p4d_t *p4d_page, unsigned long paddr, unsigned long paddr_end,
639 	      unsigned long page_size_mask)
640 {
641 	unsigned long paddr_next, paddr_last = paddr_end;
642 	unsigned long vaddr = (unsigned long)__va(paddr);
643 	int i = p4d_index(vaddr);
644 
645 	if (!pgtable_l5_enabled())
646 		return phys_pud_init((pud_t *) p4d_page, paddr, paddr_end, page_size_mask);
647 
648 	for (; i < PTRS_PER_P4D; i++, paddr = paddr_next) {
649 		p4d_t *p4d;
650 		pud_t *pud;
651 
652 		vaddr = (unsigned long)__va(paddr);
653 		p4d = p4d_page + p4d_index(vaddr);
654 		paddr_next = (paddr & P4D_MASK) + P4D_SIZE;
655 
656 		if (paddr >= paddr_end) {
657 			if (!after_bootmem &&
658 			    !e820__mapped_any(paddr & P4D_MASK, paddr_next,
659 					     E820_TYPE_RAM) &&
660 			    !e820__mapped_any(paddr & P4D_MASK, paddr_next,
661 					     E820_TYPE_RESERVED_KERN))
662 				set_p4d(p4d, __p4d(0));
663 			continue;
664 		}
665 
666 		if (!p4d_none(*p4d)) {
667 			pud = pud_offset(p4d, 0);
668 			paddr_last = phys_pud_init(pud, paddr,
669 					paddr_end,
670 					page_size_mask);
671 			__flush_tlb_all();
672 			continue;
673 		}
674 
675 		pud = alloc_low_page();
676 		paddr_last = phys_pud_init(pud, paddr, paddr_end,
677 					   page_size_mask);
678 
679 		spin_lock(&init_mm.page_table_lock);
680 		p4d_populate(&init_mm, p4d, pud);
681 		spin_unlock(&init_mm.page_table_lock);
682 	}
683 	__flush_tlb_all();
684 
685 	return paddr_last;
686 }
687 
688 /*
689  * Create page table mapping for the physical memory for specific physical
690  * addresses. The virtual and physical addresses have to be aligned on PMD level
691  * down. It returns the last physical address mapped.
692  */
693 unsigned long __meminit
694 kernel_physical_mapping_init(unsigned long paddr_start,
695 			     unsigned long paddr_end,
696 			     unsigned long page_size_mask)
697 {
698 	bool pgd_changed = false;
699 	unsigned long vaddr, vaddr_start, vaddr_end, vaddr_next, paddr_last;
700 
701 	paddr_last = paddr_end;
702 	vaddr = (unsigned long)__va(paddr_start);
703 	vaddr_end = (unsigned long)__va(paddr_end);
704 	vaddr_start = vaddr;
705 
706 	for (; vaddr < vaddr_end; vaddr = vaddr_next) {
707 		pgd_t *pgd = pgd_offset_k(vaddr);
708 		p4d_t *p4d;
709 
710 		vaddr_next = (vaddr & PGDIR_MASK) + PGDIR_SIZE;
711 
712 		if (pgd_val(*pgd)) {
713 			p4d = (p4d_t *)pgd_page_vaddr(*pgd);
714 			paddr_last = phys_p4d_init(p4d, __pa(vaddr),
715 						   __pa(vaddr_end),
716 						   page_size_mask);
717 			continue;
718 		}
719 
720 		p4d = alloc_low_page();
721 		paddr_last = phys_p4d_init(p4d, __pa(vaddr), __pa(vaddr_end),
722 					   page_size_mask);
723 
724 		spin_lock(&init_mm.page_table_lock);
725 		if (pgtable_l5_enabled())
726 			pgd_populate(&init_mm, pgd, p4d);
727 		else
728 			p4d_populate(&init_mm, p4d_offset(pgd, vaddr), (pud_t *) p4d);
729 		spin_unlock(&init_mm.page_table_lock);
730 		pgd_changed = true;
731 	}
732 
733 	if (pgd_changed)
734 		sync_global_pgds(vaddr_start, vaddr_end - 1);
735 
736 	__flush_tlb_all();
737 
738 	return paddr_last;
739 }
740 
741 #ifndef CONFIG_NUMA
742 void __init initmem_init(void)
743 {
744 	memblock_set_node(0, PHYS_ADDR_MAX, &memblock.memory, 0);
745 }
746 #endif
747 
748 void __init paging_init(void)
749 {
750 	sparse_memory_present_with_active_regions(MAX_NUMNODES);
751 	sparse_init();
752 
753 	/*
754 	 * clear the default setting with node 0
755 	 * note: don't use nodes_clear here, that is really clearing when
756 	 *	 numa support is not compiled in, and later node_set_state
757 	 *	 will not set it back.
758 	 */
759 	node_clear_state(0, N_MEMORY);
760 	if (N_MEMORY != N_NORMAL_MEMORY)
761 		node_clear_state(0, N_NORMAL_MEMORY);
762 
763 	zone_sizes_init();
764 }
765 
766 /*
767  * Memory hotplug specific functions
768  */
769 #ifdef CONFIG_MEMORY_HOTPLUG
770 /*
771  * After memory hotplug the variables max_pfn, max_low_pfn and high_memory need
772  * updating.
773  */
774 static void update_end_of_memory_vars(u64 start, u64 size)
775 {
776 	unsigned long end_pfn = PFN_UP(start + size);
777 
778 	if (end_pfn > max_pfn) {
779 		max_pfn = end_pfn;
780 		max_low_pfn = end_pfn;
781 		high_memory = (void *)__va(max_pfn * PAGE_SIZE - 1) + 1;
782 	}
783 }
784 
785 int add_pages(int nid, unsigned long start_pfn, unsigned long nr_pages,
786 		struct vmem_altmap *altmap, bool want_memblock)
787 {
788 	int ret;
789 
790 	ret = __add_pages(nid, start_pfn, nr_pages, altmap, want_memblock);
791 	WARN_ON_ONCE(ret);
792 
793 	/* update max_pfn, max_low_pfn and high_memory */
794 	update_end_of_memory_vars(start_pfn << PAGE_SHIFT,
795 				  nr_pages << PAGE_SHIFT);
796 
797 	return ret;
798 }
799 
800 int arch_add_memory(int nid, u64 start, u64 size, struct vmem_altmap *altmap,
801 		bool want_memblock)
802 {
803 	unsigned long start_pfn = start >> PAGE_SHIFT;
804 	unsigned long nr_pages = size >> PAGE_SHIFT;
805 
806 	init_memory_mapping(start, start + size);
807 
808 	return add_pages(nid, start_pfn, nr_pages, altmap, want_memblock);
809 }
810 
811 #define PAGE_INUSE 0xFD
812 
813 static void __meminit free_pagetable(struct page *page, int order)
814 {
815 	unsigned long magic;
816 	unsigned int nr_pages = 1 << order;
817 
818 	/* bootmem page has reserved flag */
819 	if (PageReserved(page)) {
820 		__ClearPageReserved(page);
821 
822 		magic = (unsigned long)page->freelist;
823 		if (magic == SECTION_INFO || magic == MIX_SECTION_INFO) {
824 			while (nr_pages--)
825 				put_page_bootmem(page++);
826 		} else
827 			while (nr_pages--)
828 				free_reserved_page(page++);
829 	} else
830 		free_pages((unsigned long)page_address(page), order);
831 }
832 
833 static void __meminit free_hugepage_table(struct page *page,
834 		struct vmem_altmap *altmap)
835 {
836 	if (altmap)
837 		vmem_altmap_free(altmap, PMD_SIZE / PAGE_SIZE);
838 	else
839 		free_pagetable(page, get_order(PMD_SIZE));
840 }
841 
842 static void __meminit free_pte_table(pte_t *pte_start, pmd_t *pmd)
843 {
844 	pte_t *pte;
845 	int i;
846 
847 	for (i = 0; i < PTRS_PER_PTE; i++) {
848 		pte = pte_start + i;
849 		if (!pte_none(*pte))
850 			return;
851 	}
852 
853 	/* free a pte talbe */
854 	free_pagetable(pmd_page(*pmd), 0);
855 	spin_lock(&init_mm.page_table_lock);
856 	pmd_clear(pmd);
857 	spin_unlock(&init_mm.page_table_lock);
858 }
859 
860 static void __meminit free_pmd_table(pmd_t *pmd_start, pud_t *pud)
861 {
862 	pmd_t *pmd;
863 	int i;
864 
865 	for (i = 0; i < PTRS_PER_PMD; i++) {
866 		pmd = pmd_start + i;
867 		if (!pmd_none(*pmd))
868 			return;
869 	}
870 
871 	/* free a pmd talbe */
872 	free_pagetable(pud_page(*pud), 0);
873 	spin_lock(&init_mm.page_table_lock);
874 	pud_clear(pud);
875 	spin_unlock(&init_mm.page_table_lock);
876 }
877 
878 static void __meminit free_pud_table(pud_t *pud_start, p4d_t *p4d)
879 {
880 	pud_t *pud;
881 	int i;
882 
883 	for (i = 0; i < PTRS_PER_PUD; i++) {
884 		pud = pud_start + i;
885 		if (!pud_none(*pud))
886 			return;
887 	}
888 
889 	/* free a pud talbe */
890 	free_pagetable(p4d_page(*p4d), 0);
891 	spin_lock(&init_mm.page_table_lock);
892 	p4d_clear(p4d);
893 	spin_unlock(&init_mm.page_table_lock);
894 }
895 
896 static void __meminit
897 remove_pte_table(pte_t *pte_start, unsigned long addr, unsigned long end,
898 		 bool direct)
899 {
900 	unsigned long next, pages = 0;
901 	pte_t *pte;
902 	void *page_addr;
903 	phys_addr_t phys_addr;
904 
905 	pte = pte_start + pte_index(addr);
906 	for (; addr < end; addr = next, pte++) {
907 		next = (addr + PAGE_SIZE) & PAGE_MASK;
908 		if (next > end)
909 			next = end;
910 
911 		if (!pte_present(*pte))
912 			continue;
913 
914 		/*
915 		 * We mapped [0,1G) memory as identity mapping when
916 		 * initializing, in arch/x86/kernel/head_64.S. These
917 		 * pagetables cannot be removed.
918 		 */
919 		phys_addr = pte_val(*pte) + (addr & PAGE_MASK);
920 		if (phys_addr < (phys_addr_t)0x40000000)
921 			return;
922 
923 		if (PAGE_ALIGNED(addr) && PAGE_ALIGNED(next)) {
924 			/*
925 			 * Do not free direct mapping pages since they were
926 			 * freed when offlining, or simplely not in use.
927 			 */
928 			if (!direct)
929 				free_pagetable(pte_page(*pte), 0);
930 
931 			spin_lock(&init_mm.page_table_lock);
932 			pte_clear(&init_mm, addr, pte);
933 			spin_unlock(&init_mm.page_table_lock);
934 
935 			/* For non-direct mapping, pages means nothing. */
936 			pages++;
937 		} else {
938 			/*
939 			 * If we are here, we are freeing vmemmap pages since
940 			 * direct mapped memory ranges to be freed are aligned.
941 			 *
942 			 * If we are not removing the whole page, it means
943 			 * other page structs in this page are being used and
944 			 * we canot remove them. So fill the unused page_structs
945 			 * with 0xFD, and remove the page when it is wholly
946 			 * filled with 0xFD.
947 			 */
948 			memset((void *)addr, PAGE_INUSE, next - addr);
949 
950 			page_addr = page_address(pte_page(*pte));
951 			if (!memchr_inv(page_addr, PAGE_INUSE, PAGE_SIZE)) {
952 				free_pagetable(pte_page(*pte), 0);
953 
954 				spin_lock(&init_mm.page_table_lock);
955 				pte_clear(&init_mm, addr, pte);
956 				spin_unlock(&init_mm.page_table_lock);
957 			}
958 		}
959 	}
960 
961 	/* Call free_pte_table() in remove_pmd_table(). */
962 	flush_tlb_all();
963 	if (direct)
964 		update_page_count(PG_LEVEL_4K, -pages);
965 }
966 
967 static void __meminit
968 remove_pmd_table(pmd_t *pmd_start, unsigned long addr, unsigned long end,
969 		 bool direct, struct vmem_altmap *altmap)
970 {
971 	unsigned long next, pages = 0;
972 	pte_t *pte_base;
973 	pmd_t *pmd;
974 	void *page_addr;
975 
976 	pmd = pmd_start + pmd_index(addr);
977 	for (; addr < end; addr = next, pmd++) {
978 		next = pmd_addr_end(addr, end);
979 
980 		if (!pmd_present(*pmd))
981 			continue;
982 
983 		if (pmd_large(*pmd)) {
984 			if (IS_ALIGNED(addr, PMD_SIZE) &&
985 			    IS_ALIGNED(next, PMD_SIZE)) {
986 				if (!direct)
987 					free_hugepage_table(pmd_page(*pmd),
988 							    altmap);
989 
990 				spin_lock(&init_mm.page_table_lock);
991 				pmd_clear(pmd);
992 				spin_unlock(&init_mm.page_table_lock);
993 				pages++;
994 			} else {
995 				/* If here, we are freeing vmemmap pages. */
996 				memset((void *)addr, PAGE_INUSE, next - addr);
997 
998 				page_addr = page_address(pmd_page(*pmd));
999 				if (!memchr_inv(page_addr, PAGE_INUSE,
1000 						PMD_SIZE)) {
1001 					free_hugepage_table(pmd_page(*pmd),
1002 							    altmap);
1003 
1004 					spin_lock(&init_mm.page_table_lock);
1005 					pmd_clear(pmd);
1006 					spin_unlock(&init_mm.page_table_lock);
1007 				}
1008 			}
1009 
1010 			continue;
1011 		}
1012 
1013 		pte_base = (pte_t *)pmd_page_vaddr(*pmd);
1014 		remove_pte_table(pte_base, addr, next, direct);
1015 		free_pte_table(pte_base, pmd);
1016 	}
1017 
1018 	/* Call free_pmd_table() in remove_pud_table(). */
1019 	if (direct)
1020 		update_page_count(PG_LEVEL_2M, -pages);
1021 }
1022 
1023 static void __meminit
1024 remove_pud_table(pud_t *pud_start, unsigned long addr, unsigned long end,
1025 		 struct vmem_altmap *altmap, bool direct)
1026 {
1027 	unsigned long next, pages = 0;
1028 	pmd_t *pmd_base;
1029 	pud_t *pud;
1030 	void *page_addr;
1031 
1032 	pud = pud_start + pud_index(addr);
1033 	for (; addr < end; addr = next, pud++) {
1034 		next = pud_addr_end(addr, end);
1035 
1036 		if (!pud_present(*pud))
1037 			continue;
1038 
1039 		if (pud_large(*pud)) {
1040 			if (IS_ALIGNED(addr, PUD_SIZE) &&
1041 			    IS_ALIGNED(next, PUD_SIZE)) {
1042 				if (!direct)
1043 					free_pagetable(pud_page(*pud),
1044 						       get_order(PUD_SIZE));
1045 
1046 				spin_lock(&init_mm.page_table_lock);
1047 				pud_clear(pud);
1048 				spin_unlock(&init_mm.page_table_lock);
1049 				pages++;
1050 			} else {
1051 				/* If here, we are freeing vmemmap pages. */
1052 				memset((void *)addr, PAGE_INUSE, next - addr);
1053 
1054 				page_addr = page_address(pud_page(*pud));
1055 				if (!memchr_inv(page_addr, PAGE_INUSE,
1056 						PUD_SIZE)) {
1057 					free_pagetable(pud_page(*pud),
1058 						       get_order(PUD_SIZE));
1059 
1060 					spin_lock(&init_mm.page_table_lock);
1061 					pud_clear(pud);
1062 					spin_unlock(&init_mm.page_table_lock);
1063 				}
1064 			}
1065 
1066 			continue;
1067 		}
1068 
1069 		pmd_base = pmd_offset(pud, 0);
1070 		remove_pmd_table(pmd_base, addr, next, direct, altmap);
1071 		free_pmd_table(pmd_base, pud);
1072 	}
1073 
1074 	if (direct)
1075 		update_page_count(PG_LEVEL_1G, -pages);
1076 }
1077 
1078 static void __meminit
1079 remove_p4d_table(p4d_t *p4d_start, unsigned long addr, unsigned long end,
1080 		 struct vmem_altmap *altmap, bool direct)
1081 {
1082 	unsigned long next, pages = 0;
1083 	pud_t *pud_base;
1084 	p4d_t *p4d;
1085 
1086 	p4d = p4d_start + p4d_index(addr);
1087 	for (; addr < end; addr = next, p4d++) {
1088 		next = p4d_addr_end(addr, end);
1089 
1090 		if (!p4d_present(*p4d))
1091 			continue;
1092 
1093 		BUILD_BUG_ON(p4d_large(*p4d));
1094 
1095 		pud_base = pud_offset(p4d, 0);
1096 		remove_pud_table(pud_base, addr, next, altmap, direct);
1097 		/*
1098 		 * For 4-level page tables we do not want to free PUDs, but in the
1099 		 * 5-level case we should free them. This code will have to change
1100 		 * to adapt for boot-time switching between 4 and 5 level page tables.
1101 		 */
1102 		if (pgtable_l5_enabled())
1103 			free_pud_table(pud_base, p4d);
1104 	}
1105 
1106 	if (direct)
1107 		update_page_count(PG_LEVEL_512G, -pages);
1108 }
1109 
1110 /* start and end are both virtual address. */
1111 static void __meminit
1112 remove_pagetable(unsigned long start, unsigned long end, bool direct,
1113 		struct vmem_altmap *altmap)
1114 {
1115 	unsigned long next;
1116 	unsigned long addr;
1117 	pgd_t *pgd;
1118 	p4d_t *p4d;
1119 
1120 	for (addr = start; addr < end; addr = next) {
1121 		next = pgd_addr_end(addr, end);
1122 
1123 		pgd = pgd_offset_k(addr);
1124 		if (!pgd_present(*pgd))
1125 			continue;
1126 
1127 		p4d = p4d_offset(pgd, 0);
1128 		remove_p4d_table(p4d, addr, next, altmap, direct);
1129 	}
1130 
1131 	flush_tlb_all();
1132 }
1133 
1134 void __ref vmemmap_free(unsigned long start, unsigned long end,
1135 		struct vmem_altmap *altmap)
1136 {
1137 	remove_pagetable(start, end, false, altmap);
1138 }
1139 
1140 #ifdef CONFIG_MEMORY_HOTREMOVE
1141 static void __meminit
1142 kernel_physical_mapping_remove(unsigned long start, unsigned long end)
1143 {
1144 	start = (unsigned long)__va(start);
1145 	end = (unsigned long)__va(end);
1146 
1147 	remove_pagetable(start, end, true, NULL);
1148 }
1149 
1150 int __ref arch_remove_memory(u64 start, u64 size, struct vmem_altmap *altmap)
1151 {
1152 	unsigned long start_pfn = start >> PAGE_SHIFT;
1153 	unsigned long nr_pages = size >> PAGE_SHIFT;
1154 	struct page *page = pfn_to_page(start_pfn);
1155 	struct zone *zone;
1156 	int ret;
1157 
1158 	/* With altmap the first mapped page is offset from @start */
1159 	if (altmap)
1160 		page += vmem_altmap_offset(altmap);
1161 	zone = page_zone(page);
1162 	ret = __remove_pages(zone, start_pfn, nr_pages, altmap);
1163 	WARN_ON_ONCE(ret);
1164 	kernel_physical_mapping_remove(start, start + size);
1165 
1166 	return ret;
1167 }
1168 #endif
1169 #endif /* CONFIG_MEMORY_HOTPLUG */
1170 
1171 static struct kcore_list kcore_vsyscall;
1172 
1173 static void __init register_page_bootmem_info(void)
1174 {
1175 #ifdef CONFIG_NUMA
1176 	int i;
1177 
1178 	for_each_online_node(i)
1179 		register_page_bootmem_info_node(NODE_DATA(i));
1180 #endif
1181 }
1182 
1183 void __init mem_init(void)
1184 {
1185 	pci_iommu_alloc();
1186 
1187 	/* clear_bss() already clear the empty_zero_page */
1188 
1189 	/* this will put all memory onto the freelists */
1190 	memblock_free_all();
1191 	after_bootmem = 1;
1192 	x86_init.hyper.init_after_bootmem();
1193 
1194 	/*
1195 	 * Must be done after boot memory is put on freelist, because here we
1196 	 * might set fields in deferred struct pages that have not yet been
1197 	 * initialized, and memblock_free_all() initializes all the reserved
1198 	 * deferred pages for us.
1199 	 */
1200 	register_page_bootmem_info();
1201 
1202 	/* Register memory areas for /proc/kcore */
1203 	if (get_gate_vma(&init_mm))
1204 		kclist_add(&kcore_vsyscall, (void *)VSYSCALL_ADDR, PAGE_SIZE, KCORE_USER);
1205 
1206 	mem_init_print_info(NULL);
1207 }
1208 
1209 int kernel_set_to_readonly;
1210 
1211 void set_kernel_text_rw(void)
1212 {
1213 	unsigned long start = PFN_ALIGN(_text);
1214 	unsigned long end = PFN_ALIGN(__stop___ex_table);
1215 
1216 	if (!kernel_set_to_readonly)
1217 		return;
1218 
1219 	pr_debug("Set kernel text: %lx - %lx for read write\n",
1220 		 start, end);
1221 
1222 	/*
1223 	 * Make the kernel identity mapping for text RW. Kernel text
1224 	 * mapping will always be RO. Refer to the comment in
1225 	 * static_protections() in pageattr.c
1226 	 */
1227 	set_memory_rw(start, (end - start) >> PAGE_SHIFT);
1228 }
1229 
1230 void set_kernel_text_ro(void)
1231 {
1232 	unsigned long start = PFN_ALIGN(_text);
1233 	unsigned long end = PFN_ALIGN(__stop___ex_table);
1234 
1235 	if (!kernel_set_to_readonly)
1236 		return;
1237 
1238 	pr_debug("Set kernel text: %lx - %lx for read only\n",
1239 		 start, end);
1240 
1241 	/*
1242 	 * Set the kernel identity mapping for text RO.
1243 	 */
1244 	set_memory_ro(start, (end - start) >> PAGE_SHIFT);
1245 }
1246 
1247 void mark_rodata_ro(void)
1248 {
1249 	unsigned long start = PFN_ALIGN(_text);
1250 	unsigned long rodata_start = PFN_ALIGN(__start_rodata);
1251 	unsigned long end = (unsigned long) &__end_rodata_hpage_align;
1252 	unsigned long text_end = PFN_ALIGN(&__stop___ex_table);
1253 	unsigned long rodata_end = PFN_ALIGN(&__end_rodata);
1254 	unsigned long all_end;
1255 
1256 	printk(KERN_INFO "Write protecting the kernel read-only data: %luk\n",
1257 	       (end - start) >> 10);
1258 	set_memory_ro(start, (end - start) >> PAGE_SHIFT);
1259 
1260 	kernel_set_to_readonly = 1;
1261 
1262 	/*
1263 	 * The rodata/data/bss/brk section (but not the kernel text!)
1264 	 * should also be not-executable.
1265 	 *
1266 	 * We align all_end to PMD_SIZE because the existing mapping
1267 	 * is a full PMD. If we would align _brk_end to PAGE_SIZE we
1268 	 * split the PMD and the reminder between _brk_end and the end
1269 	 * of the PMD will remain mapped executable.
1270 	 *
1271 	 * Any PMD which was setup after the one which covers _brk_end
1272 	 * has been zapped already via cleanup_highmem().
1273 	 */
1274 	all_end = roundup((unsigned long)_brk_end, PMD_SIZE);
1275 	set_memory_nx(text_end, (all_end - text_end) >> PAGE_SHIFT);
1276 
1277 #ifdef CONFIG_CPA_DEBUG
1278 	printk(KERN_INFO "Testing CPA: undo %lx-%lx\n", start, end);
1279 	set_memory_rw(start, (end-start) >> PAGE_SHIFT);
1280 
1281 	printk(KERN_INFO "Testing CPA: again\n");
1282 	set_memory_ro(start, (end-start) >> PAGE_SHIFT);
1283 #endif
1284 
1285 	free_kernel_image_pages((void *)text_end, (void *)rodata_start);
1286 	free_kernel_image_pages((void *)rodata_end, (void *)_sdata);
1287 
1288 	debug_checkwx();
1289 }
1290 
1291 int kern_addr_valid(unsigned long addr)
1292 {
1293 	unsigned long above = ((long)addr) >> __VIRTUAL_MASK_SHIFT;
1294 	pgd_t *pgd;
1295 	p4d_t *p4d;
1296 	pud_t *pud;
1297 	pmd_t *pmd;
1298 	pte_t *pte;
1299 
1300 	if (above != 0 && above != -1UL)
1301 		return 0;
1302 
1303 	pgd = pgd_offset_k(addr);
1304 	if (pgd_none(*pgd))
1305 		return 0;
1306 
1307 	p4d = p4d_offset(pgd, addr);
1308 	if (p4d_none(*p4d))
1309 		return 0;
1310 
1311 	pud = pud_offset(p4d, addr);
1312 	if (pud_none(*pud))
1313 		return 0;
1314 
1315 	if (pud_large(*pud))
1316 		return pfn_valid(pud_pfn(*pud));
1317 
1318 	pmd = pmd_offset(pud, addr);
1319 	if (pmd_none(*pmd))
1320 		return 0;
1321 
1322 	if (pmd_large(*pmd))
1323 		return pfn_valid(pmd_pfn(*pmd));
1324 
1325 	pte = pte_offset_kernel(pmd, addr);
1326 	if (pte_none(*pte))
1327 		return 0;
1328 
1329 	return pfn_valid(pte_pfn(*pte));
1330 }
1331 
1332 /*
1333  * Block size is the minimum amount of memory which can be hotplugged or
1334  * hotremoved. It must be power of two and must be equal or larger than
1335  * MIN_MEMORY_BLOCK_SIZE.
1336  */
1337 #define MAX_BLOCK_SIZE (2UL << 30)
1338 
1339 /* Amount of ram needed to start using large blocks */
1340 #define MEM_SIZE_FOR_LARGE_BLOCK (64UL << 30)
1341 
1342 /* Adjustable memory block size */
1343 static unsigned long set_memory_block_size;
1344 int __init set_memory_block_size_order(unsigned int order)
1345 {
1346 	unsigned long size = 1UL << order;
1347 
1348 	if (size > MEM_SIZE_FOR_LARGE_BLOCK || size < MIN_MEMORY_BLOCK_SIZE)
1349 		return -EINVAL;
1350 
1351 	set_memory_block_size = size;
1352 	return 0;
1353 }
1354 
1355 static unsigned long probe_memory_block_size(void)
1356 {
1357 	unsigned long boot_mem_end = max_pfn << PAGE_SHIFT;
1358 	unsigned long bz;
1359 
1360 	/* If memory block size has been set, then use it */
1361 	bz = set_memory_block_size;
1362 	if (bz)
1363 		goto done;
1364 
1365 	/* Use regular block if RAM is smaller than MEM_SIZE_FOR_LARGE_BLOCK */
1366 	if (boot_mem_end < MEM_SIZE_FOR_LARGE_BLOCK) {
1367 		bz = MIN_MEMORY_BLOCK_SIZE;
1368 		goto done;
1369 	}
1370 
1371 	/* Find the largest allowed block size that aligns to memory end */
1372 	for (bz = MAX_BLOCK_SIZE; bz > MIN_MEMORY_BLOCK_SIZE; bz >>= 1) {
1373 		if (IS_ALIGNED(boot_mem_end, bz))
1374 			break;
1375 	}
1376 done:
1377 	pr_info("x86/mm: Memory block size: %ldMB\n", bz >> 20);
1378 
1379 	return bz;
1380 }
1381 
1382 static unsigned long memory_block_size_probed;
1383 unsigned long memory_block_size_bytes(void)
1384 {
1385 	if (!memory_block_size_probed)
1386 		memory_block_size_probed = probe_memory_block_size();
1387 
1388 	return memory_block_size_probed;
1389 }
1390 
1391 #ifdef CONFIG_SPARSEMEM_VMEMMAP
1392 /*
1393  * Initialise the sparsemem vmemmap using huge-pages at the PMD level.
1394  */
1395 static long __meminitdata addr_start, addr_end;
1396 static void __meminitdata *p_start, *p_end;
1397 static int __meminitdata node_start;
1398 
1399 static int __meminit vmemmap_populate_hugepages(unsigned long start,
1400 		unsigned long end, int node, struct vmem_altmap *altmap)
1401 {
1402 	unsigned long addr;
1403 	unsigned long next;
1404 	pgd_t *pgd;
1405 	p4d_t *p4d;
1406 	pud_t *pud;
1407 	pmd_t *pmd;
1408 
1409 	for (addr = start; addr < end; addr = next) {
1410 		next = pmd_addr_end(addr, end);
1411 
1412 		pgd = vmemmap_pgd_populate(addr, node);
1413 		if (!pgd)
1414 			return -ENOMEM;
1415 
1416 		p4d = vmemmap_p4d_populate(pgd, addr, node);
1417 		if (!p4d)
1418 			return -ENOMEM;
1419 
1420 		pud = vmemmap_pud_populate(p4d, addr, node);
1421 		if (!pud)
1422 			return -ENOMEM;
1423 
1424 		pmd = pmd_offset(pud, addr);
1425 		if (pmd_none(*pmd)) {
1426 			void *p;
1427 
1428 			if (altmap)
1429 				p = altmap_alloc_block_buf(PMD_SIZE, altmap);
1430 			else
1431 				p = vmemmap_alloc_block_buf(PMD_SIZE, node);
1432 			if (p) {
1433 				pte_t entry;
1434 
1435 				entry = pfn_pte(__pa(p) >> PAGE_SHIFT,
1436 						PAGE_KERNEL_LARGE);
1437 				set_pmd(pmd, __pmd(pte_val(entry)));
1438 
1439 				/* check to see if we have contiguous blocks */
1440 				if (p_end != p || node_start != node) {
1441 					if (p_start)
1442 						pr_debug(" [%lx-%lx] PMD -> [%p-%p] on node %d\n",
1443 						       addr_start, addr_end-1, p_start, p_end-1, node_start);
1444 					addr_start = addr;
1445 					node_start = node;
1446 					p_start = p;
1447 				}
1448 
1449 				addr_end = addr + PMD_SIZE;
1450 				p_end = p + PMD_SIZE;
1451 				continue;
1452 			} else if (altmap)
1453 				return -ENOMEM; /* no fallback */
1454 		} else if (pmd_large(*pmd)) {
1455 			vmemmap_verify((pte_t *)pmd, node, addr, next);
1456 			continue;
1457 		}
1458 		if (vmemmap_populate_basepages(addr, next, node))
1459 			return -ENOMEM;
1460 	}
1461 	return 0;
1462 }
1463 
1464 int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node,
1465 		struct vmem_altmap *altmap)
1466 {
1467 	int err;
1468 
1469 	if (boot_cpu_has(X86_FEATURE_PSE))
1470 		err = vmemmap_populate_hugepages(start, end, node, altmap);
1471 	else if (altmap) {
1472 		pr_err_once("%s: no cpu support for altmap allocations\n",
1473 				__func__);
1474 		err = -ENOMEM;
1475 	} else
1476 		err = vmemmap_populate_basepages(start, end, node);
1477 	if (!err)
1478 		sync_global_pgds(start, end - 1);
1479 	return err;
1480 }
1481 
1482 #if defined(CONFIG_MEMORY_HOTPLUG_SPARSE) && defined(CONFIG_HAVE_BOOTMEM_INFO_NODE)
1483 void register_page_bootmem_memmap(unsigned long section_nr,
1484 				  struct page *start_page, unsigned long nr_pages)
1485 {
1486 	unsigned long addr = (unsigned long)start_page;
1487 	unsigned long end = (unsigned long)(start_page + nr_pages);
1488 	unsigned long next;
1489 	pgd_t *pgd;
1490 	p4d_t *p4d;
1491 	pud_t *pud;
1492 	pmd_t *pmd;
1493 	unsigned int nr_pmd_pages;
1494 	struct page *page;
1495 
1496 	for (; addr < end; addr = next) {
1497 		pte_t *pte = NULL;
1498 
1499 		pgd = pgd_offset_k(addr);
1500 		if (pgd_none(*pgd)) {
1501 			next = (addr + PAGE_SIZE) & PAGE_MASK;
1502 			continue;
1503 		}
1504 		get_page_bootmem(section_nr, pgd_page(*pgd), MIX_SECTION_INFO);
1505 
1506 		p4d = p4d_offset(pgd, addr);
1507 		if (p4d_none(*p4d)) {
1508 			next = (addr + PAGE_SIZE) & PAGE_MASK;
1509 			continue;
1510 		}
1511 		get_page_bootmem(section_nr, p4d_page(*p4d), MIX_SECTION_INFO);
1512 
1513 		pud = pud_offset(p4d, addr);
1514 		if (pud_none(*pud)) {
1515 			next = (addr + PAGE_SIZE) & PAGE_MASK;
1516 			continue;
1517 		}
1518 		get_page_bootmem(section_nr, pud_page(*pud), MIX_SECTION_INFO);
1519 
1520 		if (!boot_cpu_has(X86_FEATURE_PSE)) {
1521 			next = (addr + PAGE_SIZE) & PAGE_MASK;
1522 			pmd = pmd_offset(pud, addr);
1523 			if (pmd_none(*pmd))
1524 				continue;
1525 			get_page_bootmem(section_nr, pmd_page(*pmd),
1526 					 MIX_SECTION_INFO);
1527 
1528 			pte = pte_offset_kernel(pmd, addr);
1529 			if (pte_none(*pte))
1530 				continue;
1531 			get_page_bootmem(section_nr, pte_page(*pte),
1532 					 SECTION_INFO);
1533 		} else {
1534 			next = pmd_addr_end(addr, end);
1535 
1536 			pmd = pmd_offset(pud, addr);
1537 			if (pmd_none(*pmd))
1538 				continue;
1539 
1540 			nr_pmd_pages = 1 << get_order(PMD_SIZE);
1541 			page = pmd_page(*pmd);
1542 			while (nr_pmd_pages--)
1543 				get_page_bootmem(section_nr, page++,
1544 						 SECTION_INFO);
1545 		}
1546 	}
1547 }
1548 #endif
1549 
1550 void __meminit vmemmap_populate_print_last(void)
1551 {
1552 	if (p_start) {
1553 		pr_debug(" [%lx-%lx] PMD -> [%p-%p] on node %d\n",
1554 			addr_start, addr_end-1, p_start, p_end-1, node_start);
1555 		p_start = NULL;
1556 		p_end = NULL;
1557 		node_start = 0;
1558 	}
1559 }
1560 #endif
1561