1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * linux/arch/x86_64/mm/init.c 4 * 5 * Copyright (C) 1995 Linus Torvalds 6 * Copyright (C) 2000 Pavel Machek <pavel@ucw.cz> 7 * Copyright (C) 2002,2003 Andi Kleen <ak@suse.de> 8 */ 9 10 #include <linux/signal.h> 11 #include <linux/sched.h> 12 #include <linux/kernel.h> 13 #include <linux/errno.h> 14 #include <linux/string.h> 15 #include <linux/types.h> 16 #include <linux/ptrace.h> 17 #include <linux/mman.h> 18 #include <linux/mm.h> 19 #include <linux/swap.h> 20 #include <linux/smp.h> 21 #include <linux/init.h> 22 #include <linux/initrd.h> 23 #include <linux/pagemap.h> 24 #include <linux/memblock.h> 25 #include <linux/proc_fs.h> 26 #include <linux/pci.h> 27 #include <linux/pfn.h> 28 #include <linux/poison.h> 29 #include <linux/dma-mapping.h> 30 #include <linux/memory.h> 31 #include <linux/memory_hotplug.h> 32 #include <linux/memremap.h> 33 #include <linux/nmi.h> 34 #include <linux/gfp.h> 35 #include <linux/kcore.h> 36 37 #include <asm/processor.h> 38 #include <asm/bios_ebda.h> 39 #include <linux/uaccess.h> 40 #include <asm/pgtable.h> 41 #include <asm/pgalloc.h> 42 #include <asm/dma.h> 43 #include <asm/fixmap.h> 44 #include <asm/e820/api.h> 45 #include <asm/apic.h> 46 #include <asm/tlb.h> 47 #include <asm/mmu_context.h> 48 #include <asm/proto.h> 49 #include <asm/smp.h> 50 #include <asm/sections.h> 51 #include <asm/kdebug.h> 52 #include <asm/numa.h> 53 #include <asm/set_memory.h> 54 #include <asm/init.h> 55 #include <asm/uv/uv.h> 56 #include <asm/setup.h> 57 58 #include "mm_internal.h" 59 60 #include "ident_map.c" 61 62 #define DEFINE_POPULATE(fname, type1, type2, init) \ 63 static inline void fname##_init(struct mm_struct *mm, \ 64 type1##_t *arg1, type2##_t *arg2, bool init) \ 65 { \ 66 if (init) \ 67 fname##_safe(mm, arg1, arg2); \ 68 else \ 69 fname(mm, arg1, arg2); \ 70 } 71 72 DEFINE_POPULATE(p4d_populate, p4d, pud, init) 73 DEFINE_POPULATE(pgd_populate, pgd, p4d, init) 74 DEFINE_POPULATE(pud_populate, pud, pmd, init) 75 DEFINE_POPULATE(pmd_populate_kernel, pmd, pte, init) 76 77 #define DEFINE_ENTRY(type1, type2, init) \ 78 static inline void set_##type1##_init(type1##_t *arg1, \ 79 type2##_t arg2, bool init) \ 80 { \ 81 if (init) \ 82 set_##type1##_safe(arg1, arg2); \ 83 else \ 84 set_##type1(arg1, arg2); \ 85 } 86 87 DEFINE_ENTRY(p4d, p4d, init) 88 DEFINE_ENTRY(pud, pud, init) 89 DEFINE_ENTRY(pmd, pmd, init) 90 DEFINE_ENTRY(pte, pte, init) 91 92 93 /* 94 * NOTE: pagetable_init alloc all the fixmap pagetables contiguous on the 95 * physical space so we can cache the place of the first one and move 96 * around without checking the pgd every time. 97 */ 98 99 /* Bits supported by the hardware: */ 100 pteval_t __supported_pte_mask __read_mostly = ~0; 101 /* Bits allowed in normal kernel mappings: */ 102 pteval_t __default_kernel_pte_mask __read_mostly = ~0; 103 EXPORT_SYMBOL_GPL(__supported_pte_mask); 104 /* Used in PAGE_KERNEL_* macros which are reasonably used out-of-tree: */ 105 EXPORT_SYMBOL(__default_kernel_pte_mask); 106 107 int force_personality32; 108 109 /* 110 * noexec32=on|off 111 * Control non executable heap for 32bit processes. 112 * To control the stack too use noexec=off 113 * 114 * on PROT_READ does not imply PROT_EXEC for 32-bit processes (default) 115 * off PROT_READ implies PROT_EXEC 116 */ 117 static int __init nonx32_setup(char *str) 118 { 119 if (!strcmp(str, "on")) 120 force_personality32 &= ~READ_IMPLIES_EXEC; 121 else if (!strcmp(str, "off")) 122 force_personality32 |= READ_IMPLIES_EXEC; 123 return 1; 124 } 125 __setup("noexec32=", nonx32_setup); 126 127 static void sync_global_pgds_l5(unsigned long start, unsigned long end) 128 { 129 unsigned long addr; 130 131 for (addr = start; addr <= end; addr = ALIGN(addr + 1, PGDIR_SIZE)) { 132 const pgd_t *pgd_ref = pgd_offset_k(addr); 133 struct page *page; 134 135 /* Check for overflow */ 136 if (addr < start) 137 break; 138 139 if (pgd_none(*pgd_ref)) 140 continue; 141 142 spin_lock(&pgd_lock); 143 list_for_each_entry(page, &pgd_list, lru) { 144 pgd_t *pgd; 145 spinlock_t *pgt_lock; 146 147 pgd = (pgd_t *)page_address(page) + pgd_index(addr); 148 /* the pgt_lock only for Xen */ 149 pgt_lock = &pgd_page_get_mm(page)->page_table_lock; 150 spin_lock(pgt_lock); 151 152 if (!pgd_none(*pgd_ref) && !pgd_none(*pgd)) 153 BUG_ON(pgd_page_vaddr(*pgd) != pgd_page_vaddr(*pgd_ref)); 154 155 if (pgd_none(*pgd)) 156 set_pgd(pgd, *pgd_ref); 157 158 spin_unlock(pgt_lock); 159 } 160 spin_unlock(&pgd_lock); 161 } 162 } 163 164 static void sync_global_pgds_l4(unsigned long start, unsigned long end) 165 { 166 unsigned long addr; 167 168 for (addr = start; addr <= end; addr = ALIGN(addr + 1, PGDIR_SIZE)) { 169 pgd_t *pgd_ref = pgd_offset_k(addr); 170 const p4d_t *p4d_ref; 171 struct page *page; 172 173 /* 174 * With folded p4d, pgd_none() is always false, we need to 175 * handle synchonization on p4d level. 176 */ 177 MAYBE_BUILD_BUG_ON(pgd_none(*pgd_ref)); 178 p4d_ref = p4d_offset(pgd_ref, addr); 179 180 if (p4d_none(*p4d_ref)) 181 continue; 182 183 spin_lock(&pgd_lock); 184 list_for_each_entry(page, &pgd_list, lru) { 185 pgd_t *pgd; 186 p4d_t *p4d; 187 spinlock_t *pgt_lock; 188 189 pgd = (pgd_t *)page_address(page) + pgd_index(addr); 190 p4d = p4d_offset(pgd, addr); 191 /* the pgt_lock only for Xen */ 192 pgt_lock = &pgd_page_get_mm(page)->page_table_lock; 193 spin_lock(pgt_lock); 194 195 if (!p4d_none(*p4d_ref) && !p4d_none(*p4d)) 196 BUG_ON(p4d_page_vaddr(*p4d) 197 != p4d_page_vaddr(*p4d_ref)); 198 199 if (p4d_none(*p4d)) 200 set_p4d(p4d, *p4d_ref); 201 202 spin_unlock(pgt_lock); 203 } 204 spin_unlock(&pgd_lock); 205 } 206 } 207 208 /* 209 * When memory was added make sure all the processes MM have 210 * suitable PGD entries in the local PGD level page. 211 */ 212 void sync_global_pgds(unsigned long start, unsigned long end) 213 { 214 if (pgtable_l5_enabled()) 215 sync_global_pgds_l5(start, end); 216 else 217 sync_global_pgds_l4(start, end); 218 } 219 220 /* 221 * NOTE: This function is marked __ref because it calls __init function 222 * (alloc_bootmem_pages). It's safe to do it ONLY when after_bootmem == 0. 223 */ 224 static __ref void *spp_getpage(void) 225 { 226 void *ptr; 227 228 if (after_bootmem) 229 ptr = (void *) get_zeroed_page(GFP_ATOMIC); 230 else 231 ptr = memblock_alloc(PAGE_SIZE, PAGE_SIZE); 232 233 if (!ptr || ((unsigned long)ptr & ~PAGE_MASK)) { 234 panic("set_pte_phys: cannot allocate page data %s\n", 235 after_bootmem ? "after bootmem" : ""); 236 } 237 238 pr_debug("spp_getpage %p\n", ptr); 239 240 return ptr; 241 } 242 243 static p4d_t *fill_p4d(pgd_t *pgd, unsigned long vaddr) 244 { 245 if (pgd_none(*pgd)) { 246 p4d_t *p4d = (p4d_t *)spp_getpage(); 247 pgd_populate(&init_mm, pgd, p4d); 248 if (p4d != p4d_offset(pgd, 0)) 249 printk(KERN_ERR "PAGETABLE BUG #00! %p <-> %p\n", 250 p4d, p4d_offset(pgd, 0)); 251 } 252 return p4d_offset(pgd, vaddr); 253 } 254 255 static pud_t *fill_pud(p4d_t *p4d, unsigned long vaddr) 256 { 257 if (p4d_none(*p4d)) { 258 pud_t *pud = (pud_t *)spp_getpage(); 259 p4d_populate(&init_mm, p4d, pud); 260 if (pud != pud_offset(p4d, 0)) 261 printk(KERN_ERR "PAGETABLE BUG #01! %p <-> %p\n", 262 pud, pud_offset(p4d, 0)); 263 } 264 return pud_offset(p4d, vaddr); 265 } 266 267 static pmd_t *fill_pmd(pud_t *pud, unsigned long vaddr) 268 { 269 if (pud_none(*pud)) { 270 pmd_t *pmd = (pmd_t *) spp_getpage(); 271 pud_populate(&init_mm, pud, pmd); 272 if (pmd != pmd_offset(pud, 0)) 273 printk(KERN_ERR "PAGETABLE BUG #02! %p <-> %p\n", 274 pmd, pmd_offset(pud, 0)); 275 } 276 return pmd_offset(pud, vaddr); 277 } 278 279 static pte_t *fill_pte(pmd_t *pmd, unsigned long vaddr) 280 { 281 if (pmd_none(*pmd)) { 282 pte_t *pte = (pte_t *) spp_getpage(); 283 pmd_populate_kernel(&init_mm, pmd, pte); 284 if (pte != pte_offset_kernel(pmd, 0)) 285 printk(KERN_ERR "PAGETABLE BUG #03!\n"); 286 } 287 return pte_offset_kernel(pmd, vaddr); 288 } 289 290 static void __set_pte_vaddr(pud_t *pud, unsigned long vaddr, pte_t new_pte) 291 { 292 pmd_t *pmd = fill_pmd(pud, vaddr); 293 pte_t *pte = fill_pte(pmd, vaddr); 294 295 set_pte(pte, new_pte); 296 297 /* 298 * It's enough to flush this one mapping. 299 * (PGE mappings get flushed as well) 300 */ 301 __flush_tlb_one_kernel(vaddr); 302 } 303 304 void set_pte_vaddr_p4d(p4d_t *p4d_page, unsigned long vaddr, pte_t new_pte) 305 { 306 p4d_t *p4d = p4d_page + p4d_index(vaddr); 307 pud_t *pud = fill_pud(p4d, vaddr); 308 309 __set_pte_vaddr(pud, vaddr, new_pte); 310 } 311 312 void set_pte_vaddr_pud(pud_t *pud_page, unsigned long vaddr, pte_t new_pte) 313 { 314 pud_t *pud = pud_page + pud_index(vaddr); 315 316 __set_pte_vaddr(pud, vaddr, new_pte); 317 } 318 319 void set_pte_vaddr(unsigned long vaddr, pte_t pteval) 320 { 321 pgd_t *pgd; 322 p4d_t *p4d_page; 323 324 pr_debug("set_pte_vaddr %lx to %lx\n", vaddr, native_pte_val(pteval)); 325 326 pgd = pgd_offset_k(vaddr); 327 if (pgd_none(*pgd)) { 328 printk(KERN_ERR 329 "PGD FIXMAP MISSING, it should be setup in head.S!\n"); 330 return; 331 } 332 333 p4d_page = p4d_offset(pgd, 0); 334 set_pte_vaddr_p4d(p4d_page, vaddr, pteval); 335 } 336 337 pmd_t * __init populate_extra_pmd(unsigned long vaddr) 338 { 339 pgd_t *pgd; 340 p4d_t *p4d; 341 pud_t *pud; 342 343 pgd = pgd_offset_k(vaddr); 344 p4d = fill_p4d(pgd, vaddr); 345 pud = fill_pud(p4d, vaddr); 346 return fill_pmd(pud, vaddr); 347 } 348 349 pte_t * __init populate_extra_pte(unsigned long vaddr) 350 { 351 pmd_t *pmd; 352 353 pmd = populate_extra_pmd(vaddr); 354 return fill_pte(pmd, vaddr); 355 } 356 357 /* 358 * Create large page table mappings for a range of physical addresses. 359 */ 360 static void __init __init_extra_mapping(unsigned long phys, unsigned long size, 361 enum page_cache_mode cache) 362 { 363 pgd_t *pgd; 364 p4d_t *p4d; 365 pud_t *pud; 366 pmd_t *pmd; 367 pgprot_t prot; 368 369 pgprot_val(prot) = pgprot_val(PAGE_KERNEL_LARGE) | 370 pgprot_val(pgprot_4k_2_large(cachemode2pgprot(cache))); 371 BUG_ON((phys & ~PMD_MASK) || (size & ~PMD_MASK)); 372 for (; size; phys += PMD_SIZE, size -= PMD_SIZE) { 373 pgd = pgd_offset_k((unsigned long)__va(phys)); 374 if (pgd_none(*pgd)) { 375 p4d = (p4d_t *) spp_getpage(); 376 set_pgd(pgd, __pgd(__pa(p4d) | _KERNPG_TABLE | 377 _PAGE_USER)); 378 } 379 p4d = p4d_offset(pgd, (unsigned long)__va(phys)); 380 if (p4d_none(*p4d)) { 381 pud = (pud_t *) spp_getpage(); 382 set_p4d(p4d, __p4d(__pa(pud) | _KERNPG_TABLE | 383 _PAGE_USER)); 384 } 385 pud = pud_offset(p4d, (unsigned long)__va(phys)); 386 if (pud_none(*pud)) { 387 pmd = (pmd_t *) spp_getpage(); 388 set_pud(pud, __pud(__pa(pmd) | _KERNPG_TABLE | 389 _PAGE_USER)); 390 } 391 pmd = pmd_offset(pud, phys); 392 BUG_ON(!pmd_none(*pmd)); 393 set_pmd(pmd, __pmd(phys | pgprot_val(prot))); 394 } 395 } 396 397 void __init init_extra_mapping_wb(unsigned long phys, unsigned long size) 398 { 399 __init_extra_mapping(phys, size, _PAGE_CACHE_MODE_WB); 400 } 401 402 void __init init_extra_mapping_uc(unsigned long phys, unsigned long size) 403 { 404 __init_extra_mapping(phys, size, _PAGE_CACHE_MODE_UC); 405 } 406 407 /* 408 * The head.S code sets up the kernel high mapping: 409 * 410 * from __START_KERNEL_map to __START_KERNEL_map + size (== _end-_text) 411 * 412 * phys_base holds the negative offset to the kernel, which is added 413 * to the compile time generated pmds. This results in invalid pmds up 414 * to the point where we hit the physaddr 0 mapping. 415 * 416 * We limit the mappings to the region from _text to _brk_end. _brk_end 417 * is rounded up to the 2MB boundary. This catches the invalid pmds as 418 * well, as they are located before _text: 419 */ 420 void __init cleanup_highmap(void) 421 { 422 unsigned long vaddr = __START_KERNEL_map; 423 unsigned long vaddr_end = __START_KERNEL_map + KERNEL_IMAGE_SIZE; 424 unsigned long end = roundup((unsigned long)_brk_end, PMD_SIZE) - 1; 425 pmd_t *pmd = level2_kernel_pgt; 426 427 /* 428 * Native path, max_pfn_mapped is not set yet. 429 * Xen has valid max_pfn_mapped set in 430 * arch/x86/xen/mmu.c:xen_setup_kernel_pagetable(). 431 */ 432 if (max_pfn_mapped) 433 vaddr_end = __START_KERNEL_map + (max_pfn_mapped << PAGE_SHIFT); 434 435 for (; vaddr + PMD_SIZE - 1 < vaddr_end; pmd++, vaddr += PMD_SIZE) { 436 if (pmd_none(*pmd)) 437 continue; 438 if (vaddr < (unsigned long) _text || vaddr > end) 439 set_pmd(pmd, __pmd(0)); 440 } 441 } 442 443 /* 444 * Create PTE level page table mapping for physical addresses. 445 * It returns the last physical address mapped. 446 */ 447 static unsigned long __meminit 448 phys_pte_init(pte_t *pte_page, unsigned long paddr, unsigned long paddr_end, 449 pgprot_t prot, bool init) 450 { 451 unsigned long pages = 0, paddr_next; 452 unsigned long paddr_last = paddr_end; 453 pte_t *pte; 454 int i; 455 456 pte = pte_page + pte_index(paddr); 457 i = pte_index(paddr); 458 459 for (; i < PTRS_PER_PTE; i++, paddr = paddr_next, pte++) { 460 paddr_next = (paddr & PAGE_MASK) + PAGE_SIZE; 461 if (paddr >= paddr_end) { 462 if (!after_bootmem && 463 !e820__mapped_any(paddr & PAGE_MASK, paddr_next, 464 E820_TYPE_RAM) && 465 !e820__mapped_any(paddr & PAGE_MASK, paddr_next, 466 E820_TYPE_RESERVED_KERN)) 467 set_pte_init(pte, __pte(0), init); 468 continue; 469 } 470 471 /* 472 * We will re-use the existing mapping. 473 * Xen for example has some special requirements, like mapping 474 * pagetable pages as RO. So assume someone who pre-setup 475 * these mappings are more intelligent. 476 */ 477 if (!pte_none(*pte)) { 478 if (!after_bootmem) 479 pages++; 480 continue; 481 } 482 483 if (0) 484 pr_info(" pte=%p addr=%lx pte=%016lx\n", pte, paddr, 485 pfn_pte(paddr >> PAGE_SHIFT, PAGE_KERNEL).pte); 486 pages++; 487 set_pte_init(pte, pfn_pte(paddr >> PAGE_SHIFT, prot), init); 488 paddr_last = (paddr & PAGE_MASK) + PAGE_SIZE; 489 } 490 491 update_page_count(PG_LEVEL_4K, pages); 492 493 return paddr_last; 494 } 495 496 /* 497 * Create PMD level page table mapping for physical addresses. The virtual 498 * and physical address have to be aligned at this level. 499 * It returns the last physical address mapped. 500 */ 501 static unsigned long __meminit 502 phys_pmd_init(pmd_t *pmd_page, unsigned long paddr, unsigned long paddr_end, 503 unsigned long page_size_mask, pgprot_t prot, bool init) 504 { 505 unsigned long pages = 0, paddr_next; 506 unsigned long paddr_last = paddr_end; 507 508 int i = pmd_index(paddr); 509 510 for (; i < PTRS_PER_PMD; i++, paddr = paddr_next) { 511 pmd_t *pmd = pmd_page + pmd_index(paddr); 512 pte_t *pte; 513 pgprot_t new_prot = prot; 514 515 paddr_next = (paddr & PMD_MASK) + PMD_SIZE; 516 if (paddr >= paddr_end) { 517 if (!after_bootmem && 518 !e820__mapped_any(paddr & PMD_MASK, paddr_next, 519 E820_TYPE_RAM) && 520 !e820__mapped_any(paddr & PMD_MASK, paddr_next, 521 E820_TYPE_RESERVED_KERN)) 522 set_pmd_init(pmd, __pmd(0), init); 523 continue; 524 } 525 526 if (!pmd_none(*pmd)) { 527 if (!pmd_large(*pmd)) { 528 spin_lock(&init_mm.page_table_lock); 529 pte = (pte_t *)pmd_page_vaddr(*pmd); 530 paddr_last = phys_pte_init(pte, paddr, 531 paddr_end, prot, 532 init); 533 spin_unlock(&init_mm.page_table_lock); 534 continue; 535 } 536 /* 537 * If we are ok with PG_LEVEL_2M mapping, then we will 538 * use the existing mapping, 539 * 540 * Otherwise, we will split the large page mapping but 541 * use the same existing protection bits except for 542 * large page, so that we don't violate Intel's TLB 543 * Application note (317080) which says, while changing 544 * the page sizes, new and old translations should 545 * not differ with respect to page frame and 546 * attributes. 547 */ 548 if (page_size_mask & (1 << PG_LEVEL_2M)) { 549 if (!after_bootmem) 550 pages++; 551 paddr_last = paddr_next; 552 continue; 553 } 554 new_prot = pte_pgprot(pte_clrhuge(*(pte_t *)pmd)); 555 } 556 557 if (page_size_mask & (1<<PG_LEVEL_2M)) { 558 pages++; 559 spin_lock(&init_mm.page_table_lock); 560 set_pte_init((pte_t *)pmd, 561 pfn_pte((paddr & PMD_MASK) >> PAGE_SHIFT, 562 __pgprot(pgprot_val(prot) | _PAGE_PSE)), 563 init); 564 spin_unlock(&init_mm.page_table_lock); 565 paddr_last = paddr_next; 566 continue; 567 } 568 569 pte = alloc_low_page(); 570 paddr_last = phys_pte_init(pte, paddr, paddr_end, new_prot, init); 571 572 spin_lock(&init_mm.page_table_lock); 573 pmd_populate_kernel_init(&init_mm, pmd, pte, init); 574 spin_unlock(&init_mm.page_table_lock); 575 } 576 update_page_count(PG_LEVEL_2M, pages); 577 return paddr_last; 578 } 579 580 /* 581 * Create PUD level page table mapping for physical addresses. The virtual 582 * and physical address do not have to be aligned at this level. KASLR can 583 * randomize virtual addresses up to this level. 584 * It returns the last physical address mapped. 585 */ 586 static unsigned long __meminit 587 phys_pud_init(pud_t *pud_page, unsigned long paddr, unsigned long paddr_end, 588 unsigned long page_size_mask, bool init) 589 { 590 unsigned long pages = 0, paddr_next; 591 unsigned long paddr_last = paddr_end; 592 unsigned long vaddr = (unsigned long)__va(paddr); 593 int i = pud_index(vaddr); 594 595 for (; i < PTRS_PER_PUD; i++, paddr = paddr_next) { 596 pud_t *pud; 597 pmd_t *pmd; 598 pgprot_t prot = PAGE_KERNEL; 599 600 vaddr = (unsigned long)__va(paddr); 601 pud = pud_page + pud_index(vaddr); 602 paddr_next = (paddr & PUD_MASK) + PUD_SIZE; 603 604 if (paddr >= paddr_end) { 605 if (!after_bootmem && 606 !e820__mapped_any(paddr & PUD_MASK, paddr_next, 607 E820_TYPE_RAM) && 608 !e820__mapped_any(paddr & PUD_MASK, paddr_next, 609 E820_TYPE_RESERVED_KERN)) 610 set_pud_init(pud, __pud(0), init); 611 continue; 612 } 613 614 if (!pud_none(*pud)) { 615 if (!pud_large(*pud)) { 616 pmd = pmd_offset(pud, 0); 617 paddr_last = phys_pmd_init(pmd, paddr, 618 paddr_end, 619 page_size_mask, 620 prot, init); 621 continue; 622 } 623 /* 624 * If we are ok with PG_LEVEL_1G mapping, then we will 625 * use the existing mapping. 626 * 627 * Otherwise, we will split the gbpage mapping but use 628 * the same existing protection bits except for large 629 * page, so that we don't violate Intel's TLB 630 * Application note (317080) which says, while changing 631 * the page sizes, new and old translations should 632 * not differ with respect to page frame and 633 * attributes. 634 */ 635 if (page_size_mask & (1 << PG_LEVEL_1G)) { 636 if (!after_bootmem) 637 pages++; 638 paddr_last = paddr_next; 639 continue; 640 } 641 prot = pte_pgprot(pte_clrhuge(*(pte_t *)pud)); 642 } 643 644 if (page_size_mask & (1<<PG_LEVEL_1G)) { 645 pages++; 646 spin_lock(&init_mm.page_table_lock); 647 set_pte_init((pte_t *)pud, 648 pfn_pte((paddr & PUD_MASK) >> PAGE_SHIFT, 649 PAGE_KERNEL_LARGE), 650 init); 651 spin_unlock(&init_mm.page_table_lock); 652 paddr_last = paddr_next; 653 continue; 654 } 655 656 pmd = alloc_low_page(); 657 paddr_last = phys_pmd_init(pmd, paddr, paddr_end, 658 page_size_mask, prot, init); 659 660 spin_lock(&init_mm.page_table_lock); 661 pud_populate_init(&init_mm, pud, pmd, init); 662 spin_unlock(&init_mm.page_table_lock); 663 } 664 665 update_page_count(PG_LEVEL_1G, pages); 666 667 return paddr_last; 668 } 669 670 static unsigned long __meminit 671 phys_p4d_init(p4d_t *p4d_page, unsigned long paddr, unsigned long paddr_end, 672 unsigned long page_size_mask, bool init) 673 { 674 unsigned long paddr_next, paddr_last = paddr_end; 675 unsigned long vaddr = (unsigned long)__va(paddr); 676 int i = p4d_index(vaddr); 677 678 if (!pgtable_l5_enabled()) 679 return phys_pud_init((pud_t *) p4d_page, paddr, paddr_end, 680 page_size_mask, init); 681 682 for (; i < PTRS_PER_P4D; i++, paddr = paddr_next) { 683 p4d_t *p4d; 684 pud_t *pud; 685 686 vaddr = (unsigned long)__va(paddr); 687 p4d = p4d_page + p4d_index(vaddr); 688 paddr_next = (paddr & P4D_MASK) + P4D_SIZE; 689 690 if (paddr >= paddr_end) { 691 if (!after_bootmem && 692 !e820__mapped_any(paddr & P4D_MASK, paddr_next, 693 E820_TYPE_RAM) && 694 !e820__mapped_any(paddr & P4D_MASK, paddr_next, 695 E820_TYPE_RESERVED_KERN)) 696 set_p4d_init(p4d, __p4d(0), init); 697 continue; 698 } 699 700 if (!p4d_none(*p4d)) { 701 pud = pud_offset(p4d, 0); 702 paddr_last = phys_pud_init(pud, paddr, paddr_end, 703 page_size_mask, init); 704 continue; 705 } 706 707 pud = alloc_low_page(); 708 paddr_last = phys_pud_init(pud, paddr, paddr_end, 709 page_size_mask, init); 710 711 spin_lock(&init_mm.page_table_lock); 712 p4d_populate_init(&init_mm, p4d, pud, init); 713 spin_unlock(&init_mm.page_table_lock); 714 } 715 716 return paddr_last; 717 } 718 719 static unsigned long __meminit 720 __kernel_physical_mapping_init(unsigned long paddr_start, 721 unsigned long paddr_end, 722 unsigned long page_size_mask, 723 bool init) 724 { 725 bool pgd_changed = false; 726 unsigned long vaddr, vaddr_start, vaddr_end, vaddr_next, paddr_last; 727 728 paddr_last = paddr_end; 729 vaddr = (unsigned long)__va(paddr_start); 730 vaddr_end = (unsigned long)__va(paddr_end); 731 vaddr_start = vaddr; 732 733 for (; vaddr < vaddr_end; vaddr = vaddr_next) { 734 pgd_t *pgd = pgd_offset_k(vaddr); 735 p4d_t *p4d; 736 737 vaddr_next = (vaddr & PGDIR_MASK) + PGDIR_SIZE; 738 739 if (pgd_val(*pgd)) { 740 p4d = (p4d_t *)pgd_page_vaddr(*pgd); 741 paddr_last = phys_p4d_init(p4d, __pa(vaddr), 742 __pa(vaddr_end), 743 page_size_mask, 744 init); 745 continue; 746 } 747 748 p4d = alloc_low_page(); 749 paddr_last = phys_p4d_init(p4d, __pa(vaddr), __pa(vaddr_end), 750 page_size_mask, init); 751 752 spin_lock(&init_mm.page_table_lock); 753 if (pgtable_l5_enabled()) 754 pgd_populate_init(&init_mm, pgd, p4d, init); 755 else 756 p4d_populate_init(&init_mm, p4d_offset(pgd, vaddr), 757 (pud_t *) p4d, init); 758 759 spin_unlock(&init_mm.page_table_lock); 760 pgd_changed = true; 761 } 762 763 if (pgd_changed) 764 sync_global_pgds(vaddr_start, vaddr_end - 1); 765 766 return paddr_last; 767 } 768 769 770 /* 771 * Create page table mapping for the physical memory for specific physical 772 * addresses. Note that it can only be used to populate non-present entries. 773 * The virtual and physical addresses have to be aligned on PMD level 774 * down. It returns the last physical address mapped. 775 */ 776 unsigned long __meminit 777 kernel_physical_mapping_init(unsigned long paddr_start, 778 unsigned long paddr_end, 779 unsigned long page_size_mask) 780 { 781 return __kernel_physical_mapping_init(paddr_start, paddr_end, 782 page_size_mask, true); 783 } 784 785 /* 786 * This function is similar to kernel_physical_mapping_init() above with the 787 * exception that it uses set_{pud,pmd}() instead of the set_{pud,pte}_safe() 788 * when updating the mapping. The caller is responsible to flush the TLBs after 789 * the function returns. 790 */ 791 unsigned long __meminit 792 kernel_physical_mapping_change(unsigned long paddr_start, 793 unsigned long paddr_end, 794 unsigned long page_size_mask) 795 { 796 return __kernel_physical_mapping_init(paddr_start, paddr_end, 797 page_size_mask, false); 798 } 799 800 #ifndef CONFIG_NUMA 801 void __init initmem_init(void) 802 { 803 memblock_set_node(0, PHYS_ADDR_MAX, &memblock.memory, 0); 804 } 805 #endif 806 807 void __init paging_init(void) 808 { 809 sparse_memory_present_with_active_regions(MAX_NUMNODES); 810 sparse_init(); 811 812 /* 813 * clear the default setting with node 0 814 * note: don't use nodes_clear here, that is really clearing when 815 * numa support is not compiled in, and later node_set_state 816 * will not set it back. 817 */ 818 node_clear_state(0, N_MEMORY); 819 if (N_MEMORY != N_NORMAL_MEMORY) 820 node_clear_state(0, N_NORMAL_MEMORY); 821 822 zone_sizes_init(); 823 } 824 825 /* 826 * Memory hotplug specific functions 827 */ 828 #ifdef CONFIG_MEMORY_HOTPLUG 829 /* 830 * After memory hotplug the variables max_pfn, max_low_pfn and high_memory need 831 * updating. 832 */ 833 static void update_end_of_memory_vars(u64 start, u64 size) 834 { 835 unsigned long end_pfn = PFN_UP(start + size); 836 837 if (end_pfn > max_pfn) { 838 max_pfn = end_pfn; 839 max_low_pfn = end_pfn; 840 high_memory = (void *)__va(max_pfn * PAGE_SIZE - 1) + 1; 841 } 842 } 843 844 int add_pages(int nid, unsigned long start_pfn, unsigned long nr_pages, 845 struct mhp_restrictions *restrictions) 846 { 847 int ret; 848 849 ret = __add_pages(nid, start_pfn, nr_pages, restrictions); 850 WARN_ON_ONCE(ret); 851 852 /* update max_pfn, max_low_pfn and high_memory */ 853 update_end_of_memory_vars(start_pfn << PAGE_SHIFT, 854 nr_pages << PAGE_SHIFT); 855 856 return ret; 857 } 858 859 int arch_add_memory(int nid, u64 start, u64 size, 860 struct mhp_restrictions *restrictions) 861 { 862 unsigned long start_pfn = start >> PAGE_SHIFT; 863 unsigned long nr_pages = size >> PAGE_SHIFT; 864 865 init_memory_mapping(start, start + size); 866 867 return add_pages(nid, start_pfn, nr_pages, restrictions); 868 } 869 870 #define PAGE_INUSE 0xFD 871 872 static void __meminit free_pagetable(struct page *page, int order) 873 { 874 unsigned long magic; 875 unsigned int nr_pages = 1 << order; 876 877 /* bootmem page has reserved flag */ 878 if (PageReserved(page)) { 879 __ClearPageReserved(page); 880 881 magic = (unsigned long)page->freelist; 882 if (magic == SECTION_INFO || magic == MIX_SECTION_INFO) { 883 while (nr_pages--) 884 put_page_bootmem(page++); 885 } else 886 while (nr_pages--) 887 free_reserved_page(page++); 888 } else 889 free_pages((unsigned long)page_address(page), order); 890 } 891 892 static void __meminit free_hugepage_table(struct page *page, 893 struct vmem_altmap *altmap) 894 { 895 if (altmap) 896 vmem_altmap_free(altmap, PMD_SIZE / PAGE_SIZE); 897 else 898 free_pagetable(page, get_order(PMD_SIZE)); 899 } 900 901 static void __meminit free_pte_table(pte_t *pte_start, pmd_t *pmd) 902 { 903 pte_t *pte; 904 int i; 905 906 for (i = 0; i < PTRS_PER_PTE; i++) { 907 pte = pte_start + i; 908 if (!pte_none(*pte)) 909 return; 910 } 911 912 /* free a pte talbe */ 913 free_pagetable(pmd_page(*pmd), 0); 914 spin_lock(&init_mm.page_table_lock); 915 pmd_clear(pmd); 916 spin_unlock(&init_mm.page_table_lock); 917 } 918 919 static void __meminit free_pmd_table(pmd_t *pmd_start, pud_t *pud) 920 { 921 pmd_t *pmd; 922 int i; 923 924 for (i = 0; i < PTRS_PER_PMD; i++) { 925 pmd = pmd_start + i; 926 if (!pmd_none(*pmd)) 927 return; 928 } 929 930 /* free a pmd talbe */ 931 free_pagetable(pud_page(*pud), 0); 932 spin_lock(&init_mm.page_table_lock); 933 pud_clear(pud); 934 spin_unlock(&init_mm.page_table_lock); 935 } 936 937 static void __meminit free_pud_table(pud_t *pud_start, p4d_t *p4d) 938 { 939 pud_t *pud; 940 int i; 941 942 for (i = 0; i < PTRS_PER_PUD; i++) { 943 pud = pud_start + i; 944 if (!pud_none(*pud)) 945 return; 946 } 947 948 /* free a pud talbe */ 949 free_pagetable(p4d_page(*p4d), 0); 950 spin_lock(&init_mm.page_table_lock); 951 p4d_clear(p4d); 952 spin_unlock(&init_mm.page_table_lock); 953 } 954 955 static void __meminit 956 remove_pte_table(pte_t *pte_start, unsigned long addr, unsigned long end, 957 bool direct) 958 { 959 unsigned long next, pages = 0; 960 pte_t *pte; 961 void *page_addr; 962 phys_addr_t phys_addr; 963 964 pte = pte_start + pte_index(addr); 965 for (; addr < end; addr = next, pte++) { 966 next = (addr + PAGE_SIZE) & PAGE_MASK; 967 if (next > end) 968 next = end; 969 970 if (!pte_present(*pte)) 971 continue; 972 973 /* 974 * We mapped [0,1G) memory as identity mapping when 975 * initializing, in arch/x86/kernel/head_64.S. These 976 * pagetables cannot be removed. 977 */ 978 phys_addr = pte_val(*pte) + (addr & PAGE_MASK); 979 if (phys_addr < (phys_addr_t)0x40000000) 980 return; 981 982 if (PAGE_ALIGNED(addr) && PAGE_ALIGNED(next)) { 983 /* 984 * Do not free direct mapping pages since they were 985 * freed when offlining, or simplely not in use. 986 */ 987 if (!direct) 988 free_pagetable(pte_page(*pte), 0); 989 990 spin_lock(&init_mm.page_table_lock); 991 pte_clear(&init_mm, addr, pte); 992 spin_unlock(&init_mm.page_table_lock); 993 994 /* For non-direct mapping, pages means nothing. */ 995 pages++; 996 } else { 997 /* 998 * If we are here, we are freeing vmemmap pages since 999 * direct mapped memory ranges to be freed are aligned. 1000 * 1001 * If we are not removing the whole page, it means 1002 * other page structs in this page are being used and 1003 * we canot remove them. So fill the unused page_structs 1004 * with 0xFD, and remove the page when it is wholly 1005 * filled with 0xFD. 1006 */ 1007 memset((void *)addr, PAGE_INUSE, next - addr); 1008 1009 page_addr = page_address(pte_page(*pte)); 1010 if (!memchr_inv(page_addr, PAGE_INUSE, PAGE_SIZE)) { 1011 free_pagetable(pte_page(*pte), 0); 1012 1013 spin_lock(&init_mm.page_table_lock); 1014 pte_clear(&init_mm, addr, pte); 1015 spin_unlock(&init_mm.page_table_lock); 1016 } 1017 } 1018 } 1019 1020 /* Call free_pte_table() in remove_pmd_table(). */ 1021 flush_tlb_all(); 1022 if (direct) 1023 update_page_count(PG_LEVEL_4K, -pages); 1024 } 1025 1026 static void __meminit 1027 remove_pmd_table(pmd_t *pmd_start, unsigned long addr, unsigned long end, 1028 bool direct, struct vmem_altmap *altmap) 1029 { 1030 unsigned long next, pages = 0; 1031 pte_t *pte_base; 1032 pmd_t *pmd; 1033 void *page_addr; 1034 1035 pmd = pmd_start + pmd_index(addr); 1036 for (; addr < end; addr = next, pmd++) { 1037 next = pmd_addr_end(addr, end); 1038 1039 if (!pmd_present(*pmd)) 1040 continue; 1041 1042 if (pmd_large(*pmd)) { 1043 if (IS_ALIGNED(addr, PMD_SIZE) && 1044 IS_ALIGNED(next, PMD_SIZE)) { 1045 if (!direct) 1046 free_hugepage_table(pmd_page(*pmd), 1047 altmap); 1048 1049 spin_lock(&init_mm.page_table_lock); 1050 pmd_clear(pmd); 1051 spin_unlock(&init_mm.page_table_lock); 1052 pages++; 1053 } else { 1054 /* If here, we are freeing vmemmap pages. */ 1055 memset((void *)addr, PAGE_INUSE, next - addr); 1056 1057 page_addr = page_address(pmd_page(*pmd)); 1058 if (!memchr_inv(page_addr, PAGE_INUSE, 1059 PMD_SIZE)) { 1060 free_hugepage_table(pmd_page(*pmd), 1061 altmap); 1062 1063 spin_lock(&init_mm.page_table_lock); 1064 pmd_clear(pmd); 1065 spin_unlock(&init_mm.page_table_lock); 1066 } 1067 } 1068 1069 continue; 1070 } 1071 1072 pte_base = (pte_t *)pmd_page_vaddr(*pmd); 1073 remove_pte_table(pte_base, addr, next, direct); 1074 free_pte_table(pte_base, pmd); 1075 } 1076 1077 /* Call free_pmd_table() in remove_pud_table(). */ 1078 if (direct) 1079 update_page_count(PG_LEVEL_2M, -pages); 1080 } 1081 1082 static void __meminit 1083 remove_pud_table(pud_t *pud_start, unsigned long addr, unsigned long end, 1084 struct vmem_altmap *altmap, bool direct) 1085 { 1086 unsigned long next, pages = 0; 1087 pmd_t *pmd_base; 1088 pud_t *pud; 1089 void *page_addr; 1090 1091 pud = pud_start + pud_index(addr); 1092 for (; addr < end; addr = next, pud++) { 1093 next = pud_addr_end(addr, end); 1094 1095 if (!pud_present(*pud)) 1096 continue; 1097 1098 if (pud_large(*pud)) { 1099 if (IS_ALIGNED(addr, PUD_SIZE) && 1100 IS_ALIGNED(next, PUD_SIZE)) { 1101 if (!direct) 1102 free_pagetable(pud_page(*pud), 1103 get_order(PUD_SIZE)); 1104 1105 spin_lock(&init_mm.page_table_lock); 1106 pud_clear(pud); 1107 spin_unlock(&init_mm.page_table_lock); 1108 pages++; 1109 } else { 1110 /* If here, we are freeing vmemmap pages. */ 1111 memset((void *)addr, PAGE_INUSE, next - addr); 1112 1113 page_addr = page_address(pud_page(*pud)); 1114 if (!memchr_inv(page_addr, PAGE_INUSE, 1115 PUD_SIZE)) { 1116 free_pagetable(pud_page(*pud), 1117 get_order(PUD_SIZE)); 1118 1119 spin_lock(&init_mm.page_table_lock); 1120 pud_clear(pud); 1121 spin_unlock(&init_mm.page_table_lock); 1122 } 1123 } 1124 1125 continue; 1126 } 1127 1128 pmd_base = pmd_offset(pud, 0); 1129 remove_pmd_table(pmd_base, addr, next, direct, altmap); 1130 free_pmd_table(pmd_base, pud); 1131 } 1132 1133 if (direct) 1134 update_page_count(PG_LEVEL_1G, -pages); 1135 } 1136 1137 static void __meminit 1138 remove_p4d_table(p4d_t *p4d_start, unsigned long addr, unsigned long end, 1139 struct vmem_altmap *altmap, bool direct) 1140 { 1141 unsigned long next, pages = 0; 1142 pud_t *pud_base; 1143 p4d_t *p4d; 1144 1145 p4d = p4d_start + p4d_index(addr); 1146 for (; addr < end; addr = next, p4d++) { 1147 next = p4d_addr_end(addr, end); 1148 1149 if (!p4d_present(*p4d)) 1150 continue; 1151 1152 BUILD_BUG_ON(p4d_large(*p4d)); 1153 1154 pud_base = pud_offset(p4d, 0); 1155 remove_pud_table(pud_base, addr, next, altmap, direct); 1156 /* 1157 * For 4-level page tables we do not want to free PUDs, but in the 1158 * 5-level case we should free them. This code will have to change 1159 * to adapt for boot-time switching between 4 and 5 level page tables. 1160 */ 1161 if (pgtable_l5_enabled()) 1162 free_pud_table(pud_base, p4d); 1163 } 1164 1165 if (direct) 1166 update_page_count(PG_LEVEL_512G, -pages); 1167 } 1168 1169 /* start and end are both virtual address. */ 1170 static void __meminit 1171 remove_pagetable(unsigned long start, unsigned long end, bool direct, 1172 struct vmem_altmap *altmap) 1173 { 1174 unsigned long next; 1175 unsigned long addr; 1176 pgd_t *pgd; 1177 p4d_t *p4d; 1178 1179 for (addr = start; addr < end; addr = next) { 1180 next = pgd_addr_end(addr, end); 1181 1182 pgd = pgd_offset_k(addr); 1183 if (!pgd_present(*pgd)) 1184 continue; 1185 1186 p4d = p4d_offset(pgd, 0); 1187 remove_p4d_table(p4d, addr, next, altmap, direct); 1188 } 1189 1190 flush_tlb_all(); 1191 } 1192 1193 void __ref vmemmap_free(unsigned long start, unsigned long end, 1194 struct vmem_altmap *altmap) 1195 { 1196 remove_pagetable(start, end, false, altmap); 1197 } 1198 1199 #ifdef CONFIG_MEMORY_HOTREMOVE 1200 static void __meminit 1201 kernel_physical_mapping_remove(unsigned long start, unsigned long end) 1202 { 1203 start = (unsigned long)__va(start); 1204 end = (unsigned long)__va(end); 1205 1206 remove_pagetable(start, end, true, NULL); 1207 } 1208 1209 void __ref arch_remove_memory(int nid, u64 start, u64 size, 1210 struct vmem_altmap *altmap) 1211 { 1212 unsigned long start_pfn = start >> PAGE_SHIFT; 1213 unsigned long nr_pages = size >> PAGE_SHIFT; 1214 struct page *page = pfn_to_page(start_pfn); 1215 struct zone *zone; 1216 1217 /* With altmap the first mapped page is offset from @start */ 1218 if (altmap) 1219 page += vmem_altmap_offset(altmap); 1220 zone = page_zone(page); 1221 __remove_pages(zone, start_pfn, nr_pages, altmap); 1222 kernel_physical_mapping_remove(start, start + size); 1223 } 1224 #endif 1225 #endif /* CONFIG_MEMORY_HOTPLUG */ 1226 1227 static struct kcore_list kcore_vsyscall; 1228 1229 static void __init register_page_bootmem_info(void) 1230 { 1231 #ifdef CONFIG_NUMA 1232 int i; 1233 1234 for_each_online_node(i) 1235 register_page_bootmem_info_node(NODE_DATA(i)); 1236 #endif 1237 } 1238 1239 void __init mem_init(void) 1240 { 1241 pci_iommu_alloc(); 1242 1243 /* clear_bss() already clear the empty_zero_page */ 1244 1245 /* this will put all memory onto the freelists */ 1246 memblock_free_all(); 1247 after_bootmem = 1; 1248 x86_init.hyper.init_after_bootmem(); 1249 1250 /* 1251 * Must be done after boot memory is put on freelist, because here we 1252 * might set fields in deferred struct pages that have not yet been 1253 * initialized, and memblock_free_all() initializes all the reserved 1254 * deferred pages for us. 1255 */ 1256 register_page_bootmem_info(); 1257 1258 /* Register memory areas for /proc/kcore */ 1259 if (get_gate_vma(&init_mm)) 1260 kclist_add(&kcore_vsyscall, (void *)VSYSCALL_ADDR, PAGE_SIZE, KCORE_USER); 1261 1262 mem_init_print_info(NULL); 1263 } 1264 1265 int kernel_set_to_readonly; 1266 1267 void set_kernel_text_rw(void) 1268 { 1269 unsigned long start = PFN_ALIGN(_text); 1270 unsigned long end = PFN_ALIGN(__stop___ex_table); 1271 1272 if (!kernel_set_to_readonly) 1273 return; 1274 1275 pr_debug("Set kernel text: %lx - %lx for read write\n", 1276 start, end); 1277 1278 /* 1279 * Make the kernel identity mapping for text RW. Kernel text 1280 * mapping will always be RO. Refer to the comment in 1281 * static_protections() in pageattr.c 1282 */ 1283 set_memory_rw(start, (end - start) >> PAGE_SHIFT); 1284 } 1285 1286 void set_kernel_text_ro(void) 1287 { 1288 unsigned long start = PFN_ALIGN(_text); 1289 unsigned long end = PFN_ALIGN(__stop___ex_table); 1290 1291 if (!kernel_set_to_readonly) 1292 return; 1293 1294 pr_debug("Set kernel text: %lx - %lx for read only\n", 1295 start, end); 1296 1297 /* 1298 * Set the kernel identity mapping for text RO. 1299 */ 1300 set_memory_ro(start, (end - start) >> PAGE_SHIFT); 1301 } 1302 1303 void mark_rodata_ro(void) 1304 { 1305 unsigned long start = PFN_ALIGN(_text); 1306 unsigned long rodata_start = PFN_ALIGN(__start_rodata); 1307 unsigned long end = (unsigned long) &__end_rodata_hpage_align; 1308 unsigned long text_end = PFN_ALIGN(&__stop___ex_table); 1309 unsigned long rodata_end = PFN_ALIGN(&__end_rodata); 1310 unsigned long all_end; 1311 1312 printk(KERN_INFO "Write protecting the kernel read-only data: %luk\n", 1313 (end - start) >> 10); 1314 set_memory_ro(start, (end - start) >> PAGE_SHIFT); 1315 1316 kernel_set_to_readonly = 1; 1317 1318 /* 1319 * The rodata/data/bss/brk section (but not the kernel text!) 1320 * should also be not-executable. 1321 * 1322 * We align all_end to PMD_SIZE because the existing mapping 1323 * is a full PMD. If we would align _brk_end to PAGE_SIZE we 1324 * split the PMD and the reminder between _brk_end and the end 1325 * of the PMD will remain mapped executable. 1326 * 1327 * Any PMD which was setup after the one which covers _brk_end 1328 * has been zapped already via cleanup_highmem(). 1329 */ 1330 all_end = roundup((unsigned long)_brk_end, PMD_SIZE); 1331 set_memory_nx(text_end, (all_end - text_end) >> PAGE_SHIFT); 1332 1333 #ifdef CONFIG_CPA_DEBUG 1334 printk(KERN_INFO "Testing CPA: undo %lx-%lx\n", start, end); 1335 set_memory_rw(start, (end-start) >> PAGE_SHIFT); 1336 1337 printk(KERN_INFO "Testing CPA: again\n"); 1338 set_memory_ro(start, (end-start) >> PAGE_SHIFT); 1339 #endif 1340 1341 free_kernel_image_pages((void *)text_end, (void *)rodata_start); 1342 free_kernel_image_pages((void *)rodata_end, (void *)_sdata); 1343 1344 debug_checkwx(); 1345 } 1346 1347 int kern_addr_valid(unsigned long addr) 1348 { 1349 unsigned long above = ((long)addr) >> __VIRTUAL_MASK_SHIFT; 1350 pgd_t *pgd; 1351 p4d_t *p4d; 1352 pud_t *pud; 1353 pmd_t *pmd; 1354 pte_t *pte; 1355 1356 if (above != 0 && above != -1UL) 1357 return 0; 1358 1359 pgd = pgd_offset_k(addr); 1360 if (pgd_none(*pgd)) 1361 return 0; 1362 1363 p4d = p4d_offset(pgd, addr); 1364 if (p4d_none(*p4d)) 1365 return 0; 1366 1367 pud = pud_offset(p4d, addr); 1368 if (pud_none(*pud)) 1369 return 0; 1370 1371 if (pud_large(*pud)) 1372 return pfn_valid(pud_pfn(*pud)); 1373 1374 pmd = pmd_offset(pud, addr); 1375 if (pmd_none(*pmd)) 1376 return 0; 1377 1378 if (pmd_large(*pmd)) 1379 return pfn_valid(pmd_pfn(*pmd)); 1380 1381 pte = pte_offset_kernel(pmd, addr); 1382 if (pte_none(*pte)) 1383 return 0; 1384 1385 return pfn_valid(pte_pfn(*pte)); 1386 } 1387 1388 /* 1389 * Block size is the minimum amount of memory which can be hotplugged or 1390 * hotremoved. It must be power of two and must be equal or larger than 1391 * MIN_MEMORY_BLOCK_SIZE. 1392 */ 1393 #define MAX_BLOCK_SIZE (2UL << 30) 1394 1395 /* Amount of ram needed to start using large blocks */ 1396 #define MEM_SIZE_FOR_LARGE_BLOCK (64UL << 30) 1397 1398 /* Adjustable memory block size */ 1399 static unsigned long set_memory_block_size; 1400 int __init set_memory_block_size_order(unsigned int order) 1401 { 1402 unsigned long size = 1UL << order; 1403 1404 if (size > MEM_SIZE_FOR_LARGE_BLOCK || size < MIN_MEMORY_BLOCK_SIZE) 1405 return -EINVAL; 1406 1407 set_memory_block_size = size; 1408 return 0; 1409 } 1410 1411 static unsigned long probe_memory_block_size(void) 1412 { 1413 unsigned long boot_mem_end = max_pfn << PAGE_SHIFT; 1414 unsigned long bz; 1415 1416 /* If memory block size has been set, then use it */ 1417 bz = set_memory_block_size; 1418 if (bz) 1419 goto done; 1420 1421 /* Use regular block if RAM is smaller than MEM_SIZE_FOR_LARGE_BLOCK */ 1422 if (boot_mem_end < MEM_SIZE_FOR_LARGE_BLOCK) { 1423 bz = MIN_MEMORY_BLOCK_SIZE; 1424 goto done; 1425 } 1426 1427 /* Find the largest allowed block size that aligns to memory end */ 1428 for (bz = MAX_BLOCK_SIZE; bz > MIN_MEMORY_BLOCK_SIZE; bz >>= 1) { 1429 if (IS_ALIGNED(boot_mem_end, bz)) 1430 break; 1431 } 1432 done: 1433 pr_info("x86/mm: Memory block size: %ldMB\n", bz >> 20); 1434 1435 return bz; 1436 } 1437 1438 static unsigned long memory_block_size_probed; 1439 unsigned long memory_block_size_bytes(void) 1440 { 1441 if (!memory_block_size_probed) 1442 memory_block_size_probed = probe_memory_block_size(); 1443 1444 return memory_block_size_probed; 1445 } 1446 1447 #ifdef CONFIG_SPARSEMEM_VMEMMAP 1448 /* 1449 * Initialise the sparsemem vmemmap using huge-pages at the PMD level. 1450 */ 1451 static long __meminitdata addr_start, addr_end; 1452 static void __meminitdata *p_start, *p_end; 1453 static int __meminitdata node_start; 1454 1455 static int __meminit vmemmap_populate_hugepages(unsigned long start, 1456 unsigned long end, int node, struct vmem_altmap *altmap) 1457 { 1458 unsigned long addr; 1459 unsigned long next; 1460 pgd_t *pgd; 1461 p4d_t *p4d; 1462 pud_t *pud; 1463 pmd_t *pmd; 1464 1465 for (addr = start; addr < end; addr = next) { 1466 next = pmd_addr_end(addr, end); 1467 1468 pgd = vmemmap_pgd_populate(addr, node); 1469 if (!pgd) 1470 return -ENOMEM; 1471 1472 p4d = vmemmap_p4d_populate(pgd, addr, node); 1473 if (!p4d) 1474 return -ENOMEM; 1475 1476 pud = vmemmap_pud_populate(p4d, addr, node); 1477 if (!pud) 1478 return -ENOMEM; 1479 1480 pmd = pmd_offset(pud, addr); 1481 if (pmd_none(*pmd)) { 1482 void *p; 1483 1484 if (altmap) 1485 p = altmap_alloc_block_buf(PMD_SIZE, altmap); 1486 else 1487 p = vmemmap_alloc_block_buf(PMD_SIZE, node); 1488 if (p) { 1489 pte_t entry; 1490 1491 entry = pfn_pte(__pa(p) >> PAGE_SHIFT, 1492 PAGE_KERNEL_LARGE); 1493 set_pmd(pmd, __pmd(pte_val(entry))); 1494 1495 /* check to see if we have contiguous blocks */ 1496 if (p_end != p || node_start != node) { 1497 if (p_start) 1498 pr_debug(" [%lx-%lx] PMD -> [%p-%p] on node %d\n", 1499 addr_start, addr_end-1, p_start, p_end-1, node_start); 1500 addr_start = addr; 1501 node_start = node; 1502 p_start = p; 1503 } 1504 1505 addr_end = addr + PMD_SIZE; 1506 p_end = p + PMD_SIZE; 1507 continue; 1508 } else if (altmap) 1509 return -ENOMEM; /* no fallback */ 1510 } else if (pmd_large(*pmd)) { 1511 vmemmap_verify((pte_t *)pmd, node, addr, next); 1512 continue; 1513 } 1514 if (vmemmap_populate_basepages(addr, next, node)) 1515 return -ENOMEM; 1516 } 1517 return 0; 1518 } 1519 1520 int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node, 1521 struct vmem_altmap *altmap) 1522 { 1523 int err; 1524 1525 if (boot_cpu_has(X86_FEATURE_PSE)) 1526 err = vmemmap_populate_hugepages(start, end, node, altmap); 1527 else if (altmap) { 1528 pr_err_once("%s: no cpu support for altmap allocations\n", 1529 __func__); 1530 err = -ENOMEM; 1531 } else 1532 err = vmemmap_populate_basepages(start, end, node); 1533 if (!err) 1534 sync_global_pgds(start, end - 1); 1535 return err; 1536 } 1537 1538 #if defined(CONFIG_MEMORY_HOTPLUG_SPARSE) && defined(CONFIG_HAVE_BOOTMEM_INFO_NODE) 1539 void register_page_bootmem_memmap(unsigned long section_nr, 1540 struct page *start_page, unsigned long nr_pages) 1541 { 1542 unsigned long addr = (unsigned long)start_page; 1543 unsigned long end = (unsigned long)(start_page + nr_pages); 1544 unsigned long next; 1545 pgd_t *pgd; 1546 p4d_t *p4d; 1547 pud_t *pud; 1548 pmd_t *pmd; 1549 unsigned int nr_pmd_pages; 1550 struct page *page; 1551 1552 for (; addr < end; addr = next) { 1553 pte_t *pte = NULL; 1554 1555 pgd = pgd_offset_k(addr); 1556 if (pgd_none(*pgd)) { 1557 next = (addr + PAGE_SIZE) & PAGE_MASK; 1558 continue; 1559 } 1560 get_page_bootmem(section_nr, pgd_page(*pgd), MIX_SECTION_INFO); 1561 1562 p4d = p4d_offset(pgd, addr); 1563 if (p4d_none(*p4d)) { 1564 next = (addr + PAGE_SIZE) & PAGE_MASK; 1565 continue; 1566 } 1567 get_page_bootmem(section_nr, p4d_page(*p4d), MIX_SECTION_INFO); 1568 1569 pud = pud_offset(p4d, addr); 1570 if (pud_none(*pud)) { 1571 next = (addr + PAGE_SIZE) & PAGE_MASK; 1572 continue; 1573 } 1574 get_page_bootmem(section_nr, pud_page(*pud), MIX_SECTION_INFO); 1575 1576 if (!boot_cpu_has(X86_FEATURE_PSE)) { 1577 next = (addr + PAGE_SIZE) & PAGE_MASK; 1578 pmd = pmd_offset(pud, addr); 1579 if (pmd_none(*pmd)) 1580 continue; 1581 get_page_bootmem(section_nr, pmd_page(*pmd), 1582 MIX_SECTION_INFO); 1583 1584 pte = pte_offset_kernel(pmd, addr); 1585 if (pte_none(*pte)) 1586 continue; 1587 get_page_bootmem(section_nr, pte_page(*pte), 1588 SECTION_INFO); 1589 } else { 1590 next = pmd_addr_end(addr, end); 1591 1592 pmd = pmd_offset(pud, addr); 1593 if (pmd_none(*pmd)) 1594 continue; 1595 1596 nr_pmd_pages = 1 << get_order(PMD_SIZE); 1597 page = pmd_page(*pmd); 1598 while (nr_pmd_pages--) 1599 get_page_bootmem(section_nr, page++, 1600 SECTION_INFO); 1601 } 1602 } 1603 } 1604 #endif 1605 1606 void __meminit vmemmap_populate_print_last(void) 1607 { 1608 if (p_start) { 1609 pr_debug(" [%lx-%lx] PMD -> [%p-%p] on node %d\n", 1610 addr_start, addr_end-1, p_start, p_end-1, node_start); 1611 p_start = NULL; 1612 p_end = NULL; 1613 node_start = 0; 1614 } 1615 } 1616 #endif 1617