1 #include <linux/gfp.h> 2 #include <linux/initrd.h> 3 #include <linux/ioport.h> 4 #include <linux/swap.h> 5 #include <linux/memblock.h> 6 #include <linux/swapfile.h> 7 #include <linux/swapops.h> 8 #include <linux/kmemleak.h> 9 #include <linux/sched/task.h> 10 11 #include <asm/set_memory.h> 12 #include <asm/e820/api.h> 13 #include <asm/init.h> 14 #include <asm/page.h> 15 #include <asm/page_types.h> 16 #include <asm/sections.h> 17 #include <asm/setup.h> 18 #include <asm/tlbflush.h> 19 #include <asm/tlb.h> 20 #include <asm/proto.h> 21 #include <asm/dma.h> /* for MAX_DMA_PFN */ 22 #include <asm/microcode.h> 23 #include <asm/kaslr.h> 24 #include <asm/hypervisor.h> 25 #include <asm/cpufeature.h> 26 #include <asm/pti.h> 27 #include <asm/text-patching.h> 28 29 /* 30 * We need to define the tracepoints somewhere, and tlb.c 31 * is only compied when SMP=y. 32 */ 33 #define CREATE_TRACE_POINTS 34 #include <trace/events/tlb.h> 35 36 #include "mm_internal.h" 37 38 /* 39 * Tables translating between page_cache_type_t and pte encoding. 40 * 41 * The default values are defined statically as minimal supported mode; 42 * WC and WT fall back to UC-. pat_init() updates these values to support 43 * more cache modes, WC and WT, when it is safe to do so. See pat_init() 44 * for the details. Note, __early_ioremap() used during early boot-time 45 * takes pgprot_t (pte encoding) and does not use these tables. 46 * 47 * Index into __cachemode2pte_tbl[] is the cachemode. 48 * 49 * Index into __pte2cachemode_tbl[] are the caching attribute bits of the pte 50 * (_PAGE_PWT, _PAGE_PCD, _PAGE_PAT) at index bit positions 0, 1, 2. 51 */ 52 uint16_t __cachemode2pte_tbl[_PAGE_CACHE_MODE_NUM] = { 53 [_PAGE_CACHE_MODE_WB ] = 0 | 0 , 54 [_PAGE_CACHE_MODE_WC ] = 0 | _PAGE_PCD, 55 [_PAGE_CACHE_MODE_UC_MINUS] = 0 | _PAGE_PCD, 56 [_PAGE_CACHE_MODE_UC ] = _PAGE_PWT | _PAGE_PCD, 57 [_PAGE_CACHE_MODE_WT ] = 0 | _PAGE_PCD, 58 [_PAGE_CACHE_MODE_WP ] = 0 | _PAGE_PCD, 59 }; 60 EXPORT_SYMBOL(__cachemode2pte_tbl); 61 62 uint8_t __pte2cachemode_tbl[8] = { 63 [__pte2cm_idx( 0 | 0 | 0 )] = _PAGE_CACHE_MODE_WB, 64 [__pte2cm_idx(_PAGE_PWT | 0 | 0 )] = _PAGE_CACHE_MODE_UC_MINUS, 65 [__pte2cm_idx( 0 | _PAGE_PCD | 0 )] = _PAGE_CACHE_MODE_UC_MINUS, 66 [__pte2cm_idx(_PAGE_PWT | _PAGE_PCD | 0 )] = _PAGE_CACHE_MODE_UC, 67 [__pte2cm_idx( 0 | 0 | _PAGE_PAT)] = _PAGE_CACHE_MODE_WB, 68 [__pte2cm_idx(_PAGE_PWT | 0 | _PAGE_PAT)] = _PAGE_CACHE_MODE_UC_MINUS, 69 [__pte2cm_idx(0 | _PAGE_PCD | _PAGE_PAT)] = _PAGE_CACHE_MODE_UC_MINUS, 70 [__pte2cm_idx(_PAGE_PWT | _PAGE_PCD | _PAGE_PAT)] = _PAGE_CACHE_MODE_UC, 71 }; 72 EXPORT_SYMBOL(__pte2cachemode_tbl); 73 74 static unsigned long __initdata pgt_buf_start; 75 static unsigned long __initdata pgt_buf_end; 76 static unsigned long __initdata pgt_buf_top; 77 78 static unsigned long min_pfn_mapped; 79 80 static bool __initdata can_use_brk_pgt = true; 81 82 /* 83 * Pages returned are already directly mapped. 84 * 85 * Changing that is likely to break Xen, see commit: 86 * 87 * 279b706 x86,xen: introduce x86_init.mapping.pagetable_reserve 88 * 89 * for detailed information. 90 */ 91 __ref void *alloc_low_pages(unsigned int num) 92 { 93 unsigned long pfn; 94 int i; 95 96 if (after_bootmem) { 97 unsigned int order; 98 99 order = get_order((unsigned long)num << PAGE_SHIFT); 100 return (void *)__get_free_pages(GFP_ATOMIC | __GFP_ZERO, order); 101 } 102 103 if ((pgt_buf_end + num) > pgt_buf_top || !can_use_brk_pgt) { 104 unsigned long ret = 0; 105 106 if (min_pfn_mapped < max_pfn_mapped) { 107 ret = memblock_find_in_range( 108 min_pfn_mapped << PAGE_SHIFT, 109 max_pfn_mapped << PAGE_SHIFT, 110 PAGE_SIZE * num , PAGE_SIZE); 111 } 112 if (ret) 113 memblock_reserve(ret, PAGE_SIZE * num); 114 else if (can_use_brk_pgt) 115 ret = __pa(extend_brk(PAGE_SIZE * num, PAGE_SIZE)); 116 117 if (!ret) 118 panic("alloc_low_pages: can not alloc memory"); 119 120 pfn = ret >> PAGE_SHIFT; 121 } else { 122 pfn = pgt_buf_end; 123 pgt_buf_end += num; 124 printk(KERN_DEBUG "BRK [%#010lx, %#010lx] PGTABLE\n", 125 pfn << PAGE_SHIFT, (pgt_buf_end << PAGE_SHIFT) - 1); 126 } 127 128 for (i = 0; i < num; i++) { 129 void *adr; 130 131 adr = __va((pfn + i) << PAGE_SHIFT); 132 clear_page(adr); 133 } 134 135 return __va(pfn << PAGE_SHIFT); 136 } 137 138 /* 139 * By default need 3 4k for initial PMD_SIZE, 3 4k for 0-ISA_END_ADDRESS. 140 * With KASLR memory randomization, depending on the machine e820 memory 141 * and the PUD alignment. We may need twice more pages when KASLR memory 142 * randomization is enabled. 143 */ 144 #ifndef CONFIG_RANDOMIZE_MEMORY 145 #define INIT_PGD_PAGE_COUNT 6 146 #else 147 #define INIT_PGD_PAGE_COUNT 12 148 #endif 149 #define INIT_PGT_BUF_SIZE (INIT_PGD_PAGE_COUNT * PAGE_SIZE) 150 RESERVE_BRK(early_pgt_alloc, INIT_PGT_BUF_SIZE); 151 void __init early_alloc_pgt_buf(void) 152 { 153 unsigned long tables = INIT_PGT_BUF_SIZE; 154 phys_addr_t base; 155 156 base = __pa(extend_brk(tables, PAGE_SIZE)); 157 158 pgt_buf_start = base >> PAGE_SHIFT; 159 pgt_buf_end = pgt_buf_start; 160 pgt_buf_top = pgt_buf_start + (tables >> PAGE_SHIFT); 161 } 162 163 int after_bootmem; 164 165 early_param_on_off("gbpages", "nogbpages", direct_gbpages, CONFIG_X86_DIRECT_GBPAGES); 166 167 struct map_range { 168 unsigned long start; 169 unsigned long end; 170 unsigned page_size_mask; 171 }; 172 173 static int page_size_mask; 174 175 static void __init probe_page_size_mask(void) 176 { 177 /* 178 * For pagealloc debugging, identity mapping will use small pages. 179 * This will simplify cpa(), which otherwise needs to support splitting 180 * large pages into small in interrupt context, etc. 181 */ 182 if (boot_cpu_has(X86_FEATURE_PSE) && !debug_pagealloc_enabled()) 183 page_size_mask |= 1 << PG_LEVEL_2M; 184 else 185 direct_gbpages = 0; 186 187 /* Enable PSE if available */ 188 if (boot_cpu_has(X86_FEATURE_PSE)) 189 cr4_set_bits_and_update_boot(X86_CR4_PSE); 190 191 /* Enable PGE if available */ 192 __supported_pte_mask &= ~_PAGE_GLOBAL; 193 if (boot_cpu_has(X86_FEATURE_PGE)) { 194 cr4_set_bits_and_update_boot(X86_CR4_PGE); 195 __supported_pte_mask |= _PAGE_GLOBAL; 196 } 197 198 /* By the default is everything supported: */ 199 __default_kernel_pte_mask = __supported_pte_mask; 200 /* Except when with PTI where the kernel is mostly non-Global: */ 201 if (cpu_feature_enabled(X86_FEATURE_PTI)) 202 __default_kernel_pte_mask &= ~_PAGE_GLOBAL; 203 204 /* Enable 1 GB linear kernel mappings if available: */ 205 if (direct_gbpages && boot_cpu_has(X86_FEATURE_GBPAGES)) { 206 printk(KERN_INFO "Using GB pages for direct mapping\n"); 207 page_size_mask |= 1 << PG_LEVEL_1G; 208 } else { 209 direct_gbpages = 0; 210 } 211 } 212 213 static void setup_pcid(void) 214 { 215 if (!IS_ENABLED(CONFIG_X86_64)) 216 return; 217 218 if (!boot_cpu_has(X86_FEATURE_PCID)) 219 return; 220 221 if (boot_cpu_has(X86_FEATURE_PGE)) { 222 /* 223 * This can't be cr4_set_bits_and_update_boot() -- the 224 * trampoline code can't handle CR4.PCIDE and it wouldn't 225 * do any good anyway. Despite the name, 226 * cr4_set_bits_and_update_boot() doesn't actually cause 227 * the bits in question to remain set all the way through 228 * the secondary boot asm. 229 * 230 * Instead, we brute-force it and set CR4.PCIDE manually in 231 * start_secondary(). 232 */ 233 cr4_set_bits(X86_CR4_PCIDE); 234 235 /* 236 * INVPCID's single-context modes (2/3) only work if we set 237 * X86_CR4_PCIDE, *and* we INVPCID support. It's unusable 238 * on systems that have X86_CR4_PCIDE clear, or that have 239 * no INVPCID support at all. 240 */ 241 if (boot_cpu_has(X86_FEATURE_INVPCID)) 242 setup_force_cpu_cap(X86_FEATURE_INVPCID_SINGLE); 243 } else { 244 /* 245 * flush_tlb_all(), as currently implemented, won't work if 246 * PCID is on but PGE is not. Since that combination 247 * doesn't exist on real hardware, there's no reason to try 248 * to fully support it, but it's polite to avoid corrupting 249 * data if we're on an improperly configured VM. 250 */ 251 setup_clear_cpu_cap(X86_FEATURE_PCID); 252 } 253 } 254 255 #ifdef CONFIG_X86_32 256 #define NR_RANGE_MR 3 257 #else /* CONFIG_X86_64 */ 258 #define NR_RANGE_MR 5 259 #endif 260 261 static int __meminit save_mr(struct map_range *mr, int nr_range, 262 unsigned long start_pfn, unsigned long end_pfn, 263 unsigned long page_size_mask) 264 { 265 if (start_pfn < end_pfn) { 266 if (nr_range >= NR_RANGE_MR) 267 panic("run out of range for init_memory_mapping\n"); 268 mr[nr_range].start = start_pfn<<PAGE_SHIFT; 269 mr[nr_range].end = end_pfn<<PAGE_SHIFT; 270 mr[nr_range].page_size_mask = page_size_mask; 271 nr_range++; 272 } 273 274 return nr_range; 275 } 276 277 /* 278 * adjust the page_size_mask for small range to go with 279 * big page size instead small one if nearby are ram too. 280 */ 281 static void __ref adjust_range_page_size_mask(struct map_range *mr, 282 int nr_range) 283 { 284 int i; 285 286 for (i = 0; i < nr_range; i++) { 287 if ((page_size_mask & (1<<PG_LEVEL_2M)) && 288 !(mr[i].page_size_mask & (1<<PG_LEVEL_2M))) { 289 unsigned long start = round_down(mr[i].start, PMD_SIZE); 290 unsigned long end = round_up(mr[i].end, PMD_SIZE); 291 292 #ifdef CONFIG_X86_32 293 if ((end >> PAGE_SHIFT) > max_low_pfn) 294 continue; 295 #endif 296 297 if (memblock_is_region_memory(start, end - start)) 298 mr[i].page_size_mask |= 1<<PG_LEVEL_2M; 299 } 300 if ((page_size_mask & (1<<PG_LEVEL_1G)) && 301 !(mr[i].page_size_mask & (1<<PG_LEVEL_1G))) { 302 unsigned long start = round_down(mr[i].start, PUD_SIZE); 303 unsigned long end = round_up(mr[i].end, PUD_SIZE); 304 305 if (memblock_is_region_memory(start, end - start)) 306 mr[i].page_size_mask |= 1<<PG_LEVEL_1G; 307 } 308 } 309 } 310 311 static const char *page_size_string(struct map_range *mr) 312 { 313 static const char str_1g[] = "1G"; 314 static const char str_2m[] = "2M"; 315 static const char str_4m[] = "4M"; 316 static const char str_4k[] = "4k"; 317 318 if (mr->page_size_mask & (1<<PG_LEVEL_1G)) 319 return str_1g; 320 /* 321 * 32-bit without PAE has a 4M large page size. 322 * PG_LEVEL_2M is misnamed, but we can at least 323 * print out the right size in the string. 324 */ 325 if (IS_ENABLED(CONFIG_X86_32) && 326 !IS_ENABLED(CONFIG_X86_PAE) && 327 mr->page_size_mask & (1<<PG_LEVEL_2M)) 328 return str_4m; 329 330 if (mr->page_size_mask & (1<<PG_LEVEL_2M)) 331 return str_2m; 332 333 return str_4k; 334 } 335 336 static int __meminit split_mem_range(struct map_range *mr, int nr_range, 337 unsigned long start, 338 unsigned long end) 339 { 340 unsigned long start_pfn, end_pfn, limit_pfn; 341 unsigned long pfn; 342 int i; 343 344 limit_pfn = PFN_DOWN(end); 345 346 /* head if not big page alignment ? */ 347 pfn = start_pfn = PFN_DOWN(start); 348 #ifdef CONFIG_X86_32 349 /* 350 * Don't use a large page for the first 2/4MB of memory 351 * because there are often fixed size MTRRs in there 352 * and overlapping MTRRs into large pages can cause 353 * slowdowns. 354 */ 355 if (pfn == 0) 356 end_pfn = PFN_DOWN(PMD_SIZE); 357 else 358 end_pfn = round_up(pfn, PFN_DOWN(PMD_SIZE)); 359 #else /* CONFIG_X86_64 */ 360 end_pfn = round_up(pfn, PFN_DOWN(PMD_SIZE)); 361 #endif 362 if (end_pfn > limit_pfn) 363 end_pfn = limit_pfn; 364 if (start_pfn < end_pfn) { 365 nr_range = save_mr(mr, nr_range, start_pfn, end_pfn, 0); 366 pfn = end_pfn; 367 } 368 369 /* big page (2M) range */ 370 start_pfn = round_up(pfn, PFN_DOWN(PMD_SIZE)); 371 #ifdef CONFIG_X86_32 372 end_pfn = round_down(limit_pfn, PFN_DOWN(PMD_SIZE)); 373 #else /* CONFIG_X86_64 */ 374 end_pfn = round_up(pfn, PFN_DOWN(PUD_SIZE)); 375 if (end_pfn > round_down(limit_pfn, PFN_DOWN(PMD_SIZE))) 376 end_pfn = round_down(limit_pfn, PFN_DOWN(PMD_SIZE)); 377 #endif 378 379 if (start_pfn < end_pfn) { 380 nr_range = save_mr(mr, nr_range, start_pfn, end_pfn, 381 page_size_mask & (1<<PG_LEVEL_2M)); 382 pfn = end_pfn; 383 } 384 385 #ifdef CONFIG_X86_64 386 /* big page (1G) range */ 387 start_pfn = round_up(pfn, PFN_DOWN(PUD_SIZE)); 388 end_pfn = round_down(limit_pfn, PFN_DOWN(PUD_SIZE)); 389 if (start_pfn < end_pfn) { 390 nr_range = save_mr(mr, nr_range, start_pfn, end_pfn, 391 page_size_mask & 392 ((1<<PG_LEVEL_2M)|(1<<PG_LEVEL_1G))); 393 pfn = end_pfn; 394 } 395 396 /* tail is not big page (1G) alignment */ 397 start_pfn = round_up(pfn, PFN_DOWN(PMD_SIZE)); 398 end_pfn = round_down(limit_pfn, PFN_DOWN(PMD_SIZE)); 399 if (start_pfn < end_pfn) { 400 nr_range = save_mr(mr, nr_range, start_pfn, end_pfn, 401 page_size_mask & (1<<PG_LEVEL_2M)); 402 pfn = end_pfn; 403 } 404 #endif 405 406 /* tail is not big page (2M) alignment */ 407 start_pfn = pfn; 408 end_pfn = limit_pfn; 409 nr_range = save_mr(mr, nr_range, start_pfn, end_pfn, 0); 410 411 if (!after_bootmem) 412 adjust_range_page_size_mask(mr, nr_range); 413 414 /* try to merge same page size and continuous */ 415 for (i = 0; nr_range > 1 && i < nr_range - 1; i++) { 416 unsigned long old_start; 417 if (mr[i].end != mr[i+1].start || 418 mr[i].page_size_mask != mr[i+1].page_size_mask) 419 continue; 420 /* move it */ 421 old_start = mr[i].start; 422 memmove(&mr[i], &mr[i+1], 423 (nr_range - 1 - i) * sizeof(struct map_range)); 424 mr[i--].start = old_start; 425 nr_range--; 426 } 427 428 for (i = 0; i < nr_range; i++) 429 pr_debug(" [mem %#010lx-%#010lx] page %s\n", 430 mr[i].start, mr[i].end - 1, 431 page_size_string(&mr[i])); 432 433 return nr_range; 434 } 435 436 struct range pfn_mapped[E820_MAX_ENTRIES]; 437 int nr_pfn_mapped; 438 439 static void add_pfn_range_mapped(unsigned long start_pfn, unsigned long end_pfn) 440 { 441 nr_pfn_mapped = add_range_with_merge(pfn_mapped, E820_MAX_ENTRIES, 442 nr_pfn_mapped, start_pfn, end_pfn); 443 nr_pfn_mapped = clean_sort_range(pfn_mapped, E820_MAX_ENTRIES); 444 445 max_pfn_mapped = max(max_pfn_mapped, end_pfn); 446 447 if (start_pfn < (1UL<<(32-PAGE_SHIFT))) 448 max_low_pfn_mapped = max(max_low_pfn_mapped, 449 min(end_pfn, 1UL<<(32-PAGE_SHIFT))); 450 } 451 452 bool pfn_range_is_mapped(unsigned long start_pfn, unsigned long end_pfn) 453 { 454 int i; 455 456 for (i = 0; i < nr_pfn_mapped; i++) 457 if ((start_pfn >= pfn_mapped[i].start) && 458 (end_pfn <= pfn_mapped[i].end)) 459 return true; 460 461 return false; 462 } 463 464 /* 465 * Setup the direct mapping of the physical memory at PAGE_OFFSET. 466 * This runs before bootmem is initialized and gets pages directly from 467 * the physical memory. To access them they are temporarily mapped. 468 */ 469 unsigned long __ref init_memory_mapping(unsigned long start, 470 unsigned long end) 471 { 472 struct map_range mr[NR_RANGE_MR]; 473 unsigned long ret = 0; 474 int nr_range, i; 475 476 pr_debug("init_memory_mapping: [mem %#010lx-%#010lx]\n", 477 start, end - 1); 478 479 memset(mr, 0, sizeof(mr)); 480 nr_range = split_mem_range(mr, 0, start, end); 481 482 for (i = 0; i < nr_range; i++) 483 ret = kernel_physical_mapping_init(mr[i].start, mr[i].end, 484 mr[i].page_size_mask); 485 486 add_pfn_range_mapped(start >> PAGE_SHIFT, ret >> PAGE_SHIFT); 487 488 return ret >> PAGE_SHIFT; 489 } 490 491 /* 492 * We need to iterate through the E820 memory map and create direct mappings 493 * for only E820_TYPE_RAM and E820_KERN_RESERVED regions. We cannot simply 494 * create direct mappings for all pfns from [0 to max_low_pfn) and 495 * [4GB to max_pfn) because of possible memory holes in high addresses 496 * that cannot be marked as UC by fixed/variable range MTRRs. 497 * Depending on the alignment of E820 ranges, this may possibly result 498 * in using smaller size (i.e. 4K instead of 2M or 1G) page tables. 499 * 500 * init_mem_mapping() calls init_range_memory_mapping() with big range. 501 * That range would have hole in the middle or ends, and only ram parts 502 * will be mapped in init_range_memory_mapping(). 503 */ 504 static unsigned long __init init_range_memory_mapping( 505 unsigned long r_start, 506 unsigned long r_end) 507 { 508 unsigned long start_pfn, end_pfn; 509 unsigned long mapped_ram_size = 0; 510 int i; 511 512 for_each_mem_pfn_range(i, MAX_NUMNODES, &start_pfn, &end_pfn, NULL) { 513 u64 start = clamp_val(PFN_PHYS(start_pfn), r_start, r_end); 514 u64 end = clamp_val(PFN_PHYS(end_pfn), r_start, r_end); 515 if (start >= end) 516 continue; 517 518 /* 519 * if it is overlapping with brk pgt, we need to 520 * alloc pgt buf from memblock instead. 521 */ 522 can_use_brk_pgt = max(start, (u64)pgt_buf_end<<PAGE_SHIFT) >= 523 min(end, (u64)pgt_buf_top<<PAGE_SHIFT); 524 init_memory_mapping(start, end); 525 mapped_ram_size += end - start; 526 can_use_brk_pgt = true; 527 } 528 529 return mapped_ram_size; 530 } 531 532 static unsigned long __init get_new_step_size(unsigned long step_size) 533 { 534 /* 535 * Initial mapped size is PMD_SIZE (2M). 536 * We can not set step_size to be PUD_SIZE (1G) yet. 537 * In worse case, when we cross the 1G boundary, and 538 * PG_LEVEL_2M is not set, we will need 1+1+512 pages (2M + 8k) 539 * to map 1G range with PTE. Hence we use one less than the 540 * difference of page table level shifts. 541 * 542 * Don't need to worry about overflow in the top-down case, on 32bit, 543 * when step_size is 0, round_down() returns 0 for start, and that 544 * turns it into 0x100000000ULL. 545 * In the bottom-up case, round_up(x, 0) returns 0 though too, which 546 * needs to be taken into consideration by the code below. 547 */ 548 return step_size << (PMD_SHIFT - PAGE_SHIFT - 1); 549 } 550 551 /** 552 * memory_map_top_down - Map [map_start, map_end) top down 553 * @map_start: start address of the target memory range 554 * @map_end: end address of the target memory range 555 * 556 * This function will setup direct mapping for memory range 557 * [map_start, map_end) in top-down. That said, the page tables 558 * will be allocated at the end of the memory, and we map the 559 * memory in top-down. 560 */ 561 static void __init memory_map_top_down(unsigned long map_start, 562 unsigned long map_end) 563 { 564 unsigned long real_end, start, last_start; 565 unsigned long step_size; 566 unsigned long addr; 567 unsigned long mapped_ram_size = 0; 568 569 /* xen has big range in reserved near end of ram, skip it at first.*/ 570 addr = memblock_find_in_range(map_start, map_end, PMD_SIZE, PMD_SIZE); 571 real_end = addr + PMD_SIZE; 572 573 /* step_size need to be small so pgt_buf from BRK could cover it */ 574 step_size = PMD_SIZE; 575 max_pfn_mapped = 0; /* will get exact value next */ 576 min_pfn_mapped = real_end >> PAGE_SHIFT; 577 last_start = start = real_end; 578 579 /* 580 * We start from the top (end of memory) and go to the bottom. 581 * The memblock_find_in_range() gets us a block of RAM from the 582 * end of RAM in [min_pfn_mapped, max_pfn_mapped) used as new pages 583 * for page table. 584 */ 585 while (last_start > map_start) { 586 if (last_start > step_size) { 587 start = round_down(last_start - 1, step_size); 588 if (start < map_start) 589 start = map_start; 590 } else 591 start = map_start; 592 mapped_ram_size += init_range_memory_mapping(start, 593 last_start); 594 last_start = start; 595 min_pfn_mapped = last_start >> PAGE_SHIFT; 596 if (mapped_ram_size >= step_size) 597 step_size = get_new_step_size(step_size); 598 } 599 600 if (real_end < map_end) 601 init_range_memory_mapping(real_end, map_end); 602 } 603 604 /** 605 * memory_map_bottom_up - Map [map_start, map_end) bottom up 606 * @map_start: start address of the target memory range 607 * @map_end: end address of the target memory range 608 * 609 * This function will setup direct mapping for memory range 610 * [map_start, map_end) in bottom-up. Since we have limited the 611 * bottom-up allocation above the kernel, the page tables will 612 * be allocated just above the kernel and we map the memory 613 * in [map_start, map_end) in bottom-up. 614 */ 615 static void __init memory_map_bottom_up(unsigned long map_start, 616 unsigned long map_end) 617 { 618 unsigned long next, start; 619 unsigned long mapped_ram_size = 0; 620 /* step_size need to be small so pgt_buf from BRK could cover it */ 621 unsigned long step_size = PMD_SIZE; 622 623 start = map_start; 624 min_pfn_mapped = start >> PAGE_SHIFT; 625 626 /* 627 * We start from the bottom (@map_start) and go to the top (@map_end). 628 * The memblock_find_in_range() gets us a block of RAM from the 629 * end of RAM in [min_pfn_mapped, max_pfn_mapped) used as new pages 630 * for page table. 631 */ 632 while (start < map_end) { 633 if (step_size && map_end - start > step_size) { 634 next = round_up(start + 1, step_size); 635 if (next > map_end) 636 next = map_end; 637 } else { 638 next = map_end; 639 } 640 641 mapped_ram_size += init_range_memory_mapping(start, next); 642 start = next; 643 644 if (mapped_ram_size >= step_size) 645 step_size = get_new_step_size(step_size); 646 } 647 } 648 649 void __init init_mem_mapping(void) 650 { 651 unsigned long end; 652 653 pti_check_boottime_disable(); 654 probe_page_size_mask(); 655 setup_pcid(); 656 657 #ifdef CONFIG_X86_64 658 end = max_pfn << PAGE_SHIFT; 659 #else 660 end = max_low_pfn << PAGE_SHIFT; 661 #endif 662 663 /* the ISA range is always mapped regardless of memory holes */ 664 init_memory_mapping(0, ISA_END_ADDRESS); 665 666 /* Init the trampoline, possibly with KASLR memory offset */ 667 init_trampoline(); 668 669 /* 670 * If the allocation is in bottom-up direction, we setup direct mapping 671 * in bottom-up, otherwise we setup direct mapping in top-down. 672 */ 673 if (memblock_bottom_up()) { 674 unsigned long kernel_end = __pa_symbol(_end); 675 676 /* 677 * we need two separate calls here. This is because we want to 678 * allocate page tables above the kernel. So we first map 679 * [kernel_end, end) to make memory above the kernel be mapped 680 * as soon as possible. And then use page tables allocated above 681 * the kernel to map [ISA_END_ADDRESS, kernel_end). 682 */ 683 memory_map_bottom_up(kernel_end, end); 684 memory_map_bottom_up(ISA_END_ADDRESS, kernel_end); 685 } else { 686 memory_map_top_down(ISA_END_ADDRESS, end); 687 } 688 689 #ifdef CONFIG_X86_64 690 if (max_pfn > max_low_pfn) { 691 /* can we preseve max_low_pfn ?*/ 692 max_low_pfn = max_pfn; 693 } 694 #else 695 early_ioremap_page_table_range_init(); 696 #endif 697 698 load_cr3(swapper_pg_dir); 699 __flush_tlb_all(); 700 701 x86_init.hyper.init_mem_mapping(); 702 703 early_memtest(0, max_pfn_mapped << PAGE_SHIFT); 704 } 705 706 /* 707 * Initialize an mm_struct to be used during poking and a pointer to be used 708 * during patching. 709 */ 710 void __init poking_init(void) 711 { 712 spinlock_t *ptl; 713 pte_t *ptep; 714 715 poking_mm = copy_init_mm(); 716 BUG_ON(!poking_mm); 717 718 /* 719 * Randomize the poking address, but make sure that the following page 720 * will be mapped at the same PMD. We need 2 pages, so find space for 3, 721 * and adjust the address if the PMD ends after the first one. 722 */ 723 poking_addr = TASK_UNMAPPED_BASE; 724 if (IS_ENABLED(CONFIG_RANDOMIZE_BASE)) 725 poking_addr += (kaslr_get_random_long("Poking") & PAGE_MASK) % 726 (TASK_SIZE - TASK_UNMAPPED_BASE - 3 * PAGE_SIZE); 727 728 if (((poking_addr + PAGE_SIZE) & ~PMD_MASK) == 0) 729 poking_addr += PAGE_SIZE; 730 731 /* 732 * We need to trigger the allocation of the page-tables that will be 733 * needed for poking now. Later, poking may be performed in an atomic 734 * section, which might cause allocation to fail. 735 */ 736 ptep = get_locked_pte(poking_mm, poking_addr, &ptl); 737 BUG_ON(!ptep); 738 pte_unmap_unlock(ptep, ptl); 739 } 740 741 /* 742 * devmem_is_allowed() checks to see if /dev/mem access to a certain address 743 * is valid. The argument is a physical page number. 744 * 745 * On x86, access has to be given to the first megabyte of RAM because that 746 * area traditionally contains BIOS code and data regions used by X, dosemu, 747 * and similar apps. Since they map the entire memory range, the whole range 748 * must be allowed (for mapping), but any areas that would otherwise be 749 * disallowed are flagged as being "zero filled" instead of rejected. 750 * Access has to be given to non-kernel-ram areas as well, these contain the 751 * PCI mmio resources as well as potential bios/acpi data regions. 752 */ 753 int devmem_is_allowed(unsigned long pagenr) 754 { 755 if (region_intersects(PFN_PHYS(pagenr), PAGE_SIZE, 756 IORESOURCE_SYSTEM_RAM, IORES_DESC_NONE) 757 != REGION_DISJOINT) { 758 /* 759 * For disallowed memory regions in the low 1MB range, 760 * request that the page be shown as all zeros. 761 */ 762 if (pagenr < 256) 763 return 2; 764 765 return 0; 766 } 767 768 /* 769 * This must follow RAM test, since System RAM is considered a 770 * restricted resource under CONFIG_STRICT_IOMEM. 771 */ 772 if (iomem_is_exclusive(pagenr << PAGE_SHIFT)) { 773 /* Low 1MB bypasses iomem restrictions. */ 774 if (pagenr < 256) 775 return 1; 776 777 return 0; 778 } 779 780 return 1; 781 } 782 783 void free_init_pages(const char *what, unsigned long begin, unsigned long end) 784 { 785 unsigned long begin_aligned, end_aligned; 786 787 /* Make sure boundaries are page aligned */ 788 begin_aligned = PAGE_ALIGN(begin); 789 end_aligned = end & PAGE_MASK; 790 791 if (WARN_ON(begin_aligned != begin || end_aligned != end)) { 792 begin = begin_aligned; 793 end = end_aligned; 794 } 795 796 if (begin >= end) 797 return; 798 799 /* 800 * If debugging page accesses then do not free this memory but 801 * mark them not present - any buggy init-section access will 802 * create a kernel page fault: 803 */ 804 if (debug_pagealloc_enabled()) { 805 pr_info("debug: unmapping init [mem %#010lx-%#010lx]\n", 806 begin, end - 1); 807 /* 808 * Inform kmemleak about the hole in the memory since the 809 * corresponding pages will be unmapped. 810 */ 811 kmemleak_free_part((void *)begin, end - begin); 812 set_memory_np(begin, (end - begin) >> PAGE_SHIFT); 813 } else { 814 /* 815 * We just marked the kernel text read only above, now that 816 * we are going to free part of that, we need to make that 817 * writeable and non-executable first. 818 */ 819 set_memory_nx(begin, (end - begin) >> PAGE_SHIFT); 820 set_memory_rw(begin, (end - begin) >> PAGE_SHIFT); 821 822 free_reserved_area((void *)begin, (void *)end, 823 POISON_FREE_INITMEM, what); 824 } 825 } 826 827 /* 828 * begin/end can be in the direct map or the "high kernel mapping" 829 * used for the kernel image only. free_init_pages() will do the 830 * right thing for either kind of address. 831 */ 832 void free_kernel_image_pages(void *begin, void *end) 833 { 834 unsigned long begin_ul = (unsigned long)begin; 835 unsigned long end_ul = (unsigned long)end; 836 unsigned long len_pages = (end_ul - begin_ul) >> PAGE_SHIFT; 837 838 839 free_init_pages("unused kernel image", begin_ul, end_ul); 840 841 /* 842 * PTI maps some of the kernel into userspace. For performance, 843 * this includes some kernel areas that do not contain secrets. 844 * Those areas might be adjacent to the parts of the kernel image 845 * being freed, which may contain secrets. Remove the "high kernel 846 * image mapping" for these freed areas, ensuring they are not even 847 * potentially vulnerable to Meltdown regardless of the specific 848 * optimizations PTI is currently using. 849 * 850 * The "noalias" prevents unmapping the direct map alias which is 851 * needed to access the freed pages. 852 * 853 * This is only valid for 64bit kernels. 32bit has only one mapping 854 * which can't be treated in this way for obvious reasons. 855 */ 856 if (IS_ENABLED(CONFIG_X86_64) && cpu_feature_enabled(X86_FEATURE_PTI)) 857 set_memory_np_noalias(begin_ul, len_pages); 858 } 859 860 void __weak mem_encrypt_free_decrypted_mem(void) { } 861 862 void __ref free_initmem(void) 863 { 864 e820__reallocate_tables(); 865 866 mem_encrypt_free_decrypted_mem(); 867 868 free_kernel_image_pages(&__init_begin, &__init_end); 869 } 870 871 #ifdef CONFIG_BLK_DEV_INITRD 872 void __init free_initrd_mem(unsigned long start, unsigned long end) 873 { 874 /* 875 * end could be not aligned, and We can not align that, 876 * decompresser could be confused by aligned initrd_end 877 * We already reserve the end partial page before in 878 * - i386_start_kernel() 879 * - x86_64_start_kernel() 880 * - relocate_initrd() 881 * So here We can do PAGE_ALIGN() safely to get partial page to be freed 882 */ 883 free_init_pages("initrd", start, PAGE_ALIGN(end)); 884 } 885 #endif 886 887 /* 888 * Calculate the precise size of the DMA zone (first 16 MB of RAM), 889 * and pass it to the MM layer - to help it set zone watermarks more 890 * accurately. 891 * 892 * Done on 64-bit systems only for the time being, although 32-bit systems 893 * might benefit from this as well. 894 */ 895 void __init memblock_find_dma_reserve(void) 896 { 897 #ifdef CONFIG_X86_64 898 u64 nr_pages = 0, nr_free_pages = 0; 899 unsigned long start_pfn, end_pfn; 900 phys_addr_t start_addr, end_addr; 901 int i; 902 u64 u; 903 904 /* 905 * Iterate over all memory ranges (free and reserved ones alike), 906 * to calculate the total number of pages in the first 16 MB of RAM: 907 */ 908 nr_pages = 0; 909 for_each_mem_pfn_range(i, MAX_NUMNODES, &start_pfn, &end_pfn, NULL) { 910 start_pfn = min(start_pfn, MAX_DMA_PFN); 911 end_pfn = min(end_pfn, MAX_DMA_PFN); 912 913 nr_pages += end_pfn - start_pfn; 914 } 915 916 /* 917 * Iterate over free memory ranges to calculate the number of free 918 * pages in the DMA zone, while not counting potential partial 919 * pages at the beginning or the end of the range: 920 */ 921 nr_free_pages = 0; 922 for_each_free_mem_range(u, NUMA_NO_NODE, MEMBLOCK_NONE, &start_addr, &end_addr, NULL) { 923 start_pfn = min_t(unsigned long, PFN_UP(start_addr), MAX_DMA_PFN); 924 end_pfn = min_t(unsigned long, PFN_DOWN(end_addr), MAX_DMA_PFN); 925 926 if (start_pfn < end_pfn) 927 nr_free_pages += end_pfn - start_pfn; 928 } 929 930 set_dma_reserve(nr_pages - nr_free_pages); 931 #endif 932 } 933 934 void __init zone_sizes_init(void) 935 { 936 unsigned long max_zone_pfns[MAX_NR_ZONES]; 937 938 memset(max_zone_pfns, 0, sizeof(max_zone_pfns)); 939 940 #ifdef CONFIG_ZONE_DMA 941 max_zone_pfns[ZONE_DMA] = min(MAX_DMA_PFN, max_low_pfn); 942 #endif 943 #ifdef CONFIG_ZONE_DMA32 944 max_zone_pfns[ZONE_DMA32] = min(MAX_DMA32_PFN, max_low_pfn); 945 #endif 946 max_zone_pfns[ZONE_NORMAL] = max_low_pfn; 947 #ifdef CONFIG_HIGHMEM 948 max_zone_pfns[ZONE_HIGHMEM] = max_pfn; 949 #endif 950 951 free_area_init_nodes(max_zone_pfns); 952 } 953 954 __visible DEFINE_PER_CPU_SHARED_ALIGNED(struct tlb_state, cpu_tlbstate) = { 955 .loaded_mm = &init_mm, 956 .next_asid = 1, 957 .cr4 = ~0UL, /* fail hard if we screw up cr4 shadow initialization */ 958 }; 959 EXPORT_PER_CPU_SYMBOL(cpu_tlbstate); 960 961 void update_cache_mode_entry(unsigned entry, enum page_cache_mode cache) 962 { 963 /* entry 0 MUST be WB (hardwired to speed up translations) */ 964 BUG_ON(!entry && cache != _PAGE_CACHE_MODE_WB); 965 966 __cachemode2pte_tbl[cache] = __cm_idx2pte(entry); 967 __pte2cachemode_tbl[entry] = cache; 968 } 969 970 #ifdef CONFIG_SWAP 971 unsigned long max_swapfile_size(void) 972 { 973 unsigned long pages; 974 975 pages = generic_max_swapfile_size(); 976 977 if (boot_cpu_has_bug(X86_BUG_L1TF) && l1tf_mitigation != L1TF_MITIGATION_OFF) { 978 /* Limit the swap file size to MAX_PA/2 for L1TF workaround */ 979 unsigned long long l1tf_limit = l1tf_pfn_limit(); 980 /* 981 * We encode swap offsets also with 3 bits below those for pfn 982 * which makes the usable limit higher. 983 */ 984 #if CONFIG_PGTABLE_LEVELS > 2 985 l1tf_limit <<= PAGE_SHIFT - SWP_OFFSET_FIRST_BIT; 986 #endif 987 pages = min_t(unsigned long long, l1tf_limit, pages); 988 } 989 return pages; 990 } 991 #endif 992