1 // SPDX-License-Identifier: GPL-2.0-only 2 #include <linux/extable.h> 3 #include <linux/uaccess.h> 4 #include <linux/sched/debug.h> 5 #include <linux/bitfield.h> 6 #include <xen/xen.h> 7 8 #include <asm/fpu/api.h> 9 #include <asm/sev.h> 10 #include <asm/traps.h> 11 #include <asm/kdebug.h> 12 #include <asm/insn-eval.h> 13 #include <asm/sgx.h> 14 15 static inline unsigned long *pt_regs_nr(struct pt_regs *regs, int nr) 16 { 17 int reg_offset = pt_regs_offset(regs, nr); 18 static unsigned long __dummy; 19 20 if (WARN_ON_ONCE(reg_offset < 0)) 21 return &__dummy; 22 23 return (unsigned long *)((unsigned long)regs + reg_offset); 24 } 25 26 static inline unsigned long 27 ex_fixup_addr(const struct exception_table_entry *x) 28 { 29 return (unsigned long)&x->fixup + x->fixup; 30 } 31 32 static bool ex_handler_default(const struct exception_table_entry *e, 33 struct pt_regs *regs) 34 { 35 if (e->data & EX_FLAG_CLEAR_AX) 36 regs->ax = 0; 37 if (e->data & EX_FLAG_CLEAR_DX) 38 regs->dx = 0; 39 40 regs->ip = ex_fixup_addr(e); 41 return true; 42 } 43 44 static bool ex_handler_fault(const struct exception_table_entry *fixup, 45 struct pt_regs *regs, int trapnr) 46 { 47 regs->ax = trapnr; 48 return ex_handler_default(fixup, regs); 49 } 50 51 static bool ex_handler_sgx(const struct exception_table_entry *fixup, 52 struct pt_regs *regs, int trapnr) 53 { 54 regs->ax = trapnr | SGX_ENCLS_FAULT_FLAG; 55 return ex_handler_default(fixup, regs); 56 } 57 58 /* 59 * Handler for when we fail to restore a task's FPU state. We should never get 60 * here because the FPU state of a task using the FPU (task->thread.fpu.state) 61 * should always be valid. However, past bugs have allowed userspace to set 62 * reserved bits in the XSAVE area using PTRACE_SETREGSET or sys_rt_sigreturn(). 63 * These caused XRSTOR to fail when switching to the task, leaking the FPU 64 * registers of the task previously executing on the CPU. Mitigate this class 65 * of vulnerability by restoring from the initial state (essentially, zeroing 66 * out all the FPU registers) if we can't restore from the task's FPU state. 67 */ 68 static bool ex_handler_fprestore(const struct exception_table_entry *fixup, 69 struct pt_regs *regs) 70 { 71 regs->ip = ex_fixup_addr(fixup); 72 73 WARN_ONCE(1, "Bad FPU state detected at %pB, reinitializing FPU registers.", 74 (void *)instruction_pointer(regs)); 75 76 fpu_reset_from_exception_fixup(); 77 return true; 78 } 79 80 static bool ex_handler_uaccess(const struct exception_table_entry *fixup, 81 struct pt_regs *regs, int trapnr) 82 { 83 WARN_ONCE(trapnr == X86_TRAP_GP, "General protection fault in user access. Non-canonical address?"); 84 return ex_handler_default(fixup, regs); 85 } 86 87 static bool ex_handler_copy(const struct exception_table_entry *fixup, 88 struct pt_regs *regs, int trapnr) 89 { 90 WARN_ONCE(trapnr == X86_TRAP_GP, "General protection fault in user access. Non-canonical address?"); 91 return ex_handler_fault(fixup, regs, trapnr); 92 } 93 94 static bool ex_handler_msr(const struct exception_table_entry *fixup, 95 struct pt_regs *regs, bool wrmsr, bool safe, int reg) 96 { 97 if (!safe && wrmsr && 98 pr_warn_once("unchecked MSR access error: WRMSR to 0x%x (tried to write 0x%08x%08x) at rIP: 0x%lx (%pS)\n", 99 (unsigned int)regs->cx, (unsigned int)regs->dx, 100 (unsigned int)regs->ax, regs->ip, (void *)regs->ip)) 101 show_stack_regs(regs); 102 103 if (!safe && !wrmsr && 104 pr_warn_once("unchecked MSR access error: RDMSR from 0x%x at rIP: 0x%lx (%pS)\n", 105 (unsigned int)regs->cx, regs->ip, (void *)regs->ip)) 106 show_stack_regs(regs); 107 108 if (!wrmsr) { 109 /* Pretend that the read succeeded and returned 0. */ 110 regs->ax = 0; 111 regs->dx = 0; 112 } 113 114 if (safe) 115 *pt_regs_nr(regs, reg) = -EIO; 116 117 return ex_handler_default(fixup, regs); 118 } 119 120 static bool ex_handler_clear_fs(const struct exception_table_entry *fixup, 121 struct pt_regs *regs) 122 { 123 if (static_cpu_has(X86_BUG_NULL_SEG)) 124 asm volatile ("mov %0, %%fs" : : "rm" (__USER_DS)); 125 asm volatile ("mov %0, %%fs" : : "rm" (0)); 126 return ex_handler_default(fixup, regs); 127 } 128 129 static bool ex_handler_imm_reg(const struct exception_table_entry *fixup, 130 struct pt_regs *regs, int reg, int imm) 131 { 132 *pt_regs_nr(regs, reg) = (long)imm; 133 return ex_handler_default(fixup, regs); 134 } 135 136 static bool ex_handler_ucopy_len(const struct exception_table_entry *fixup, 137 struct pt_regs *regs, int trapnr, int reg, int imm) 138 { 139 regs->cx = imm * regs->cx + *pt_regs_nr(regs, reg); 140 return ex_handler_uaccess(fixup, regs, trapnr); 141 } 142 143 int ex_get_fixup_type(unsigned long ip) 144 { 145 const struct exception_table_entry *e = search_exception_tables(ip); 146 147 return e ? FIELD_GET(EX_DATA_TYPE_MASK, e->data) : EX_TYPE_NONE; 148 } 149 150 int fixup_exception(struct pt_regs *regs, int trapnr, unsigned long error_code, 151 unsigned long fault_addr) 152 { 153 const struct exception_table_entry *e; 154 int type, reg, imm; 155 156 #ifdef CONFIG_PNPBIOS 157 if (unlikely(SEGMENT_IS_PNP_CODE(regs->cs))) { 158 extern u32 pnp_bios_fault_eip, pnp_bios_fault_esp; 159 extern u32 pnp_bios_is_utter_crap; 160 pnp_bios_is_utter_crap = 1; 161 printk(KERN_CRIT "PNPBIOS fault.. attempting recovery.\n"); 162 __asm__ volatile( 163 "movl %0, %%esp\n\t" 164 "jmp *%1\n\t" 165 : : "g" (pnp_bios_fault_esp), "g" (pnp_bios_fault_eip)); 166 panic("do_trap: can't hit this"); 167 } 168 #endif 169 170 e = search_exception_tables(regs->ip); 171 if (!e) 172 return 0; 173 174 type = FIELD_GET(EX_DATA_TYPE_MASK, e->data); 175 reg = FIELD_GET(EX_DATA_REG_MASK, e->data); 176 imm = FIELD_GET(EX_DATA_IMM_MASK, e->data); 177 178 switch (type) { 179 case EX_TYPE_DEFAULT: 180 case EX_TYPE_DEFAULT_MCE_SAFE: 181 return ex_handler_default(e, regs); 182 case EX_TYPE_FAULT: 183 case EX_TYPE_FAULT_MCE_SAFE: 184 return ex_handler_fault(e, regs, trapnr); 185 case EX_TYPE_UACCESS: 186 return ex_handler_uaccess(e, regs, trapnr); 187 case EX_TYPE_COPY: 188 return ex_handler_copy(e, regs, trapnr); 189 case EX_TYPE_CLEAR_FS: 190 return ex_handler_clear_fs(e, regs); 191 case EX_TYPE_FPU_RESTORE: 192 return ex_handler_fprestore(e, regs); 193 case EX_TYPE_BPF: 194 return ex_handler_bpf(e, regs); 195 case EX_TYPE_WRMSR: 196 return ex_handler_msr(e, regs, true, false, reg); 197 case EX_TYPE_RDMSR: 198 return ex_handler_msr(e, regs, false, false, reg); 199 case EX_TYPE_WRMSR_SAFE: 200 return ex_handler_msr(e, regs, true, true, reg); 201 case EX_TYPE_RDMSR_SAFE: 202 return ex_handler_msr(e, regs, false, true, reg); 203 case EX_TYPE_WRMSR_IN_MCE: 204 ex_handler_msr_mce(regs, true); 205 break; 206 case EX_TYPE_RDMSR_IN_MCE: 207 ex_handler_msr_mce(regs, false); 208 break; 209 case EX_TYPE_POP_REG: 210 regs->sp += sizeof(long); 211 fallthrough; 212 case EX_TYPE_IMM_REG: 213 return ex_handler_imm_reg(e, regs, reg, imm); 214 case EX_TYPE_FAULT_SGX: 215 return ex_handler_sgx(e, regs, trapnr); 216 case EX_TYPE_UCOPY_LEN: 217 return ex_handler_ucopy_len(e, regs, trapnr, reg, imm); 218 } 219 BUG(); 220 } 221 222 extern unsigned int early_recursion_flag; 223 224 /* Restricted version used during very early boot */ 225 void __init early_fixup_exception(struct pt_regs *regs, int trapnr) 226 { 227 /* Ignore early NMIs. */ 228 if (trapnr == X86_TRAP_NMI) 229 return; 230 231 if (early_recursion_flag > 2) 232 goto halt_loop; 233 234 /* 235 * Old CPUs leave the high bits of CS on the stack 236 * undefined. I'm not sure which CPUs do this, but at least 237 * the 486 DX works this way. 238 * Xen pv domains are not using the default __KERNEL_CS. 239 */ 240 if (!xen_pv_domain() && regs->cs != __KERNEL_CS) 241 goto fail; 242 243 /* 244 * The full exception fixup machinery is available as soon as 245 * the early IDT is loaded. This means that it is the 246 * responsibility of extable users to either function correctly 247 * when handlers are invoked early or to simply avoid causing 248 * exceptions before they're ready to handle them. 249 * 250 * This is better than filtering which handlers can be used, 251 * because refusing to call a handler here is guaranteed to 252 * result in a hard-to-debug panic. 253 * 254 * Keep in mind that not all vectors actually get here. Early 255 * page faults, for example, are special. 256 */ 257 if (fixup_exception(regs, trapnr, regs->orig_ax, 0)) 258 return; 259 260 if (trapnr == X86_TRAP_UD) { 261 if (report_bug(regs->ip, regs) == BUG_TRAP_TYPE_WARN) { 262 /* Skip the ud2. */ 263 regs->ip += LEN_UD2; 264 return; 265 } 266 267 /* 268 * If this was a BUG and report_bug returns or if this 269 * was just a normal #UD, we want to continue onward and 270 * crash. 271 */ 272 } 273 274 fail: 275 early_printk("PANIC: early exception 0x%02x IP %lx:%lx error %lx cr2 0x%lx\n", 276 (unsigned)trapnr, (unsigned long)regs->cs, regs->ip, 277 regs->orig_ax, read_cr2()); 278 279 show_regs(regs); 280 281 halt_loop: 282 while (true) 283 halt(); 284 } 285