1 #include <linux/extable.h> 2 #include <linux/uaccess.h> 3 #include <linux/sched/debug.h> 4 5 #include <asm/fpu/internal.h> 6 #include <asm/traps.h> 7 #include <asm/kdebug.h> 8 9 typedef bool (*ex_handler_t)(const struct exception_table_entry *, 10 struct pt_regs *, int); 11 12 static inline unsigned long 13 ex_fixup_addr(const struct exception_table_entry *x) 14 { 15 return (unsigned long)&x->fixup + x->fixup; 16 } 17 static inline ex_handler_t 18 ex_fixup_handler(const struct exception_table_entry *x) 19 { 20 return (ex_handler_t)((unsigned long)&x->handler + x->handler); 21 } 22 23 bool ex_handler_default(const struct exception_table_entry *fixup, 24 struct pt_regs *regs, int trapnr) 25 { 26 regs->ip = ex_fixup_addr(fixup); 27 return true; 28 } 29 EXPORT_SYMBOL(ex_handler_default); 30 31 bool ex_handler_fault(const struct exception_table_entry *fixup, 32 struct pt_regs *regs, int trapnr) 33 { 34 regs->ip = ex_fixup_addr(fixup); 35 regs->ax = trapnr; 36 return true; 37 } 38 EXPORT_SYMBOL_GPL(ex_handler_fault); 39 40 /* 41 * Handler for UD0 exception following a failed test against the 42 * result of a refcount inc/dec/add/sub. 43 */ 44 bool ex_handler_refcount(const struct exception_table_entry *fixup, 45 struct pt_regs *regs, int trapnr) 46 { 47 /* First unconditionally saturate the refcount. */ 48 *(int *)regs->cx = INT_MIN / 2; 49 50 /* 51 * Strictly speaking, this reports the fixup destination, not 52 * the fault location, and not the actually overflowing 53 * instruction, which is the instruction before the "js", but 54 * since that instruction could be a variety of lengths, just 55 * report the location after the overflow, which should be close 56 * enough for finding the overflow, as it's at least back in 57 * the function, having returned from .text.unlikely. 58 */ 59 regs->ip = ex_fixup_addr(fixup); 60 61 /* 62 * This function has been called because either a negative refcount 63 * value was seen by any of the refcount functions, or a zero 64 * refcount value was seen by refcount_dec(). 65 * 66 * If we crossed from INT_MAX to INT_MIN, OF (Overflow Flag: result 67 * wrapped around) will be set. Additionally, seeing the refcount 68 * reach 0 will set ZF (Zero Flag: result was zero). In each of 69 * these cases we want a report, since it's a boundary condition. 70 * 71 */ 72 if (regs->flags & (X86_EFLAGS_OF | X86_EFLAGS_ZF)) { 73 bool zero = regs->flags & X86_EFLAGS_ZF; 74 75 refcount_error_report(regs, zero ? "hit zero" : "overflow"); 76 } 77 78 return true; 79 } 80 EXPORT_SYMBOL_GPL(ex_handler_refcount); 81 82 /* 83 * Handler for when we fail to restore a task's FPU state. We should never get 84 * here because the FPU state of a task using the FPU (task->thread.fpu.state) 85 * should always be valid. However, past bugs have allowed userspace to set 86 * reserved bits in the XSAVE area using PTRACE_SETREGSET or sys_rt_sigreturn(). 87 * These caused XRSTOR to fail when switching to the task, leaking the FPU 88 * registers of the task previously executing on the CPU. Mitigate this class 89 * of vulnerability by restoring from the initial state (essentially, zeroing 90 * out all the FPU registers) if we can't restore from the task's FPU state. 91 */ 92 bool ex_handler_fprestore(const struct exception_table_entry *fixup, 93 struct pt_regs *regs, int trapnr) 94 { 95 regs->ip = ex_fixup_addr(fixup); 96 97 WARN_ONCE(1, "Bad FPU state detected at %pB, reinitializing FPU registers.", 98 (void *)instruction_pointer(regs)); 99 100 __copy_kernel_to_fpregs(&init_fpstate, -1); 101 return true; 102 } 103 EXPORT_SYMBOL_GPL(ex_handler_fprestore); 104 105 bool ex_handler_ext(const struct exception_table_entry *fixup, 106 struct pt_regs *regs, int trapnr) 107 { 108 /* Special hack for uaccess_err */ 109 current->thread.uaccess_err = 1; 110 regs->ip = ex_fixup_addr(fixup); 111 return true; 112 } 113 EXPORT_SYMBOL(ex_handler_ext); 114 115 bool ex_handler_rdmsr_unsafe(const struct exception_table_entry *fixup, 116 struct pt_regs *regs, int trapnr) 117 { 118 if (pr_warn_once("unchecked MSR access error: RDMSR from 0x%x at rIP: 0x%lx (%pF)\n", 119 (unsigned int)regs->cx, regs->ip, (void *)regs->ip)) 120 show_stack_regs(regs); 121 122 /* Pretend that the read succeeded and returned 0. */ 123 regs->ip = ex_fixup_addr(fixup); 124 regs->ax = 0; 125 regs->dx = 0; 126 return true; 127 } 128 EXPORT_SYMBOL(ex_handler_rdmsr_unsafe); 129 130 bool ex_handler_wrmsr_unsafe(const struct exception_table_entry *fixup, 131 struct pt_regs *regs, int trapnr) 132 { 133 if (pr_warn_once("unchecked MSR access error: WRMSR to 0x%x (tried to write 0x%08x%08x) at rIP: 0x%lx (%pF)\n", 134 (unsigned int)regs->cx, (unsigned int)regs->dx, 135 (unsigned int)regs->ax, regs->ip, (void *)regs->ip)) 136 show_stack_regs(regs); 137 138 /* Pretend that the write succeeded. */ 139 regs->ip = ex_fixup_addr(fixup); 140 return true; 141 } 142 EXPORT_SYMBOL(ex_handler_wrmsr_unsafe); 143 144 bool ex_handler_clear_fs(const struct exception_table_entry *fixup, 145 struct pt_regs *regs, int trapnr) 146 { 147 if (static_cpu_has(X86_BUG_NULL_SEG)) 148 asm volatile ("mov %0, %%fs" : : "rm" (__USER_DS)); 149 asm volatile ("mov %0, %%fs" : : "rm" (0)); 150 return ex_handler_default(fixup, regs, trapnr); 151 } 152 EXPORT_SYMBOL(ex_handler_clear_fs); 153 154 bool ex_has_fault_handler(unsigned long ip) 155 { 156 const struct exception_table_entry *e; 157 ex_handler_t handler; 158 159 e = search_exception_tables(ip); 160 if (!e) 161 return false; 162 handler = ex_fixup_handler(e); 163 164 return handler == ex_handler_fault; 165 } 166 167 int fixup_exception(struct pt_regs *regs, int trapnr) 168 { 169 const struct exception_table_entry *e; 170 ex_handler_t handler; 171 172 #ifdef CONFIG_PNPBIOS 173 if (unlikely(SEGMENT_IS_PNP_CODE(regs->cs))) { 174 extern u32 pnp_bios_fault_eip, pnp_bios_fault_esp; 175 extern u32 pnp_bios_is_utter_crap; 176 pnp_bios_is_utter_crap = 1; 177 printk(KERN_CRIT "PNPBIOS fault.. attempting recovery.\n"); 178 __asm__ volatile( 179 "movl %0, %%esp\n\t" 180 "jmp *%1\n\t" 181 : : "g" (pnp_bios_fault_esp), "g" (pnp_bios_fault_eip)); 182 panic("do_trap: can't hit this"); 183 } 184 #endif 185 186 e = search_exception_tables(regs->ip); 187 if (!e) 188 return 0; 189 190 handler = ex_fixup_handler(e); 191 return handler(e, regs, trapnr); 192 } 193 194 extern unsigned int early_recursion_flag; 195 196 /* Restricted version used during very early boot */ 197 void __init early_fixup_exception(struct pt_regs *regs, int trapnr) 198 { 199 /* Ignore early NMIs. */ 200 if (trapnr == X86_TRAP_NMI) 201 return; 202 203 if (early_recursion_flag > 2) 204 goto halt_loop; 205 206 /* 207 * Old CPUs leave the high bits of CS on the stack 208 * undefined. I'm not sure which CPUs do this, but at least 209 * the 486 DX works this way. 210 */ 211 if (regs->cs != __KERNEL_CS) 212 goto fail; 213 214 /* 215 * The full exception fixup machinery is available as soon as 216 * the early IDT is loaded. This means that it is the 217 * responsibility of extable users to either function correctly 218 * when handlers are invoked early or to simply avoid causing 219 * exceptions before they're ready to handle them. 220 * 221 * This is better than filtering which handlers can be used, 222 * because refusing to call a handler here is guaranteed to 223 * result in a hard-to-debug panic. 224 * 225 * Keep in mind that not all vectors actually get here. Early 226 * fage faults, for example, are special. 227 */ 228 if (fixup_exception(regs, trapnr)) 229 return; 230 231 if (fixup_bug(regs, trapnr)) 232 return; 233 234 fail: 235 early_printk("PANIC: early exception 0x%02x IP %lx:%lx error %lx cr2 0x%lx\n", 236 (unsigned)trapnr, (unsigned long)regs->cs, regs->ip, 237 regs->orig_ax, read_cr2()); 238 239 show_regs(regs); 240 241 halt_loop: 242 while (true) 243 halt(); 244 } 245