1 #include <linux/extable.h> 2 #include <linux/uaccess.h> 3 #include <linux/sched/debug.h> 4 5 #include <asm/fpu/internal.h> 6 #include <asm/traps.h> 7 #include <asm/kdebug.h> 8 9 typedef bool (*ex_handler_t)(const struct exception_table_entry *, 10 struct pt_regs *, int); 11 12 static inline unsigned long 13 ex_fixup_addr(const struct exception_table_entry *x) 14 { 15 return (unsigned long)&x->fixup + x->fixup; 16 } 17 static inline ex_handler_t 18 ex_fixup_handler(const struct exception_table_entry *x) 19 { 20 return (ex_handler_t)((unsigned long)&x->handler + x->handler); 21 } 22 23 bool ex_handler_default(const struct exception_table_entry *fixup, 24 struct pt_regs *regs, int trapnr) 25 { 26 regs->ip = ex_fixup_addr(fixup); 27 return true; 28 } 29 EXPORT_SYMBOL(ex_handler_default); 30 31 bool ex_handler_fault(const struct exception_table_entry *fixup, 32 struct pt_regs *regs, int trapnr) 33 { 34 regs->ip = ex_fixup_addr(fixup); 35 regs->ax = trapnr; 36 return true; 37 } 38 EXPORT_SYMBOL_GPL(ex_handler_fault); 39 40 /* 41 * Handler for UD0 exception following a failed test against the 42 * result of a refcount inc/dec/add/sub. 43 */ 44 bool ex_handler_refcount(const struct exception_table_entry *fixup, 45 struct pt_regs *regs, int trapnr) 46 { 47 /* First unconditionally saturate the refcount. */ 48 *(int *)regs->cx = INT_MIN / 2; 49 50 /* 51 * Strictly speaking, this reports the fixup destination, not 52 * the fault location, and not the actually overflowing 53 * instruction, which is the instruction before the "js", but 54 * since that instruction could be a variety of lengths, just 55 * report the location after the overflow, which should be close 56 * enough for finding the overflow, as it's at least back in 57 * the function, having returned from .text.unlikely. 58 */ 59 regs->ip = ex_fixup_addr(fixup); 60 61 /* 62 * This function has been called because either a negative refcount 63 * value was seen by any of the refcount functions, or a zero 64 * refcount value was seen by refcount_dec(). 65 * 66 * If we crossed from INT_MAX to INT_MIN, OF (Overflow Flag: result 67 * wrapped around) will be set. Additionally, seeing the refcount 68 * reach 0 will set ZF (Zero Flag: result was zero). In each of 69 * these cases we want a report, since it's a boundary condition. 70 * The SF case is not reported since it indicates post-boundary 71 * manipulations below zero or above INT_MAX. And if none of the 72 * flags are set, something has gone very wrong, so report it. 73 */ 74 if (regs->flags & (X86_EFLAGS_OF | X86_EFLAGS_ZF)) { 75 bool zero = regs->flags & X86_EFLAGS_ZF; 76 77 refcount_error_report(regs, zero ? "hit zero" : "overflow"); 78 } else if ((regs->flags & X86_EFLAGS_SF) == 0) { 79 /* Report if none of OF, ZF, nor SF are set. */ 80 refcount_error_report(regs, "unexpected saturation"); 81 } 82 83 return true; 84 } 85 EXPORT_SYMBOL_GPL(ex_handler_refcount); 86 87 /* 88 * Handler for when we fail to restore a task's FPU state. We should never get 89 * here because the FPU state of a task using the FPU (task->thread.fpu.state) 90 * should always be valid. However, past bugs have allowed userspace to set 91 * reserved bits in the XSAVE area using PTRACE_SETREGSET or sys_rt_sigreturn(). 92 * These caused XRSTOR to fail when switching to the task, leaking the FPU 93 * registers of the task previously executing on the CPU. Mitigate this class 94 * of vulnerability by restoring from the initial state (essentially, zeroing 95 * out all the FPU registers) if we can't restore from the task's FPU state. 96 */ 97 bool ex_handler_fprestore(const struct exception_table_entry *fixup, 98 struct pt_regs *regs, int trapnr) 99 { 100 regs->ip = ex_fixup_addr(fixup); 101 102 WARN_ONCE(1, "Bad FPU state detected at %pB, reinitializing FPU registers.", 103 (void *)instruction_pointer(regs)); 104 105 __copy_kernel_to_fpregs(&init_fpstate, -1); 106 return true; 107 } 108 EXPORT_SYMBOL_GPL(ex_handler_fprestore); 109 110 bool ex_handler_ext(const struct exception_table_entry *fixup, 111 struct pt_regs *regs, int trapnr) 112 { 113 /* Special hack for uaccess_err */ 114 current->thread.uaccess_err = 1; 115 regs->ip = ex_fixup_addr(fixup); 116 return true; 117 } 118 EXPORT_SYMBOL(ex_handler_ext); 119 120 bool ex_handler_rdmsr_unsafe(const struct exception_table_entry *fixup, 121 struct pt_regs *regs, int trapnr) 122 { 123 if (pr_warn_once("unchecked MSR access error: RDMSR from 0x%x at rIP: 0x%lx (%pF)\n", 124 (unsigned int)regs->cx, regs->ip, (void *)regs->ip)) 125 show_stack_regs(regs); 126 127 /* Pretend that the read succeeded and returned 0. */ 128 regs->ip = ex_fixup_addr(fixup); 129 regs->ax = 0; 130 regs->dx = 0; 131 return true; 132 } 133 EXPORT_SYMBOL(ex_handler_rdmsr_unsafe); 134 135 bool ex_handler_wrmsr_unsafe(const struct exception_table_entry *fixup, 136 struct pt_regs *regs, int trapnr) 137 { 138 if (pr_warn_once("unchecked MSR access error: WRMSR to 0x%x (tried to write 0x%08x%08x) at rIP: 0x%lx (%pF)\n", 139 (unsigned int)regs->cx, (unsigned int)regs->dx, 140 (unsigned int)regs->ax, regs->ip, (void *)regs->ip)) 141 show_stack_regs(regs); 142 143 /* Pretend that the write succeeded. */ 144 regs->ip = ex_fixup_addr(fixup); 145 return true; 146 } 147 EXPORT_SYMBOL(ex_handler_wrmsr_unsafe); 148 149 bool ex_handler_clear_fs(const struct exception_table_entry *fixup, 150 struct pt_regs *regs, int trapnr) 151 { 152 if (static_cpu_has(X86_BUG_NULL_SEG)) 153 asm volatile ("mov %0, %%fs" : : "rm" (__USER_DS)); 154 asm volatile ("mov %0, %%fs" : : "rm" (0)); 155 return ex_handler_default(fixup, regs, trapnr); 156 } 157 EXPORT_SYMBOL(ex_handler_clear_fs); 158 159 bool ex_has_fault_handler(unsigned long ip) 160 { 161 const struct exception_table_entry *e; 162 ex_handler_t handler; 163 164 e = search_exception_tables(ip); 165 if (!e) 166 return false; 167 handler = ex_fixup_handler(e); 168 169 return handler == ex_handler_fault; 170 } 171 172 int fixup_exception(struct pt_regs *regs, int trapnr) 173 { 174 const struct exception_table_entry *e; 175 ex_handler_t handler; 176 177 #ifdef CONFIG_PNPBIOS 178 if (unlikely(SEGMENT_IS_PNP_CODE(regs->cs))) { 179 extern u32 pnp_bios_fault_eip, pnp_bios_fault_esp; 180 extern u32 pnp_bios_is_utter_crap; 181 pnp_bios_is_utter_crap = 1; 182 printk(KERN_CRIT "PNPBIOS fault.. attempting recovery.\n"); 183 __asm__ volatile( 184 "movl %0, %%esp\n\t" 185 "jmp *%1\n\t" 186 : : "g" (pnp_bios_fault_esp), "g" (pnp_bios_fault_eip)); 187 panic("do_trap: can't hit this"); 188 } 189 #endif 190 191 e = search_exception_tables(regs->ip); 192 if (!e) 193 return 0; 194 195 handler = ex_fixup_handler(e); 196 return handler(e, regs, trapnr); 197 } 198 199 extern unsigned int early_recursion_flag; 200 201 /* Restricted version used during very early boot */ 202 void __init early_fixup_exception(struct pt_regs *regs, int trapnr) 203 { 204 /* Ignore early NMIs. */ 205 if (trapnr == X86_TRAP_NMI) 206 return; 207 208 if (early_recursion_flag > 2) 209 goto halt_loop; 210 211 /* 212 * Old CPUs leave the high bits of CS on the stack 213 * undefined. I'm not sure which CPUs do this, but at least 214 * the 486 DX works this way. 215 */ 216 if (regs->cs != __KERNEL_CS) 217 goto fail; 218 219 /* 220 * The full exception fixup machinery is available as soon as 221 * the early IDT is loaded. This means that it is the 222 * responsibility of extable users to either function correctly 223 * when handlers are invoked early or to simply avoid causing 224 * exceptions before they're ready to handle them. 225 * 226 * This is better than filtering which handlers can be used, 227 * because refusing to call a handler here is guaranteed to 228 * result in a hard-to-debug panic. 229 * 230 * Keep in mind that not all vectors actually get here. Early 231 * fage faults, for example, are special. 232 */ 233 if (fixup_exception(regs, trapnr)) 234 return; 235 236 if (fixup_bug(regs, trapnr)) 237 return; 238 239 fail: 240 early_printk("PANIC: early exception 0x%02x IP %lx:%lx error %lx cr2 0x%lx\n", 241 (unsigned)trapnr, (unsigned long)regs->cs, regs->ip, 242 regs->orig_ax, read_cr2()); 243 244 show_regs(regs); 245 246 halt_loop: 247 while (true) 248 halt(); 249 } 250