1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef ARCH_X86_KVM_X86_H 3 #define ARCH_X86_KVM_X86_H 4 5 #include <linux/kvm_host.h> 6 #include <asm/pvclock.h> 7 #include "kvm_cache_regs.h" 8 9 #define KVM_DEFAULT_PLE_GAP 128 10 #define KVM_VMX_DEFAULT_PLE_WINDOW 4096 11 #define KVM_DEFAULT_PLE_WINDOW_GROW 2 12 #define KVM_DEFAULT_PLE_WINDOW_SHRINK 0 13 #define KVM_VMX_DEFAULT_PLE_WINDOW_MAX UINT_MAX 14 #define KVM_SVM_DEFAULT_PLE_WINDOW_MAX USHRT_MAX 15 #define KVM_SVM_DEFAULT_PLE_WINDOW 3000 16 17 static inline unsigned int __grow_ple_window(unsigned int val, 18 unsigned int base, unsigned int modifier, unsigned int max) 19 { 20 u64 ret = val; 21 22 if (modifier < 1) 23 return base; 24 25 if (modifier < base) 26 ret *= modifier; 27 else 28 ret += modifier; 29 30 return min(ret, (u64)max); 31 } 32 33 static inline unsigned int __shrink_ple_window(unsigned int val, 34 unsigned int base, unsigned int modifier, unsigned int min) 35 { 36 if (modifier < 1) 37 return base; 38 39 if (modifier < base) 40 val /= modifier; 41 else 42 val -= modifier; 43 44 return max(val, min); 45 } 46 47 #define MSR_IA32_CR_PAT_DEFAULT 0x0007040600070406ULL 48 49 static inline void kvm_clear_exception_queue(struct kvm_vcpu *vcpu) 50 { 51 vcpu->arch.exception.pending = false; 52 vcpu->arch.exception.injected = false; 53 } 54 55 static inline void kvm_queue_interrupt(struct kvm_vcpu *vcpu, u8 vector, 56 bool soft) 57 { 58 vcpu->arch.interrupt.injected = true; 59 vcpu->arch.interrupt.soft = soft; 60 vcpu->arch.interrupt.nr = vector; 61 } 62 63 static inline void kvm_clear_interrupt_queue(struct kvm_vcpu *vcpu) 64 { 65 vcpu->arch.interrupt.injected = false; 66 } 67 68 static inline bool kvm_event_needs_reinjection(struct kvm_vcpu *vcpu) 69 { 70 return vcpu->arch.exception.injected || vcpu->arch.interrupt.injected || 71 vcpu->arch.nmi_injected; 72 } 73 74 static inline bool kvm_exception_is_soft(unsigned int nr) 75 { 76 return (nr == BP_VECTOR) || (nr == OF_VECTOR); 77 } 78 79 static inline bool is_protmode(struct kvm_vcpu *vcpu) 80 { 81 return kvm_read_cr0_bits(vcpu, X86_CR0_PE); 82 } 83 84 static inline int is_long_mode(struct kvm_vcpu *vcpu) 85 { 86 #ifdef CONFIG_X86_64 87 return vcpu->arch.efer & EFER_LMA; 88 #else 89 return 0; 90 #endif 91 } 92 93 static inline bool is_64_bit_mode(struct kvm_vcpu *vcpu) 94 { 95 int cs_db, cs_l; 96 97 if (!is_long_mode(vcpu)) 98 return false; 99 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l); 100 return cs_l; 101 } 102 103 static inline bool is_la57_mode(struct kvm_vcpu *vcpu) 104 { 105 #ifdef CONFIG_X86_64 106 return (vcpu->arch.efer & EFER_LMA) && 107 kvm_read_cr4_bits(vcpu, X86_CR4_LA57); 108 #else 109 return 0; 110 #endif 111 } 112 113 static inline bool x86_exception_has_error_code(unsigned int vector) 114 { 115 static u32 exception_has_error_code = BIT(DF_VECTOR) | BIT(TS_VECTOR) | 116 BIT(NP_VECTOR) | BIT(SS_VECTOR) | BIT(GP_VECTOR) | 117 BIT(PF_VECTOR) | BIT(AC_VECTOR); 118 119 return (1U << vector) & exception_has_error_code; 120 } 121 122 static inline bool mmu_is_nested(struct kvm_vcpu *vcpu) 123 { 124 return vcpu->arch.walk_mmu == &vcpu->arch.nested_mmu; 125 } 126 127 static inline int is_pae(struct kvm_vcpu *vcpu) 128 { 129 return kvm_read_cr4_bits(vcpu, X86_CR4_PAE); 130 } 131 132 static inline int is_pse(struct kvm_vcpu *vcpu) 133 { 134 return kvm_read_cr4_bits(vcpu, X86_CR4_PSE); 135 } 136 137 static inline int is_paging(struct kvm_vcpu *vcpu) 138 { 139 return likely(kvm_read_cr0_bits(vcpu, X86_CR0_PG)); 140 } 141 142 static inline bool is_pae_paging(struct kvm_vcpu *vcpu) 143 { 144 return !is_long_mode(vcpu) && is_pae(vcpu) && is_paging(vcpu); 145 } 146 147 static inline u8 vcpu_virt_addr_bits(struct kvm_vcpu *vcpu) 148 { 149 return kvm_read_cr4_bits(vcpu, X86_CR4_LA57) ? 57 : 48; 150 } 151 152 static inline u8 ctxt_virt_addr_bits(struct x86_emulate_ctxt *ctxt) 153 { 154 return (ctxt->ops->get_cr(ctxt, 4) & X86_CR4_LA57) ? 57 : 48; 155 } 156 157 static inline u64 get_canonical(u64 la, u8 vaddr_bits) 158 { 159 return ((int64_t)la << (64 - vaddr_bits)) >> (64 - vaddr_bits); 160 } 161 162 static inline bool is_noncanonical_address(u64 la, struct kvm_vcpu *vcpu) 163 { 164 return get_canonical(la, vcpu_virt_addr_bits(vcpu)) != la; 165 } 166 167 static inline bool emul_is_noncanonical_address(u64 la, 168 struct x86_emulate_ctxt *ctxt) 169 { 170 return get_canonical(la, ctxt_virt_addr_bits(ctxt)) != la; 171 } 172 173 static inline void vcpu_cache_mmio_info(struct kvm_vcpu *vcpu, 174 gva_t gva, gfn_t gfn, unsigned access) 175 { 176 u64 gen = kvm_memslots(vcpu->kvm)->generation; 177 178 if (unlikely(gen & KVM_MEMSLOT_GEN_UPDATE_IN_PROGRESS)) 179 return; 180 181 /* 182 * If this is a shadow nested page table, the "GVA" is 183 * actually a nGPA. 184 */ 185 vcpu->arch.mmio_gva = mmu_is_nested(vcpu) ? 0 : gva & PAGE_MASK; 186 vcpu->arch.mmio_access = access; 187 vcpu->arch.mmio_gfn = gfn; 188 vcpu->arch.mmio_gen = gen; 189 } 190 191 static inline bool vcpu_match_mmio_gen(struct kvm_vcpu *vcpu) 192 { 193 return vcpu->arch.mmio_gen == kvm_memslots(vcpu->kvm)->generation; 194 } 195 196 /* 197 * Clear the mmio cache info for the given gva. If gva is MMIO_GVA_ANY, we 198 * clear all mmio cache info. 199 */ 200 #define MMIO_GVA_ANY (~(gva_t)0) 201 202 static inline void vcpu_clear_mmio_info(struct kvm_vcpu *vcpu, gva_t gva) 203 { 204 if (gva != MMIO_GVA_ANY && vcpu->arch.mmio_gva != (gva & PAGE_MASK)) 205 return; 206 207 vcpu->arch.mmio_gva = 0; 208 } 209 210 static inline bool vcpu_match_mmio_gva(struct kvm_vcpu *vcpu, unsigned long gva) 211 { 212 if (vcpu_match_mmio_gen(vcpu) && vcpu->arch.mmio_gva && 213 vcpu->arch.mmio_gva == (gva & PAGE_MASK)) 214 return true; 215 216 return false; 217 } 218 219 static inline bool vcpu_match_mmio_gpa(struct kvm_vcpu *vcpu, gpa_t gpa) 220 { 221 if (vcpu_match_mmio_gen(vcpu) && vcpu->arch.mmio_gfn && 222 vcpu->arch.mmio_gfn == gpa >> PAGE_SHIFT) 223 return true; 224 225 return false; 226 } 227 228 static inline unsigned long kvm_register_readl(struct kvm_vcpu *vcpu, int reg) 229 { 230 unsigned long val = kvm_register_read(vcpu, reg); 231 232 return is_64_bit_mode(vcpu) ? val : (u32)val; 233 } 234 235 static inline void kvm_register_writel(struct kvm_vcpu *vcpu, 236 int reg, unsigned long val) 237 { 238 if (!is_64_bit_mode(vcpu)) 239 val = (u32)val; 240 return kvm_register_write(vcpu, reg, val); 241 } 242 243 static inline bool kvm_check_has_quirk(struct kvm *kvm, u64 quirk) 244 { 245 return !(kvm->arch.disabled_quirks & quirk); 246 } 247 248 static inline bool kvm_vcpu_latch_init(struct kvm_vcpu *vcpu) 249 { 250 return is_smm(vcpu) || kvm_x86_ops->apic_init_signal_blocked(vcpu); 251 } 252 253 void kvm_set_pending_timer(struct kvm_vcpu *vcpu); 254 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip); 255 256 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr); 257 u64 get_kvmclock_ns(struct kvm *kvm); 258 259 int kvm_read_guest_virt(struct kvm_vcpu *vcpu, 260 gva_t addr, void *val, unsigned int bytes, 261 struct x86_exception *exception); 262 263 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, 264 gva_t addr, void *val, unsigned int bytes, 265 struct x86_exception *exception); 266 267 int handle_ud(struct kvm_vcpu *vcpu); 268 269 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu); 270 271 void kvm_vcpu_mtrr_init(struct kvm_vcpu *vcpu); 272 u8 kvm_mtrr_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn); 273 bool kvm_mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data); 274 int kvm_mtrr_set_msr(struct kvm_vcpu *vcpu, u32 msr, u64 data); 275 int kvm_mtrr_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata); 276 bool kvm_mtrr_check_gfn_range_consistency(struct kvm_vcpu *vcpu, gfn_t gfn, 277 int page_num); 278 bool kvm_vector_hashing_enabled(void); 279 int x86_emulate_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, 280 int emulation_type, void *insn, int insn_len); 281 enum exit_fastpath_completion handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu); 282 283 #define KVM_SUPPORTED_XCR0 (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \ 284 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \ 285 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \ 286 | XFEATURE_MASK_PKRU) 287 extern u64 host_xcr0; 288 289 extern u64 kvm_supported_xcr0(void); 290 291 extern unsigned int min_timer_period_us; 292 293 extern bool enable_vmware_backdoor; 294 295 extern int pi_inject_timer; 296 297 extern struct static_key kvm_no_apic_vcpu; 298 299 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec) 300 { 301 return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult, 302 vcpu->arch.virtual_tsc_shift); 303 } 304 305 /* Same "calling convention" as do_div: 306 * - divide (n << 32) by base 307 * - put result in n 308 * - return remainder 309 */ 310 #define do_shl32_div32(n, base) \ 311 ({ \ 312 u32 __quot, __rem; \ 313 asm("divl %2" : "=a" (__quot), "=d" (__rem) \ 314 : "rm" (base), "0" (0), "1" ((u32) n)); \ 315 n = __quot; \ 316 __rem; \ 317 }) 318 319 static inline bool kvm_mwait_in_guest(struct kvm *kvm) 320 { 321 return kvm->arch.mwait_in_guest; 322 } 323 324 static inline bool kvm_hlt_in_guest(struct kvm *kvm) 325 { 326 return kvm->arch.hlt_in_guest; 327 } 328 329 static inline bool kvm_pause_in_guest(struct kvm *kvm) 330 { 331 return kvm->arch.pause_in_guest; 332 } 333 334 static inline bool kvm_cstate_in_guest(struct kvm *kvm) 335 { 336 return kvm->arch.cstate_in_guest; 337 } 338 339 DECLARE_PER_CPU(struct kvm_vcpu *, current_vcpu); 340 341 static inline void kvm_before_interrupt(struct kvm_vcpu *vcpu) 342 { 343 __this_cpu_write(current_vcpu, vcpu); 344 } 345 346 static inline void kvm_after_interrupt(struct kvm_vcpu *vcpu) 347 { 348 __this_cpu_write(current_vcpu, NULL); 349 } 350 351 352 static inline bool kvm_pat_valid(u64 data) 353 { 354 if (data & 0xF8F8F8F8F8F8F8F8ull) 355 return false; 356 /* 0, 1, 4, 5, 6, 7 are valid values. */ 357 return (data | ((data & 0x0202020202020202ull) << 1)) == data; 358 } 359 360 static inline bool kvm_dr7_valid(u64 data) 361 { 362 /* Bits [63:32] are reserved */ 363 return !(data >> 32); 364 } 365 366 void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu); 367 void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu); 368 u64 kvm_spec_ctrl_valid_bits(struct kvm_vcpu *vcpu); 369 370 #endif 371