1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef ARCH_X86_KVM_X86_H 3 #define ARCH_X86_KVM_X86_H 4 5 #include <linux/kvm_host.h> 6 #include <asm/mce.h> 7 #include <asm/pvclock.h> 8 #include "kvm_cache_regs.h" 9 #include "kvm_emulate.h" 10 11 struct kvm_caps { 12 /* control of guest tsc rate supported? */ 13 bool has_tsc_control; 14 /* maximum supported tsc_khz for guests */ 15 u32 max_guest_tsc_khz; 16 /* number of bits of the fractional part of the TSC scaling ratio */ 17 u8 tsc_scaling_ratio_frac_bits; 18 /* maximum allowed value of TSC scaling ratio */ 19 u64 max_tsc_scaling_ratio; 20 /* 1ull << kvm_caps.tsc_scaling_ratio_frac_bits */ 21 u64 default_tsc_scaling_ratio; 22 /* bus lock detection supported? */ 23 bool has_bus_lock_exit; 24 /* notify VM exit supported? */ 25 bool has_notify_vmexit; 26 27 u64 supported_mce_cap; 28 u64 supported_xcr0; 29 u64 supported_xss; 30 }; 31 32 void kvm_spurious_fault(void); 33 34 #define KVM_NESTED_VMENTER_CONSISTENCY_CHECK(consistency_check) \ 35 ({ \ 36 bool failed = (consistency_check); \ 37 if (failed) \ 38 trace_kvm_nested_vmenter_failed(#consistency_check, 0); \ 39 failed; \ 40 }) 41 42 #define KVM_DEFAULT_PLE_GAP 128 43 #define KVM_VMX_DEFAULT_PLE_WINDOW 4096 44 #define KVM_DEFAULT_PLE_WINDOW_GROW 2 45 #define KVM_DEFAULT_PLE_WINDOW_SHRINK 0 46 #define KVM_VMX_DEFAULT_PLE_WINDOW_MAX UINT_MAX 47 #define KVM_SVM_DEFAULT_PLE_WINDOW_MAX USHRT_MAX 48 #define KVM_SVM_DEFAULT_PLE_WINDOW 3000 49 50 static inline unsigned int __grow_ple_window(unsigned int val, 51 unsigned int base, unsigned int modifier, unsigned int max) 52 { 53 u64 ret = val; 54 55 if (modifier < 1) 56 return base; 57 58 if (modifier < base) 59 ret *= modifier; 60 else 61 ret += modifier; 62 63 return min(ret, (u64)max); 64 } 65 66 static inline unsigned int __shrink_ple_window(unsigned int val, 67 unsigned int base, unsigned int modifier, unsigned int min) 68 { 69 if (modifier < 1) 70 return base; 71 72 if (modifier < base) 73 val /= modifier; 74 else 75 val -= modifier; 76 77 return max(val, min); 78 } 79 80 #define MSR_IA32_CR_PAT_DEFAULT 0x0007040600070406ULL 81 82 void kvm_service_local_tlb_flush_requests(struct kvm_vcpu *vcpu); 83 int kvm_check_nested_events(struct kvm_vcpu *vcpu); 84 85 static inline void kvm_clear_exception_queue(struct kvm_vcpu *vcpu) 86 { 87 vcpu->arch.exception.pending = false; 88 vcpu->arch.exception.injected = false; 89 } 90 91 static inline void kvm_queue_interrupt(struct kvm_vcpu *vcpu, u8 vector, 92 bool soft) 93 { 94 vcpu->arch.interrupt.injected = true; 95 vcpu->arch.interrupt.soft = soft; 96 vcpu->arch.interrupt.nr = vector; 97 } 98 99 static inline void kvm_clear_interrupt_queue(struct kvm_vcpu *vcpu) 100 { 101 vcpu->arch.interrupt.injected = false; 102 } 103 104 static inline bool kvm_event_needs_reinjection(struct kvm_vcpu *vcpu) 105 { 106 return vcpu->arch.exception.injected || vcpu->arch.interrupt.injected || 107 vcpu->arch.nmi_injected; 108 } 109 110 static inline bool kvm_exception_is_soft(unsigned int nr) 111 { 112 return (nr == BP_VECTOR) || (nr == OF_VECTOR); 113 } 114 115 static inline bool is_protmode(struct kvm_vcpu *vcpu) 116 { 117 return kvm_read_cr0_bits(vcpu, X86_CR0_PE); 118 } 119 120 static inline int is_long_mode(struct kvm_vcpu *vcpu) 121 { 122 #ifdef CONFIG_X86_64 123 return vcpu->arch.efer & EFER_LMA; 124 #else 125 return 0; 126 #endif 127 } 128 129 static inline bool is_64_bit_mode(struct kvm_vcpu *vcpu) 130 { 131 int cs_db, cs_l; 132 133 WARN_ON_ONCE(vcpu->arch.guest_state_protected); 134 135 if (!is_long_mode(vcpu)) 136 return false; 137 static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l); 138 return cs_l; 139 } 140 141 static inline bool is_64_bit_hypercall(struct kvm_vcpu *vcpu) 142 { 143 /* 144 * If running with protected guest state, the CS register is not 145 * accessible. The hypercall register values will have had to been 146 * provided in 64-bit mode, so assume the guest is in 64-bit. 147 */ 148 return vcpu->arch.guest_state_protected || is_64_bit_mode(vcpu); 149 } 150 151 static inline bool x86_exception_has_error_code(unsigned int vector) 152 { 153 static u32 exception_has_error_code = BIT(DF_VECTOR) | BIT(TS_VECTOR) | 154 BIT(NP_VECTOR) | BIT(SS_VECTOR) | BIT(GP_VECTOR) | 155 BIT(PF_VECTOR) | BIT(AC_VECTOR); 156 157 return (1U << vector) & exception_has_error_code; 158 } 159 160 static inline bool mmu_is_nested(struct kvm_vcpu *vcpu) 161 { 162 return vcpu->arch.walk_mmu == &vcpu->arch.nested_mmu; 163 } 164 165 static inline int is_pae(struct kvm_vcpu *vcpu) 166 { 167 return kvm_read_cr4_bits(vcpu, X86_CR4_PAE); 168 } 169 170 static inline int is_pse(struct kvm_vcpu *vcpu) 171 { 172 return kvm_read_cr4_bits(vcpu, X86_CR4_PSE); 173 } 174 175 static inline int is_paging(struct kvm_vcpu *vcpu) 176 { 177 return likely(kvm_read_cr0_bits(vcpu, X86_CR0_PG)); 178 } 179 180 static inline bool is_pae_paging(struct kvm_vcpu *vcpu) 181 { 182 return !is_long_mode(vcpu) && is_pae(vcpu) && is_paging(vcpu); 183 } 184 185 static inline u8 vcpu_virt_addr_bits(struct kvm_vcpu *vcpu) 186 { 187 return kvm_read_cr4_bits(vcpu, X86_CR4_LA57) ? 57 : 48; 188 } 189 190 static inline bool is_noncanonical_address(u64 la, struct kvm_vcpu *vcpu) 191 { 192 return !__is_canonical_address(la, vcpu_virt_addr_bits(vcpu)); 193 } 194 195 static inline void vcpu_cache_mmio_info(struct kvm_vcpu *vcpu, 196 gva_t gva, gfn_t gfn, unsigned access) 197 { 198 u64 gen = kvm_memslots(vcpu->kvm)->generation; 199 200 if (unlikely(gen & KVM_MEMSLOT_GEN_UPDATE_IN_PROGRESS)) 201 return; 202 203 /* 204 * If this is a shadow nested page table, the "GVA" is 205 * actually a nGPA. 206 */ 207 vcpu->arch.mmio_gva = mmu_is_nested(vcpu) ? 0 : gva & PAGE_MASK; 208 vcpu->arch.mmio_access = access; 209 vcpu->arch.mmio_gfn = gfn; 210 vcpu->arch.mmio_gen = gen; 211 } 212 213 static inline bool vcpu_match_mmio_gen(struct kvm_vcpu *vcpu) 214 { 215 return vcpu->arch.mmio_gen == kvm_memslots(vcpu->kvm)->generation; 216 } 217 218 /* 219 * Clear the mmio cache info for the given gva. If gva is MMIO_GVA_ANY, we 220 * clear all mmio cache info. 221 */ 222 #define MMIO_GVA_ANY (~(gva_t)0) 223 224 static inline void vcpu_clear_mmio_info(struct kvm_vcpu *vcpu, gva_t gva) 225 { 226 if (gva != MMIO_GVA_ANY && vcpu->arch.mmio_gva != (gva & PAGE_MASK)) 227 return; 228 229 vcpu->arch.mmio_gva = 0; 230 } 231 232 static inline bool vcpu_match_mmio_gva(struct kvm_vcpu *vcpu, unsigned long gva) 233 { 234 if (vcpu_match_mmio_gen(vcpu) && vcpu->arch.mmio_gva && 235 vcpu->arch.mmio_gva == (gva & PAGE_MASK)) 236 return true; 237 238 return false; 239 } 240 241 static inline bool vcpu_match_mmio_gpa(struct kvm_vcpu *vcpu, gpa_t gpa) 242 { 243 if (vcpu_match_mmio_gen(vcpu) && vcpu->arch.mmio_gfn && 244 vcpu->arch.mmio_gfn == gpa >> PAGE_SHIFT) 245 return true; 246 247 return false; 248 } 249 250 static inline unsigned long kvm_register_read(struct kvm_vcpu *vcpu, int reg) 251 { 252 unsigned long val = kvm_register_read_raw(vcpu, reg); 253 254 return is_64_bit_mode(vcpu) ? val : (u32)val; 255 } 256 257 static inline void kvm_register_write(struct kvm_vcpu *vcpu, 258 int reg, unsigned long val) 259 { 260 if (!is_64_bit_mode(vcpu)) 261 val = (u32)val; 262 return kvm_register_write_raw(vcpu, reg, val); 263 } 264 265 static inline bool kvm_check_has_quirk(struct kvm *kvm, u64 quirk) 266 { 267 return !(kvm->arch.disabled_quirks & quirk); 268 } 269 270 static inline bool kvm_vcpu_latch_init(struct kvm_vcpu *vcpu) 271 { 272 return is_smm(vcpu) || static_call(kvm_x86_apic_init_signal_blocked)(vcpu); 273 } 274 275 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip); 276 277 u64 get_kvmclock_ns(struct kvm *kvm); 278 279 int kvm_read_guest_virt(struct kvm_vcpu *vcpu, 280 gva_t addr, void *val, unsigned int bytes, 281 struct x86_exception *exception); 282 283 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, 284 gva_t addr, void *val, unsigned int bytes, 285 struct x86_exception *exception); 286 287 int handle_ud(struct kvm_vcpu *vcpu); 288 289 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu); 290 291 void kvm_vcpu_mtrr_init(struct kvm_vcpu *vcpu); 292 u8 kvm_mtrr_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn); 293 bool kvm_mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data); 294 int kvm_mtrr_set_msr(struct kvm_vcpu *vcpu, u32 msr, u64 data); 295 int kvm_mtrr_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata); 296 bool kvm_mtrr_check_gfn_range_consistency(struct kvm_vcpu *vcpu, gfn_t gfn, 297 int page_num); 298 bool kvm_vector_hashing_enabled(void); 299 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu *vcpu, gva_t gva, u16 error_code); 300 int x86_decode_emulated_instruction(struct kvm_vcpu *vcpu, int emulation_type, 301 void *insn, int insn_len); 302 int x86_emulate_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, 303 int emulation_type, void *insn, int insn_len); 304 fastpath_t handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu); 305 306 extern u64 host_xcr0; 307 extern u64 host_xss; 308 309 extern struct kvm_caps kvm_caps; 310 311 extern bool enable_pmu; 312 313 static inline bool kvm_mpx_supported(void) 314 { 315 return (kvm_caps.supported_xcr0 & (XFEATURE_MASK_BNDREGS | XFEATURE_MASK_BNDCSR)) 316 == (XFEATURE_MASK_BNDREGS | XFEATURE_MASK_BNDCSR); 317 } 318 319 extern unsigned int min_timer_period_us; 320 321 extern bool enable_vmware_backdoor; 322 323 extern int pi_inject_timer; 324 325 extern bool report_ignored_msrs; 326 327 extern bool eager_page_split; 328 329 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec) 330 { 331 return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult, 332 vcpu->arch.virtual_tsc_shift); 333 } 334 335 /* Same "calling convention" as do_div: 336 * - divide (n << 32) by base 337 * - put result in n 338 * - return remainder 339 */ 340 #define do_shl32_div32(n, base) \ 341 ({ \ 342 u32 __quot, __rem; \ 343 asm("divl %2" : "=a" (__quot), "=d" (__rem) \ 344 : "rm" (base), "0" (0), "1" ((u32) n)); \ 345 n = __quot; \ 346 __rem; \ 347 }) 348 349 static inline bool kvm_mwait_in_guest(struct kvm *kvm) 350 { 351 return kvm->arch.mwait_in_guest; 352 } 353 354 static inline bool kvm_hlt_in_guest(struct kvm *kvm) 355 { 356 return kvm->arch.hlt_in_guest; 357 } 358 359 static inline bool kvm_pause_in_guest(struct kvm *kvm) 360 { 361 return kvm->arch.pause_in_guest; 362 } 363 364 static inline bool kvm_cstate_in_guest(struct kvm *kvm) 365 { 366 return kvm->arch.cstate_in_guest; 367 } 368 369 static inline bool kvm_notify_vmexit_enabled(struct kvm *kvm) 370 { 371 return kvm->arch.notify_vmexit_flags & KVM_X86_NOTIFY_VMEXIT_ENABLED; 372 } 373 374 enum kvm_intr_type { 375 /* Values are arbitrary, but must be non-zero. */ 376 KVM_HANDLING_IRQ = 1, 377 KVM_HANDLING_NMI, 378 }; 379 380 static inline void kvm_before_interrupt(struct kvm_vcpu *vcpu, 381 enum kvm_intr_type intr) 382 { 383 WRITE_ONCE(vcpu->arch.handling_intr_from_guest, (u8)intr); 384 } 385 386 static inline void kvm_after_interrupt(struct kvm_vcpu *vcpu) 387 { 388 WRITE_ONCE(vcpu->arch.handling_intr_from_guest, 0); 389 } 390 391 static inline bool kvm_handling_nmi_from_guest(struct kvm_vcpu *vcpu) 392 { 393 return vcpu->arch.handling_intr_from_guest == KVM_HANDLING_NMI; 394 } 395 396 static inline bool kvm_pat_valid(u64 data) 397 { 398 if (data & 0xF8F8F8F8F8F8F8F8ull) 399 return false; 400 /* 0, 1, 4, 5, 6, 7 are valid values. */ 401 return (data | ((data & 0x0202020202020202ull) << 1)) == data; 402 } 403 404 static inline bool kvm_dr7_valid(u64 data) 405 { 406 /* Bits [63:32] are reserved */ 407 return !(data >> 32); 408 } 409 static inline bool kvm_dr6_valid(u64 data) 410 { 411 /* Bits [63:32] are reserved */ 412 return !(data >> 32); 413 } 414 415 /* 416 * Trigger machine check on the host. We assume all the MSRs are already set up 417 * by the CPU and that we still run on the same CPU as the MCE occurred on. 418 * We pass a fake environment to the machine check handler because we want 419 * the guest to be always treated like user space, no matter what context 420 * it used internally. 421 */ 422 static inline void kvm_machine_check(void) 423 { 424 #if defined(CONFIG_X86_MCE) 425 struct pt_regs regs = { 426 .cs = 3, /* Fake ring 3 no matter what the guest ran on */ 427 .flags = X86_EFLAGS_IF, 428 }; 429 430 do_machine_check(®s); 431 #endif 432 } 433 434 void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu); 435 void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu); 436 int kvm_spec_ctrl_test_value(u64 value); 437 bool __kvm_is_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4); 438 int kvm_handle_memory_failure(struct kvm_vcpu *vcpu, int r, 439 struct x86_exception *e); 440 int kvm_handle_invpcid(struct kvm_vcpu *vcpu, unsigned long type, gva_t gva); 441 bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type); 442 443 /* 444 * Internal error codes that are used to indicate that MSR emulation encountered 445 * an error that should result in #GP in the guest, unless userspace 446 * handles it. 447 */ 448 #define KVM_MSR_RET_INVALID 2 /* in-kernel MSR emulation #GP condition */ 449 #define KVM_MSR_RET_FILTERED 3 /* #GP due to userspace MSR filter */ 450 451 #define __cr4_reserved_bits(__cpu_has, __c) \ 452 ({ \ 453 u64 __reserved_bits = CR4_RESERVED_BITS; \ 454 \ 455 if (!__cpu_has(__c, X86_FEATURE_XSAVE)) \ 456 __reserved_bits |= X86_CR4_OSXSAVE; \ 457 if (!__cpu_has(__c, X86_FEATURE_SMEP)) \ 458 __reserved_bits |= X86_CR4_SMEP; \ 459 if (!__cpu_has(__c, X86_FEATURE_SMAP)) \ 460 __reserved_bits |= X86_CR4_SMAP; \ 461 if (!__cpu_has(__c, X86_FEATURE_FSGSBASE)) \ 462 __reserved_bits |= X86_CR4_FSGSBASE; \ 463 if (!__cpu_has(__c, X86_FEATURE_PKU)) \ 464 __reserved_bits |= X86_CR4_PKE; \ 465 if (!__cpu_has(__c, X86_FEATURE_LA57)) \ 466 __reserved_bits |= X86_CR4_LA57; \ 467 if (!__cpu_has(__c, X86_FEATURE_UMIP)) \ 468 __reserved_bits |= X86_CR4_UMIP; \ 469 if (!__cpu_has(__c, X86_FEATURE_VMX)) \ 470 __reserved_bits |= X86_CR4_VMXE; \ 471 if (!__cpu_has(__c, X86_FEATURE_PCID)) \ 472 __reserved_bits |= X86_CR4_PCIDE; \ 473 __reserved_bits; \ 474 }) 475 476 int kvm_sev_es_mmio_write(struct kvm_vcpu *vcpu, gpa_t src, unsigned int bytes, 477 void *dst); 478 int kvm_sev_es_mmio_read(struct kvm_vcpu *vcpu, gpa_t src, unsigned int bytes, 479 void *dst); 480 int kvm_sev_es_string_io(struct kvm_vcpu *vcpu, unsigned int size, 481 unsigned int port, void *data, unsigned int count, 482 int in); 483 484 #endif 485