1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef ARCH_X86_KVM_X86_H 3 #define ARCH_X86_KVM_X86_H 4 5 #include <linux/kvm_host.h> 6 #include <asm/mce.h> 7 #include <asm/pvclock.h> 8 #include "kvm_cache_regs.h" 9 #include "kvm_emulate.h" 10 11 static __always_inline void kvm_guest_enter_irqoff(void) 12 { 13 /* 14 * VMENTER enables interrupts (host state), but the kernel state is 15 * interrupts disabled when this is invoked. Also tell RCU about 16 * it. This is the same logic as for exit_to_user_mode(). 17 * 18 * This ensures that e.g. latency analysis on the host observes 19 * guest mode as interrupt enabled. 20 * 21 * guest_enter_irqoff() informs context tracking about the 22 * transition to guest mode and if enabled adjusts RCU state 23 * accordingly. 24 */ 25 instrumentation_begin(); 26 trace_hardirqs_on_prepare(); 27 lockdep_hardirqs_on_prepare(CALLER_ADDR0); 28 instrumentation_end(); 29 30 guest_enter_irqoff(); 31 lockdep_hardirqs_on(CALLER_ADDR0); 32 } 33 34 static __always_inline void kvm_guest_exit_irqoff(void) 35 { 36 /* 37 * VMEXIT disables interrupts (host state), but tracing and lockdep 38 * have them in state 'on' as recorded before entering guest mode. 39 * Same as enter_from_user_mode(). 40 * 41 * context_tracking_guest_exit() restores host context and reinstates 42 * RCU if enabled and required. 43 * 44 * This needs to be done immediately after VM-Exit, before any code 45 * that might contain tracepoints or call out to the greater world, 46 * e.g. before x86_spec_ctrl_restore_host(). 47 */ 48 lockdep_hardirqs_off(CALLER_ADDR0); 49 context_tracking_guest_exit(); 50 51 instrumentation_begin(); 52 trace_hardirqs_off_finish(); 53 instrumentation_end(); 54 } 55 56 #define KVM_NESTED_VMENTER_CONSISTENCY_CHECK(consistency_check) \ 57 ({ \ 58 bool failed = (consistency_check); \ 59 if (failed) \ 60 trace_kvm_nested_vmenter_failed(#consistency_check, 0); \ 61 failed; \ 62 }) 63 64 #define KVM_DEFAULT_PLE_GAP 128 65 #define KVM_VMX_DEFAULT_PLE_WINDOW 4096 66 #define KVM_DEFAULT_PLE_WINDOW_GROW 2 67 #define KVM_DEFAULT_PLE_WINDOW_SHRINK 0 68 #define KVM_VMX_DEFAULT_PLE_WINDOW_MAX UINT_MAX 69 #define KVM_SVM_DEFAULT_PLE_WINDOW_MAX USHRT_MAX 70 #define KVM_SVM_DEFAULT_PLE_WINDOW 3000 71 72 static inline unsigned int __grow_ple_window(unsigned int val, 73 unsigned int base, unsigned int modifier, unsigned int max) 74 { 75 u64 ret = val; 76 77 if (modifier < 1) 78 return base; 79 80 if (modifier < base) 81 ret *= modifier; 82 else 83 ret += modifier; 84 85 return min(ret, (u64)max); 86 } 87 88 static inline unsigned int __shrink_ple_window(unsigned int val, 89 unsigned int base, unsigned int modifier, unsigned int min) 90 { 91 if (modifier < 1) 92 return base; 93 94 if (modifier < base) 95 val /= modifier; 96 else 97 val -= modifier; 98 99 return max(val, min); 100 } 101 102 #define MSR_IA32_CR_PAT_DEFAULT 0x0007040600070406ULL 103 104 int kvm_check_nested_events(struct kvm_vcpu *vcpu); 105 106 static inline void kvm_clear_exception_queue(struct kvm_vcpu *vcpu) 107 { 108 vcpu->arch.exception.pending = false; 109 vcpu->arch.exception.injected = false; 110 } 111 112 static inline void kvm_queue_interrupt(struct kvm_vcpu *vcpu, u8 vector, 113 bool soft) 114 { 115 vcpu->arch.interrupt.injected = true; 116 vcpu->arch.interrupt.soft = soft; 117 vcpu->arch.interrupt.nr = vector; 118 } 119 120 static inline void kvm_clear_interrupt_queue(struct kvm_vcpu *vcpu) 121 { 122 vcpu->arch.interrupt.injected = false; 123 } 124 125 static inline bool kvm_event_needs_reinjection(struct kvm_vcpu *vcpu) 126 { 127 return vcpu->arch.exception.injected || vcpu->arch.interrupt.injected || 128 vcpu->arch.nmi_injected; 129 } 130 131 static inline bool kvm_exception_is_soft(unsigned int nr) 132 { 133 return (nr == BP_VECTOR) || (nr == OF_VECTOR); 134 } 135 136 static inline bool is_protmode(struct kvm_vcpu *vcpu) 137 { 138 return kvm_read_cr0_bits(vcpu, X86_CR0_PE); 139 } 140 141 static inline int is_long_mode(struct kvm_vcpu *vcpu) 142 { 143 #ifdef CONFIG_X86_64 144 return vcpu->arch.efer & EFER_LMA; 145 #else 146 return 0; 147 #endif 148 } 149 150 static inline bool is_64_bit_mode(struct kvm_vcpu *vcpu) 151 { 152 int cs_db, cs_l; 153 154 if (!is_long_mode(vcpu)) 155 return false; 156 static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l); 157 return cs_l; 158 } 159 160 static inline bool is_la57_mode(struct kvm_vcpu *vcpu) 161 { 162 #ifdef CONFIG_X86_64 163 return (vcpu->arch.efer & EFER_LMA) && 164 kvm_read_cr4_bits(vcpu, X86_CR4_LA57); 165 #else 166 return 0; 167 #endif 168 } 169 170 static inline bool x86_exception_has_error_code(unsigned int vector) 171 { 172 static u32 exception_has_error_code = BIT(DF_VECTOR) | BIT(TS_VECTOR) | 173 BIT(NP_VECTOR) | BIT(SS_VECTOR) | BIT(GP_VECTOR) | 174 BIT(PF_VECTOR) | BIT(AC_VECTOR); 175 176 return (1U << vector) & exception_has_error_code; 177 } 178 179 static inline bool mmu_is_nested(struct kvm_vcpu *vcpu) 180 { 181 return vcpu->arch.walk_mmu == &vcpu->arch.nested_mmu; 182 } 183 184 static inline void kvm_vcpu_flush_tlb_current(struct kvm_vcpu *vcpu) 185 { 186 ++vcpu->stat.tlb_flush; 187 static_call(kvm_x86_tlb_flush_current)(vcpu); 188 } 189 190 static inline int is_pae(struct kvm_vcpu *vcpu) 191 { 192 return kvm_read_cr4_bits(vcpu, X86_CR4_PAE); 193 } 194 195 static inline int is_pse(struct kvm_vcpu *vcpu) 196 { 197 return kvm_read_cr4_bits(vcpu, X86_CR4_PSE); 198 } 199 200 static inline int is_paging(struct kvm_vcpu *vcpu) 201 { 202 return likely(kvm_read_cr0_bits(vcpu, X86_CR0_PG)); 203 } 204 205 static inline bool is_pae_paging(struct kvm_vcpu *vcpu) 206 { 207 return !is_long_mode(vcpu) && is_pae(vcpu) && is_paging(vcpu); 208 } 209 210 static inline u8 vcpu_virt_addr_bits(struct kvm_vcpu *vcpu) 211 { 212 return kvm_read_cr4_bits(vcpu, X86_CR4_LA57) ? 57 : 48; 213 } 214 215 static inline u64 get_canonical(u64 la, u8 vaddr_bits) 216 { 217 return ((int64_t)la << (64 - vaddr_bits)) >> (64 - vaddr_bits); 218 } 219 220 static inline bool is_noncanonical_address(u64 la, struct kvm_vcpu *vcpu) 221 { 222 return get_canonical(la, vcpu_virt_addr_bits(vcpu)) != la; 223 } 224 225 static inline void vcpu_cache_mmio_info(struct kvm_vcpu *vcpu, 226 gva_t gva, gfn_t gfn, unsigned access) 227 { 228 u64 gen = kvm_memslots(vcpu->kvm)->generation; 229 230 if (unlikely(gen & KVM_MEMSLOT_GEN_UPDATE_IN_PROGRESS)) 231 return; 232 233 /* 234 * If this is a shadow nested page table, the "GVA" is 235 * actually a nGPA. 236 */ 237 vcpu->arch.mmio_gva = mmu_is_nested(vcpu) ? 0 : gva & PAGE_MASK; 238 vcpu->arch.mmio_access = access; 239 vcpu->arch.mmio_gfn = gfn; 240 vcpu->arch.mmio_gen = gen; 241 } 242 243 static inline bool vcpu_match_mmio_gen(struct kvm_vcpu *vcpu) 244 { 245 return vcpu->arch.mmio_gen == kvm_memslots(vcpu->kvm)->generation; 246 } 247 248 /* 249 * Clear the mmio cache info for the given gva. If gva is MMIO_GVA_ANY, we 250 * clear all mmio cache info. 251 */ 252 #define MMIO_GVA_ANY (~(gva_t)0) 253 254 static inline void vcpu_clear_mmio_info(struct kvm_vcpu *vcpu, gva_t gva) 255 { 256 if (gva != MMIO_GVA_ANY && vcpu->arch.mmio_gva != (gva & PAGE_MASK)) 257 return; 258 259 vcpu->arch.mmio_gva = 0; 260 } 261 262 static inline bool vcpu_match_mmio_gva(struct kvm_vcpu *vcpu, unsigned long gva) 263 { 264 if (vcpu_match_mmio_gen(vcpu) && vcpu->arch.mmio_gva && 265 vcpu->arch.mmio_gva == (gva & PAGE_MASK)) 266 return true; 267 268 return false; 269 } 270 271 static inline bool vcpu_match_mmio_gpa(struct kvm_vcpu *vcpu, gpa_t gpa) 272 { 273 if (vcpu_match_mmio_gen(vcpu) && vcpu->arch.mmio_gfn && 274 vcpu->arch.mmio_gfn == gpa >> PAGE_SHIFT) 275 return true; 276 277 return false; 278 } 279 280 static inline unsigned long kvm_register_read(struct kvm_vcpu *vcpu, int reg) 281 { 282 unsigned long val = kvm_register_read_raw(vcpu, reg); 283 284 return is_64_bit_mode(vcpu) ? val : (u32)val; 285 } 286 287 static inline void kvm_register_write(struct kvm_vcpu *vcpu, 288 int reg, unsigned long val) 289 { 290 if (!is_64_bit_mode(vcpu)) 291 val = (u32)val; 292 return kvm_register_write_raw(vcpu, reg, val); 293 } 294 295 static inline bool kvm_check_has_quirk(struct kvm *kvm, u64 quirk) 296 { 297 return !(kvm->arch.disabled_quirks & quirk); 298 } 299 300 static inline bool kvm_vcpu_latch_init(struct kvm_vcpu *vcpu) 301 { 302 return is_smm(vcpu) || static_call(kvm_x86_apic_init_signal_blocked)(vcpu); 303 } 304 305 void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock, int sec_hi_ofs); 306 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip); 307 308 u64 get_kvmclock_ns(struct kvm *kvm); 309 310 int kvm_read_guest_virt(struct kvm_vcpu *vcpu, 311 gva_t addr, void *val, unsigned int bytes, 312 struct x86_exception *exception); 313 314 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, 315 gva_t addr, void *val, unsigned int bytes, 316 struct x86_exception *exception); 317 318 int handle_ud(struct kvm_vcpu *vcpu); 319 320 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu); 321 322 void kvm_vcpu_mtrr_init(struct kvm_vcpu *vcpu); 323 u8 kvm_mtrr_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn); 324 bool kvm_mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data); 325 int kvm_mtrr_set_msr(struct kvm_vcpu *vcpu, u32 msr, u64 data); 326 int kvm_mtrr_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata); 327 bool kvm_mtrr_check_gfn_range_consistency(struct kvm_vcpu *vcpu, gfn_t gfn, 328 int page_num); 329 bool kvm_vector_hashing_enabled(void); 330 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu *vcpu, gva_t gva, u16 error_code); 331 int x86_decode_emulated_instruction(struct kvm_vcpu *vcpu, int emulation_type, 332 void *insn, int insn_len); 333 int x86_emulate_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, 334 int emulation_type, void *insn, int insn_len); 335 fastpath_t handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu); 336 337 extern u64 host_xcr0; 338 extern u64 supported_xcr0; 339 extern u64 host_xss; 340 extern u64 supported_xss; 341 342 static inline bool kvm_mpx_supported(void) 343 { 344 return (supported_xcr0 & (XFEATURE_MASK_BNDREGS | XFEATURE_MASK_BNDCSR)) 345 == (XFEATURE_MASK_BNDREGS | XFEATURE_MASK_BNDCSR); 346 } 347 348 extern unsigned int min_timer_period_us; 349 350 extern bool enable_vmware_backdoor; 351 352 extern int pi_inject_timer; 353 354 extern struct static_key kvm_no_apic_vcpu; 355 356 extern bool report_ignored_msrs; 357 358 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec) 359 { 360 return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult, 361 vcpu->arch.virtual_tsc_shift); 362 } 363 364 /* Same "calling convention" as do_div: 365 * - divide (n << 32) by base 366 * - put result in n 367 * - return remainder 368 */ 369 #define do_shl32_div32(n, base) \ 370 ({ \ 371 u32 __quot, __rem; \ 372 asm("divl %2" : "=a" (__quot), "=d" (__rem) \ 373 : "rm" (base), "0" (0), "1" ((u32) n)); \ 374 n = __quot; \ 375 __rem; \ 376 }) 377 378 static inline bool kvm_mwait_in_guest(struct kvm *kvm) 379 { 380 return kvm->arch.mwait_in_guest; 381 } 382 383 static inline bool kvm_hlt_in_guest(struct kvm *kvm) 384 { 385 return kvm->arch.hlt_in_guest; 386 } 387 388 static inline bool kvm_pause_in_guest(struct kvm *kvm) 389 { 390 return kvm->arch.pause_in_guest; 391 } 392 393 static inline bool kvm_cstate_in_guest(struct kvm *kvm) 394 { 395 return kvm->arch.cstate_in_guest; 396 } 397 398 DECLARE_PER_CPU(struct kvm_vcpu *, current_vcpu); 399 400 static inline void kvm_before_interrupt(struct kvm_vcpu *vcpu) 401 { 402 __this_cpu_write(current_vcpu, vcpu); 403 } 404 405 static inline void kvm_after_interrupt(struct kvm_vcpu *vcpu) 406 { 407 __this_cpu_write(current_vcpu, NULL); 408 } 409 410 411 static inline bool kvm_pat_valid(u64 data) 412 { 413 if (data & 0xF8F8F8F8F8F8F8F8ull) 414 return false; 415 /* 0, 1, 4, 5, 6, 7 are valid values. */ 416 return (data | ((data & 0x0202020202020202ull) << 1)) == data; 417 } 418 419 static inline bool kvm_dr7_valid(u64 data) 420 { 421 /* Bits [63:32] are reserved */ 422 return !(data >> 32); 423 } 424 static inline bool kvm_dr6_valid(u64 data) 425 { 426 /* Bits [63:32] are reserved */ 427 return !(data >> 32); 428 } 429 430 /* 431 * Trigger machine check on the host. We assume all the MSRs are already set up 432 * by the CPU and that we still run on the same CPU as the MCE occurred on. 433 * We pass a fake environment to the machine check handler because we want 434 * the guest to be always treated like user space, no matter what context 435 * it used internally. 436 */ 437 static inline void kvm_machine_check(void) 438 { 439 #if defined(CONFIG_X86_MCE) 440 struct pt_regs regs = { 441 .cs = 3, /* Fake ring 3 no matter what the guest ran on */ 442 .flags = X86_EFLAGS_IF, 443 }; 444 445 do_machine_check(®s); 446 #endif 447 } 448 449 void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu); 450 void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu); 451 int kvm_spec_ctrl_test_value(u64 value); 452 bool kvm_is_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4); 453 int kvm_handle_memory_failure(struct kvm_vcpu *vcpu, int r, 454 struct x86_exception *e); 455 int kvm_handle_invpcid(struct kvm_vcpu *vcpu, unsigned long type, gva_t gva); 456 bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type); 457 458 /* 459 * Internal error codes that are used to indicate that MSR emulation encountered 460 * an error that should result in #GP in the guest, unless userspace 461 * handles it. 462 */ 463 #define KVM_MSR_RET_INVALID 2 /* in-kernel MSR emulation #GP condition */ 464 #define KVM_MSR_RET_FILTERED 3 /* #GP due to userspace MSR filter */ 465 466 #define __cr4_reserved_bits(__cpu_has, __c) \ 467 ({ \ 468 u64 __reserved_bits = CR4_RESERVED_BITS; \ 469 \ 470 if (!__cpu_has(__c, X86_FEATURE_XSAVE)) \ 471 __reserved_bits |= X86_CR4_OSXSAVE; \ 472 if (!__cpu_has(__c, X86_FEATURE_SMEP)) \ 473 __reserved_bits |= X86_CR4_SMEP; \ 474 if (!__cpu_has(__c, X86_FEATURE_SMAP)) \ 475 __reserved_bits |= X86_CR4_SMAP; \ 476 if (!__cpu_has(__c, X86_FEATURE_FSGSBASE)) \ 477 __reserved_bits |= X86_CR4_FSGSBASE; \ 478 if (!__cpu_has(__c, X86_FEATURE_PKU)) \ 479 __reserved_bits |= X86_CR4_PKE; \ 480 if (!__cpu_has(__c, X86_FEATURE_LA57)) \ 481 __reserved_bits |= X86_CR4_LA57; \ 482 if (!__cpu_has(__c, X86_FEATURE_UMIP)) \ 483 __reserved_bits |= X86_CR4_UMIP; \ 484 if (!__cpu_has(__c, X86_FEATURE_VMX)) \ 485 __reserved_bits |= X86_CR4_VMXE; \ 486 if (!__cpu_has(__c, X86_FEATURE_PCID)) \ 487 __reserved_bits |= X86_CR4_PCIDE; \ 488 __reserved_bits; \ 489 }) 490 491 int kvm_sev_es_mmio_write(struct kvm_vcpu *vcpu, gpa_t src, unsigned int bytes, 492 void *dst); 493 int kvm_sev_es_mmio_read(struct kvm_vcpu *vcpu, gpa_t src, unsigned int bytes, 494 void *dst); 495 int kvm_sev_es_string_io(struct kvm_vcpu *vcpu, unsigned int size, 496 unsigned int port, void *data, unsigned int count, 497 int in); 498 499 #endif 500