1 /* 2 * Kernel-based Virtual Machine driver for Linux 3 * 4 * derived from drivers/kvm/kvm_main.c 5 * 6 * Copyright (C) 2006 Qumranet, Inc. 7 * 8 * Authors: 9 * Avi Kivity <avi@qumranet.com> 10 * Yaniv Kamay <yaniv@qumranet.com> 11 * 12 * This work is licensed under the terms of the GNU GPL, version 2. See 13 * the COPYING file in the top-level directory. 14 * 15 */ 16 17 #include <linux/kvm_host.h> 18 #include "irq.h" 19 #include "mmu.h" 20 #include "i8254.h" 21 #include "tss.h" 22 23 #include <linux/clocksource.h> 24 #include <linux/kvm.h> 25 #include <linux/fs.h> 26 #include <linux/vmalloc.h> 27 #include <linux/module.h> 28 #include <linux/mman.h> 29 #include <linux/highmem.h> 30 31 #include <asm/uaccess.h> 32 #include <asm/msr.h> 33 #include <asm/desc.h> 34 35 #define MAX_IO_MSRS 256 36 #define CR0_RESERVED_BITS \ 37 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \ 38 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \ 39 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG)) 40 #define CR4_RESERVED_BITS \ 41 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\ 42 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \ 43 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \ 44 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE)) 45 46 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR) 47 /* EFER defaults: 48 * - enable syscall per default because its emulated by KVM 49 * - enable LME and LMA per default on 64 bit KVM 50 */ 51 #ifdef CONFIG_X86_64 52 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL; 53 #else 54 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL; 55 #endif 56 57 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM 58 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU 59 60 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid, 61 struct kvm_cpuid_entry2 __user *entries); 62 63 struct kvm_x86_ops *kvm_x86_ops; 64 65 struct kvm_stats_debugfs_item debugfs_entries[] = { 66 { "pf_fixed", VCPU_STAT(pf_fixed) }, 67 { "pf_guest", VCPU_STAT(pf_guest) }, 68 { "tlb_flush", VCPU_STAT(tlb_flush) }, 69 { "invlpg", VCPU_STAT(invlpg) }, 70 { "exits", VCPU_STAT(exits) }, 71 { "io_exits", VCPU_STAT(io_exits) }, 72 { "mmio_exits", VCPU_STAT(mmio_exits) }, 73 { "signal_exits", VCPU_STAT(signal_exits) }, 74 { "irq_window", VCPU_STAT(irq_window_exits) }, 75 { "nmi_window", VCPU_STAT(nmi_window_exits) }, 76 { "halt_exits", VCPU_STAT(halt_exits) }, 77 { "halt_wakeup", VCPU_STAT(halt_wakeup) }, 78 { "hypercalls", VCPU_STAT(hypercalls) }, 79 { "request_irq", VCPU_STAT(request_irq_exits) }, 80 { "irq_exits", VCPU_STAT(irq_exits) }, 81 { "host_state_reload", VCPU_STAT(host_state_reload) }, 82 { "efer_reload", VCPU_STAT(efer_reload) }, 83 { "fpu_reload", VCPU_STAT(fpu_reload) }, 84 { "insn_emulation", VCPU_STAT(insn_emulation) }, 85 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) }, 86 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) }, 87 { "mmu_pte_write", VM_STAT(mmu_pte_write) }, 88 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) }, 89 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) }, 90 { "mmu_flooded", VM_STAT(mmu_flooded) }, 91 { "mmu_recycled", VM_STAT(mmu_recycled) }, 92 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) }, 93 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) }, 94 { "largepages", VM_STAT(lpages) }, 95 { NULL } 96 }; 97 98 99 unsigned long segment_base(u16 selector) 100 { 101 struct descriptor_table gdt; 102 struct desc_struct *d; 103 unsigned long table_base; 104 unsigned long v; 105 106 if (selector == 0) 107 return 0; 108 109 asm("sgdt %0" : "=m"(gdt)); 110 table_base = gdt.base; 111 112 if (selector & 4) { /* from ldt */ 113 u16 ldt_selector; 114 115 asm("sldt %0" : "=g"(ldt_selector)); 116 table_base = segment_base(ldt_selector); 117 } 118 d = (struct desc_struct *)(table_base + (selector & ~7)); 119 v = d->base0 | ((unsigned long)d->base1 << 16) | 120 ((unsigned long)d->base2 << 24); 121 #ifdef CONFIG_X86_64 122 if (d->s == 0 && (d->type == 2 || d->type == 9 || d->type == 11)) 123 v |= ((unsigned long)((struct ldttss_desc64 *)d)->base3) << 32; 124 #endif 125 return v; 126 } 127 EXPORT_SYMBOL_GPL(segment_base); 128 129 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu) 130 { 131 if (irqchip_in_kernel(vcpu->kvm)) 132 return vcpu->arch.apic_base; 133 else 134 return vcpu->arch.apic_base; 135 } 136 EXPORT_SYMBOL_GPL(kvm_get_apic_base); 137 138 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data) 139 { 140 /* TODO: reserve bits check */ 141 if (irqchip_in_kernel(vcpu->kvm)) 142 kvm_lapic_set_base(vcpu, data); 143 else 144 vcpu->arch.apic_base = data; 145 } 146 EXPORT_SYMBOL_GPL(kvm_set_apic_base); 147 148 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr) 149 { 150 WARN_ON(vcpu->arch.exception.pending); 151 vcpu->arch.exception.pending = true; 152 vcpu->arch.exception.has_error_code = false; 153 vcpu->arch.exception.nr = nr; 154 } 155 EXPORT_SYMBOL_GPL(kvm_queue_exception); 156 157 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr, 158 u32 error_code) 159 { 160 ++vcpu->stat.pf_guest; 161 if (vcpu->arch.exception.pending) { 162 if (vcpu->arch.exception.nr == PF_VECTOR) { 163 printk(KERN_DEBUG "kvm: inject_page_fault:" 164 " double fault 0x%lx\n", addr); 165 vcpu->arch.exception.nr = DF_VECTOR; 166 vcpu->arch.exception.error_code = 0; 167 } else if (vcpu->arch.exception.nr == DF_VECTOR) { 168 /* triple fault -> shutdown */ 169 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests); 170 } 171 return; 172 } 173 vcpu->arch.cr2 = addr; 174 kvm_queue_exception_e(vcpu, PF_VECTOR, error_code); 175 } 176 177 void kvm_inject_nmi(struct kvm_vcpu *vcpu) 178 { 179 vcpu->arch.nmi_pending = 1; 180 } 181 EXPORT_SYMBOL_GPL(kvm_inject_nmi); 182 183 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code) 184 { 185 WARN_ON(vcpu->arch.exception.pending); 186 vcpu->arch.exception.pending = true; 187 vcpu->arch.exception.has_error_code = true; 188 vcpu->arch.exception.nr = nr; 189 vcpu->arch.exception.error_code = error_code; 190 } 191 EXPORT_SYMBOL_GPL(kvm_queue_exception_e); 192 193 static void __queue_exception(struct kvm_vcpu *vcpu) 194 { 195 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr, 196 vcpu->arch.exception.has_error_code, 197 vcpu->arch.exception.error_code); 198 } 199 200 /* 201 * Load the pae pdptrs. Return true is they are all valid. 202 */ 203 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3) 204 { 205 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT; 206 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2; 207 int i; 208 int ret; 209 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)]; 210 211 ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte, 212 offset * sizeof(u64), sizeof(pdpte)); 213 if (ret < 0) { 214 ret = 0; 215 goto out; 216 } 217 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) { 218 if ((pdpte[i] & 1) && (pdpte[i] & 0xfffffff0000001e6ull)) { 219 ret = 0; 220 goto out; 221 } 222 } 223 ret = 1; 224 225 memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs)); 226 out: 227 228 return ret; 229 } 230 EXPORT_SYMBOL_GPL(load_pdptrs); 231 232 static bool pdptrs_changed(struct kvm_vcpu *vcpu) 233 { 234 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)]; 235 bool changed = true; 236 int r; 237 238 if (is_long_mode(vcpu) || !is_pae(vcpu)) 239 return false; 240 241 r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte)); 242 if (r < 0) 243 goto out; 244 changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0; 245 out: 246 247 return changed; 248 } 249 250 void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0) 251 { 252 if (cr0 & CR0_RESERVED_BITS) { 253 printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n", 254 cr0, vcpu->arch.cr0); 255 kvm_inject_gp(vcpu, 0); 256 return; 257 } 258 259 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) { 260 printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n"); 261 kvm_inject_gp(vcpu, 0); 262 return; 263 } 264 265 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) { 266 printk(KERN_DEBUG "set_cr0: #GP, set PG flag " 267 "and a clear PE flag\n"); 268 kvm_inject_gp(vcpu, 0); 269 return; 270 } 271 272 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) { 273 #ifdef CONFIG_X86_64 274 if ((vcpu->arch.shadow_efer & EFER_LME)) { 275 int cs_db, cs_l; 276 277 if (!is_pae(vcpu)) { 278 printk(KERN_DEBUG "set_cr0: #GP, start paging " 279 "in long mode while PAE is disabled\n"); 280 kvm_inject_gp(vcpu, 0); 281 return; 282 } 283 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l); 284 if (cs_l) { 285 printk(KERN_DEBUG "set_cr0: #GP, start paging " 286 "in long mode while CS.L == 1\n"); 287 kvm_inject_gp(vcpu, 0); 288 return; 289 290 } 291 } else 292 #endif 293 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) { 294 printk(KERN_DEBUG "set_cr0: #GP, pdptrs " 295 "reserved bits\n"); 296 kvm_inject_gp(vcpu, 0); 297 return; 298 } 299 300 } 301 302 kvm_x86_ops->set_cr0(vcpu, cr0); 303 vcpu->arch.cr0 = cr0; 304 305 kvm_mmu_reset_context(vcpu); 306 return; 307 } 308 EXPORT_SYMBOL_GPL(kvm_set_cr0); 309 310 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw) 311 { 312 kvm_set_cr0(vcpu, (vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f)); 313 KVMTRACE_1D(LMSW, vcpu, 314 (u32)((vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f)), 315 handler); 316 } 317 EXPORT_SYMBOL_GPL(kvm_lmsw); 318 319 void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4) 320 { 321 if (cr4 & CR4_RESERVED_BITS) { 322 printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n"); 323 kvm_inject_gp(vcpu, 0); 324 return; 325 } 326 327 if (is_long_mode(vcpu)) { 328 if (!(cr4 & X86_CR4_PAE)) { 329 printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while " 330 "in long mode\n"); 331 kvm_inject_gp(vcpu, 0); 332 return; 333 } 334 } else if (is_paging(vcpu) && !is_pae(vcpu) && (cr4 & X86_CR4_PAE) 335 && !load_pdptrs(vcpu, vcpu->arch.cr3)) { 336 printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n"); 337 kvm_inject_gp(vcpu, 0); 338 return; 339 } 340 341 if (cr4 & X86_CR4_VMXE) { 342 printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n"); 343 kvm_inject_gp(vcpu, 0); 344 return; 345 } 346 kvm_x86_ops->set_cr4(vcpu, cr4); 347 vcpu->arch.cr4 = cr4; 348 kvm_mmu_reset_context(vcpu); 349 } 350 EXPORT_SYMBOL_GPL(kvm_set_cr4); 351 352 void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3) 353 { 354 if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) { 355 kvm_mmu_flush_tlb(vcpu); 356 return; 357 } 358 359 if (is_long_mode(vcpu)) { 360 if (cr3 & CR3_L_MODE_RESERVED_BITS) { 361 printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n"); 362 kvm_inject_gp(vcpu, 0); 363 return; 364 } 365 } else { 366 if (is_pae(vcpu)) { 367 if (cr3 & CR3_PAE_RESERVED_BITS) { 368 printk(KERN_DEBUG 369 "set_cr3: #GP, reserved bits\n"); 370 kvm_inject_gp(vcpu, 0); 371 return; 372 } 373 if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) { 374 printk(KERN_DEBUG "set_cr3: #GP, pdptrs " 375 "reserved bits\n"); 376 kvm_inject_gp(vcpu, 0); 377 return; 378 } 379 } 380 /* 381 * We don't check reserved bits in nonpae mode, because 382 * this isn't enforced, and VMware depends on this. 383 */ 384 } 385 386 /* 387 * Does the new cr3 value map to physical memory? (Note, we 388 * catch an invalid cr3 even in real-mode, because it would 389 * cause trouble later on when we turn on paging anyway.) 390 * 391 * A real CPU would silently accept an invalid cr3 and would 392 * attempt to use it - with largely undefined (and often hard 393 * to debug) behavior on the guest side. 394 */ 395 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT))) 396 kvm_inject_gp(vcpu, 0); 397 else { 398 vcpu->arch.cr3 = cr3; 399 vcpu->arch.mmu.new_cr3(vcpu); 400 } 401 } 402 EXPORT_SYMBOL_GPL(kvm_set_cr3); 403 404 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8) 405 { 406 if (cr8 & CR8_RESERVED_BITS) { 407 printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8); 408 kvm_inject_gp(vcpu, 0); 409 return; 410 } 411 if (irqchip_in_kernel(vcpu->kvm)) 412 kvm_lapic_set_tpr(vcpu, cr8); 413 else 414 vcpu->arch.cr8 = cr8; 415 } 416 EXPORT_SYMBOL_GPL(kvm_set_cr8); 417 418 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu) 419 { 420 if (irqchip_in_kernel(vcpu->kvm)) 421 return kvm_lapic_get_cr8(vcpu); 422 else 423 return vcpu->arch.cr8; 424 } 425 EXPORT_SYMBOL_GPL(kvm_get_cr8); 426 427 /* 428 * List of msr numbers which we expose to userspace through KVM_GET_MSRS 429 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST. 430 * 431 * This list is modified at module load time to reflect the 432 * capabilities of the host cpu. 433 */ 434 static u32 msrs_to_save[] = { 435 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP, 436 MSR_K6_STAR, 437 #ifdef CONFIG_X86_64 438 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR, 439 #endif 440 MSR_IA32_TIME_STAMP_COUNTER, MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK, 441 MSR_IA32_PERF_STATUS, 442 }; 443 444 static unsigned num_msrs_to_save; 445 446 static u32 emulated_msrs[] = { 447 MSR_IA32_MISC_ENABLE, 448 }; 449 450 static void set_efer(struct kvm_vcpu *vcpu, u64 efer) 451 { 452 if (efer & efer_reserved_bits) { 453 printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n", 454 efer); 455 kvm_inject_gp(vcpu, 0); 456 return; 457 } 458 459 if (is_paging(vcpu) 460 && (vcpu->arch.shadow_efer & EFER_LME) != (efer & EFER_LME)) { 461 printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n"); 462 kvm_inject_gp(vcpu, 0); 463 return; 464 } 465 466 kvm_x86_ops->set_efer(vcpu, efer); 467 468 efer &= ~EFER_LMA; 469 efer |= vcpu->arch.shadow_efer & EFER_LMA; 470 471 vcpu->arch.shadow_efer = efer; 472 } 473 474 void kvm_enable_efer_bits(u64 mask) 475 { 476 efer_reserved_bits &= ~mask; 477 } 478 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits); 479 480 481 /* 482 * Writes msr value into into the appropriate "register". 483 * Returns 0 on success, non-0 otherwise. 484 * Assumes vcpu_load() was already called. 485 */ 486 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data) 487 { 488 return kvm_x86_ops->set_msr(vcpu, msr_index, data); 489 } 490 491 /* 492 * Adapt set_msr() to msr_io()'s calling convention 493 */ 494 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data) 495 { 496 return kvm_set_msr(vcpu, index, *data); 497 } 498 499 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock) 500 { 501 static int version; 502 struct pvclock_wall_clock wc; 503 struct timespec now, sys, boot; 504 505 if (!wall_clock) 506 return; 507 508 version++; 509 510 kvm_write_guest(kvm, wall_clock, &version, sizeof(version)); 511 512 /* 513 * The guest calculates current wall clock time by adding 514 * system time (updated by kvm_write_guest_time below) to the 515 * wall clock specified here. guest system time equals host 516 * system time for us, thus we must fill in host boot time here. 517 */ 518 now = current_kernel_time(); 519 ktime_get_ts(&sys); 520 boot = ns_to_timespec(timespec_to_ns(&now) - timespec_to_ns(&sys)); 521 522 wc.sec = boot.tv_sec; 523 wc.nsec = boot.tv_nsec; 524 wc.version = version; 525 526 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc)); 527 528 version++; 529 kvm_write_guest(kvm, wall_clock, &version, sizeof(version)); 530 } 531 532 static uint32_t div_frac(uint32_t dividend, uint32_t divisor) 533 { 534 uint32_t quotient, remainder; 535 536 /* Don't try to replace with do_div(), this one calculates 537 * "(dividend << 32) / divisor" */ 538 __asm__ ( "divl %4" 539 : "=a" (quotient), "=d" (remainder) 540 : "0" (0), "1" (dividend), "r" (divisor) ); 541 return quotient; 542 } 543 544 static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock) 545 { 546 uint64_t nsecs = 1000000000LL; 547 int32_t shift = 0; 548 uint64_t tps64; 549 uint32_t tps32; 550 551 tps64 = tsc_khz * 1000LL; 552 while (tps64 > nsecs*2) { 553 tps64 >>= 1; 554 shift--; 555 } 556 557 tps32 = (uint32_t)tps64; 558 while (tps32 <= (uint32_t)nsecs) { 559 tps32 <<= 1; 560 shift++; 561 } 562 563 hv_clock->tsc_shift = shift; 564 hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32); 565 566 pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n", 567 __FUNCTION__, tsc_khz, hv_clock->tsc_shift, 568 hv_clock->tsc_to_system_mul); 569 } 570 571 static void kvm_write_guest_time(struct kvm_vcpu *v) 572 { 573 struct timespec ts; 574 unsigned long flags; 575 struct kvm_vcpu_arch *vcpu = &v->arch; 576 void *shared_kaddr; 577 578 if ((!vcpu->time_page)) 579 return; 580 581 if (unlikely(vcpu->hv_clock_tsc_khz != tsc_khz)) { 582 kvm_set_time_scale(tsc_khz, &vcpu->hv_clock); 583 vcpu->hv_clock_tsc_khz = tsc_khz; 584 } 585 586 /* Keep irq disabled to prevent changes to the clock */ 587 local_irq_save(flags); 588 kvm_get_msr(v, MSR_IA32_TIME_STAMP_COUNTER, 589 &vcpu->hv_clock.tsc_timestamp); 590 ktime_get_ts(&ts); 591 local_irq_restore(flags); 592 593 /* With all the info we got, fill in the values */ 594 595 vcpu->hv_clock.system_time = ts.tv_nsec + 596 (NSEC_PER_SEC * (u64)ts.tv_sec); 597 /* 598 * The interface expects us to write an even number signaling that the 599 * update is finished. Since the guest won't see the intermediate 600 * state, we just increase by 2 at the end. 601 */ 602 vcpu->hv_clock.version += 2; 603 604 shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0); 605 606 memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock, 607 sizeof(vcpu->hv_clock)); 608 609 kunmap_atomic(shared_kaddr, KM_USER0); 610 611 mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT); 612 } 613 614 static bool msr_mtrr_valid(unsigned msr) 615 { 616 switch (msr) { 617 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1: 618 case MSR_MTRRfix64K_00000: 619 case MSR_MTRRfix16K_80000: 620 case MSR_MTRRfix16K_A0000: 621 case MSR_MTRRfix4K_C0000: 622 case MSR_MTRRfix4K_C8000: 623 case MSR_MTRRfix4K_D0000: 624 case MSR_MTRRfix4K_D8000: 625 case MSR_MTRRfix4K_E0000: 626 case MSR_MTRRfix4K_E8000: 627 case MSR_MTRRfix4K_F0000: 628 case MSR_MTRRfix4K_F8000: 629 case MSR_MTRRdefType: 630 case MSR_IA32_CR_PAT: 631 return true; 632 case 0x2f8: 633 return true; 634 } 635 return false; 636 } 637 638 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data) 639 { 640 if (!msr_mtrr_valid(msr)) 641 return 1; 642 643 vcpu->arch.mtrr[msr - 0x200] = data; 644 return 0; 645 } 646 647 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data) 648 { 649 switch (msr) { 650 case MSR_EFER: 651 set_efer(vcpu, data); 652 break; 653 case MSR_IA32_MC0_STATUS: 654 pr_unimpl(vcpu, "%s: MSR_IA32_MC0_STATUS 0x%llx, nop\n", 655 __func__, data); 656 break; 657 case MSR_IA32_MCG_STATUS: 658 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_STATUS 0x%llx, nop\n", 659 __func__, data); 660 break; 661 case MSR_IA32_MCG_CTL: 662 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_CTL 0x%llx, nop\n", 663 __func__, data); 664 break; 665 case MSR_IA32_UCODE_REV: 666 case MSR_IA32_UCODE_WRITE: 667 break; 668 case 0x200 ... 0x2ff: 669 return set_msr_mtrr(vcpu, msr, data); 670 case MSR_IA32_APICBASE: 671 kvm_set_apic_base(vcpu, data); 672 break; 673 case MSR_IA32_MISC_ENABLE: 674 vcpu->arch.ia32_misc_enable_msr = data; 675 break; 676 case MSR_KVM_WALL_CLOCK: 677 vcpu->kvm->arch.wall_clock = data; 678 kvm_write_wall_clock(vcpu->kvm, data); 679 break; 680 case MSR_KVM_SYSTEM_TIME: { 681 if (vcpu->arch.time_page) { 682 kvm_release_page_dirty(vcpu->arch.time_page); 683 vcpu->arch.time_page = NULL; 684 } 685 686 vcpu->arch.time = data; 687 688 /* we verify if the enable bit is set... */ 689 if (!(data & 1)) 690 break; 691 692 /* ...but clean it before doing the actual write */ 693 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1); 694 695 down_read(¤t->mm->mmap_sem); 696 vcpu->arch.time_page = 697 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT); 698 up_read(¤t->mm->mmap_sem); 699 700 if (is_error_page(vcpu->arch.time_page)) { 701 kvm_release_page_clean(vcpu->arch.time_page); 702 vcpu->arch.time_page = NULL; 703 } 704 705 kvm_write_guest_time(vcpu); 706 break; 707 } 708 default: 709 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n", msr, data); 710 return 1; 711 } 712 return 0; 713 } 714 EXPORT_SYMBOL_GPL(kvm_set_msr_common); 715 716 717 /* 718 * Reads an msr value (of 'msr_index') into 'pdata'. 719 * Returns 0 on success, non-0 otherwise. 720 * Assumes vcpu_load() was already called. 721 */ 722 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata) 723 { 724 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata); 725 } 726 727 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata) 728 { 729 if (!msr_mtrr_valid(msr)) 730 return 1; 731 732 *pdata = vcpu->arch.mtrr[msr - 0x200]; 733 return 0; 734 } 735 736 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata) 737 { 738 u64 data; 739 740 switch (msr) { 741 case 0xc0010010: /* SYSCFG */ 742 case 0xc0010015: /* HWCR */ 743 case MSR_IA32_PLATFORM_ID: 744 case MSR_IA32_P5_MC_ADDR: 745 case MSR_IA32_P5_MC_TYPE: 746 case MSR_IA32_MC0_CTL: 747 case MSR_IA32_MCG_STATUS: 748 case MSR_IA32_MCG_CAP: 749 case MSR_IA32_MCG_CTL: 750 case MSR_IA32_MC0_MISC: 751 case MSR_IA32_MC0_MISC+4: 752 case MSR_IA32_MC0_MISC+8: 753 case MSR_IA32_MC0_MISC+12: 754 case MSR_IA32_MC0_MISC+16: 755 case MSR_IA32_UCODE_REV: 756 case MSR_IA32_EBL_CR_POWERON: 757 data = 0; 758 break; 759 case MSR_MTRRcap: 760 data = 0x500 | KVM_NR_VAR_MTRR; 761 break; 762 case 0x200 ... 0x2ff: 763 return get_msr_mtrr(vcpu, msr, pdata); 764 case 0xcd: /* fsb frequency */ 765 data = 3; 766 break; 767 case MSR_IA32_APICBASE: 768 data = kvm_get_apic_base(vcpu); 769 break; 770 case MSR_IA32_MISC_ENABLE: 771 data = vcpu->arch.ia32_misc_enable_msr; 772 break; 773 case MSR_IA32_PERF_STATUS: 774 /* TSC increment by tick */ 775 data = 1000ULL; 776 /* CPU multiplier */ 777 data |= (((uint64_t)4ULL) << 40); 778 break; 779 case MSR_EFER: 780 data = vcpu->arch.shadow_efer; 781 break; 782 case MSR_KVM_WALL_CLOCK: 783 data = vcpu->kvm->arch.wall_clock; 784 break; 785 case MSR_KVM_SYSTEM_TIME: 786 data = vcpu->arch.time; 787 break; 788 default: 789 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr); 790 return 1; 791 } 792 *pdata = data; 793 return 0; 794 } 795 EXPORT_SYMBOL_GPL(kvm_get_msr_common); 796 797 /* 798 * Read or write a bunch of msrs. All parameters are kernel addresses. 799 * 800 * @return number of msrs set successfully. 801 */ 802 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs, 803 struct kvm_msr_entry *entries, 804 int (*do_msr)(struct kvm_vcpu *vcpu, 805 unsigned index, u64 *data)) 806 { 807 int i; 808 809 vcpu_load(vcpu); 810 811 down_read(&vcpu->kvm->slots_lock); 812 for (i = 0; i < msrs->nmsrs; ++i) 813 if (do_msr(vcpu, entries[i].index, &entries[i].data)) 814 break; 815 up_read(&vcpu->kvm->slots_lock); 816 817 vcpu_put(vcpu); 818 819 return i; 820 } 821 822 /* 823 * Read or write a bunch of msrs. Parameters are user addresses. 824 * 825 * @return number of msrs set successfully. 826 */ 827 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs, 828 int (*do_msr)(struct kvm_vcpu *vcpu, 829 unsigned index, u64 *data), 830 int writeback) 831 { 832 struct kvm_msrs msrs; 833 struct kvm_msr_entry *entries; 834 int r, n; 835 unsigned size; 836 837 r = -EFAULT; 838 if (copy_from_user(&msrs, user_msrs, sizeof msrs)) 839 goto out; 840 841 r = -E2BIG; 842 if (msrs.nmsrs >= MAX_IO_MSRS) 843 goto out; 844 845 r = -ENOMEM; 846 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs; 847 entries = vmalloc(size); 848 if (!entries) 849 goto out; 850 851 r = -EFAULT; 852 if (copy_from_user(entries, user_msrs->entries, size)) 853 goto out_free; 854 855 r = n = __msr_io(vcpu, &msrs, entries, do_msr); 856 if (r < 0) 857 goto out_free; 858 859 r = -EFAULT; 860 if (writeback && copy_to_user(user_msrs->entries, entries, size)) 861 goto out_free; 862 863 r = n; 864 865 out_free: 866 vfree(entries); 867 out: 868 return r; 869 } 870 871 int kvm_dev_ioctl_check_extension(long ext) 872 { 873 int r; 874 875 switch (ext) { 876 case KVM_CAP_IRQCHIP: 877 case KVM_CAP_HLT: 878 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL: 879 case KVM_CAP_USER_MEMORY: 880 case KVM_CAP_SET_TSS_ADDR: 881 case KVM_CAP_EXT_CPUID: 882 case KVM_CAP_CLOCKSOURCE: 883 case KVM_CAP_PIT: 884 case KVM_CAP_NOP_IO_DELAY: 885 case KVM_CAP_MP_STATE: 886 r = 1; 887 break; 888 case KVM_CAP_COALESCED_MMIO: 889 r = KVM_COALESCED_MMIO_PAGE_OFFSET; 890 break; 891 case KVM_CAP_VAPIC: 892 r = !kvm_x86_ops->cpu_has_accelerated_tpr(); 893 break; 894 case KVM_CAP_NR_VCPUS: 895 r = KVM_MAX_VCPUS; 896 break; 897 case KVM_CAP_NR_MEMSLOTS: 898 r = KVM_MEMORY_SLOTS; 899 break; 900 case KVM_CAP_PV_MMU: 901 r = !tdp_enabled; 902 break; 903 default: 904 r = 0; 905 break; 906 } 907 return r; 908 909 } 910 911 long kvm_arch_dev_ioctl(struct file *filp, 912 unsigned int ioctl, unsigned long arg) 913 { 914 void __user *argp = (void __user *)arg; 915 long r; 916 917 switch (ioctl) { 918 case KVM_GET_MSR_INDEX_LIST: { 919 struct kvm_msr_list __user *user_msr_list = argp; 920 struct kvm_msr_list msr_list; 921 unsigned n; 922 923 r = -EFAULT; 924 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list)) 925 goto out; 926 n = msr_list.nmsrs; 927 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs); 928 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list)) 929 goto out; 930 r = -E2BIG; 931 if (n < num_msrs_to_save) 932 goto out; 933 r = -EFAULT; 934 if (copy_to_user(user_msr_list->indices, &msrs_to_save, 935 num_msrs_to_save * sizeof(u32))) 936 goto out; 937 if (copy_to_user(user_msr_list->indices 938 + num_msrs_to_save * sizeof(u32), 939 &emulated_msrs, 940 ARRAY_SIZE(emulated_msrs) * sizeof(u32))) 941 goto out; 942 r = 0; 943 break; 944 } 945 case KVM_GET_SUPPORTED_CPUID: { 946 struct kvm_cpuid2 __user *cpuid_arg = argp; 947 struct kvm_cpuid2 cpuid; 948 949 r = -EFAULT; 950 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid)) 951 goto out; 952 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid, 953 cpuid_arg->entries); 954 if (r) 955 goto out; 956 957 r = -EFAULT; 958 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid)) 959 goto out; 960 r = 0; 961 break; 962 } 963 default: 964 r = -EINVAL; 965 } 966 out: 967 return r; 968 } 969 970 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu) 971 { 972 kvm_x86_ops->vcpu_load(vcpu, cpu); 973 kvm_write_guest_time(vcpu); 974 } 975 976 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu) 977 { 978 kvm_x86_ops->vcpu_put(vcpu); 979 kvm_put_guest_fpu(vcpu); 980 } 981 982 static int is_efer_nx(void) 983 { 984 u64 efer; 985 986 rdmsrl(MSR_EFER, efer); 987 return efer & EFER_NX; 988 } 989 990 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu) 991 { 992 int i; 993 struct kvm_cpuid_entry2 *e, *entry; 994 995 entry = NULL; 996 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) { 997 e = &vcpu->arch.cpuid_entries[i]; 998 if (e->function == 0x80000001) { 999 entry = e; 1000 break; 1001 } 1002 } 1003 if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) { 1004 entry->edx &= ~(1 << 20); 1005 printk(KERN_INFO "kvm: guest NX capability removed\n"); 1006 } 1007 } 1008 1009 /* when an old userspace process fills a new kernel module */ 1010 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu, 1011 struct kvm_cpuid *cpuid, 1012 struct kvm_cpuid_entry __user *entries) 1013 { 1014 int r, i; 1015 struct kvm_cpuid_entry *cpuid_entries; 1016 1017 r = -E2BIG; 1018 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES) 1019 goto out; 1020 r = -ENOMEM; 1021 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent); 1022 if (!cpuid_entries) 1023 goto out; 1024 r = -EFAULT; 1025 if (copy_from_user(cpuid_entries, entries, 1026 cpuid->nent * sizeof(struct kvm_cpuid_entry))) 1027 goto out_free; 1028 for (i = 0; i < cpuid->nent; i++) { 1029 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function; 1030 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax; 1031 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx; 1032 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx; 1033 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx; 1034 vcpu->arch.cpuid_entries[i].index = 0; 1035 vcpu->arch.cpuid_entries[i].flags = 0; 1036 vcpu->arch.cpuid_entries[i].padding[0] = 0; 1037 vcpu->arch.cpuid_entries[i].padding[1] = 0; 1038 vcpu->arch.cpuid_entries[i].padding[2] = 0; 1039 } 1040 vcpu->arch.cpuid_nent = cpuid->nent; 1041 cpuid_fix_nx_cap(vcpu); 1042 r = 0; 1043 1044 out_free: 1045 vfree(cpuid_entries); 1046 out: 1047 return r; 1048 } 1049 1050 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu, 1051 struct kvm_cpuid2 *cpuid, 1052 struct kvm_cpuid_entry2 __user *entries) 1053 { 1054 int r; 1055 1056 r = -E2BIG; 1057 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES) 1058 goto out; 1059 r = -EFAULT; 1060 if (copy_from_user(&vcpu->arch.cpuid_entries, entries, 1061 cpuid->nent * sizeof(struct kvm_cpuid_entry2))) 1062 goto out; 1063 vcpu->arch.cpuid_nent = cpuid->nent; 1064 return 0; 1065 1066 out: 1067 return r; 1068 } 1069 1070 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu, 1071 struct kvm_cpuid2 *cpuid, 1072 struct kvm_cpuid_entry2 __user *entries) 1073 { 1074 int r; 1075 1076 r = -E2BIG; 1077 if (cpuid->nent < vcpu->arch.cpuid_nent) 1078 goto out; 1079 r = -EFAULT; 1080 if (copy_to_user(entries, &vcpu->arch.cpuid_entries, 1081 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2))) 1082 goto out; 1083 return 0; 1084 1085 out: 1086 cpuid->nent = vcpu->arch.cpuid_nent; 1087 return r; 1088 } 1089 1090 static inline u32 bit(int bitno) 1091 { 1092 return 1 << (bitno & 31); 1093 } 1094 1095 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function, 1096 u32 index) 1097 { 1098 entry->function = function; 1099 entry->index = index; 1100 cpuid_count(entry->function, entry->index, 1101 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx); 1102 entry->flags = 0; 1103 } 1104 1105 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function, 1106 u32 index, int *nent, int maxnent) 1107 { 1108 const u32 kvm_supported_word0_x86_features = bit(X86_FEATURE_FPU) | 1109 bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) | 1110 bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) | 1111 bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) | 1112 bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) | 1113 bit(X86_FEATURE_SEP) | bit(X86_FEATURE_PGE) | 1114 bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) | 1115 bit(X86_FEATURE_CLFLSH) | bit(X86_FEATURE_MMX) | 1116 bit(X86_FEATURE_FXSR) | bit(X86_FEATURE_XMM) | 1117 bit(X86_FEATURE_XMM2) | bit(X86_FEATURE_SELFSNOOP); 1118 const u32 kvm_supported_word1_x86_features = bit(X86_FEATURE_FPU) | 1119 bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) | 1120 bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) | 1121 bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) | 1122 bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) | 1123 bit(X86_FEATURE_PGE) | 1124 bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) | 1125 bit(X86_FEATURE_MMX) | bit(X86_FEATURE_FXSR) | 1126 bit(X86_FEATURE_SYSCALL) | 1127 (bit(X86_FEATURE_NX) && is_efer_nx()) | 1128 #ifdef CONFIG_X86_64 1129 bit(X86_FEATURE_LM) | 1130 #endif 1131 bit(X86_FEATURE_MMXEXT) | 1132 bit(X86_FEATURE_3DNOWEXT) | 1133 bit(X86_FEATURE_3DNOW); 1134 const u32 kvm_supported_word3_x86_features = 1135 bit(X86_FEATURE_XMM3) | bit(X86_FEATURE_CX16); 1136 const u32 kvm_supported_word6_x86_features = 1137 bit(X86_FEATURE_LAHF_LM) | bit(X86_FEATURE_CMP_LEGACY); 1138 1139 /* all func 2 cpuid_count() should be called on the same cpu */ 1140 get_cpu(); 1141 do_cpuid_1_ent(entry, function, index); 1142 ++*nent; 1143 1144 switch (function) { 1145 case 0: 1146 entry->eax = min(entry->eax, (u32)0xb); 1147 break; 1148 case 1: 1149 entry->edx &= kvm_supported_word0_x86_features; 1150 entry->ecx &= kvm_supported_word3_x86_features; 1151 break; 1152 /* function 2 entries are STATEFUL. That is, repeated cpuid commands 1153 * may return different values. This forces us to get_cpu() before 1154 * issuing the first command, and also to emulate this annoying behavior 1155 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */ 1156 case 2: { 1157 int t, times = entry->eax & 0xff; 1158 1159 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC; 1160 for (t = 1; t < times && *nent < maxnent; ++t) { 1161 do_cpuid_1_ent(&entry[t], function, 0); 1162 entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC; 1163 ++*nent; 1164 } 1165 break; 1166 } 1167 /* function 4 and 0xb have additional index. */ 1168 case 4: { 1169 int i, cache_type; 1170 1171 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX; 1172 /* read more entries until cache_type is zero */ 1173 for (i = 1; *nent < maxnent; ++i) { 1174 cache_type = entry[i - 1].eax & 0x1f; 1175 if (!cache_type) 1176 break; 1177 do_cpuid_1_ent(&entry[i], function, i); 1178 entry[i].flags |= 1179 KVM_CPUID_FLAG_SIGNIFCANT_INDEX; 1180 ++*nent; 1181 } 1182 break; 1183 } 1184 case 0xb: { 1185 int i, level_type; 1186 1187 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX; 1188 /* read more entries until level_type is zero */ 1189 for (i = 1; *nent < maxnent; ++i) { 1190 level_type = entry[i - 1].ecx & 0xff; 1191 if (!level_type) 1192 break; 1193 do_cpuid_1_ent(&entry[i], function, i); 1194 entry[i].flags |= 1195 KVM_CPUID_FLAG_SIGNIFCANT_INDEX; 1196 ++*nent; 1197 } 1198 break; 1199 } 1200 case 0x80000000: 1201 entry->eax = min(entry->eax, 0x8000001a); 1202 break; 1203 case 0x80000001: 1204 entry->edx &= kvm_supported_word1_x86_features; 1205 entry->ecx &= kvm_supported_word6_x86_features; 1206 break; 1207 } 1208 put_cpu(); 1209 } 1210 1211 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid, 1212 struct kvm_cpuid_entry2 __user *entries) 1213 { 1214 struct kvm_cpuid_entry2 *cpuid_entries; 1215 int limit, nent = 0, r = -E2BIG; 1216 u32 func; 1217 1218 if (cpuid->nent < 1) 1219 goto out; 1220 r = -ENOMEM; 1221 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent); 1222 if (!cpuid_entries) 1223 goto out; 1224 1225 do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent); 1226 limit = cpuid_entries[0].eax; 1227 for (func = 1; func <= limit && nent < cpuid->nent; ++func) 1228 do_cpuid_ent(&cpuid_entries[nent], func, 0, 1229 &nent, cpuid->nent); 1230 r = -E2BIG; 1231 if (nent >= cpuid->nent) 1232 goto out_free; 1233 1234 do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent); 1235 limit = cpuid_entries[nent - 1].eax; 1236 for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func) 1237 do_cpuid_ent(&cpuid_entries[nent], func, 0, 1238 &nent, cpuid->nent); 1239 r = -EFAULT; 1240 if (copy_to_user(entries, cpuid_entries, 1241 nent * sizeof(struct kvm_cpuid_entry2))) 1242 goto out_free; 1243 cpuid->nent = nent; 1244 r = 0; 1245 1246 out_free: 1247 vfree(cpuid_entries); 1248 out: 1249 return r; 1250 } 1251 1252 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu, 1253 struct kvm_lapic_state *s) 1254 { 1255 vcpu_load(vcpu); 1256 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s); 1257 vcpu_put(vcpu); 1258 1259 return 0; 1260 } 1261 1262 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu, 1263 struct kvm_lapic_state *s) 1264 { 1265 vcpu_load(vcpu); 1266 memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s); 1267 kvm_apic_post_state_restore(vcpu); 1268 vcpu_put(vcpu); 1269 1270 return 0; 1271 } 1272 1273 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu, 1274 struct kvm_interrupt *irq) 1275 { 1276 if (irq->irq < 0 || irq->irq >= 256) 1277 return -EINVAL; 1278 if (irqchip_in_kernel(vcpu->kvm)) 1279 return -ENXIO; 1280 vcpu_load(vcpu); 1281 1282 set_bit(irq->irq, vcpu->arch.irq_pending); 1283 set_bit(irq->irq / BITS_PER_LONG, &vcpu->arch.irq_summary); 1284 1285 vcpu_put(vcpu); 1286 1287 return 0; 1288 } 1289 1290 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu, 1291 struct kvm_tpr_access_ctl *tac) 1292 { 1293 if (tac->flags) 1294 return -EINVAL; 1295 vcpu->arch.tpr_access_reporting = !!tac->enabled; 1296 return 0; 1297 } 1298 1299 long kvm_arch_vcpu_ioctl(struct file *filp, 1300 unsigned int ioctl, unsigned long arg) 1301 { 1302 struct kvm_vcpu *vcpu = filp->private_data; 1303 void __user *argp = (void __user *)arg; 1304 int r; 1305 1306 switch (ioctl) { 1307 case KVM_GET_LAPIC: { 1308 struct kvm_lapic_state lapic; 1309 1310 memset(&lapic, 0, sizeof lapic); 1311 r = kvm_vcpu_ioctl_get_lapic(vcpu, &lapic); 1312 if (r) 1313 goto out; 1314 r = -EFAULT; 1315 if (copy_to_user(argp, &lapic, sizeof lapic)) 1316 goto out; 1317 r = 0; 1318 break; 1319 } 1320 case KVM_SET_LAPIC: { 1321 struct kvm_lapic_state lapic; 1322 1323 r = -EFAULT; 1324 if (copy_from_user(&lapic, argp, sizeof lapic)) 1325 goto out; 1326 r = kvm_vcpu_ioctl_set_lapic(vcpu, &lapic);; 1327 if (r) 1328 goto out; 1329 r = 0; 1330 break; 1331 } 1332 case KVM_INTERRUPT: { 1333 struct kvm_interrupt irq; 1334 1335 r = -EFAULT; 1336 if (copy_from_user(&irq, argp, sizeof irq)) 1337 goto out; 1338 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq); 1339 if (r) 1340 goto out; 1341 r = 0; 1342 break; 1343 } 1344 case KVM_SET_CPUID: { 1345 struct kvm_cpuid __user *cpuid_arg = argp; 1346 struct kvm_cpuid cpuid; 1347 1348 r = -EFAULT; 1349 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid)) 1350 goto out; 1351 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries); 1352 if (r) 1353 goto out; 1354 break; 1355 } 1356 case KVM_SET_CPUID2: { 1357 struct kvm_cpuid2 __user *cpuid_arg = argp; 1358 struct kvm_cpuid2 cpuid; 1359 1360 r = -EFAULT; 1361 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid)) 1362 goto out; 1363 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid, 1364 cpuid_arg->entries); 1365 if (r) 1366 goto out; 1367 break; 1368 } 1369 case KVM_GET_CPUID2: { 1370 struct kvm_cpuid2 __user *cpuid_arg = argp; 1371 struct kvm_cpuid2 cpuid; 1372 1373 r = -EFAULT; 1374 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid)) 1375 goto out; 1376 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid, 1377 cpuid_arg->entries); 1378 if (r) 1379 goto out; 1380 r = -EFAULT; 1381 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid)) 1382 goto out; 1383 r = 0; 1384 break; 1385 } 1386 case KVM_GET_MSRS: 1387 r = msr_io(vcpu, argp, kvm_get_msr, 1); 1388 break; 1389 case KVM_SET_MSRS: 1390 r = msr_io(vcpu, argp, do_set_msr, 0); 1391 break; 1392 case KVM_TPR_ACCESS_REPORTING: { 1393 struct kvm_tpr_access_ctl tac; 1394 1395 r = -EFAULT; 1396 if (copy_from_user(&tac, argp, sizeof tac)) 1397 goto out; 1398 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac); 1399 if (r) 1400 goto out; 1401 r = -EFAULT; 1402 if (copy_to_user(argp, &tac, sizeof tac)) 1403 goto out; 1404 r = 0; 1405 break; 1406 }; 1407 case KVM_SET_VAPIC_ADDR: { 1408 struct kvm_vapic_addr va; 1409 1410 r = -EINVAL; 1411 if (!irqchip_in_kernel(vcpu->kvm)) 1412 goto out; 1413 r = -EFAULT; 1414 if (copy_from_user(&va, argp, sizeof va)) 1415 goto out; 1416 r = 0; 1417 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr); 1418 break; 1419 } 1420 default: 1421 r = -EINVAL; 1422 } 1423 out: 1424 return r; 1425 } 1426 1427 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr) 1428 { 1429 int ret; 1430 1431 if (addr > (unsigned int)(-3 * PAGE_SIZE)) 1432 return -1; 1433 ret = kvm_x86_ops->set_tss_addr(kvm, addr); 1434 return ret; 1435 } 1436 1437 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm, 1438 u32 kvm_nr_mmu_pages) 1439 { 1440 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES) 1441 return -EINVAL; 1442 1443 down_write(&kvm->slots_lock); 1444 1445 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages); 1446 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages; 1447 1448 up_write(&kvm->slots_lock); 1449 return 0; 1450 } 1451 1452 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm) 1453 { 1454 return kvm->arch.n_alloc_mmu_pages; 1455 } 1456 1457 gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn) 1458 { 1459 int i; 1460 struct kvm_mem_alias *alias; 1461 1462 for (i = 0; i < kvm->arch.naliases; ++i) { 1463 alias = &kvm->arch.aliases[i]; 1464 if (gfn >= alias->base_gfn 1465 && gfn < alias->base_gfn + alias->npages) 1466 return alias->target_gfn + gfn - alias->base_gfn; 1467 } 1468 return gfn; 1469 } 1470 1471 /* 1472 * Set a new alias region. Aliases map a portion of physical memory into 1473 * another portion. This is useful for memory windows, for example the PC 1474 * VGA region. 1475 */ 1476 static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm, 1477 struct kvm_memory_alias *alias) 1478 { 1479 int r, n; 1480 struct kvm_mem_alias *p; 1481 1482 r = -EINVAL; 1483 /* General sanity checks */ 1484 if (alias->memory_size & (PAGE_SIZE - 1)) 1485 goto out; 1486 if (alias->guest_phys_addr & (PAGE_SIZE - 1)) 1487 goto out; 1488 if (alias->slot >= KVM_ALIAS_SLOTS) 1489 goto out; 1490 if (alias->guest_phys_addr + alias->memory_size 1491 < alias->guest_phys_addr) 1492 goto out; 1493 if (alias->target_phys_addr + alias->memory_size 1494 < alias->target_phys_addr) 1495 goto out; 1496 1497 down_write(&kvm->slots_lock); 1498 1499 p = &kvm->arch.aliases[alias->slot]; 1500 p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT; 1501 p->npages = alias->memory_size >> PAGE_SHIFT; 1502 p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT; 1503 1504 for (n = KVM_ALIAS_SLOTS; n > 0; --n) 1505 if (kvm->arch.aliases[n - 1].npages) 1506 break; 1507 kvm->arch.naliases = n; 1508 1509 kvm_mmu_zap_all(kvm); 1510 1511 up_write(&kvm->slots_lock); 1512 1513 return 0; 1514 1515 out: 1516 return r; 1517 } 1518 1519 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip) 1520 { 1521 int r; 1522 1523 r = 0; 1524 switch (chip->chip_id) { 1525 case KVM_IRQCHIP_PIC_MASTER: 1526 memcpy(&chip->chip.pic, 1527 &pic_irqchip(kvm)->pics[0], 1528 sizeof(struct kvm_pic_state)); 1529 break; 1530 case KVM_IRQCHIP_PIC_SLAVE: 1531 memcpy(&chip->chip.pic, 1532 &pic_irqchip(kvm)->pics[1], 1533 sizeof(struct kvm_pic_state)); 1534 break; 1535 case KVM_IRQCHIP_IOAPIC: 1536 memcpy(&chip->chip.ioapic, 1537 ioapic_irqchip(kvm), 1538 sizeof(struct kvm_ioapic_state)); 1539 break; 1540 default: 1541 r = -EINVAL; 1542 break; 1543 } 1544 return r; 1545 } 1546 1547 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip) 1548 { 1549 int r; 1550 1551 r = 0; 1552 switch (chip->chip_id) { 1553 case KVM_IRQCHIP_PIC_MASTER: 1554 memcpy(&pic_irqchip(kvm)->pics[0], 1555 &chip->chip.pic, 1556 sizeof(struct kvm_pic_state)); 1557 break; 1558 case KVM_IRQCHIP_PIC_SLAVE: 1559 memcpy(&pic_irqchip(kvm)->pics[1], 1560 &chip->chip.pic, 1561 sizeof(struct kvm_pic_state)); 1562 break; 1563 case KVM_IRQCHIP_IOAPIC: 1564 memcpy(ioapic_irqchip(kvm), 1565 &chip->chip.ioapic, 1566 sizeof(struct kvm_ioapic_state)); 1567 break; 1568 default: 1569 r = -EINVAL; 1570 break; 1571 } 1572 kvm_pic_update_irq(pic_irqchip(kvm)); 1573 return r; 1574 } 1575 1576 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps) 1577 { 1578 int r = 0; 1579 1580 memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state)); 1581 return r; 1582 } 1583 1584 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps) 1585 { 1586 int r = 0; 1587 1588 memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state)); 1589 kvm_pit_load_count(kvm, 0, ps->channels[0].count); 1590 return r; 1591 } 1592 1593 /* 1594 * Get (and clear) the dirty memory log for a memory slot. 1595 */ 1596 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, 1597 struct kvm_dirty_log *log) 1598 { 1599 int r; 1600 int n; 1601 struct kvm_memory_slot *memslot; 1602 int is_dirty = 0; 1603 1604 down_write(&kvm->slots_lock); 1605 1606 r = kvm_get_dirty_log(kvm, log, &is_dirty); 1607 if (r) 1608 goto out; 1609 1610 /* If nothing is dirty, don't bother messing with page tables. */ 1611 if (is_dirty) { 1612 kvm_mmu_slot_remove_write_access(kvm, log->slot); 1613 kvm_flush_remote_tlbs(kvm); 1614 memslot = &kvm->memslots[log->slot]; 1615 n = ALIGN(memslot->npages, BITS_PER_LONG) / 8; 1616 memset(memslot->dirty_bitmap, 0, n); 1617 } 1618 r = 0; 1619 out: 1620 up_write(&kvm->slots_lock); 1621 return r; 1622 } 1623 1624 long kvm_arch_vm_ioctl(struct file *filp, 1625 unsigned int ioctl, unsigned long arg) 1626 { 1627 struct kvm *kvm = filp->private_data; 1628 void __user *argp = (void __user *)arg; 1629 int r = -EINVAL; 1630 1631 switch (ioctl) { 1632 case KVM_SET_TSS_ADDR: 1633 r = kvm_vm_ioctl_set_tss_addr(kvm, arg); 1634 if (r < 0) 1635 goto out; 1636 break; 1637 case KVM_SET_MEMORY_REGION: { 1638 struct kvm_memory_region kvm_mem; 1639 struct kvm_userspace_memory_region kvm_userspace_mem; 1640 1641 r = -EFAULT; 1642 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem)) 1643 goto out; 1644 kvm_userspace_mem.slot = kvm_mem.slot; 1645 kvm_userspace_mem.flags = kvm_mem.flags; 1646 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr; 1647 kvm_userspace_mem.memory_size = kvm_mem.memory_size; 1648 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0); 1649 if (r) 1650 goto out; 1651 break; 1652 } 1653 case KVM_SET_NR_MMU_PAGES: 1654 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg); 1655 if (r) 1656 goto out; 1657 break; 1658 case KVM_GET_NR_MMU_PAGES: 1659 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm); 1660 break; 1661 case KVM_SET_MEMORY_ALIAS: { 1662 struct kvm_memory_alias alias; 1663 1664 r = -EFAULT; 1665 if (copy_from_user(&alias, argp, sizeof alias)) 1666 goto out; 1667 r = kvm_vm_ioctl_set_memory_alias(kvm, &alias); 1668 if (r) 1669 goto out; 1670 break; 1671 } 1672 case KVM_CREATE_IRQCHIP: 1673 r = -ENOMEM; 1674 kvm->arch.vpic = kvm_create_pic(kvm); 1675 if (kvm->arch.vpic) { 1676 r = kvm_ioapic_init(kvm); 1677 if (r) { 1678 kfree(kvm->arch.vpic); 1679 kvm->arch.vpic = NULL; 1680 goto out; 1681 } 1682 } else 1683 goto out; 1684 break; 1685 case KVM_CREATE_PIT: 1686 r = -ENOMEM; 1687 kvm->arch.vpit = kvm_create_pit(kvm); 1688 if (kvm->arch.vpit) 1689 r = 0; 1690 break; 1691 case KVM_IRQ_LINE: { 1692 struct kvm_irq_level irq_event; 1693 1694 r = -EFAULT; 1695 if (copy_from_user(&irq_event, argp, sizeof irq_event)) 1696 goto out; 1697 if (irqchip_in_kernel(kvm)) { 1698 mutex_lock(&kvm->lock); 1699 if (irq_event.irq < 16) 1700 kvm_pic_set_irq(pic_irqchip(kvm), 1701 irq_event.irq, 1702 irq_event.level); 1703 kvm_ioapic_set_irq(kvm->arch.vioapic, 1704 irq_event.irq, 1705 irq_event.level); 1706 mutex_unlock(&kvm->lock); 1707 r = 0; 1708 } 1709 break; 1710 } 1711 case KVM_GET_IRQCHIP: { 1712 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */ 1713 struct kvm_irqchip chip; 1714 1715 r = -EFAULT; 1716 if (copy_from_user(&chip, argp, sizeof chip)) 1717 goto out; 1718 r = -ENXIO; 1719 if (!irqchip_in_kernel(kvm)) 1720 goto out; 1721 r = kvm_vm_ioctl_get_irqchip(kvm, &chip); 1722 if (r) 1723 goto out; 1724 r = -EFAULT; 1725 if (copy_to_user(argp, &chip, sizeof chip)) 1726 goto out; 1727 r = 0; 1728 break; 1729 } 1730 case KVM_SET_IRQCHIP: { 1731 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */ 1732 struct kvm_irqchip chip; 1733 1734 r = -EFAULT; 1735 if (copy_from_user(&chip, argp, sizeof chip)) 1736 goto out; 1737 r = -ENXIO; 1738 if (!irqchip_in_kernel(kvm)) 1739 goto out; 1740 r = kvm_vm_ioctl_set_irqchip(kvm, &chip); 1741 if (r) 1742 goto out; 1743 r = 0; 1744 break; 1745 } 1746 case KVM_GET_PIT: { 1747 struct kvm_pit_state ps; 1748 r = -EFAULT; 1749 if (copy_from_user(&ps, argp, sizeof ps)) 1750 goto out; 1751 r = -ENXIO; 1752 if (!kvm->arch.vpit) 1753 goto out; 1754 r = kvm_vm_ioctl_get_pit(kvm, &ps); 1755 if (r) 1756 goto out; 1757 r = -EFAULT; 1758 if (copy_to_user(argp, &ps, sizeof ps)) 1759 goto out; 1760 r = 0; 1761 break; 1762 } 1763 case KVM_SET_PIT: { 1764 struct kvm_pit_state ps; 1765 r = -EFAULT; 1766 if (copy_from_user(&ps, argp, sizeof ps)) 1767 goto out; 1768 r = -ENXIO; 1769 if (!kvm->arch.vpit) 1770 goto out; 1771 r = kvm_vm_ioctl_set_pit(kvm, &ps); 1772 if (r) 1773 goto out; 1774 r = 0; 1775 break; 1776 } 1777 default: 1778 ; 1779 } 1780 out: 1781 return r; 1782 } 1783 1784 static void kvm_init_msr_list(void) 1785 { 1786 u32 dummy[2]; 1787 unsigned i, j; 1788 1789 for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) { 1790 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0) 1791 continue; 1792 if (j < i) 1793 msrs_to_save[j] = msrs_to_save[i]; 1794 j++; 1795 } 1796 num_msrs_to_save = j; 1797 } 1798 1799 /* 1800 * Only apic need an MMIO device hook, so shortcut now.. 1801 */ 1802 static struct kvm_io_device *vcpu_find_pervcpu_dev(struct kvm_vcpu *vcpu, 1803 gpa_t addr, int len, 1804 int is_write) 1805 { 1806 struct kvm_io_device *dev; 1807 1808 if (vcpu->arch.apic) { 1809 dev = &vcpu->arch.apic->dev; 1810 if (dev->in_range(dev, addr, len, is_write)) 1811 return dev; 1812 } 1813 return NULL; 1814 } 1815 1816 1817 static struct kvm_io_device *vcpu_find_mmio_dev(struct kvm_vcpu *vcpu, 1818 gpa_t addr, int len, 1819 int is_write) 1820 { 1821 struct kvm_io_device *dev; 1822 1823 dev = vcpu_find_pervcpu_dev(vcpu, addr, len, is_write); 1824 if (dev == NULL) 1825 dev = kvm_io_bus_find_dev(&vcpu->kvm->mmio_bus, addr, len, 1826 is_write); 1827 return dev; 1828 } 1829 1830 int emulator_read_std(unsigned long addr, 1831 void *val, 1832 unsigned int bytes, 1833 struct kvm_vcpu *vcpu) 1834 { 1835 void *data = val; 1836 int r = X86EMUL_CONTINUE; 1837 1838 while (bytes) { 1839 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr); 1840 unsigned offset = addr & (PAGE_SIZE-1); 1841 unsigned tocopy = min(bytes, (unsigned)PAGE_SIZE - offset); 1842 int ret; 1843 1844 if (gpa == UNMAPPED_GVA) { 1845 r = X86EMUL_PROPAGATE_FAULT; 1846 goto out; 1847 } 1848 ret = kvm_read_guest(vcpu->kvm, gpa, data, tocopy); 1849 if (ret < 0) { 1850 r = X86EMUL_UNHANDLEABLE; 1851 goto out; 1852 } 1853 1854 bytes -= tocopy; 1855 data += tocopy; 1856 addr += tocopy; 1857 } 1858 out: 1859 return r; 1860 } 1861 EXPORT_SYMBOL_GPL(emulator_read_std); 1862 1863 static int emulator_read_emulated(unsigned long addr, 1864 void *val, 1865 unsigned int bytes, 1866 struct kvm_vcpu *vcpu) 1867 { 1868 struct kvm_io_device *mmio_dev; 1869 gpa_t gpa; 1870 1871 if (vcpu->mmio_read_completed) { 1872 memcpy(val, vcpu->mmio_data, bytes); 1873 vcpu->mmio_read_completed = 0; 1874 return X86EMUL_CONTINUE; 1875 } 1876 1877 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr); 1878 1879 /* For APIC access vmexit */ 1880 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE) 1881 goto mmio; 1882 1883 if (emulator_read_std(addr, val, bytes, vcpu) 1884 == X86EMUL_CONTINUE) 1885 return X86EMUL_CONTINUE; 1886 if (gpa == UNMAPPED_GVA) 1887 return X86EMUL_PROPAGATE_FAULT; 1888 1889 mmio: 1890 /* 1891 * Is this MMIO handled locally? 1892 */ 1893 mutex_lock(&vcpu->kvm->lock); 1894 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa, bytes, 0); 1895 if (mmio_dev) { 1896 kvm_iodevice_read(mmio_dev, gpa, bytes, val); 1897 mutex_unlock(&vcpu->kvm->lock); 1898 return X86EMUL_CONTINUE; 1899 } 1900 mutex_unlock(&vcpu->kvm->lock); 1901 1902 vcpu->mmio_needed = 1; 1903 vcpu->mmio_phys_addr = gpa; 1904 vcpu->mmio_size = bytes; 1905 vcpu->mmio_is_write = 0; 1906 1907 return X86EMUL_UNHANDLEABLE; 1908 } 1909 1910 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa, 1911 const void *val, int bytes) 1912 { 1913 int ret; 1914 1915 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes); 1916 if (ret < 0) 1917 return 0; 1918 kvm_mmu_pte_write(vcpu, gpa, val, bytes); 1919 return 1; 1920 } 1921 1922 static int emulator_write_emulated_onepage(unsigned long addr, 1923 const void *val, 1924 unsigned int bytes, 1925 struct kvm_vcpu *vcpu) 1926 { 1927 struct kvm_io_device *mmio_dev; 1928 gpa_t gpa; 1929 1930 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr); 1931 1932 if (gpa == UNMAPPED_GVA) { 1933 kvm_inject_page_fault(vcpu, addr, 2); 1934 return X86EMUL_PROPAGATE_FAULT; 1935 } 1936 1937 /* For APIC access vmexit */ 1938 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE) 1939 goto mmio; 1940 1941 if (emulator_write_phys(vcpu, gpa, val, bytes)) 1942 return X86EMUL_CONTINUE; 1943 1944 mmio: 1945 /* 1946 * Is this MMIO handled locally? 1947 */ 1948 mutex_lock(&vcpu->kvm->lock); 1949 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa, bytes, 1); 1950 if (mmio_dev) { 1951 kvm_iodevice_write(mmio_dev, gpa, bytes, val); 1952 mutex_unlock(&vcpu->kvm->lock); 1953 return X86EMUL_CONTINUE; 1954 } 1955 mutex_unlock(&vcpu->kvm->lock); 1956 1957 vcpu->mmio_needed = 1; 1958 vcpu->mmio_phys_addr = gpa; 1959 vcpu->mmio_size = bytes; 1960 vcpu->mmio_is_write = 1; 1961 memcpy(vcpu->mmio_data, val, bytes); 1962 1963 return X86EMUL_CONTINUE; 1964 } 1965 1966 int emulator_write_emulated(unsigned long addr, 1967 const void *val, 1968 unsigned int bytes, 1969 struct kvm_vcpu *vcpu) 1970 { 1971 /* Crossing a page boundary? */ 1972 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) { 1973 int rc, now; 1974 1975 now = -addr & ~PAGE_MASK; 1976 rc = emulator_write_emulated_onepage(addr, val, now, vcpu); 1977 if (rc != X86EMUL_CONTINUE) 1978 return rc; 1979 addr += now; 1980 val += now; 1981 bytes -= now; 1982 } 1983 return emulator_write_emulated_onepage(addr, val, bytes, vcpu); 1984 } 1985 EXPORT_SYMBOL_GPL(emulator_write_emulated); 1986 1987 static int emulator_cmpxchg_emulated(unsigned long addr, 1988 const void *old, 1989 const void *new, 1990 unsigned int bytes, 1991 struct kvm_vcpu *vcpu) 1992 { 1993 static int reported; 1994 1995 if (!reported) { 1996 reported = 1; 1997 printk(KERN_WARNING "kvm: emulating exchange as write\n"); 1998 } 1999 #ifndef CONFIG_X86_64 2000 /* guests cmpxchg8b have to be emulated atomically */ 2001 if (bytes == 8) { 2002 gpa_t gpa; 2003 struct page *page; 2004 char *kaddr; 2005 u64 val; 2006 2007 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr); 2008 2009 if (gpa == UNMAPPED_GVA || 2010 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE) 2011 goto emul_write; 2012 2013 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK)) 2014 goto emul_write; 2015 2016 val = *(u64 *)new; 2017 2018 down_read(¤t->mm->mmap_sem); 2019 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT); 2020 up_read(¤t->mm->mmap_sem); 2021 2022 kaddr = kmap_atomic(page, KM_USER0); 2023 set_64bit((u64 *)(kaddr + offset_in_page(gpa)), val); 2024 kunmap_atomic(kaddr, KM_USER0); 2025 kvm_release_page_dirty(page); 2026 } 2027 emul_write: 2028 #endif 2029 2030 return emulator_write_emulated(addr, new, bytes, vcpu); 2031 } 2032 2033 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg) 2034 { 2035 return kvm_x86_ops->get_segment_base(vcpu, seg); 2036 } 2037 2038 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address) 2039 { 2040 return X86EMUL_CONTINUE; 2041 } 2042 2043 int emulate_clts(struct kvm_vcpu *vcpu) 2044 { 2045 KVMTRACE_0D(CLTS, vcpu, handler); 2046 kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 & ~X86_CR0_TS); 2047 return X86EMUL_CONTINUE; 2048 } 2049 2050 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest) 2051 { 2052 struct kvm_vcpu *vcpu = ctxt->vcpu; 2053 2054 switch (dr) { 2055 case 0 ... 3: 2056 *dest = kvm_x86_ops->get_dr(vcpu, dr); 2057 return X86EMUL_CONTINUE; 2058 default: 2059 pr_unimpl(vcpu, "%s: unexpected dr %u\n", __func__, dr); 2060 return X86EMUL_UNHANDLEABLE; 2061 } 2062 } 2063 2064 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value) 2065 { 2066 unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U; 2067 int exception; 2068 2069 kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception); 2070 if (exception) { 2071 /* FIXME: better handling */ 2072 return X86EMUL_UNHANDLEABLE; 2073 } 2074 return X86EMUL_CONTINUE; 2075 } 2076 2077 void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context) 2078 { 2079 u8 opcodes[4]; 2080 unsigned long rip = vcpu->arch.rip; 2081 unsigned long rip_linear; 2082 2083 if (!printk_ratelimit()) 2084 return; 2085 2086 rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS); 2087 2088 emulator_read_std(rip_linear, (void *)opcodes, 4, vcpu); 2089 2090 printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n", 2091 context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]); 2092 } 2093 EXPORT_SYMBOL_GPL(kvm_report_emulation_failure); 2094 2095 static struct x86_emulate_ops emulate_ops = { 2096 .read_std = emulator_read_std, 2097 .read_emulated = emulator_read_emulated, 2098 .write_emulated = emulator_write_emulated, 2099 .cmpxchg_emulated = emulator_cmpxchg_emulated, 2100 }; 2101 2102 int emulate_instruction(struct kvm_vcpu *vcpu, 2103 struct kvm_run *run, 2104 unsigned long cr2, 2105 u16 error_code, 2106 int emulation_type) 2107 { 2108 int r; 2109 struct decode_cache *c; 2110 2111 vcpu->arch.mmio_fault_cr2 = cr2; 2112 kvm_x86_ops->cache_regs(vcpu); 2113 2114 vcpu->mmio_is_write = 0; 2115 vcpu->arch.pio.string = 0; 2116 2117 if (!(emulation_type & EMULTYPE_NO_DECODE)) { 2118 int cs_db, cs_l; 2119 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l); 2120 2121 vcpu->arch.emulate_ctxt.vcpu = vcpu; 2122 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu); 2123 vcpu->arch.emulate_ctxt.mode = 2124 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM) 2125 ? X86EMUL_MODE_REAL : cs_l 2126 ? X86EMUL_MODE_PROT64 : cs_db 2127 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16; 2128 2129 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops); 2130 2131 /* Reject the instructions other than VMCALL/VMMCALL when 2132 * try to emulate invalid opcode */ 2133 c = &vcpu->arch.emulate_ctxt.decode; 2134 if ((emulation_type & EMULTYPE_TRAP_UD) && 2135 (!(c->twobyte && c->b == 0x01 && 2136 (c->modrm_reg == 0 || c->modrm_reg == 3) && 2137 c->modrm_mod == 3 && c->modrm_rm == 1))) 2138 return EMULATE_FAIL; 2139 2140 ++vcpu->stat.insn_emulation; 2141 if (r) { 2142 ++vcpu->stat.insn_emulation_fail; 2143 if (kvm_mmu_unprotect_page_virt(vcpu, cr2)) 2144 return EMULATE_DONE; 2145 return EMULATE_FAIL; 2146 } 2147 } 2148 2149 r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops); 2150 2151 if (vcpu->arch.pio.string) 2152 return EMULATE_DO_MMIO; 2153 2154 if ((r || vcpu->mmio_is_write) && run) { 2155 run->exit_reason = KVM_EXIT_MMIO; 2156 run->mmio.phys_addr = vcpu->mmio_phys_addr; 2157 memcpy(run->mmio.data, vcpu->mmio_data, 8); 2158 run->mmio.len = vcpu->mmio_size; 2159 run->mmio.is_write = vcpu->mmio_is_write; 2160 } 2161 2162 if (r) { 2163 if (kvm_mmu_unprotect_page_virt(vcpu, cr2)) 2164 return EMULATE_DONE; 2165 if (!vcpu->mmio_needed) { 2166 kvm_report_emulation_failure(vcpu, "mmio"); 2167 return EMULATE_FAIL; 2168 } 2169 return EMULATE_DO_MMIO; 2170 } 2171 2172 kvm_x86_ops->decache_regs(vcpu); 2173 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags); 2174 2175 if (vcpu->mmio_is_write) { 2176 vcpu->mmio_needed = 0; 2177 return EMULATE_DO_MMIO; 2178 } 2179 2180 return EMULATE_DONE; 2181 } 2182 EXPORT_SYMBOL_GPL(emulate_instruction); 2183 2184 static void free_pio_guest_pages(struct kvm_vcpu *vcpu) 2185 { 2186 int i; 2187 2188 for (i = 0; i < ARRAY_SIZE(vcpu->arch.pio.guest_pages); ++i) 2189 if (vcpu->arch.pio.guest_pages[i]) { 2190 kvm_release_page_dirty(vcpu->arch.pio.guest_pages[i]); 2191 vcpu->arch.pio.guest_pages[i] = NULL; 2192 } 2193 } 2194 2195 static int pio_copy_data(struct kvm_vcpu *vcpu) 2196 { 2197 void *p = vcpu->arch.pio_data; 2198 void *q; 2199 unsigned bytes; 2200 int nr_pages = vcpu->arch.pio.guest_pages[1] ? 2 : 1; 2201 2202 q = vmap(vcpu->arch.pio.guest_pages, nr_pages, VM_READ|VM_WRITE, 2203 PAGE_KERNEL); 2204 if (!q) { 2205 free_pio_guest_pages(vcpu); 2206 return -ENOMEM; 2207 } 2208 q += vcpu->arch.pio.guest_page_offset; 2209 bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count; 2210 if (vcpu->arch.pio.in) 2211 memcpy(q, p, bytes); 2212 else 2213 memcpy(p, q, bytes); 2214 q -= vcpu->arch.pio.guest_page_offset; 2215 vunmap(q); 2216 free_pio_guest_pages(vcpu); 2217 return 0; 2218 } 2219 2220 int complete_pio(struct kvm_vcpu *vcpu) 2221 { 2222 struct kvm_pio_request *io = &vcpu->arch.pio; 2223 long delta; 2224 int r; 2225 2226 kvm_x86_ops->cache_regs(vcpu); 2227 2228 if (!io->string) { 2229 if (io->in) 2230 memcpy(&vcpu->arch.regs[VCPU_REGS_RAX], vcpu->arch.pio_data, 2231 io->size); 2232 } else { 2233 if (io->in) { 2234 r = pio_copy_data(vcpu); 2235 if (r) { 2236 kvm_x86_ops->cache_regs(vcpu); 2237 return r; 2238 } 2239 } 2240 2241 delta = 1; 2242 if (io->rep) { 2243 delta *= io->cur_count; 2244 /* 2245 * The size of the register should really depend on 2246 * current address size. 2247 */ 2248 vcpu->arch.regs[VCPU_REGS_RCX] -= delta; 2249 } 2250 if (io->down) 2251 delta = -delta; 2252 delta *= io->size; 2253 if (io->in) 2254 vcpu->arch.regs[VCPU_REGS_RDI] += delta; 2255 else 2256 vcpu->arch.regs[VCPU_REGS_RSI] += delta; 2257 } 2258 2259 kvm_x86_ops->decache_regs(vcpu); 2260 2261 io->count -= io->cur_count; 2262 io->cur_count = 0; 2263 2264 return 0; 2265 } 2266 2267 static void kernel_pio(struct kvm_io_device *pio_dev, 2268 struct kvm_vcpu *vcpu, 2269 void *pd) 2270 { 2271 /* TODO: String I/O for in kernel device */ 2272 2273 mutex_lock(&vcpu->kvm->lock); 2274 if (vcpu->arch.pio.in) 2275 kvm_iodevice_read(pio_dev, vcpu->arch.pio.port, 2276 vcpu->arch.pio.size, 2277 pd); 2278 else 2279 kvm_iodevice_write(pio_dev, vcpu->arch.pio.port, 2280 vcpu->arch.pio.size, 2281 pd); 2282 mutex_unlock(&vcpu->kvm->lock); 2283 } 2284 2285 static void pio_string_write(struct kvm_io_device *pio_dev, 2286 struct kvm_vcpu *vcpu) 2287 { 2288 struct kvm_pio_request *io = &vcpu->arch.pio; 2289 void *pd = vcpu->arch.pio_data; 2290 int i; 2291 2292 mutex_lock(&vcpu->kvm->lock); 2293 for (i = 0; i < io->cur_count; i++) { 2294 kvm_iodevice_write(pio_dev, io->port, 2295 io->size, 2296 pd); 2297 pd += io->size; 2298 } 2299 mutex_unlock(&vcpu->kvm->lock); 2300 } 2301 2302 static struct kvm_io_device *vcpu_find_pio_dev(struct kvm_vcpu *vcpu, 2303 gpa_t addr, int len, 2304 int is_write) 2305 { 2306 return kvm_io_bus_find_dev(&vcpu->kvm->pio_bus, addr, len, is_write); 2307 } 2308 2309 int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in, 2310 int size, unsigned port) 2311 { 2312 struct kvm_io_device *pio_dev; 2313 2314 vcpu->run->exit_reason = KVM_EXIT_IO; 2315 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT; 2316 vcpu->run->io.size = vcpu->arch.pio.size = size; 2317 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE; 2318 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = 1; 2319 vcpu->run->io.port = vcpu->arch.pio.port = port; 2320 vcpu->arch.pio.in = in; 2321 vcpu->arch.pio.string = 0; 2322 vcpu->arch.pio.down = 0; 2323 vcpu->arch.pio.guest_page_offset = 0; 2324 vcpu->arch.pio.rep = 0; 2325 2326 if (vcpu->run->io.direction == KVM_EXIT_IO_IN) 2327 KVMTRACE_2D(IO_READ, vcpu, vcpu->run->io.port, (u32)size, 2328 handler); 2329 else 2330 KVMTRACE_2D(IO_WRITE, vcpu, vcpu->run->io.port, (u32)size, 2331 handler); 2332 2333 kvm_x86_ops->cache_regs(vcpu); 2334 memcpy(vcpu->arch.pio_data, &vcpu->arch.regs[VCPU_REGS_RAX], 4); 2335 2336 kvm_x86_ops->skip_emulated_instruction(vcpu); 2337 2338 pio_dev = vcpu_find_pio_dev(vcpu, port, size, !in); 2339 if (pio_dev) { 2340 kernel_pio(pio_dev, vcpu, vcpu->arch.pio_data); 2341 complete_pio(vcpu); 2342 return 1; 2343 } 2344 return 0; 2345 } 2346 EXPORT_SYMBOL_GPL(kvm_emulate_pio); 2347 2348 int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in, 2349 int size, unsigned long count, int down, 2350 gva_t address, int rep, unsigned port) 2351 { 2352 unsigned now, in_page; 2353 int i, ret = 0; 2354 int nr_pages = 1; 2355 struct page *page; 2356 struct kvm_io_device *pio_dev; 2357 2358 vcpu->run->exit_reason = KVM_EXIT_IO; 2359 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT; 2360 vcpu->run->io.size = vcpu->arch.pio.size = size; 2361 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE; 2362 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = count; 2363 vcpu->run->io.port = vcpu->arch.pio.port = port; 2364 vcpu->arch.pio.in = in; 2365 vcpu->arch.pio.string = 1; 2366 vcpu->arch.pio.down = down; 2367 vcpu->arch.pio.guest_page_offset = offset_in_page(address); 2368 vcpu->arch.pio.rep = rep; 2369 2370 if (vcpu->run->io.direction == KVM_EXIT_IO_IN) 2371 KVMTRACE_2D(IO_READ, vcpu, vcpu->run->io.port, (u32)size, 2372 handler); 2373 else 2374 KVMTRACE_2D(IO_WRITE, vcpu, vcpu->run->io.port, (u32)size, 2375 handler); 2376 2377 if (!count) { 2378 kvm_x86_ops->skip_emulated_instruction(vcpu); 2379 return 1; 2380 } 2381 2382 if (!down) 2383 in_page = PAGE_SIZE - offset_in_page(address); 2384 else 2385 in_page = offset_in_page(address) + size; 2386 now = min(count, (unsigned long)in_page / size); 2387 if (!now) { 2388 /* 2389 * String I/O straddles page boundary. Pin two guest pages 2390 * so that we satisfy atomicity constraints. Do just one 2391 * transaction to avoid complexity. 2392 */ 2393 nr_pages = 2; 2394 now = 1; 2395 } 2396 if (down) { 2397 /* 2398 * String I/O in reverse. Yuck. Kill the guest, fix later. 2399 */ 2400 pr_unimpl(vcpu, "guest string pio down\n"); 2401 kvm_inject_gp(vcpu, 0); 2402 return 1; 2403 } 2404 vcpu->run->io.count = now; 2405 vcpu->arch.pio.cur_count = now; 2406 2407 if (vcpu->arch.pio.cur_count == vcpu->arch.pio.count) 2408 kvm_x86_ops->skip_emulated_instruction(vcpu); 2409 2410 for (i = 0; i < nr_pages; ++i) { 2411 page = gva_to_page(vcpu, address + i * PAGE_SIZE); 2412 vcpu->arch.pio.guest_pages[i] = page; 2413 if (!page) { 2414 kvm_inject_gp(vcpu, 0); 2415 free_pio_guest_pages(vcpu); 2416 return 1; 2417 } 2418 } 2419 2420 pio_dev = vcpu_find_pio_dev(vcpu, port, 2421 vcpu->arch.pio.cur_count, 2422 !vcpu->arch.pio.in); 2423 if (!vcpu->arch.pio.in) { 2424 /* string PIO write */ 2425 ret = pio_copy_data(vcpu); 2426 if (ret >= 0 && pio_dev) { 2427 pio_string_write(pio_dev, vcpu); 2428 complete_pio(vcpu); 2429 if (vcpu->arch.pio.count == 0) 2430 ret = 1; 2431 } 2432 } else if (pio_dev) 2433 pr_unimpl(vcpu, "no string pio read support yet, " 2434 "port %x size %d count %ld\n", 2435 port, size, count); 2436 2437 return ret; 2438 } 2439 EXPORT_SYMBOL_GPL(kvm_emulate_pio_string); 2440 2441 int kvm_arch_init(void *opaque) 2442 { 2443 int r; 2444 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque; 2445 2446 if (kvm_x86_ops) { 2447 printk(KERN_ERR "kvm: already loaded the other module\n"); 2448 r = -EEXIST; 2449 goto out; 2450 } 2451 2452 if (!ops->cpu_has_kvm_support()) { 2453 printk(KERN_ERR "kvm: no hardware support\n"); 2454 r = -EOPNOTSUPP; 2455 goto out; 2456 } 2457 if (ops->disabled_by_bios()) { 2458 printk(KERN_ERR "kvm: disabled by bios\n"); 2459 r = -EOPNOTSUPP; 2460 goto out; 2461 } 2462 2463 r = kvm_mmu_module_init(); 2464 if (r) 2465 goto out; 2466 2467 kvm_init_msr_list(); 2468 2469 kvm_x86_ops = ops; 2470 kvm_mmu_set_nonpresent_ptes(0ull, 0ull); 2471 kvm_mmu_set_base_ptes(PT_PRESENT_MASK); 2472 kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK, 2473 PT_DIRTY_MASK, PT64_NX_MASK, 0); 2474 return 0; 2475 2476 out: 2477 return r; 2478 } 2479 2480 void kvm_arch_exit(void) 2481 { 2482 kvm_x86_ops = NULL; 2483 kvm_mmu_module_exit(); 2484 } 2485 2486 int kvm_emulate_halt(struct kvm_vcpu *vcpu) 2487 { 2488 ++vcpu->stat.halt_exits; 2489 KVMTRACE_0D(HLT, vcpu, handler); 2490 if (irqchip_in_kernel(vcpu->kvm)) { 2491 vcpu->arch.mp_state = KVM_MP_STATE_HALTED; 2492 up_read(&vcpu->kvm->slots_lock); 2493 kvm_vcpu_block(vcpu); 2494 down_read(&vcpu->kvm->slots_lock); 2495 if (vcpu->arch.mp_state != KVM_MP_STATE_RUNNABLE) 2496 return -EINTR; 2497 return 1; 2498 } else { 2499 vcpu->run->exit_reason = KVM_EXIT_HLT; 2500 return 0; 2501 } 2502 } 2503 EXPORT_SYMBOL_GPL(kvm_emulate_halt); 2504 2505 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0, 2506 unsigned long a1) 2507 { 2508 if (is_long_mode(vcpu)) 2509 return a0; 2510 else 2511 return a0 | ((gpa_t)a1 << 32); 2512 } 2513 2514 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu) 2515 { 2516 unsigned long nr, a0, a1, a2, a3, ret; 2517 int r = 1; 2518 2519 kvm_x86_ops->cache_regs(vcpu); 2520 2521 nr = vcpu->arch.regs[VCPU_REGS_RAX]; 2522 a0 = vcpu->arch.regs[VCPU_REGS_RBX]; 2523 a1 = vcpu->arch.regs[VCPU_REGS_RCX]; 2524 a2 = vcpu->arch.regs[VCPU_REGS_RDX]; 2525 a3 = vcpu->arch.regs[VCPU_REGS_RSI]; 2526 2527 KVMTRACE_1D(VMMCALL, vcpu, (u32)nr, handler); 2528 2529 if (!is_long_mode(vcpu)) { 2530 nr &= 0xFFFFFFFF; 2531 a0 &= 0xFFFFFFFF; 2532 a1 &= 0xFFFFFFFF; 2533 a2 &= 0xFFFFFFFF; 2534 a3 &= 0xFFFFFFFF; 2535 } 2536 2537 switch (nr) { 2538 case KVM_HC_VAPIC_POLL_IRQ: 2539 ret = 0; 2540 break; 2541 case KVM_HC_MMU_OP: 2542 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret); 2543 break; 2544 default: 2545 ret = -KVM_ENOSYS; 2546 break; 2547 } 2548 vcpu->arch.regs[VCPU_REGS_RAX] = ret; 2549 kvm_x86_ops->decache_regs(vcpu); 2550 ++vcpu->stat.hypercalls; 2551 return r; 2552 } 2553 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall); 2554 2555 int kvm_fix_hypercall(struct kvm_vcpu *vcpu) 2556 { 2557 char instruction[3]; 2558 int ret = 0; 2559 2560 2561 /* 2562 * Blow out the MMU to ensure that no other VCPU has an active mapping 2563 * to ensure that the updated hypercall appears atomically across all 2564 * VCPUs. 2565 */ 2566 kvm_mmu_zap_all(vcpu->kvm); 2567 2568 kvm_x86_ops->cache_regs(vcpu); 2569 kvm_x86_ops->patch_hypercall(vcpu, instruction); 2570 if (emulator_write_emulated(vcpu->arch.rip, instruction, 3, vcpu) 2571 != X86EMUL_CONTINUE) 2572 ret = -EFAULT; 2573 2574 return ret; 2575 } 2576 2577 static u64 mk_cr_64(u64 curr_cr, u32 new_val) 2578 { 2579 return (curr_cr & ~((1ULL << 32) - 1)) | new_val; 2580 } 2581 2582 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base) 2583 { 2584 struct descriptor_table dt = { limit, base }; 2585 2586 kvm_x86_ops->set_gdt(vcpu, &dt); 2587 } 2588 2589 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base) 2590 { 2591 struct descriptor_table dt = { limit, base }; 2592 2593 kvm_x86_ops->set_idt(vcpu, &dt); 2594 } 2595 2596 void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw, 2597 unsigned long *rflags) 2598 { 2599 kvm_lmsw(vcpu, msw); 2600 *rflags = kvm_x86_ops->get_rflags(vcpu); 2601 } 2602 2603 unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr) 2604 { 2605 unsigned long value; 2606 2607 kvm_x86_ops->decache_cr4_guest_bits(vcpu); 2608 switch (cr) { 2609 case 0: 2610 value = vcpu->arch.cr0; 2611 break; 2612 case 2: 2613 value = vcpu->arch.cr2; 2614 break; 2615 case 3: 2616 value = vcpu->arch.cr3; 2617 break; 2618 case 4: 2619 value = vcpu->arch.cr4; 2620 break; 2621 case 8: 2622 value = kvm_get_cr8(vcpu); 2623 break; 2624 default: 2625 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr); 2626 return 0; 2627 } 2628 KVMTRACE_3D(CR_READ, vcpu, (u32)cr, (u32)value, 2629 (u32)((u64)value >> 32), handler); 2630 2631 return value; 2632 } 2633 2634 void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val, 2635 unsigned long *rflags) 2636 { 2637 KVMTRACE_3D(CR_WRITE, vcpu, (u32)cr, (u32)val, 2638 (u32)((u64)val >> 32), handler); 2639 2640 switch (cr) { 2641 case 0: 2642 kvm_set_cr0(vcpu, mk_cr_64(vcpu->arch.cr0, val)); 2643 *rflags = kvm_x86_ops->get_rflags(vcpu); 2644 break; 2645 case 2: 2646 vcpu->arch.cr2 = val; 2647 break; 2648 case 3: 2649 kvm_set_cr3(vcpu, val); 2650 break; 2651 case 4: 2652 kvm_set_cr4(vcpu, mk_cr_64(vcpu->arch.cr4, val)); 2653 break; 2654 case 8: 2655 kvm_set_cr8(vcpu, val & 0xfUL); 2656 break; 2657 default: 2658 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr); 2659 } 2660 } 2661 2662 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i) 2663 { 2664 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i]; 2665 int j, nent = vcpu->arch.cpuid_nent; 2666 2667 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT; 2668 /* when no next entry is found, the current entry[i] is reselected */ 2669 for (j = i + 1; j == i; j = (j + 1) % nent) { 2670 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j]; 2671 if (ej->function == e->function) { 2672 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT; 2673 return j; 2674 } 2675 } 2676 return 0; /* silence gcc, even though control never reaches here */ 2677 } 2678 2679 /* find an entry with matching function, matching index (if needed), and that 2680 * should be read next (if it's stateful) */ 2681 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e, 2682 u32 function, u32 index) 2683 { 2684 if (e->function != function) 2685 return 0; 2686 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index) 2687 return 0; 2688 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) && 2689 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT)) 2690 return 0; 2691 return 1; 2692 } 2693 2694 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu) 2695 { 2696 int i; 2697 u32 function, index; 2698 struct kvm_cpuid_entry2 *e, *best; 2699 2700 kvm_x86_ops->cache_regs(vcpu); 2701 function = vcpu->arch.regs[VCPU_REGS_RAX]; 2702 index = vcpu->arch.regs[VCPU_REGS_RCX]; 2703 vcpu->arch.regs[VCPU_REGS_RAX] = 0; 2704 vcpu->arch.regs[VCPU_REGS_RBX] = 0; 2705 vcpu->arch.regs[VCPU_REGS_RCX] = 0; 2706 vcpu->arch.regs[VCPU_REGS_RDX] = 0; 2707 best = NULL; 2708 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) { 2709 e = &vcpu->arch.cpuid_entries[i]; 2710 if (is_matching_cpuid_entry(e, function, index)) { 2711 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) 2712 move_to_next_stateful_cpuid_entry(vcpu, i); 2713 best = e; 2714 break; 2715 } 2716 /* 2717 * Both basic or both extended? 2718 */ 2719 if (((e->function ^ function) & 0x80000000) == 0) 2720 if (!best || e->function > best->function) 2721 best = e; 2722 } 2723 if (best) { 2724 vcpu->arch.regs[VCPU_REGS_RAX] = best->eax; 2725 vcpu->arch.regs[VCPU_REGS_RBX] = best->ebx; 2726 vcpu->arch.regs[VCPU_REGS_RCX] = best->ecx; 2727 vcpu->arch.regs[VCPU_REGS_RDX] = best->edx; 2728 } 2729 kvm_x86_ops->decache_regs(vcpu); 2730 kvm_x86_ops->skip_emulated_instruction(vcpu); 2731 KVMTRACE_5D(CPUID, vcpu, function, 2732 (u32)vcpu->arch.regs[VCPU_REGS_RAX], 2733 (u32)vcpu->arch.regs[VCPU_REGS_RBX], 2734 (u32)vcpu->arch.regs[VCPU_REGS_RCX], 2735 (u32)vcpu->arch.regs[VCPU_REGS_RDX], handler); 2736 } 2737 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid); 2738 2739 /* 2740 * Check if userspace requested an interrupt window, and that the 2741 * interrupt window is open. 2742 * 2743 * No need to exit to userspace if we already have an interrupt queued. 2744 */ 2745 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu, 2746 struct kvm_run *kvm_run) 2747 { 2748 return (!vcpu->arch.irq_summary && 2749 kvm_run->request_interrupt_window && 2750 vcpu->arch.interrupt_window_open && 2751 (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF)); 2752 } 2753 2754 static void post_kvm_run_save(struct kvm_vcpu *vcpu, 2755 struct kvm_run *kvm_run) 2756 { 2757 kvm_run->if_flag = (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF) != 0; 2758 kvm_run->cr8 = kvm_get_cr8(vcpu); 2759 kvm_run->apic_base = kvm_get_apic_base(vcpu); 2760 if (irqchip_in_kernel(vcpu->kvm)) 2761 kvm_run->ready_for_interrupt_injection = 1; 2762 else 2763 kvm_run->ready_for_interrupt_injection = 2764 (vcpu->arch.interrupt_window_open && 2765 vcpu->arch.irq_summary == 0); 2766 } 2767 2768 static void vapic_enter(struct kvm_vcpu *vcpu) 2769 { 2770 struct kvm_lapic *apic = vcpu->arch.apic; 2771 struct page *page; 2772 2773 if (!apic || !apic->vapic_addr) 2774 return; 2775 2776 down_read(¤t->mm->mmap_sem); 2777 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT); 2778 up_read(¤t->mm->mmap_sem); 2779 2780 vcpu->arch.apic->vapic_page = page; 2781 } 2782 2783 static void vapic_exit(struct kvm_vcpu *vcpu) 2784 { 2785 struct kvm_lapic *apic = vcpu->arch.apic; 2786 2787 if (!apic || !apic->vapic_addr) 2788 return; 2789 2790 down_read(&vcpu->kvm->slots_lock); 2791 kvm_release_page_dirty(apic->vapic_page); 2792 mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT); 2793 up_read(&vcpu->kvm->slots_lock); 2794 } 2795 2796 static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run) 2797 { 2798 int r; 2799 2800 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) { 2801 pr_debug("vcpu %d received sipi with vector # %x\n", 2802 vcpu->vcpu_id, vcpu->arch.sipi_vector); 2803 kvm_lapic_reset(vcpu); 2804 r = kvm_x86_ops->vcpu_reset(vcpu); 2805 if (r) 2806 return r; 2807 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE; 2808 } 2809 2810 down_read(&vcpu->kvm->slots_lock); 2811 vapic_enter(vcpu); 2812 2813 preempted: 2814 if (vcpu->guest_debug.enabled) 2815 kvm_x86_ops->guest_debug_pre(vcpu); 2816 2817 again: 2818 if (vcpu->requests) 2819 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests)) 2820 kvm_mmu_unload(vcpu); 2821 2822 r = kvm_mmu_reload(vcpu); 2823 if (unlikely(r)) 2824 goto out; 2825 2826 if (vcpu->requests) { 2827 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests)) 2828 __kvm_migrate_timers(vcpu); 2829 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests)) 2830 kvm_x86_ops->tlb_flush(vcpu); 2831 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS, 2832 &vcpu->requests)) { 2833 kvm_run->exit_reason = KVM_EXIT_TPR_ACCESS; 2834 r = 0; 2835 goto out; 2836 } 2837 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests)) { 2838 kvm_run->exit_reason = KVM_EXIT_SHUTDOWN; 2839 r = 0; 2840 goto out; 2841 } 2842 } 2843 2844 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests); 2845 kvm_inject_pending_timer_irqs(vcpu); 2846 2847 preempt_disable(); 2848 2849 kvm_x86_ops->prepare_guest_switch(vcpu); 2850 kvm_load_guest_fpu(vcpu); 2851 2852 local_irq_disable(); 2853 2854 if (vcpu->requests || need_resched()) { 2855 local_irq_enable(); 2856 preempt_enable(); 2857 r = 1; 2858 goto out; 2859 } 2860 2861 if (signal_pending(current)) { 2862 local_irq_enable(); 2863 preempt_enable(); 2864 r = -EINTR; 2865 kvm_run->exit_reason = KVM_EXIT_INTR; 2866 ++vcpu->stat.signal_exits; 2867 goto out; 2868 } 2869 2870 vcpu->guest_mode = 1; 2871 /* 2872 * Make sure that guest_mode assignment won't happen after 2873 * testing the pending IRQ vector bitmap. 2874 */ 2875 smp_wmb(); 2876 2877 if (vcpu->arch.exception.pending) 2878 __queue_exception(vcpu); 2879 else if (irqchip_in_kernel(vcpu->kvm)) 2880 kvm_x86_ops->inject_pending_irq(vcpu); 2881 else 2882 kvm_x86_ops->inject_pending_vectors(vcpu, kvm_run); 2883 2884 kvm_lapic_sync_to_vapic(vcpu); 2885 2886 up_read(&vcpu->kvm->slots_lock); 2887 2888 kvm_guest_enter(); 2889 2890 2891 KVMTRACE_0D(VMENTRY, vcpu, entryexit); 2892 kvm_x86_ops->run(vcpu, kvm_run); 2893 2894 vcpu->guest_mode = 0; 2895 local_irq_enable(); 2896 2897 ++vcpu->stat.exits; 2898 2899 /* 2900 * We must have an instruction between local_irq_enable() and 2901 * kvm_guest_exit(), so the timer interrupt isn't delayed by 2902 * the interrupt shadow. The stat.exits increment will do nicely. 2903 * But we need to prevent reordering, hence this barrier(): 2904 */ 2905 barrier(); 2906 2907 kvm_guest_exit(); 2908 2909 preempt_enable(); 2910 2911 down_read(&vcpu->kvm->slots_lock); 2912 2913 /* 2914 * Profile KVM exit RIPs: 2915 */ 2916 if (unlikely(prof_on == KVM_PROFILING)) { 2917 kvm_x86_ops->cache_regs(vcpu); 2918 profile_hit(KVM_PROFILING, (void *)vcpu->arch.rip); 2919 } 2920 2921 if (vcpu->arch.exception.pending && kvm_x86_ops->exception_injected(vcpu)) 2922 vcpu->arch.exception.pending = false; 2923 2924 kvm_lapic_sync_from_vapic(vcpu); 2925 2926 r = kvm_x86_ops->handle_exit(kvm_run, vcpu); 2927 2928 if (r > 0) { 2929 if (dm_request_for_irq_injection(vcpu, kvm_run)) { 2930 r = -EINTR; 2931 kvm_run->exit_reason = KVM_EXIT_INTR; 2932 ++vcpu->stat.request_irq_exits; 2933 goto out; 2934 } 2935 if (!need_resched()) 2936 goto again; 2937 } 2938 2939 out: 2940 up_read(&vcpu->kvm->slots_lock); 2941 if (r > 0) { 2942 kvm_resched(vcpu); 2943 down_read(&vcpu->kvm->slots_lock); 2944 goto preempted; 2945 } 2946 2947 post_kvm_run_save(vcpu, kvm_run); 2948 2949 vapic_exit(vcpu); 2950 2951 return r; 2952 } 2953 2954 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run) 2955 { 2956 int r; 2957 sigset_t sigsaved; 2958 2959 vcpu_load(vcpu); 2960 2961 if (vcpu->sigset_active) 2962 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved); 2963 2964 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) { 2965 kvm_vcpu_block(vcpu); 2966 r = -EAGAIN; 2967 goto out; 2968 } 2969 2970 /* re-sync apic's tpr */ 2971 if (!irqchip_in_kernel(vcpu->kvm)) 2972 kvm_set_cr8(vcpu, kvm_run->cr8); 2973 2974 if (vcpu->arch.pio.cur_count) { 2975 r = complete_pio(vcpu); 2976 if (r) 2977 goto out; 2978 } 2979 #if CONFIG_HAS_IOMEM 2980 if (vcpu->mmio_needed) { 2981 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8); 2982 vcpu->mmio_read_completed = 1; 2983 vcpu->mmio_needed = 0; 2984 2985 down_read(&vcpu->kvm->slots_lock); 2986 r = emulate_instruction(vcpu, kvm_run, 2987 vcpu->arch.mmio_fault_cr2, 0, 2988 EMULTYPE_NO_DECODE); 2989 up_read(&vcpu->kvm->slots_lock); 2990 if (r == EMULATE_DO_MMIO) { 2991 /* 2992 * Read-modify-write. Back to userspace. 2993 */ 2994 r = 0; 2995 goto out; 2996 } 2997 } 2998 #endif 2999 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL) { 3000 kvm_x86_ops->cache_regs(vcpu); 3001 vcpu->arch.regs[VCPU_REGS_RAX] = kvm_run->hypercall.ret; 3002 kvm_x86_ops->decache_regs(vcpu); 3003 } 3004 3005 r = __vcpu_run(vcpu, kvm_run); 3006 3007 out: 3008 if (vcpu->sigset_active) 3009 sigprocmask(SIG_SETMASK, &sigsaved, NULL); 3010 3011 vcpu_put(vcpu); 3012 return r; 3013 } 3014 3015 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) 3016 { 3017 vcpu_load(vcpu); 3018 3019 kvm_x86_ops->cache_regs(vcpu); 3020 3021 regs->rax = vcpu->arch.regs[VCPU_REGS_RAX]; 3022 regs->rbx = vcpu->arch.regs[VCPU_REGS_RBX]; 3023 regs->rcx = vcpu->arch.regs[VCPU_REGS_RCX]; 3024 regs->rdx = vcpu->arch.regs[VCPU_REGS_RDX]; 3025 regs->rsi = vcpu->arch.regs[VCPU_REGS_RSI]; 3026 regs->rdi = vcpu->arch.regs[VCPU_REGS_RDI]; 3027 regs->rsp = vcpu->arch.regs[VCPU_REGS_RSP]; 3028 regs->rbp = vcpu->arch.regs[VCPU_REGS_RBP]; 3029 #ifdef CONFIG_X86_64 3030 regs->r8 = vcpu->arch.regs[VCPU_REGS_R8]; 3031 regs->r9 = vcpu->arch.regs[VCPU_REGS_R9]; 3032 regs->r10 = vcpu->arch.regs[VCPU_REGS_R10]; 3033 regs->r11 = vcpu->arch.regs[VCPU_REGS_R11]; 3034 regs->r12 = vcpu->arch.regs[VCPU_REGS_R12]; 3035 regs->r13 = vcpu->arch.regs[VCPU_REGS_R13]; 3036 regs->r14 = vcpu->arch.regs[VCPU_REGS_R14]; 3037 regs->r15 = vcpu->arch.regs[VCPU_REGS_R15]; 3038 #endif 3039 3040 regs->rip = vcpu->arch.rip; 3041 regs->rflags = kvm_x86_ops->get_rflags(vcpu); 3042 3043 /* 3044 * Don't leak debug flags in case they were set for guest debugging 3045 */ 3046 if (vcpu->guest_debug.enabled && vcpu->guest_debug.singlestep) 3047 regs->rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF); 3048 3049 vcpu_put(vcpu); 3050 3051 return 0; 3052 } 3053 3054 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) 3055 { 3056 vcpu_load(vcpu); 3057 3058 vcpu->arch.regs[VCPU_REGS_RAX] = regs->rax; 3059 vcpu->arch.regs[VCPU_REGS_RBX] = regs->rbx; 3060 vcpu->arch.regs[VCPU_REGS_RCX] = regs->rcx; 3061 vcpu->arch.regs[VCPU_REGS_RDX] = regs->rdx; 3062 vcpu->arch.regs[VCPU_REGS_RSI] = regs->rsi; 3063 vcpu->arch.regs[VCPU_REGS_RDI] = regs->rdi; 3064 vcpu->arch.regs[VCPU_REGS_RSP] = regs->rsp; 3065 vcpu->arch.regs[VCPU_REGS_RBP] = regs->rbp; 3066 #ifdef CONFIG_X86_64 3067 vcpu->arch.regs[VCPU_REGS_R8] = regs->r8; 3068 vcpu->arch.regs[VCPU_REGS_R9] = regs->r9; 3069 vcpu->arch.regs[VCPU_REGS_R10] = regs->r10; 3070 vcpu->arch.regs[VCPU_REGS_R11] = regs->r11; 3071 vcpu->arch.regs[VCPU_REGS_R12] = regs->r12; 3072 vcpu->arch.regs[VCPU_REGS_R13] = regs->r13; 3073 vcpu->arch.regs[VCPU_REGS_R14] = regs->r14; 3074 vcpu->arch.regs[VCPU_REGS_R15] = regs->r15; 3075 #endif 3076 3077 vcpu->arch.rip = regs->rip; 3078 kvm_x86_ops->set_rflags(vcpu, regs->rflags); 3079 3080 kvm_x86_ops->decache_regs(vcpu); 3081 3082 vcpu->arch.exception.pending = false; 3083 3084 vcpu_put(vcpu); 3085 3086 return 0; 3087 } 3088 3089 void kvm_get_segment(struct kvm_vcpu *vcpu, 3090 struct kvm_segment *var, int seg) 3091 { 3092 kvm_x86_ops->get_segment(vcpu, var, seg); 3093 } 3094 3095 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l) 3096 { 3097 struct kvm_segment cs; 3098 3099 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS); 3100 *db = cs.db; 3101 *l = cs.l; 3102 } 3103 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits); 3104 3105 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu, 3106 struct kvm_sregs *sregs) 3107 { 3108 struct descriptor_table dt; 3109 int pending_vec; 3110 3111 vcpu_load(vcpu); 3112 3113 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS); 3114 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS); 3115 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES); 3116 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS); 3117 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS); 3118 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS); 3119 3120 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR); 3121 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR); 3122 3123 kvm_x86_ops->get_idt(vcpu, &dt); 3124 sregs->idt.limit = dt.limit; 3125 sregs->idt.base = dt.base; 3126 kvm_x86_ops->get_gdt(vcpu, &dt); 3127 sregs->gdt.limit = dt.limit; 3128 sregs->gdt.base = dt.base; 3129 3130 kvm_x86_ops->decache_cr4_guest_bits(vcpu); 3131 sregs->cr0 = vcpu->arch.cr0; 3132 sregs->cr2 = vcpu->arch.cr2; 3133 sregs->cr3 = vcpu->arch.cr3; 3134 sregs->cr4 = vcpu->arch.cr4; 3135 sregs->cr8 = kvm_get_cr8(vcpu); 3136 sregs->efer = vcpu->arch.shadow_efer; 3137 sregs->apic_base = kvm_get_apic_base(vcpu); 3138 3139 if (irqchip_in_kernel(vcpu->kvm)) { 3140 memset(sregs->interrupt_bitmap, 0, 3141 sizeof sregs->interrupt_bitmap); 3142 pending_vec = kvm_x86_ops->get_irq(vcpu); 3143 if (pending_vec >= 0) 3144 set_bit(pending_vec, 3145 (unsigned long *)sregs->interrupt_bitmap); 3146 } else 3147 memcpy(sregs->interrupt_bitmap, vcpu->arch.irq_pending, 3148 sizeof sregs->interrupt_bitmap); 3149 3150 vcpu_put(vcpu); 3151 3152 return 0; 3153 } 3154 3155 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu, 3156 struct kvm_mp_state *mp_state) 3157 { 3158 vcpu_load(vcpu); 3159 mp_state->mp_state = vcpu->arch.mp_state; 3160 vcpu_put(vcpu); 3161 return 0; 3162 } 3163 3164 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu, 3165 struct kvm_mp_state *mp_state) 3166 { 3167 vcpu_load(vcpu); 3168 vcpu->arch.mp_state = mp_state->mp_state; 3169 vcpu_put(vcpu); 3170 return 0; 3171 } 3172 3173 static void kvm_set_segment(struct kvm_vcpu *vcpu, 3174 struct kvm_segment *var, int seg) 3175 { 3176 kvm_x86_ops->set_segment(vcpu, var, seg); 3177 } 3178 3179 static void seg_desct_to_kvm_desct(struct desc_struct *seg_desc, u16 selector, 3180 struct kvm_segment *kvm_desct) 3181 { 3182 kvm_desct->base = seg_desc->base0; 3183 kvm_desct->base |= seg_desc->base1 << 16; 3184 kvm_desct->base |= seg_desc->base2 << 24; 3185 kvm_desct->limit = seg_desc->limit0; 3186 kvm_desct->limit |= seg_desc->limit << 16; 3187 kvm_desct->selector = selector; 3188 kvm_desct->type = seg_desc->type; 3189 kvm_desct->present = seg_desc->p; 3190 kvm_desct->dpl = seg_desc->dpl; 3191 kvm_desct->db = seg_desc->d; 3192 kvm_desct->s = seg_desc->s; 3193 kvm_desct->l = seg_desc->l; 3194 kvm_desct->g = seg_desc->g; 3195 kvm_desct->avl = seg_desc->avl; 3196 if (!selector) 3197 kvm_desct->unusable = 1; 3198 else 3199 kvm_desct->unusable = 0; 3200 kvm_desct->padding = 0; 3201 } 3202 3203 static void get_segment_descritptor_dtable(struct kvm_vcpu *vcpu, 3204 u16 selector, 3205 struct descriptor_table *dtable) 3206 { 3207 if (selector & 1 << 2) { 3208 struct kvm_segment kvm_seg; 3209 3210 kvm_get_segment(vcpu, &kvm_seg, VCPU_SREG_LDTR); 3211 3212 if (kvm_seg.unusable) 3213 dtable->limit = 0; 3214 else 3215 dtable->limit = kvm_seg.limit; 3216 dtable->base = kvm_seg.base; 3217 } 3218 else 3219 kvm_x86_ops->get_gdt(vcpu, dtable); 3220 } 3221 3222 /* allowed just for 8 bytes segments */ 3223 static int load_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, 3224 struct desc_struct *seg_desc) 3225 { 3226 struct descriptor_table dtable; 3227 u16 index = selector >> 3; 3228 3229 get_segment_descritptor_dtable(vcpu, selector, &dtable); 3230 3231 if (dtable.limit < index * 8 + 7) { 3232 kvm_queue_exception_e(vcpu, GP_VECTOR, selector & 0xfffc); 3233 return 1; 3234 } 3235 return kvm_read_guest(vcpu->kvm, dtable.base + index * 8, seg_desc, 8); 3236 } 3237 3238 /* allowed just for 8 bytes segments */ 3239 static int save_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, 3240 struct desc_struct *seg_desc) 3241 { 3242 struct descriptor_table dtable; 3243 u16 index = selector >> 3; 3244 3245 get_segment_descritptor_dtable(vcpu, selector, &dtable); 3246 3247 if (dtable.limit < index * 8 + 7) 3248 return 1; 3249 return kvm_write_guest(vcpu->kvm, dtable.base + index * 8, seg_desc, 8); 3250 } 3251 3252 static u32 get_tss_base_addr(struct kvm_vcpu *vcpu, 3253 struct desc_struct *seg_desc) 3254 { 3255 u32 base_addr; 3256 3257 base_addr = seg_desc->base0; 3258 base_addr |= (seg_desc->base1 << 16); 3259 base_addr |= (seg_desc->base2 << 24); 3260 3261 return base_addr; 3262 } 3263 3264 static int load_tss_segment32(struct kvm_vcpu *vcpu, 3265 struct desc_struct *seg_desc, 3266 struct tss_segment_32 *tss) 3267 { 3268 u32 base_addr; 3269 3270 base_addr = get_tss_base_addr(vcpu, seg_desc); 3271 3272 return kvm_read_guest(vcpu->kvm, base_addr, tss, 3273 sizeof(struct tss_segment_32)); 3274 } 3275 3276 static int save_tss_segment32(struct kvm_vcpu *vcpu, 3277 struct desc_struct *seg_desc, 3278 struct tss_segment_32 *tss) 3279 { 3280 u32 base_addr; 3281 3282 base_addr = get_tss_base_addr(vcpu, seg_desc); 3283 3284 return kvm_write_guest(vcpu->kvm, base_addr, tss, 3285 sizeof(struct tss_segment_32)); 3286 } 3287 3288 static int load_tss_segment16(struct kvm_vcpu *vcpu, 3289 struct desc_struct *seg_desc, 3290 struct tss_segment_16 *tss) 3291 { 3292 u32 base_addr; 3293 3294 base_addr = get_tss_base_addr(vcpu, seg_desc); 3295 3296 return kvm_read_guest(vcpu->kvm, base_addr, tss, 3297 sizeof(struct tss_segment_16)); 3298 } 3299 3300 static int save_tss_segment16(struct kvm_vcpu *vcpu, 3301 struct desc_struct *seg_desc, 3302 struct tss_segment_16 *tss) 3303 { 3304 u32 base_addr; 3305 3306 base_addr = get_tss_base_addr(vcpu, seg_desc); 3307 3308 return kvm_write_guest(vcpu->kvm, base_addr, tss, 3309 sizeof(struct tss_segment_16)); 3310 } 3311 3312 static u16 get_segment_selector(struct kvm_vcpu *vcpu, int seg) 3313 { 3314 struct kvm_segment kvm_seg; 3315 3316 kvm_get_segment(vcpu, &kvm_seg, seg); 3317 return kvm_seg.selector; 3318 } 3319 3320 static int load_segment_descriptor_to_kvm_desct(struct kvm_vcpu *vcpu, 3321 u16 selector, 3322 struct kvm_segment *kvm_seg) 3323 { 3324 struct desc_struct seg_desc; 3325 3326 if (load_guest_segment_descriptor(vcpu, selector, &seg_desc)) 3327 return 1; 3328 seg_desct_to_kvm_desct(&seg_desc, selector, kvm_seg); 3329 return 0; 3330 } 3331 3332 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, 3333 int type_bits, int seg) 3334 { 3335 struct kvm_segment kvm_seg; 3336 3337 if (load_segment_descriptor_to_kvm_desct(vcpu, selector, &kvm_seg)) 3338 return 1; 3339 kvm_seg.type |= type_bits; 3340 3341 if (seg != VCPU_SREG_SS && seg != VCPU_SREG_CS && 3342 seg != VCPU_SREG_LDTR) 3343 if (!kvm_seg.s) 3344 kvm_seg.unusable = 1; 3345 3346 kvm_set_segment(vcpu, &kvm_seg, seg); 3347 return 0; 3348 } 3349 3350 static void save_state_to_tss32(struct kvm_vcpu *vcpu, 3351 struct tss_segment_32 *tss) 3352 { 3353 tss->cr3 = vcpu->arch.cr3; 3354 tss->eip = vcpu->arch.rip; 3355 tss->eflags = kvm_x86_ops->get_rflags(vcpu); 3356 tss->eax = vcpu->arch.regs[VCPU_REGS_RAX]; 3357 tss->ecx = vcpu->arch.regs[VCPU_REGS_RCX]; 3358 tss->edx = vcpu->arch.regs[VCPU_REGS_RDX]; 3359 tss->ebx = vcpu->arch.regs[VCPU_REGS_RBX]; 3360 tss->esp = vcpu->arch.regs[VCPU_REGS_RSP]; 3361 tss->ebp = vcpu->arch.regs[VCPU_REGS_RBP]; 3362 tss->esi = vcpu->arch.regs[VCPU_REGS_RSI]; 3363 tss->edi = vcpu->arch.regs[VCPU_REGS_RDI]; 3364 3365 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES); 3366 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS); 3367 tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS); 3368 tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS); 3369 tss->fs = get_segment_selector(vcpu, VCPU_SREG_FS); 3370 tss->gs = get_segment_selector(vcpu, VCPU_SREG_GS); 3371 tss->ldt_selector = get_segment_selector(vcpu, VCPU_SREG_LDTR); 3372 tss->prev_task_link = get_segment_selector(vcpu, VCPU_SREG_TR); 3373 } 3374 3375 static int load_state_from_tss32(struct kvm_vcpu *vcpu, 3376 struct tss_segment_32 *tss) 3377 { 3378 kvm_set_cr3(vcpu, tss->cr3); 3379 3380 vcpu->arch.rip = tss->eip; 3381 kvm_x86_ops->set_rflags(vcpu, tss->eflags | 2); 3382 3383 vcpu->arch.regs[VCPU_REGS_RAX] = tss->eax; 3384 vcpu->arch.regs[VCPU_REGS_RCX] = tss->ecx; 3385 vcpu->arch.regs[VCPU_REGS_RDX] = tss->edx; 3386 vcpu->arch.regs[VCPU_REGS_RBX] = tss->ebx; 3387 vcpu->arch.regs[VCPU_REGS_RSP] = tss->esp; 3388 vcpu->arch.regs[VCPU_REGS_RBP] = tss->ebp; 3389 vcpu->arch.regs[VCPU_REGS_RSI] = tss->esi; 3390 vcpu->arch.regs[VCPU_REGS_RDI] = tss->edi; 3391 3392 if (kvm_load_segment_descriptor(vcpu, tss->ldt_selector, 0, VCPU_SREG_LDTR)) 3393 return 1; 3394 3395 if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES)) 3396 return 1; 3397 3398 if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS)) 3399 return 1; 3400 3401 if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS)) 3402 return 1; 3403 3404 if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS)) 3405 return 1; 3406 3407 if (kvm_load_segment_descriptor(vcpu, tss->fs, 1, VCPU_SREG_FS)) 3408 return 1; 3409 3410 if (kvm_load_segment_descriptor(vcpu, tss->gs, 1, VCPU_SREG_GS)) 3411 return 1; 3412 return 0; 3413 } 3414 3415 static void save_state_to_tss16(struct kvm_vcpu *vcpu, 3416 struct tss_segment_16 *tss) 3417 { 3418 tss->ip = vcpu->arch.rip; 3419 tss->flag = kvm_x86_ops->get_rflags(vcpu); 3420 tss->ax = vcpu->arch.regs[VCPU_REGS_RAX]; 3421 tss->cx = vcpu->arch.regs[VCPU_REGS_RCX]; 3422 tss->dx = vcpu->arch.regs[VCPU_REGS_RDX]; 3423 tss->bx = vcpu->arch.regs[VCPU_REGS_RBX]; 3424 tss->sp = vcpu->arch.regs[VCPU_REGS_RSP]; 3425 tss->bp = vcpu->arch.regs[VCPU_REGS_RBP]; 3426 tss->si = vcpu->arch.regs[VCPU_REGS_RSI]; 3427 tss->di = vcpu->arch.regs[VCPU_REGS_RDI]; 3428 3429 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES); 3430 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS); 3431 tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS); 3432 tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS); 3433 tss->ldt = get_segment_selector(vcpu, VCPU_SREG_LDTR); 3434 tss->prev_task_link = get_segment_selector(vcpu, VCPU_SREG_TR); 3435 } 3436 3437 static int load_state_from_tss16(struct kvm_vcpu *vcpu, 3438 struct tss_segment_16 *tss) 3439 { 3440 vcpu->arch.rip = tss->ip; 3441 kvm_x86_ops->set_rflags(vcpu, tss->flag | 2); 3442 vcpu->arch.regs[VCPU_REGS_RAX] = tss->ax; 3443 vcpu->arch.regs[VCPU_REGS_RCX] = tss->cx; 3444 vcpu->arch.regs[VCPU_REGS_RDX] = tss->dx; 3445 vcpu->arch.regs[VCPU_REGS_RBX] = tss->bx; 3446 vcpu->arch.regs[VCPU_REGS_RSP] = tss->sp; 3447 vcpu->arch.regs[VCPU_REGS_RBP] = tss->bp; 3448 vcpu->arch.regs[VCPU_REGS_RSI] = tss->si; 3449 vcpu->arch.regs[VCPU_REGS_RDI] = tss->di; 3450 3451 if (kvm_load_segment_descriptor(vcpu, tss->ldt, 0, VCPU_SREG_LDTR)) 3452 return 1; 3453 3454 if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES)) 3455 return 1; 3456 3457 if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS)) 3458 return 1; 3459 3460 if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS)) 3461 return 1; 3462 3463 if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS)) 3464 return 1; 3465 return 0; 3466 } 3467 3468 static int kvm_task_switch_16(struct kvm_vcpu *vcpu, u16 tss_selector, 3469 struct desc_struct *cseg_desc, 3470 struct desc_struct *nseg_desc) 3471 { 3472 struct tss_segment_16 tss_segment_16; 3473 int ret = 0; 3474 3475 if (load_tss_segment16(vcpu, cseg_desc, &tss_segment_16)) 3476 goto out; 3477 3478 save_state_to_tss16(vcpu, &tss_segment_16); 3479 save_tss_segment16(vcpu, cseg_desc, &tss_segment_16); 3480 3481 if (load_tss_segment16(vcpu, nseg_desc, &tss_segment_16)) 3482 goto out; 3483 if (load_state_from_tss16(vcpu, &tss_segment_16)) 3484 goto out; 3485 3486 ret = 1; 3487 out: 3488 return ret; 3489 } 3490 3491 static int kvm_task_switch_32(struct kvm_vcpu *vcpu, u16 tss_selector, 3492 struct desc_struct *cseg_desc, 3493 struct desc_struct *nseg_desc) 3494 { 3495 struct tss_segment_32 tss_segment_32; 3496 int ret = 0; 3497 3498 if (load_tss_segment32(vcpu, cseg_desc, &tss_segment_32)) 3499 goto out; 3500 3501 save_state_to_tss32(vcpu, &tss_segment_32); 3502 save_tss_segment32(vcpu, cseg_desc, &tss_segment_32); 3503 3504 if (load_tss_segment32(vcpu, nseg_desc, &tss_segment_32)) 3505 goto out; 3506 if (load_state_from_tss32(vcpu, &tss_segment_32)) 3507 goto out; 3508 3509 ret = 1; 3510 out: 3511 return ret; 3512 } 3513 3514 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason) 3515 { 3516 struct kvm_segment tr_seg; 3517 struct desc_struct cseg_desc; 3518 struct desc_struct nseg_desc; 3519 int ret = 0; 3520 3521 kvm_get_segment(vcpu, &tr_seg, VCPU_SREG_TR); 3522 3523 if (load_guest_segment_descriptor(vcpu, tss_selector, &nseg_desc)) 3524 goto out; 3525 3526 if (load_guest_segment_descriptor(vcpu, tr_seg.selector, &cseg_desc)) 3527 goto out; 3528 3529 3530 if (reason != TASK_SWITCH_IRET) { 3531 int cpl; 3532 3533 cpl = kvm_x86_ops->get_cpl(vcpu); 3534 if ((tss_selector & 3) > nseg_desc.dpl || cpl > nseg_desc.dpl) { 3535 kvm_queue_exception_e(vcpu, GP_VECTOR, 0); 3536 return 1; 3537 } 3538 } 3539 3540 if (!nseg_desc.p || (nseg_desc.limit0 | nseg_desc.limit << 16) < 0x67) { 3541 kvm_queue_exception_e(vcpu, TS_VECTOR, tss_selector & 0xfffc); 3542 return 1; 3543 } 3544 3545 if (reason == TASK_SWITCH_IRET || reason == TASK_SWITCH_JMP) { 3546 cseg_desc.type &= ~(1 << 1); //clear the B flag 3547 save_guest_segment_descriptor(vcpu, tr_seg.selector, 3548 &cseg_desc); 3549 } 3550 3551 if (reason == TASK_SWITCH_IRET) { 3552 u32 eflags = kvm_x86_ops->get_rflags(vcpu); 3553 kvm_x86_ops->set_rflags(vcpu, eflags & ~X86_EFLAGS_NT); 3554 } 3555 3556 kvm_x86_ops->skip_emulated_instruction(vcpu); 3557 kvm_x86_ops->cache_regs(vcpu); 3558 3559 if (nseg_desc.type & 8) 3560 ret = kvm_task_switch_32(vcpu, tss_selector, &cseg_desc, 3561 &nseg_desc); 3562 else 3563 ret = kvm_task_switch_16(vcpu, tss_selector, &cseg_desc, 3564 &nseg_desc); 3565 3566 if (reason == TASK_SWITCH_CALL || reason == TASK_SWITCH_GATE) { 3567 u32 eflags = kvm_x86_ops->get_rflags(vcpu); 3568 kvm_x86_ops->set_rflags(vcpu, eflags | X86_EFLAGS_NT); 3569 } 3570 3571 if (reason != TASK_SWITCH_IRET) { 3572 nseg_desc.type |= (1 << 1); 3573 save_guest_segment_descriptor(vcpu, tss_selector, 3574 &nseg_desc); 3575 } 3576 3577 kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 | X86_CR0_TS); 3578 seg_desct_to_kvm_desct(&nseg_desc, tss_selector, &tr_seg); 3579 tr_seg.type = 11; 3580 kvm_set_segment(vcpu, &tr_seg, VCPU_SREG_TR); 3581 out: 3582 kvm_x86_ops->decache_regs(vcpu); 3583 return ret; 3584 } 3585 EXPORT_SYMBOL_GPL(kvm_task_switch); 3586 3587 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu, 3588 struct kvm_sregs *sregs) 3589 { 3590 int mmu_reset_needed = 0; 3591 int i, pending_vec, max_bits; 3592 struct descriptor_table dt; 3593 3594 vcpu_load(vcpu); 3595 3596 dt.limit = sregs->idt.limit; 3597 dt.base = sregs->idt.base; 3598 kvm_x86_ops->set_idt(vcpu, &dt); 3599 dt.limit = sregs->gdt.limit; 3600 dt.base = sregs->gdt.base; 3601 kvm_x86_ops->set_gdt(vcpu, &dt); 3602 3603 vcpu->arch.cr2 = sregs->cr2; 3604 mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3; 3605 vcpu->arch.cr3 = sregs->cr3; 3606 3607 kvm_set_cr8(vcpu, sregs->cr8); 3608 3609 mmu_reset_needed |= vcpu->arch.shadow_efer != sregs->efer; 3610 kvm_x86_ops->set_efer(vcpu, sregs->efer); 3611 kvm_set_apic_base(vcpu, sregs->apic_base); 3612 3613 kvm_x86_ops->decache_cr4_guest_bits(vcpu); 3614 3615 mmu_reset_needed |= vcpu->arch.cr0 != sregs->cr0; 3616 kvm_x86_ops->set_cr0(vcpu, sregs->cr0); 3617 vcpu->arch.cr0 = sregs->cr0; 3618 3619 mmu_reset_needed |= vcpu->arch.cr4 != sregs->cr4; 3620 kvm_x86_ops->set_cr4(vcpu, sregs->cr4); 3621 if (!is_long_mode(vcpu) && is_pae(vcpu)) 3622 load_pdptrs(vcpu, vcpu->arch.cr3); 3623 3624 if (mmu_reset_needed) 3625 kvm_mmu_reset_context(vcpu); 3626 3627 if (!irqchip_in_kernel(vcpu->kvm)) { 3628 memcpy(vcpu->arch.irq_pending, sregs->interrupt_bitmap, 3629 sizeof vcpu->arch.irq_pending); 3630 vcpu->arch.irq_summary = 0; 3631 for (i = 0; i < ARRAY_SIZE(vcpu->arch.irq_pending); ++i) 3632 if (vcpu->arch.irq_pending[i]) 3633 __set_bit(i, &vcpu->arch.irq_summary); 3634 } else { 3635 max_bits = (sizeof sregs->interrupt_bitmap) << 3; 3636 pending_vec = find_first_bit( 3637 (const unsigned long *)sregs->interrupt_bitmap, 3638 max_bits); 3639 /* Only pending external irq is handled here */ 3640 if (pending_vec < max_bits) { 3641 kvm_x86_ops->set_irq(vcpu, pending_vec); 3642 pr_debug("Set back pending irq %d\n", 3643 pending_vec); 3644 } 3645 } 3646 3647 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS); 3648 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS); 3649 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES); 3650 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS); 3651 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS); 3652 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS); 3653 3654 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR); 3655 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR); 3656 3657 vcpu_put(vcpu); 3658 3659 return 0; 3660 } 3661 3662 int kvm_arch_vcpu_ioctl_debug_guest(struct kvm_vcpu *vcpu, 3663 struct kvm_debug_guest *dbg) 3664 { 3665 int r; 3666 3667 vcpu_load(vcpu); 3668 3669 r = kvm_x86_ops->set_guest_debug(vcpu, dbg); 3670 3671 vcpu_put(vcpu); 3672 3673 return r; 3674 } 3675 3676 /* 3677 * fxsave fpu state. Taken from x86_64/processor.h. To be killed when 3678 * we have asm/x86/processor.h 3679 */ 3680 struct fxsave { 3681 u16 cwd; 3682 u16 swd; 3683 u16 twd; 3684 u16 fop; 3685 u64 rip; 3686 u64 rdp; 3687 u32 mxcsr; 3688 u32 mxcsr_mask; 3689 u32 st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */ 3690 #ifdef CONFIG_X86_64 3691 u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */ 3692 #else 3693 u32 xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */ 3694 #endif 3695 }; 3696 3697 /* 3698 * Translate a guest virtual address to a guest physical address. 3699 */ 3700 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu, 3701 struct kvm_translation *tr) 3702 { 3703 unsigned long vaddr = tr->linear_address; 3704 gpa_t gpa; 3705 3706 vcpu_load(vcpu); 3707 down_read(&vcpu->kvm->slots_lock); 3708 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, vaddr); 3709 up_read(&vcpu->kvm->slots_lock); 3710 tr->physical_address = gpa; 3711 tr->valid = gpa != UNMAPPED_GVA; 3712 tr->writeable = 1; 3713 tr->usermode = 0; 3714 vcpu_put(vcpu); 3715 3716 return 0; 3717 } 3718 3719 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu) 3720 { 3721 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image; 3722 3723 vcpu_load(vcpu); 3724 3725 memcpy(fpu->fpr, fxsave->st_space, 128); 3726 fpu->fcw = fxsave->cwd; 3727 fpu->fsw = fxsave->swd; 3728 fpu->ftwx = fxsave->twd; 3729 fpu->last_opcode = fxsave->fop; 3730 fpu->last_ip = fxsave->rip; 3731 fpu->last_dp = fxsave->rdp; 3732 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space); 3733 3734 vcpu_put(vcpu); 3735 3736 return 0; 3737 } 3738 3739 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu) 3740 { 3741 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image; 3742 3743 vcpu_load(vcpu); 3744 3745 memcpy(fxsave->st_space, fpu->fpr, 128); 3746 fxsave->cwd = fpu->fcw; 3747 fxsave->swd = fpu->fsw; 3748 fxsave->twd = fpu->ftwx; 3749 fxsave->fop = fpu->last_opcode; 3750 fxsave->rip = fpu->last_ip; 3751 fxsave->rdp = fpu->last_dp; 3752 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space); 3753 3754 vcpu_put(vcpu); 3755 3756 return 0; 3757 } 3758 3759 void fx_init(struct kvm_vcpu *vcpu) 3760 { 3761 unsigned after_mxcsr_mask; 3762 3763 /* 3764 * Touch the fpu the first time in non atomic context as if 3765 * this is the first fpu instruction the exception handler 3766 * will fire before the instruction returns and it'll have to 3767 * allocate ram with GFP_KERNEL. 3768 */ 3769 if (!used_math()) 3770 kvm_fx_save(&vcpu->arch.host_fx_image); 3771 3772 /* Initialize guest FPU by resetting ours and saving into guest's */ 3773 preempt_disable(); 3774 kvm_fx_save(&vcpu->arch.host_fx_image); 3775 kvm_fx_finit(); 3776 kvm_fx_save(&vcpu->arch.guest_fx_image); 3777 kvm_fx_restore(&vcpu->arch.host_fx_image); 3778 preempt_enable(); 3779 3780 vcpu->arch.cr0 |= X86_CR0_ET; 3781 after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space); 3782 vcpu->arch.guest_fx_image.mxcsr = 0x1f80; 3783 memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask, 3784 0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask); 3785 } 3786 EXPORT_SYMBOL_GPL(fx_init); 3787 3788 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu) 3789 { 3790 if (!vcpu->fpu_active || vcpu->guest_fpu_loaded) 3791 return; 3792 3793 vcpu->guest_fpu_loaded = 1; 3794 kvm_fx_save(&vcpu->arch.host_fx_image); 3795 kvm_fx_restore(&vcpu->arch.guest_fx_image); 3796 } 3797 EXPORT_SYMBOL_GPL(kvm_load_guest_fpu); 3798 3799 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu) 3800 { 3801 if (!vcpu->guest_fpu_loaded) 3802 return; 3803 3804 vcpu->guest_fpu_loaded = 0; 3805 kvm_fx_save(&vcpu->arch.guest_fx_image); 3806 kvm_fx_restore(&vcpu->arch.host_fx_image); 3807 ++vcpu->stat.fpu_reload; 3808 } 3809 EXPORT_SYMBOL_GPL(kvm_put_guest_fpu); 3810 3811 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu) 3812 { 3813 kvm_x86_ops->vcpu_free(vcpu); 3814 } 3815 3816 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm, 3817 unsigned int id) 3818 { 3819 return kvm_x86_ops->vcpu_create(kvm, id); 3820 } 3821 3822 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu) 3823 { 3824 int r; 3825 3826 /* We do fxsave: this must be aligned. */ 3827 BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF); 3828 3829 vcpu_load(vcpu); 3830 r = kvm_arch_vcpu_reset(vcpu); 3831 if (r == 0) 3832 r = kvm_mmu_setup(vcpu); 3833 vcpu_put(vcpu); 3834 if (r < 0) 3835 goto free_vcpu; 3836 3837 return 0; 3838 free_vcpu: 3839 kvm_x86_ops->vcpu_free(vcpu); 3840 return r; 3841 } 3842 3843 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu) 3844 { 3845 vcpu_load(vcpu); 3846 kvm_mmu_unload(vcpu); 3847 vcpu_put(vcpu); 3848 3849 kvm_x86_ops->vcpu_free(vcpu); 3850 } 3851 3852 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu) 3853 { 3854 return kvm_x86_ops->vcpu_reset(vcpu); 3855 } 3856 3857 void kvm_arch_hardware_enable(void *garbage) 3858 { 3859 kvm_x86_ops->hardware_enable(garbage); 3860 } 3861 3862 void kvm_arch_hardware_disable(void *garbage) 3863 { 3864 kvm_x86_ops->hardware_disable(garbage); 3865 } 3866 3867 int kvm_arch_hardware_setup(void) 3868 { 3869 return kvm_x86_ops->hardware_setup(); 3870 } 3871 3872 void kvm_arch_hardware_unsetup(void) 3873 { 3874 kvm_x86_ops->hardware_unsetup(); 3875 } 3876 3877 void kvm_arch_check_processor_compat(void *rtn) 3878 { 3879 kvm_x86_ops->check_processor_compatibility(rtn); 3880 } 3881 3882 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu) 3883 { 3884 struct page *page; 3885 struct kvm *kvm; 3886 int r; 3887 3888 BUG_ON(vcpu->kvm == NULL); 3889 kvm = vcpu->kvm; 3890 3891 vcpu->arch.mmu.root_hpa = INVALID_PAGE; 3892 if (!irqchip_in_kernel(kvm) || vcpu->vcpu_id == 0) 3893 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE; 3894 else 3895 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED; 3896 3897 page = alloc_page(GFP_KERNEL | __GFP_ZERO); 3898 if (!page) { 3899 r = -ENOMEM; 3900 goto fail; 3901 } 3902 vcpu->arch.pio_data = page_address(page); 3903 3904 r = kvm_mmu_create(vcpu); 3905 if (r < 0) 3906 goto fail_free_pio_data; 3907 3908 if (irqchip_in_kernel(kvm)) { 3909 r = kvm_create_lapic(vcpu); 3910 if (r < 0) 3911 goto fail_mmu_destroy; 3912 } 3913 3914 return 0; 3915 3916 fail_mmu_destroy: 3917 kvm_mmu_destroy(vcpu); 3918 fail_free_pio_data: 3919 free_page((unsigned long)vcpu->arch.pio_data); 3920 fail: 3921 return r; 3922 } 3923 3924 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu) 3925 { 3926 kvm_free_lapic(vcpu); 3927 down_read(&vcpu->kvm->slots_lock); 3928 kvm_mmu_destroy(vcpu); 3929 up_read(&vcpu->kvm->slots_lock); 3930 free_page((unsigned long)vcpu->arch.pio_data); 3931 } 3932 3933 struct kvm *kvm_arch_create_vm(void) 3934 { 3935 struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL); 3936 3937 if (!kvm) 3938 return ERR_PTR(-ENOMEM); 3939 3940 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages); 3941 3942 return kvm; 3943 } 3944 3945 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu) 3946 { 3947 vcpu_load(vcpu); 3948 kvm_mmu_unload(vcpu); 3949 vcpu_put(vcpu); 3950 } 3951 3952 static void kvm_free_vcpus(struct kvm *kvm) 3953 { 3954 unsigned int i; 3955 3956 /* 3957 * Unpin any mmu pages first. 3958 */ 3959 for (i = 0; i < KVM_MAX_VCPUS; ++i) 3960 if (kvm->vcpus[i]) 3961 kvm_unload_vcpu_mmu(kvm->vcpus[i]); 3962 for (i = 0; i < KVM_MAX_VCPUS; ++i) { 3963 if (kvm->vcpus[i]) { 3964 kvm_arch_vcpu_free(kvm->vcpus[i]); 3965 kvm->vcpus[i] = NULL; 3966 } 3967 } 3968 3969 } 3970 3971 void kvm_arch_destroy_vm(struct kvm *kvm) 3972 { 3973 kvm_free_pit(kvm); 3974 kfree(kvm->arch.vpic); 3975 kfree(kvm->arch.vioapic); 3976 kvm_free_vcpus(kvm); 3977 kvm_free_physmem(kvm); 3978 if (kvm->arch.apic_access_page) 3979 put_page(kvm->arch.apic_access_page); 3980 if (kvm->arch.ept_identity_pagetable) 3981 put_page(kvm->arch.ept_identity_pagetable); 3982 kfree(kvm); 3983 } 3984 3985 int kvm_arch_set_memory_region(struct kvm *kvm, 3986 struct kvm_userspace_memory_region *mem, 3987 struct kvm_memory_slot old, 3988 int user_alloc) 3989 { 3990 int npages = mem->memory_size >> PAGE_SHIFT; 3991 struct kvm_memory_slot *memslot = &kvm->memslots[mem->slot]; 3992 3993 /*To keep backward compatibility with older userspace, 3994 *x86 needs to hanlde !user_alloc case. 3995 */ 3996 if (!user_alloc) { 3997 if (npages && !old.rmap) { 3998 down_write(¤t->mm->mmap_sem); 3999 memslot->userspace_addr = do_mmap(NULL, 0, 4000 npages * PAGE_SIZE, 4001 PROT_READ | PROT_WRITE, 4002 MAP_SHARED | MAP_ANONYMOUS, 4003 0); 4004 up_write(¤t->mm->mmap_sem); 4005 4006 if (IS_ERR((void *)memslot->userspace_addr)) 4007 return PTR_ERR((void *)memslot->userspace_addr); 4008 } else { 4009 if (!old.user_alloc && old.rmap) { 4010 int ret; 4011 4012 down_write(¤t->mm->mmap_sem); 4013 ret = do_munmap(current->mm, old.userspace_addr, 4014 old.npages * PAGE_SIZE); 4015 up_write(¤t->mm->mmap_sem); 4016 if (ret < 0) 4017 printk(KERN_WARNING 4018 "kvm_vm_ioctl_set_memory_region: " 4019 "failed to munmap memory\n"); 4020 } 4021 } 4022 } 4023 4024 if (!kvm->arch.n_requested_mmu_pages) { 4025 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm); 4026 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages); 4027 } 4028 4029 kvm_mmu_slot_remove_write_access(kvm, mem->slot); 4030 kvm_flush_remote_tlbs(kvm); 4031 4032 return 0; 4033 } 4034 4035 void kvm_arch_flush_shadow(struct kvm *kvm) 4036 { 4037 kvm_mmu_zap_all(kvm); 4038 } 4039 4040 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu) 4041 { 4042 return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE 4043 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED; 4044 } 4045 4046 static void vcpu_kick_intr(void *info) 4047 { 4048 #ifdef DEBUG 4049 struct kvm_vcpu *vcpu = (struct kvm_vcpu *)info; 4050 printk(KERN_DEBUG "vcpu_kick_intr %p \n", vcpu); 4051 #endif 4052 } 4053 4054 void kvm_vcpu_kick(struct kvm_vcpu *vcpu) 4055 { 4056 int ipi_pcpu = vcpu->cpu; 4057 int cpu = get_cpu(); 4058 4059 if (waitqueue_active(&vcpu->wq)) { 4060 wake_up_interruptible(&vcpu->wq); 4061 ++vcpu->stat.halt_wakeup; 4062 } 4063 /* 4064 * We may be called synchronously with irqs disabled in guest mode, 4065 * So need not to call smp_call_function_single() in that case. 4066 */ 4067 if (vcpu->guest_mode && vcpu->cpu != cpu) 4068 smp_call_function_single(ipi_pcpu, vcpu_kick_intr, vcpu, 0); 4069 put_cpu(); 4070 } 4071